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firewire: add CSR BUSY_TIMEOUT support
[net-next-2.6.git] / drivers / firewire / core-transaction.c
CommitLineData
c781c06d
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1/*
2 * Core IEEE1394 transaction logic
3038e353
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3 *
4 * Copyright (C) 2004-2006 Kristian Hoegsberg <krh@bitplanet.net>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
e8ca9702 21#include <linux/bug.h>
2a0a2590 22#include <linux/completion.h>
e8ca9702
SR
23#include <linux/device.h>
24#include <linux/errno.h>
77c9a5da 25#include <linux/firewire.h>
e8ca9702
SR
26#include <linux/firewire-constants.h>
27#include <linux/fs.h>
28#include <linux/init.h>
d6053e08 29#include <linux/idr.h>
e8ca9702 30#include <linux/jiffies.h>
3038e353 31#include <linux/kernel.h>
3038e353 32#include <linux/list.h>
e8ca9702
SR
33#include <linux/module.h>
34#include <linux/slab.h>
35#include <linux/spinlock.h>
36#include <linux/string.h>
37#include <linux/timer.h>
38#include <linux/types.h>
39
40#include <asm/byteorder.h>
3038e353 41
77c9a5da 42#include "core.h"
3038e353 43
a77754a7
KH
44#define HEADER_PRI(pri) ((pri) << 0)
45#define HEADER_TCODE(tcode) ((tcode) << 4)
46#define HEADER_RETRY(retry) ((retry) << 8)
47#define HEADER_TLABEL(tlabel) ((tlabel) << 10)
48#define HEADER_DESTINATION(destination) ((destination) << 16)
49#define HEADER_SOURCE(source) ((source) << 16)
50#define HEADER_RCODE(rcode) ((rcode) << 12)
51#define HEADER_OFFSET_HIGH(offset_high) ((offset_high) << 0)
52#define HEADER_DATA_LENGTH(length) ((length) << 16)
53#define HEADER_EXTENDED_TCODE(tcode) ((tcode) << 0)
54
55#define HEADER_GET_TCODE(q) (((q) >> 4) & 0x0f)
56#define HEADER_GET_TLABEL(q) (((q) >> 10) & 0x3f)
57#define HEADER_GET_RCODE(q) (((q) >> 12) & 0x0f)
58#define HEADER_GET_DESTINATION(q) (((q) >> 16) & 0xffff)
59#define HEADER_GET_SOURCE(q) (((q) >> 16) & 0xffff)
60#define HEADER_GET_OFFSET_HIGH(q) (((q) >> 0) & 0xffff)
61#define HEADER_GET_DATA_LENGTH(q) (((q) >> 16) & 0xffff)
62#define HEADER_GET_EXTENDED_TCODE(q) (((q) >> 0) & 0xffff)
63
a7ea6782
SR
64#define HEADER_DESTINATION_IS_BROADCAST(q) \
65 (((q) & HEADER_DESTINATION(0x3f)) == HEADER_DESTINATION(0x3f))
66
77c9a5da
SR
67#define PHY_PACKET_CONFIG 0x0
68#define PHY_PACKET_LINK_ON 0x1
69#define PHY_PACKET_SELF_ID 0x2
70
a77754a7
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71#define PHY_CONFIG_GAP_COUNT(gap_count) (((gap_count) << 16) | (1 << 22))
72#define PHY_CONFIG_ROOT_ID(node_id) ((((node_id) & 0x3f) << 24) | (1 << 23))
73#define PHY_IDENTIFIER(id) ((id) << 30)
3038e353 74
53dca511 75static int close_transaction(struct fw_transaction *transaction,
a38a00fd 76 struct fw_card *card, int rcode)
3038e353 77{
730c32f5 78 struct fw_transaction *t;
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79 unsigned long flags;
80
81 spin_lock_irqsave(&card->lock, flags);
730c32f5
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82 list_for_each_entry(t, &card->transaction_list, link) {
83 if (t == transaction) {
5c40cbfe 84 list_del_init(&t->link);
1e626fdc 85 card->tlabel_mask &= ~(1ULL << t->tlabel);
730c32f5
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86 break;
87 }
88 }
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89 spin_unlock_irqrestore(&card->lock, flags);
90
730c32f5 91 if (&t->link != &card->transaction_list) {
5c40cbfe 92 del_timer_sync(&t->split_timeout_timer);
a38a00fd 93 t->callback(card, rcode, NULL, 0, t->callback_data);
730c32f5
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94 return 0;
95 }
96
97 return -ENOENT;
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98}
99
c781c06d
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100/*
101 * Only valid for transactions that are potentially pending (ie have
102 * been sent).
103 */
53dca511
SR
104int fw_cancel_transaction(struct fw_card *card,
105 struct fw_transaction *transaction)
730c32f5 106{
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107 /*
108 * Cancel the packet transmission if it's still queued. That
730c32f5 109 * will call the packet transmission callback which cancels
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110 * the transaction.
111 */
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112
113 if (card->driver->cancel_packet(card, &transaction->packet) == 0)
114 return 0;
115
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116 /*
117 * If the request packet has already been sent, we need to see
118 * if the transaction is still pending and remove it in that case.
119 */
730c32f5 120
a38a00fd 121 return close_transaction(transaction, card, RCODE_CANCELLED);
730c32f5
KH
122}
123EXPORT_SYMBOL(fw_cancel_transaction);
124
5c40cbfe
CL
125static void split_transaction_timeout_callback(unsigned long data)
126{
127 struct fw_transaction *t = (struct fw_transaction *)data;
128 struct fw_card *card = t->card;
129 unsigned long flags;
130
131 spin_lock_irqsave(&card->lock, flags);
132 if (list_empty(&t->link)) {
133 spin_unlock_irqrestore(&card->lock, flags);
134 return;
135 }
136 list_del(&t->link);
137 card->tlabel_mask &= ~(1ULL << t->tlabel);
138 spin_unlock_irqrestore(&card->lock, flags);
139
140 card->driver->cancel_packet(card, &t->packet);
141
142 /*
143 * At this point cancel_packet will never call the transaction
144 * callback, since we just took the transaction out of the list.
145 * So do it here.
146 */
147 t->callback(card, RCODE_CANCELLED, NULL, 0, t->callback_data);
148}
149
53dca511
SR
150static void transmit_complete_callback(struct fw_packet *packet,
151 struct fw_card *card, int status)
3038e353
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152{
153 struct fw_transaction *t =
154 container_of(packet, struct fw_transaction, packet);
155
156 switch (status) {
157 case ACK_COMPLETE:
a38a00fd 158 close_transaction(t, card, RCODE_COMPLETE);
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159 break;
160 case ACK_PENDING:
161 t->timestamp = packet->timestamp;
162 break;
163 case ACK_BUSY_X:
164 case ACK_BUSY_A:
165 case ACK_BUSY_B:
a38a00fd 166 close_transaction(t, card, RCODE_BUSY);
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167 break;
168 case ACK_DATA_ERROR:
a38a00fd 169 close_transaction(t, card, RCODE_DATA_ERROR);
e5f49c3b 170 break;
3038e353 171 case ACK_TYPE_ERROR:
a38a00fd 172 close_transaction(t, card, RCODE_TYPE_ERROR);
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173 break;
174 default:
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175 /*
176 * In this case the ack is really a juju specific
177 * rcode, so just forward that to the callback.
178 */
a38a00fd 179 close_transaction(t, card, status);
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180 break;
181 }
182}
183
53dca511 184static void fw_fill_request(struct fw_packet *packet, int tcode, int tlabel,
b9549bc6 185 int destination_id, int source_id, int generation, int speed,
36bfe49d 186 unsigned long long offset, void *payload, size_t length)
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187{
188 int ext_tcode;
189
18e9b10f
SR
190 if (tcode == TCODE_STREAM_DATA) {
191 packet->header[0] =
192 HEADER_DATA_LENGTH(length) |
193 destination_id |
194 HEADER_TCODE(TCODE_STREAM_DATA);
195 packet->header_length = 4;
196 packet->payload = payload;
197 packet->payload_length = length;
198
199 goto common;
200 }
201
3038e353 202 if (tcode > 0x10) {
8f9f963e 203 ext_tcode = tcode & ~0x10;
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204 tcode = TCODE_LOCK_REQUEST;
205 } else
206 ext_tcode = 0;
207
208 packet->header[0] =
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209 HEADER_RETRY(RETRY_X) |
210 HEADER_TLABEL(tlabel) |
211 HEADER_TCODE(tcode) |
b9549bc6 212 HEADER_DESTINATION(destination_id);
3038e353 213 packet->header[1] =
a77754a7 214 HEADER_OFFSET_HIGH(offset >> 32) | HEADER_SOURCE(source_id);
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215 packet->header[2] =
216 offset;
217
218 switch (tcode) {
219 case TCODE_WRITE_QUADLET_REQUEST:
220 packet->header[3] = *(u32 *)payload;
221 packet->header_length = 16;
222 packet->payload_length = 0;
223 break;
224
225 case TCODE_LOCK_REQUEST:
226 case TCODE_WRITE_BLOCK_REQUEST:
227 packet->header[3] =
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228 HEADER_DATA_LENGTH(length) |
229 HEADER_EXTENDED_TCODE(ext_tcode);
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230 packet->header_length = 16;
231 packet->payload = payload;
232 packet->payload_length = length;
233 break;
234
235 case TCODE_READ_QUADLET_REQUEST:
236 packet->header_length = 12;
237 packet->payload_length = 0;
238 break;
239
240 case TCODE_READ_BLOCK_REQUEST:
241 packet->header[3] =
a77754a7
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242 HEADER_DATA_LENGTH(length) |
243 HEADER_EXTENDED_TCODE(ext_tcode);
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244 packet->header_length = 16;
245 packet->payload_length = 0;
246 break;
5b189bf3
SR
247
248 default:
f9c70f91 249 WARN(1, "wrong tcode %d", tcode);
3038e353 250 }
18e9b10f 251 common:
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252 packet->speed = speed;
253 packet->generation = generation;
730c32f5 254 packet->ack = 0;
19593ffd 255 packet->payload_mapped = false;
3038e353
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256}
257
7906054f
CL
258static int allocate_tlabel(struct fw_card *card)
259{
260 int tlabel;
261
262 tlabel = card->current_tlabel;
263 while (card->tlabel_mask & (1ULL << tlabel)) {
264 tlabel = (tlabel + 1) & 0x3f;
265 if (tlabel == card->current_tlabel)
266 return -EBUSY;
267 }
268
269 card->current_tlabel = (tlabel + 1) & 0x3f;
270 card->tlabel_mask |= 1ULL << tlabel;
271
272 return tlabel;
273}
274
3038e353
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275/**
276 * This function provides low-level access to the IEEE1394 transaction
277 * logic. Most C programs would use either fw_read(), fw_write() or
278 * fw_lock() instead - those function are convenience wrappers for
279 * this function. The fw_send_request() function is primarily
280 * provided as a flexible, one-stop entry point for languages bindings
281 * and protocol bindings.
282 *
283 * FIXME: Document this function further, in particular the possible
284 * values for rcode in the callback. In short, we map ACK_COMPLETE to
285 * RCODE_COMPLETE, internal errors set errno and set rcode to
286 * RCODE_SEND_ERROR (which is out of range for standard ieee1394
287 * rcodes). All other rcodes are forwarded unchanged. For all
288 * errors, payload is NULL, length is 0.
289 *
290 * Can not expect the callback to be called before the function
291 * returns, though this does happen in some cases (ACK_COMPLETE and
292 * errors).
293 *
294 * The payload is only used for write requests and must not be freed
295 * until the callback has been called.
296 *
297 * @param card the card from which to send the request
298 * @param tcode the tcode for this transaction. Do not use
dbe7f76d 299 * TCODE_LOCK_REQUEST directly, instead use TCODE_LOCK_MASK_SWAP
3038e353 300 * etc. to specify tcode and ext_tcode.
907293d7 301 * @param node_id the destination node ID (bus ID and PHY ID concatenated)
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302 * @param generation the generation for which node_id is valid
303 * @param speed the speed to use for sending the request
304 * @param offset the 48 bit offset on the destination node
305 * @param payload the data payload for the request subaction
306 * @param length the length in bytes of the data to read
307 * @param callback function to be called when the transaction is completed
308 * @param callback_data pointer to arbitrary data, which will be
309 * passed to the callback
18e9b10f
SR
310 *
311 * In case of asynchronous stream packets i.e. TCODE_STREAM_DATA, the caller
312 * needs to synthesize @destination_id with fw_stream_packet_destination_id().
3038e353 313 */
53dca511
SR
314void fw_send_request(struct fw_card *card, struct fw_transaction *t, int tcode,
315 int destination_id, int generation, int speed,
316 unsigned long long offset, void *payload, size_t length,
317 fw_transaction_callback_t callback, void *callback_data)
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318{
319 unsigned long flags;
b9549bc6 320 int tlabel;
3038e353 321
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322 /*
323 * Allocate tlabel from the bitmap and put the transaction on
324 * the list while holding the card spinlock.
325 */
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326
327 spin_lock_irqsave(&card->lock, flags);
328
7906054f
CL
329 tlabel = allocate_tlabel(card);
330 if (tlabel < 0) {
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331 spin_unlock_irqrestore(&card->lock, flags);
332 callback(card, RCODE_SEND_ERROR, NULL, 0, callback_data);
333 return;
334 }
335
1e119fa9 336 t->node_id = destination_id;
3038e353 337 t->tlabel = tlabel;
5c40cbfe
CL
338 t->card = card;
339 setup_timer(&t->split_timeout_timer,
340 split_transaction_timeout_callback, (unsigned long)t);
341 /* FIXME: start this timer later, relative to t->timestamp */
8e4b50f9
CL
342 mod_timer(&t->split_timeout_timer,
343 jiffies + card->split_timeout_jiffies);
3038e353
KH
344 t->callback = callback;
345 t->callback_data = callback_data;
346
1e119fa9
JF
347 fw_fill_request(&t->packet, tcode, t->tlabel,
348 destination_id, card->node_id, generation,
349 speed, offset, payload, length);
3038e353
KH
350 t->packet.callback = transmit_complete_callback;
351
e9aeb46c
SR
352 list_add_tail(&t->link, &card->transaction_list);
353
354 spin_unlock_irqrestore(&card->lock, flags);
355
3038e353
KH
356 card->driver->send_request(card, &t->packet);
357}
358EXPORT_SYMBOL(fw_send_request);
359
1e119fa9
JF
360struct transaction_callback_data {
361 struct completion done;
362 void *payload;
363 int rcode;
364};
365
366static void transaction_callback(struct fw_card *card, int rcode,
367 void *payload, size_t length, void *data)
368{
369 struct transaction_callback_data *d = data;
370
371 if (rcode == RCODE_COMPLETE)
372 memcpy(d->payload, payload, length);
373 d->rcode = rcode;
374 complete(&d->done);
375}
376
377/**
378 * fw_run_transaction - send request and sleep until transaction is completed
379 *
380 * Returns the RCODE.
381 */
382int fw_run_transaction(struct fw_card *card, int tcode, int destination_id,
53dca511 383 int generation, int speed, unsigned long long offset,
ba27e1f7 384 void *payload, size_t length)
1e119fa9
JF
385{
386 struct transaction_callback_data d;
387 struct fw_transaction t;
388
5c40cbfe 389 init_timer_on_stack(&t.split_timeout_timer);
1e119fa9 390 init_completion(&d.done);
ba27e1f7 391 d.payload = payload;
1e119fa9 392 fw_send_request(card, &t, tcode, destination_id, generation, speed,
ba27e1f7 393 offset, payload, length, transaction_callback, &d);
1e119fa9 394 wait_for_completion(&d.done);
5c40cbfe 395 destroy_timer_on_stack(&t.split_timeout_timer);
1e119fa9
JF
396
397 return d.rcode;
398}
399EXPORT_SYMBOL(fw_run_transaction);
400
c0220d68
SR
401static DEFINE_MUTEX(phy_config_mutex);
402static DECLARE_COMPLETION(phy_config_done);
ae1e5355
SR
403
404static void transmit_phy_packet_callback(struct fw_packet *packet,
405 struct fw_card *card, int status)
3038e353 406{
c0220d68 407 complete(&phy_config_done);
3038e353
KH
408}
409
c0220d68
SR
410static struct fw_packet phy_config_packet = {
411 .header_length = 8,
412 .payload_length = 0,
413 .speed = SCODE_100,
414 .callback = transmit_phy_packet_callback,
415};
416
83db801c
KH
417void fw_send_phy_config(struct fw_card *card,
418 int node_id, int generation, int gap_count)
3038e353 419{
ae1e5355 420 long timeout = DIV_ROUND_UP(HZ, 10);
2a0a2590
SR
421 u32 data = PHY_IDENTIFIER(PHY_PACKET_CONFIG) |
422 PHY_CONFIG_ROOT_ID(node_id) |
423 PHY_CONFIG_GAP_COUNT(gap_count);
424
c0220d68
SR
425 mutex_lock(&phy_config_mutex);
426
427 phy_config_packet.header[0] = data;
428 phy_config_packet.header[1] = ~data;
429 phy_config_packet.generation = generation;
430 INIT_COMPLETION(phy_config_done);
431
432 card->driver->send_request(card, &phy_config_packet);
433 wait_for_completion_timeout(&phy_config_done, timeout);
ae1e5355 434
c0220d68 435 mutex_unlock(&phy_config_mutex);
3038e353
KH
436}
437
53dca511
SR
438static struct fw_address_handler *lookup_overlapping_address_handler(
439 struct list_head *list, unsigned long long offset, size_t length)
3038e353
KH
440{
441 struct fw_address_handler *handler;
442
443 list_for_each_entry(handler, list, link) {
444 if (handler->offset < offset + length &&
445 offset < handler->offset + handler->length)
446 return handler;
447 }
448
449 return NULL;
450}
451
db5d247a
CL
452static bool is_enclosing_handler(struct fw_address_handler *handler,
453 unsigned long long offset, size_t length)
454{
455 return handler->offset <= offset &&
456 offset + length <= handler->offset + handler->length;
457}
458
53dca511
SR
459static struct fw_address_handler *lookup_enclosing_address_handler(
460 struct list_head *list, unsigned long long offset, size_t length)
3038e353
KH
461{
462 struct fw_address_handler *handler;
463
464 list_for_each_entry(handler, list, link) {
db5d247a 465 if (is_enclosing_handler(handler, offset, length))
3038e353
KH
466 return handler;
467 }
468
469 return NULL;
470}
471
472static DEFINE_SPINLOCK(address_handler_lock);
473static LIST_HEAD(address_handler_list);
474
21ebcd12 475const struct fw_address_region fw_high_memory_region =
5af4e5ea 476 { .start = 0x000100000000ULL, .end = 0xffffe0000000ULL, };
db8be076
AB
477EXPORT_SYMBOL(fw_high_memory_region);
478
479#if 0
480const struct fw_address_region fw_low_memory_region =
481 { .start = 0x000000000000ULL, .end = 0x000100000000ULL, };
21ebcd12 482const struct fw_address_region fw_private_region =
5af4e5ea 483 { .start = 0xffffe0000000ULL, .end = 0xfffff0000000ULL, };
21ebcd12 484const struct fw_address_region fw_csr_region =
cca60977
JW
485 { .start = CSR_REGISTER_BASE,
486 .end = CSR_REGISTER_BASE | CSR_CONFIG_ROM_END, };
21ebcd12 487const struct fw_address_region fw_unit_space_region =
5af4e5ea 488 { .start = 0xfffff0000900ULL, .end = 0x1000000000000ULL, };
db8be076 489#endif /* 0 */
3038e353 490
db5d247a
CL
491static bool is_in_fcp_region(u64 offset, size_t length)
492{
493 return offset >= (CSR_REGISTER_BASE | CSR_FCP_COMMAND) &&
494 offset + length <= (CSR_REGISTER_BASE | CSR_FCP_END);
495}
496
3038e353 497/**
3e0b5f0d
SR
498 * fw_core_add_address_handler - register for incoming requests
499 * @handler: callback
500 * @region: region in the IEEE 1212 node space address range
501 *
502 * region->start, ->end, and handler->length have to be quadlet-aligned.
503 *
504 * When a request is received that falls within the specified address range,
505 * the specified callback is invoked. The parameters passed to the callback
506 * give the details of the particular request.
1415d918
SR
507 *
508 * Return value: 0 on success, non-zero otherwise.
db5d247a 509 *
1415d918
SR
510 * The start offset of the handler's address region is determined by
511 * fw_core_add_address_handler() and is returned in handler->offset.
db5d247a
CL
512 *
513 * Address allocations are exclusive, except for the FCP registers.
3038e353 514 */
53dca511
SR
515int fw_core_add_address_handler(struct fw_address_handler *handler,
516 const struct fw_address_region *region)
3038e353
KH
517{
518 struct fw_address_handler *other;
519 unsigned long flags;
520 int ret = -EBUSY;
521
3e0b5f0d
SR
522 if (region->start & 0xffff000000000003ULL ||
523 region->end & 0xffff000000000003ULL ||
524 region->start >= region->end ||
525 handler->length & 3 ||
526 handler->length == 0)
527 return -EINVAL;
528
3038e353
KH
529 spin_lock_irqsave(&address_handler_lock, flags);
530
3e0b5f0d 531 handler->offset = region->start;
3038e353 532 while (handler->offset + handler->length <= region->end) {
db5d247a
CL
533 if (is_in_fcp_region(handler->offset, handler->length))
534 other = NULL;
535 else
536 other = lookup_overlapping_address_handler
537 (&address_handler_list,
538 handler->offset, handler->length);
3038e353 539 if (other != NULL) {
3e0b5f0d 540 handler->offset += other->length;
3038e353
KH
541 } else {
542 list_add_tail(&handler->link, &address_handler_list);
543 ret = 0;
544 break;
545 }
546 }
547
548 spin_unlock_irqrestore(&address_handler_lock, flags);
549
550 return ret;
551}
3038e353
KH
552EXPORT_SYMBOL(fw_core_add_address_handler);
553
554/**
44be21b6 555 * fw_core_remove_address_handler - unregister an address handler
3038e353 556 */
3038e353
KH
557void fw_core_remove_address_handler(struct fw_address_handler *handler)
558{
559 unsigned long flags;
560
561 spin_lock_irqsave(&address_handler_lock, flags);
562 list_del(&handler->link);
563 spin_unlock_irqrestore(&address_handler_lock, flags);
564}
3038e353
KH
565EXPORT_SYMBOL(fw_core_remove_address_handler);
566
567struct fw_request {
568 struct fw_packet response;
36bfe49d 569 u32 request_header[4];
3038e353
KH
570 int ack;
571 u32 length;
572 u32 data[0];
573};
574
53dca511
SR
575static void free_response_callback(struct fw_packet *packet,
576 struct fw_card *card, int status)
3038e353
KH
577{
578 struct fw_request *request;
579
580 request = container_of(packet, struct fw_request, response);
581 kfree(request);
582}
583
a10c0ce7
CL
584int fw_get_response_length(struct fw_request *r)
585{
586 int tcode, ext_tcode, data_length;
587
588 tcode = HEADER_GET_TCODE(r->request_header[0]);
589
590 switch (tcode) {
591 case TCODE_WRITE_QUADLET_REQUEST:
592 case TCODE_WRITE_BLOCK_REQUEST:
593 return 0;
594
595 case TCODE_READ_QUADLET_REQUEST:
596 return 4;
597
598 case TCODE_READ_BLOCK_REQUEST:
599 data_length = HEADER_GET_DATA_LENGTH(r->request_header[3]);
600 return data_length;
601
602 case TCODE_LOCK_REQUEST:
603 ext_tcode = HEADER_GET_EXTENDED_TCODE(r->request_header[3]);
604 data_length = HEADER_GET_DATA_LENGTH(r->request_header[3]);
605 switch (ext_tcode) {
606 case EXTCODE_FETCH_ADD:
607 case EXTCODE_LITTLE_ADD:
608 return data_length;
609 default:
610 return data_length / 2;
611 }
612
613 default:
f9c70f91 614 WARN(1, "wrong tcode %d", tcode);
a10c0ce7
CL
615 return 0;
616 }
617}
618
53dca511
SR
619void fw_fill_response(struct fw_packet *response, u32 *request_header,
620 int rcode, void *payload, size_t length)
3038e353
KH
621{
622 int tcode, tlabel, extended_tcode, source, destination;
623
a77754a7
KH
624 tcode = HEADER_GET_TCODE(request_header[0]);
625 tlabel = HEADER_GET_TLABEL(request_header[0]);
626 source = HEADER_GET_DESTINATION(request_header[0]);
627 destination = HEADER_GET_SOURCE(request_header[1]);
628 extended_tcode = HEADER_GET_EXTENDED_TCODE(request_header[3]);
3038e353
KH
629
630 response->header[0] =
a77754a7
KH
631 HEADER_RETRY(RETRY_1) |
632 HEADER_TLABEL(tlabel) |
633 HEADER_DESTINATION(destination);
36bfe49d 634 response->header[1] =
a77754a7
KH
635 HEADER_SOURCE(source) |
636 HEADER_RCODE(rcode);
3038e353
KH
637 response->header[2] = 0;
638
639 switch (tcode) {
640 case TCODE_WRITE_QUADLET_REQUEST:
641 case TCODE_WRITE_BLOCK_REQUEST:
a77754a7 642 response->header[0] |= HEADER_TCODE(TCODE_WRITE_RESPONSE);
3038e353
KH
643 response->header_length = 12;
644 response->payload_length = 0;
645 break;
646
647 case TCODE_READ_QUADLET_REQUEST:
648 response->header[0] |=
a77754a7 649 HEADER_TCODE(TCODE_READ_QUADLET_RESPONSE);
93c4cceb
KH
650 if (payload != NULL)
651 response->header[3] = *(u32 *)payload;
652 else
653 response->header[3] = 0;
3038e353
KH
654 response->header_length = 16;
655 response->payload_length = 0;
656 break;
657
658 case TCODE_READ_BLOCK_REQUEST:
659 case TCODE_LOCK_REQUEST:
a77754a7 660 response->header[0] |= HEADER_TCODE(tcode + 2);
3038e353 661 response->header[3] =
a77754a7
KH
662 HEADER_DATA_LENGTH(length) |
663 HEADER_EXTENDED_TCODE(extended_tcode);
3038e353 664 response->header_length = 16;
36bfe49d
KH
665 response->payload = payload;
666 response->payload_length = length;
3038e353
KH
667 break;
668
669 default:
f9c70f91 670 WARN(1, "wrong tcode %d", tcode);
3038e353 671 }
1d1dc5e8 672
19593ffd 673 response->payload_mapped = false;
3038e353 674}
93c4cceb 675EXPORT_SYMBOL(fw_fill_response);
3038e353 676
8e4b50f9
CL
677static u32 compute_split_timeout_timestamp(struct fw_card *card,
678 u32 request_timestamp)
679{
680 unsigned int cycles;
681 u32 timestamp;
682
683 cycles = card->split_timeout_cycles;
684 cycles += request_timestamp & 0x1fff;
685
686 timestamp = request_timestamp & ~0x1fff;
687 timestamp += (cycles / 8000) << 13;
688 timestamp |= cycles % 8000;
689
690 return timestamp;
691}
692
693static struct fw_request *allocate_request(struct fw_card *card,
694 struct fw_packet *p)
3038e353
KH
695{
696 struct fw_request *request;
697 u32 *data, length;
8e4b50f9 698 int request_tcode;
3038e353 699
a77754a7 700 request_tcode = HEADER_GET_TCODE(p->header[0]);
3038e353
KH
701 switch (request_tcode) {
702 case TCODE_WRITE_QUADLET_REQUEST:
2639a6fb 703 data = &p->header[3];
3038e353
KH
704 length = 4;
705 break;
706
707 case TCODE_WRITE_BLOCK_REQUEST:
708 case TCODE_LOCK_REQUEST:
2639a6fb 709 data = p->payload;
a77754a7 710 length = HEADER_GET_DATA_LENGTH(p->header[3]);
3038e353
KH
711 break;
712
713 case TCODE_READ_QUADLET_REQUEST:
714 data = NULL;
715 length = 4;
716 break;
717
718 case TCODE_READ_BLOCK_REQUEST:
719 data = NULL;
a77754a7 720 length = HEADER_GET_DATA_LENGTH(p->header[3]);
3038e353
KH
721 break;
722
723 default:
0bf607c5
SR
724 fw_error("ERROR - corrupt request received - %08x %08x %08x\n",
725 p->header[0], p->header[1], p->header[2]);
3038e353
KH
726 return NULL;
727 }
728
2d826cc5 729 request = kmalloc(sizeof(*request) + length, GFP_ATOMIC);
3038e353
KH
730 if (request == NULL)
731 return NULL;
732
2639a6fb 733 request->response.speed = p->speed;
8e4b50f9
CL
734 request->response.timestamp =
735 compute_split_timeout_timestamp(card, p->timestamp);
2639a6fb 736 request->response.generation = p->generation;
730c32f5 737 request->response.ack = 0;
3038e353 738 request->response.callback = free_response_callback;
2639a6fb 739 request->ack = p->ack;
93c4cceb 740 request->length = length;
3038e353 741 if (data)
6e2e8424 742 memcpy(request->data, data, length);
3038e353 743
2d826cc5 744 memcpy(request->request_header, p->header, sizeof(p->header));
3038e353
KH
745
746 return request;
747}
748
53dca511
SR
749void fw_send_response(struct fw_card *card,
750 struct fw_request *request, int rcode)
3038e353 751{
db5d247a
CL
752 if (WARN_ONCE(!request, "invalid for FCP address handlers"))
753 return;
754
a7ea6782
SR
755 /* unified transaction or broadcast transaction: don't respond */
756 if (request->ack != ACK_PENDING ||
757 HEADER_DESTINATION_IS_BROADCAST(request->request_header[0])) {
9c9bdf4d 758 kfree(request);
3038e353 759 return;
9c9bdf4d 760 }
3038e353 761
36bfe49d
KH
762 if (rcode == RCODE_COMPLETE)
763 fw_fill_response(&request->response, request->request_header,
a10c0ce7
CL
764 rcode, request->data,
765 fw_get_response_length(request));
36bfe49d
KH
766 else
767 fw_fill_response(&request->response, request->request_header,
768 rcode, NULL, 0);
3038e353
KH
769
770 card->driver->send_response(card, &request->response);
771}
3038e353
KH
772EXPORT_SYMBOL(fw_send_response);
773
db5d247a
CL
774static void handle_exclusive_region_request(struct fw_card *card,
775 struct fw_packet *p,
776 struct fw_request *request,
777 unsigned long long offset)
3038e353
KH
778{
779 struct fw_address_handler *handler;
3038e353 780 unsigned long flags;
2639a6fb 781 int tcode, destination, source;
3038e353 782
a77754a7
KH
783 tcode = HEADER_GET_TCODE(p->header[0]);
784 destination = HEADER_GET_DESTINATION(p->header[0]);
478b233e 785 source = HEADER_GET_SOURCE(p->header[1]);
3038e353
KH
786
787 spin_lock_irqsave(&address_handler_lock, flags);
788 handler = lookup_enclosing_address_handler(&address_handler_list,
789 offset, request->length);
790 spin_unlock_irqrestore(&address_handler_lock, flags);
791
c781c06d
KH
792 /*
793 * FIXME: lookup the fw_node corresponding to the sender of
3038e353
KH
794 * this request and pass that to the address handler instead
795 * of the node ID. We may also want to move the address
796 * allocations to fw_node so we only do this callback if the
c781c06d
KH
797 * upper layers registered it for this node.
798 */
3038e353
KH
799
800 if (handler == NULL)
801 fw_send_response(card, request, RCODE_ADDRESS_ERROR);
802 else
803 handler->address_callback(card, request,
804 tcode, destination, source,
2639a6fb 805 p->generation, p->speed, offset,
3038e353
KH
806 request->data, request->length,
807 handler->callback_data);
808}
db5d247a
CL
809
810static void handle_fcp_region_request(struct fw_card *card,
811 struct fw_packet *p,
812 struct fw_request *request,
813 unsigned long long offset)
814{
815 struct fw_address_handler *handler;
816 unsigned long flags;
817 int tcode, destination, source;
818
819 if ((offset != (CSR_REGISTER_BASE | CSR_FCP_COMMAND) &&
820 offset != (CSR_REGISTER_BASE | CSR_FCP_RESPONSE)) ||
821 request->length > 0x200) {
822 fw_send_response(card, request, RCODE_ADDRESS_ERROR);
823
824 return;
825 }
826
827 tcode = HEADER_GET_TCODE(p->header[0]);
828 destination = HEADER_GET_DESTINATION(p->header[0]);
829 source = HEADER_GET_SOURCE(p->header[1]);
830
831 if (tcode != TCODE_WRITE_QUADLET_REQUEST &&
832 tcode != TCODE_WRITE_BLOCK_REQUEST) {
833 fw_send_response(card, request, RCODE_TYPE_ERROR);
834
835 return;
836 }
837
838 spin_lock_irqsave(&address_handler_lock, flags);
839 list_for_each_entry(handler, &address_handler_list, link) {
840 if (is_enclosing_handler(handler, offset, request->length))
841 handler->address_callback(card, NULL, tcode,
842 destination, source,
843 p->generation, p->speed,
844 offset, request->data,
845 request->length,
846 handler->callback_data);
847 }
848 spin_unlock_irqrestore(&address_handler_lock, flags);
849
850 fw_send_response(card, request, RCODE_COMPLETE);
851}
852
853void fw_core_handle_request(struct fw_card *card, struct fw_packet *p)
854{
855 struct fw_request *request;
856 unsigned long long offset;
857
858 if (p->ack != ACK_PENDING && p->ack != ACK_COMPLETE)
859 return;
860
8e4b50f9 861 request = allocate_request(card, p);
db5d247a
CL
862 if (request == NULL) {
863 /* FIXME: send statically allocated busy packet. */
864 return;
865 }
866
867 offset = ((u64)HEADER_GET_OFFSET_HIGH(p->header[1]) << 32) |
868 p->header[2];
869
870 if (!is_in_fcp_region(offset, request->length))
871 handle_exclusive_region_request(card, p, request, offset);
872 else
873 handle_fcp_region_request(card, p, request, offset);
874
875}
3038e353
KH
876EXPORT_SYMBOL(fw_core_handle_request);
877
53dca511 878void fw_core_handle_response(struct fw_card *card, struct fw_packet *p)
3038e353
KH
879{
880 struct fw_transaction *t;
881 unsigned long flags;
882 u32 *data;
883 size_t data_length;
884 int tcode, tlabel, destination, source, rcode;
885
a77754a7
KH
886 tcode = HEADER_GET_TCODE(p->header[0]);
887 tlabel = HEADER_GET_TLABEL(p->header[0]);
888 destination = HEADER_GET_DESTINATION(p->header[0]);
889 source = HEADER_GET_SOURCE(p->header[1]);
890 rcode = HEADER_GET_RCODE(p->header[1]);
3038e353
KH
891
892 spin_lock_irqsave(&card->lock, flags);
893 list_for_each_entry(t, &card->transaction_list, link) {
894 if (t->node_id == source && t->tlabel == tlabel) {
5c40cbfe 895 list_del_init(&t->link);
753a8970 896 card->tlabel_mask &= ~(1ULL << t->tlabel);
3038e353
KH
897 break;
898 }
899 }
900 spin_unlock_irqrestore(&card->lock, flags);
901
902 if (&t->link == &card->transaction_list) {
32b46093
KH
903 fw_notify("Unsolicited response (source %x, tlabel %x)\n",
904 source, tlabel);
3038e353
KH
905 return;
906 }
907
c781c06d
KH
908 /*
909 * FIXME: sanity check packet, is length correct, does tcodes
910 * and addresses match.
911 */
3038e353
KH
912
913 switch (tcode) {
914 case TCODE_READ_QUADLET_RESPONSE:
2639a6fb 915 data = (u32 *) &p->header[3];
3038e353
KH
916 data_length = 4;
917 break;
918
919 case TCODE_WRITE_RESPONSE:
920 data = NULL;
921 data_length = 0;
922 break;
923
924 case TCODE_READ_BLOCK_RESPONSE:
925 case TCODE_LOCK_RESPONSE:
93c4cceb 926 data = p->payload;
a77754a7 927 data_length = HEADER_GET_DATA_LENGTH(p->header[3]);
3038e353
KH
928 break;
929
930 default:
931 /* Should never happen, this is just to shut up gcc. */
932 data = NULL;
933 data_length = 0;
934 break;
935 }
936
5c40cbfe
CL
937 del_timer_sync(&t->split_timeout_timer);
938
10a4c735
SR
939 /*
940 * The response handler may be executed while the request handler
941 * is still pending. Cancel the request handler.
942 */
943 card->driver->cancel_packet(card, &t->packet);
944
3038e353
KH
945 t->callback(card, rcode, data, data_length, t->callback_data);
946}
3038e353
KH
947EXPORT_SYMBOL(fw_core_handle_response);
948
ae57988f 949static const struct fw_address_region topology_map_region =
cca60977
JW
950 { .start = CSR_REGISTER_BASE | CSR_TOPOLOGY_MAP,
951 .end = CSR_REGISTER_BASE | CSR_TOPOLOGY_MAP_END, };
473d28c7 952
53dca511
SR
953static void handle_topology_map(struct fw_card *card, struct fw_request *request,
954 int tcode, int destination, int source, int generation,
955 int speed, unsigned long long offset,
956 void *payload, size_t length, void *callback_data)
473d28c7 957{
cb7c96da 958 int start;
473d28c7
KH
959
960 if (!TCODE_IS_READ_REQUEST(tcode)) {
961 fw_send_response(card, request, RCODE_TYPE_ERROR);
962 return;
963 }
964
965 if ((offset & 3) > 0 || (length & 3) > 0) {
966 fw_send_response(card, request, RCODE_ADDRESS_ERROR);
967 return;
968 }
969
970 start = (offset - topology_map_region.start) / 4;
cb7c96da 971 memcpy(payload, &card->topology_map[start], length);
473d28c7
KH
972
973 fw_send_response(card, request, RCODE_COMPLETE);
974}
975
976static struct fw_address_handler topology_map = {
85cb9b68 977 .length = 0x400,
473d28c7
KH
978 .address_callback = handle_topology_map,
979};
980
ae57988f 981static const struct fw_address_region registers_region =
cca60977
JW
982 { .start = CSR_REGISTER_BASE,
983 .end = CSR_REGISTER_BASE | CSR_CONFIG_ROM, };
d60d7f1d 984
3e07ec0e
CL
985static u32 read_state_register(struct fw_card *card)
986{
987 /*
988 * Fixed bits (IEEE 1394-2008 8.3.2.2.1):
989 * Bits 0-1 (state) always read 00=running.
990 * Bits 2,3 (off, atn) are not implemented as per the spec.
991 * Bit 4 (elog) is not implemented because there is no error log.
992 * Bit 6 (dreq) cannot be set. It is intended to "disable requests
993 * from unreliable nodes"; however, IEEE 1212 states that devices
994 * may "clear their own dreq bit when it has been improperly set".
995 * Our implementation might be seen as an improperly extensive
996 * interpretation of "improperly", but the 1212-2001 revision
997 * dropped this bit altogether, so we're in the clear. :o)
998 * Bit 7 (lost) always reads 0 because a power reset has never occurred
999 * during normal operation.
1000 * Bit 9 (linkoff) is not implemented because the PC is not powered
1001 * from the FireWire cable.
1002 * Bit 15 (gone) always reads 0. It must be set at a power/command/bus
1003 * reset, but then cleared when the units are ready again, which
1004 * happens immediately for us.
1005 */
1006 return 0;
1007}
1008
8e4b50f9
CL
1009static void update_split_timeout(struct fw_card *card)
1010{
1011 unsigned int cycles;
1012
1013 cycles = card->split_timeout_hi * 8000 + (card->split_timeout_lo >> 19);
1014
1015 cycles = max(cycles, 800u); /* minimum as per the spec */
1016 cycles = min(cycles, 3u * 8000u); /* maximum OHCI timeout */
1017
1018 card->split_timeout_cycles = cycles;
1019 card->split_timeout_jiffies = DIV_ROUND_UP(cycles * HZ, 8000);
1020}
1021
53dca511
SR
1022static void handle_registers(struct fw_card *card, struct fw_request *request,
1023 int tcode, int destination, int source, int generation,
1024 int speed, unsigned long long offset,
1025 void *payload, size_t length, void *callback_data)
d60d7f1d 1026{
15f0d833 1027 int reg = offset & ~CSR_REGISTER_BASE;
d60d7f1d 1028 __be32 *data = payload;
e534fe16 1029 int rcode = RCODE_COMPLETE;
8e4b50f9 1030 unsigned long flags;
d60d7f1d
KH
1031
1032 switch (reg) {
3e07ec0e
CL
1033 case CSR_STATE_CLEAR:
1034 if (tcode == TCODE_READ_QUADLET_REQUEST) {
1035 *data = cpu_to_be32(read_state_register(card));
1036 } else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
1037 } else {
1038 rcode = RCODE_TYPE_ERROR;
1039 }
1040 break;
1041
1042 case CSR_STATE_SET:
1043 if (tcode == TCODE_READ_QUADLET_REQUEST) {
1044 *data = cpu_to_be32(read_state_register(card));
1045 } else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
1046 /* FIXME: implement cmstr */
1047 /* FIXME: implement abdicate */
1048 } else {
1049 rcode = RCODE_TYPE_ERROR;
1050 }
1051 break;
1052
506f1a31
CL
1053 case CSR_NODE_IDS:
1054 if (tcode == TCODE_READ_QUADLET_REQUEST)
1055 *data = cpu_to_be32(card->driver->
1056 read_csr_reg(card, CSR_NODE_IDS));
1057 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1058 card->driver->write_csr_reg(card, CSR_NODE_IDS,
1059 be32_to_cpu(*data));
1060 else
1061 rcode = RCODE_TYPE_ERROR;
1062 break;
1063
446eba0d
CL
1064 case CSR_RESET_START:
1065 if (tcode != TCODE_WRITE_QUADLET_REQUEST)
1066 rcode = RCODE_TYPE_ERROR;
1067 break;
1068
8e4b50f9
CL
1069 case CSR_SPLIT_TIMEOUT_HI:
1070 if (tcode == TCODE_READ_QUADLET_REQUEST) {
1071 *data = cpu_to_be32(card->split_timeout_hi);
1072 } else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
1073 spin_lock_irqsave(&card->lock, flags);
1074 card->split_timeout_hi = be32_to_cpu(*data) & 7;
1075 update_split_timeout(card);
1076 spin_unlock_irqrestore(&card->lock, flags);
1077 } else {
1078 rcode = RCODE_TYPE_ERROR;
1079 }
1080 break;
1081
1082 case CSR_SPLIT_TIMEOUT_LO:
1083 if (tcode == TCODE_READ_QUADLET_REQUEST) {
1084 *data = cpu_to_be32(card->split_timeout_lo);
1085 } else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
1086 spin_lock_irqsave(&card->lock, flags);
1087 card->split_timeout_lo =
1088 be32_to_cpu(*data) & 0xfff80000;
1089 update_split_timeout(card);
1090 spin_unlock_irqrestore(&card->lock, flags);
1091 } else {
1092 rcode = RCODE_TYPE_ERROR;
1093 }
1094 break;
1095
d60d7f1d 1096 case CSR_CYCLE_TIME:
168cf9af 1097 if (TCODE_IS_READ_REQUEST(tcode) && length == 4)
60d32970
CL
1098 *data = cpu_to_be32(card->driver->
1099 read_csr_reg(card, CSR_CYCLE_TIME));
9ab5071c
CL
1100 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1101 card->driver->write_csr_reg(card, CSR_CYCLE_TIME,
1102 be32_to_cpu(*data));
d60d7f1d 1103 else
168cf9af 1104 rcode = RCODE_TYPE_ERROR;
e534fe16
SR
1105 break;
1106
a48777e0
CL
1107 case CSR_BUS_TIME:
1108 if (tcode == TCODE_READ_QUADLET_REQUEST)
1109 *data = cpu_to_be32(card->driver->
1110 read_csr_reg(card, CSR_BUS_TIME));
1111 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1112 card->driver->write_csr_reg(card, CSR_BUS_TIME,
1113 be32_to_cpu(*data));
1114 else
1115 rcode = RCODE_TYPE_ERROR;
1116 break;
1117
27a2329f
CL
1118 case CSR_BUSY_TIMEOUT:
1119 if (tcode == TCODE_READ_QUADLET_REQUEST)
1120 *data = cpu_to_be32(card->driver->
1121 read_csr_reg(card, CSR_BUSY_TIMEOUT));
1122 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1123 card->driver->write_csr_reg(card, CSR_BUSY_TIMEOUT,
1124 be32_to_cpu(*data));
1125 else
1126 rcode = RCODE_TYPE_ERROR;
1127 break;
1128
e534fe16
SR
1129 case CSR_BROADCAST_CHANNEL:
1130 if (tcode == TCODE_READ_QUADLET_REQUEST)
1131 *data = cpu_to_be32(card->broadcast_channel);
1132 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1133 card->broadcast_channel =
1134 (be32_to_cpu(*data) & BROADCAST_CHANNEL_VALID) |
1135 BROADCAST_CHANNEL_INITIAL;
1136 else
1137 rcode = RCODE_TYPE_ERROR;
d60d7f1d
KH
1138 break;
1139
1140 case CSR_BUS_MANAGER_ID:
1141 case CSR_BANDWIDTH_AVAILABLE:
1142 case CSR_CHANNELS_AVAILABLE_HI:
1143 case CSR_CHANNELS_AVAILABLE_LO:
c781c06d
KH
1144 /*
1145 * FIXME: these are handled by the OHCI hardware and
d60d7f1d
KH
1146 * the stack never sees these request. If we add
1147 * support for a new type of controller that doesn't
1148 * handle this in hardware we need to deal with these
c781c06d
KH
1149 * transactions.
1150 */
d60d7f1d
KH
1151 BUG();
1152 break;
1153
d60d7f1d 1154 default:
e534fe16 1155 rcode = RCODE_ADDRESS_ERROR;
d60d7f1d
KH
1156 break;
1157 }
e534fe16
SR
1158
1159 fw_send_response(card, request, rcode);
d60d7f1d
KH
1160}
1161
1162static struct fw_address_handler registers = {
1163 .length = 0x400,
1164 .address_callback = handle_registers,
1165};
1166
3038e353
KH
1167MODULE_AUTHOR("Kristian Hoegsberg <krh@bitplanet.net>");
1168MODULE_DESCRIPTION("Core IEEE1394 transaction logic");
1169MODULE_LICENSE("GPL");
1170
937f6879 1171static const u32 vendor_textual_descriptor[] = {
3038e353 1172 /* textual descriptor leaf () */
937f6879 1173 0x00060000,
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1174 0x00000000,
1175 0x00000000,
1176 0x4c696e75, /* L i n u */
1177 0x78204669, /* x F i */
1178 0x72657769, /* r e w i */
937f6879 1179 0x72650000, /* r e */
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1180};
1181
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1182static const u32 model_textual_descriptor[] = {
1183 /* model descriptor leaf () */
1184 0x00030000,
1185 0x00000000,
1186 0x00000000,
1187 0x4a756a75, /* J u j u */
1188};
1189
1190static struct fw_descriptor vendor_id_descriptor = {
1191 .length = ARRAY_SIZE(vendor_textual_descriptor),
1192 .immediate = 0x03d00d1e,
3038e353 1193 .key = 0x81000000,
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1194 .data = vendor_textual_descriptor,
1195};
1196
1197static struct fw_descriptor model_id_descriptor = {
1198 .length = ARRAY_SIZE(model_textual_descriptor),
1199 .immediate = 0x17000001,
1200 .key = 0x81000000,
1201 .data = model_textual_descriptor,
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1202};
1203
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1204static int __init fw_core_init(void)
1205{
2dbd7d7e 1206 int ret;
3038e353 1207
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1208 ret = bus_register(&fw_bus_type);
1209 if (ret < 0)
1210 return ret;
3038e353 1211
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1212 fw_cdev_major = register_chrdev(0, "firewire", &fw_device_ops);
1213 if (fw_cdev_major < 0) {
1214 bus_unregister(&fw_bus_type);
1215 return fw_cdev_major;
1216 }
1217
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1218 fw_core_add_address_handler(&topology_map, &topology_map_region);
1219 fw_core_add_address_handler(&registers, &registers_region);
1220 fw_core_add_descriptor(&vendor_id_descriptor);
1221 fw_core_add_descriptor(&model_id_descriptor);
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1222
1223 return 0;
1224}
1225
1226static void __exit fw_core_cleanup(void)
1227{
a3aca3da 1228 unregister_chrdev(fw_cdev_major, "firewire");
3038e353 1229 bus_unregister(&fw_bus_type);
d6053e08 1230 idr_destroy(&fw_device_idr);
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1231}
1232
1233module_init(fw_core_init);
1234module_exit(fw_core_cleanup);