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f507cd22 GU |
1 | /* |
2 | * ps3vram - Use extra PS3 video ram as MTD block device. | |
3 | * | |
4 | * Copyright 2009 Sony Corporation | |
5 | * | |
6 | * Based on the MTD ps3vram driver, which is | |
7 | * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com> | |
8 | * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr> | |
9 | */ | |
10 | ||
11 | #include <linux/blkdev.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/proc_fs.h> | |
14 | #include <linux/seq_file.h> | |
15 | ||
16 | #include <asm/firmware.h> | |
56ac72db | 17 | #include <asm/iommu.h> |
f507cd22 GU |
18 | #include <asm/lv1call.h> |
19 | #include <asm/ps3.h> | |
20 | ||
21 | ||
22 | #define DEVICE_NAME "ps3vram" | |
23 | ||
24 | ||
25 | #define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */ | |
26 | #define XDR_IOIF 0x0c000000 | |
27 | ||
28 | #define FIFO_BASE XDR_IOIF | |
29 | #define FIFO_SIZE (64 * 1024) | |
30 | ||
31 | #define DMA_PAGE_SIZE (4 * 1024) | |
32 | ||
33 | #define CACHE_PAGE_SIZE (256 * 1024) | |
34 | #define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE) | |
35 | ||
36 | #define CACHE_OFFSET CACHE_PAGE_SIZE | |
37 | #define FIFO_OFFSET 0 | |
38 | ||
39 | #define CTRL_PUT 0x10 | |
40 | #define CTRL_GET 0x11 | |
41 | #define CTRL_TOP 0x15 | |
42 | ||
43 | #define UPLOAD_SUBCH 1 | |
44 | #define DOWNLOAD_SUBCH 2 | |
45 | ||
46 | #define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c | |
47 | #define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104 | |
48 | ||
49 | #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601 | |
50 | ||
51 | #define CACHE_PAGE_PRESENT 1 | |
52 | #define CACHE_PAGE_DIRTY 2 | |
53 | ||
54 | struct ps3vram_tag { | |
55 | unsigned int address; | |
56 | unsigned int flags; | |
57 | }; | |
58 | ||
59 | struct ps3vram_cache { | |
60 | unsigned int page_count; | |
61 | unsigned int page_size; | |
62 | struct ps3vram_tag *tags; | |
63 | unsigned int hit; | |
64 | unsigned int miss; | |
65 | }; | |
66 | ||
67 | struct ps3vram_priv { | |
68 | struct request_queue *queue; | |
69 | struct gendisk *gendisk; | |
70 | ||
71 | u64 size; | |
72 | ||
73 | u64 memory_handle; | |
74 | u64 context_handle; | |
75 | u32 *ctrl; | |
76 | u32 *reports; | |
77 | u8 __iomem *ddr_base; | |
78 | u8 *xdr_buf; | |
79 | ||
80 | u32 *fifo_base; | |
81 | u32 *fifo_ptr; | |
82 | ||
83 | struct ps3vram_cache cache; | |
84 | ||
85 | /* Used to serialize cache/DMA operations */ | |
86 | struct mutex lock; | |
87 | }; | |
88 | ||
89 | ||
90 | static int ps3vram_major; | |
91 | ||
92 | ||
93 | static struct block_device_operations ps3vram_fops = { | |
94 | .owner = THIS_MODULE, | |
95 | }; | |
96 | ||
97 | ||
98 | #define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */ | |
99 | #define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */ | |
100 | #define DMA_NOTIFIER_SIZE 0x40 | |
101 | #define NOTIFIER 7 /* notifier used for completion report */ | |
102 | ||
103 | static char *size = "256M"; | |
104 | module_param(size, charp, 0); | |
105 | MODULE_PARM_DESC(size, "memory size"); | |
106 | ||
107 | static u32 *ps3vram_get_notifier(u32 *reports, int notifier) | |
108 | { | |
109 | return (void *)reports + DMA_NOTIFIER_OFFSET_BASE + | |
110 | DMA_NOTIFIER_SIZE * notifier; | |
111 | } | |
112 | ||
113 | static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev) | |
114 | { | |
115 | struct ps3vram_priv *priv = dev->core.driver_data; | |
116 | u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); | |
117 | int i; | |
118 | ||
119 | for (i = 0; i < 4; i++) | |
120 | notify[i] = 0xffffffff; | |
121 | } | |
122 | ||
123 | static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev, | |
124 | unsigned int timeout_ms) | |
125 | { | |
126 | struct ps3vram_priv *priv = dev->core.driver_data; | |
127 | u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); | |
128 | unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); | |
129 | ||
130 | do { | |
131 | if (!notify[3]) | |
132 | return 0; | |
133 | msleep(1); | |
134 | } while (time_before(jiffies, timeout)); | |
135 | ||
136 | return -ETIMEDOUT; | |
137 | } | |
138 | ||
139 | static void ps3vram_init_ring(struct ps3_system_bus_device *dev) | |
140 | { | |
141 | struct ps3vram_priv *priv = dev->core.driver_data; | |
142 | ||
143 | priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET; | |
144 | priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET; | |
145 | } | |
146 | ||
147 | static int ps3vram_wait_ring(struct ps3_system_bus_device *dev, | |
148 | unsigned int timeout_ms) | |
149 | { | |
150 | struct ps3vram_priv *priv = dev->core.driver_data; | |
151 | unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); | |
152 | ||
153 | do { | |
154 | if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET]) | |
155 | return 0; | |
156 | msleep(1); | |
157 | } while (time_before(jiffies, timeout)); | |
158 | ||
159 | dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n", | |
160 | priv->ctrl[CTRL_PUT], priv->ctrl[CTRL_GET], | |
161 | priv->ctrl[CTRL_TOP]); | |
162 | ||
163 | return -ETIMEDOUT; | |
164 | } | |
165 | ||
166 | static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data) | |
167 | { | |
168 | *(priv->fifo_ptr)++ = data; | |
169 | } | |
170 | ||
171 | static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag, | |
172 | u32 size) | |
173 | { | |
174 | ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag); | |
175 | } | |
176 | ||
177 | static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev) | |
178 | { | |
179 | struct ps3vram_priv *priv = dev->core.driver_data; | |
180 | int status; | |
181 | ||
182 | ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET)); | |
183 | ||
184 | priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET; | |
185 | ||
186 | /* asking the HV for a blit will kick the FIFO */ | |
187 | status = lv1_gpu_context_attribute(priv->context_handle, | |
188 | L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0, | |
189 | 0, 0, 0); | |
190 | if (status) | |
191 | dev_err(&dev->core, | |
192 | "%s: lv1_gpu_context_attribute failed %d\n", __func__, | |
193 | status); | |
194 | ||
195 | priv->fifo_ptr = priv->fifo_base; | |
196 | } | |
197 | ||
198 | static void ps3vram_fire_ring(struct ps3_system_bus_device *dev) | |
199 | { | |
200 | struct ps3vram_priv *priv = dev->core.driver_data; | |
201 | int status; | |
202 | ||
203 | mutex_lock(&ps3_gpu_mutex); | |
204 | ||
205 | priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET + | |
206 | (priv->fifo_ptr - priv->fifo_base) * sizeof(u32); | |
207 | ||
208 | /* asking the HV for a blit will kick the FIFO */ | |
209 | status = lv1_gpu_context_attribute(priv->context_handle, | |
210 | L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0, | |
211 | 0, 0, 0); | |
212 | if (status) | |
213 | dev_err(&dev->core, | |
214 | "%s: lv1_gpu_context_attribute failed %d\n", __func__, | |
215 | status); | |
216 | ||
217 | if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) > | |
218 | FIFO_SIZE - 1024) { | |
219 | dev_dbg(&dev->core, "FIFO full, rewinding\n"); | |
220 | ps3vram_wait_ring(dev, 200); | |
221 | ps3vram_rewind_ring(dev); | |
222 | } | |
223 | ||
224 | mutex_unlock(&ps3_gpu_mutex); | |
225 | } | |
226 | ||
227 | static void ps3vram_bind(struct ps3_system_bus_device *dev) | |
228 | { | |
229 | struct ps3vram_priv *priv = dev->core.driver_data; | |
230 | ||
231 | ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1); | |
232 | ps3vram_out_ring(priv, 0x31337303); | |
233 | ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3); | |
234 | ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); | |
235 | ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ | |
236 | ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ | |
237 | ||
238 | ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1); | |
239 | ps3vram_out_ring(priv, 0x3137c0de); | |
240 | ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3); | |
241 | ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); | |
242 | ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ | |
243 | ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ | |
244 | ||
245 | ps3vram_fire_ring(dev); | |
246 | } | |
247 | ||
248 | static int ps3vram_upload(struct ps3_system_bus_device *dev, | |
249 | unsigned int src_offset, unsigned int dst_offset, | |
250 | int len, int count) | |
251 | { | |
252 | struct ps3vram_priv *priv = dev->core.driver_data; | |
253 | ||
254 | ps3vram_begin_ring(priv, UPLOAD_SUBCH, | |
255 | NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); | |
256 | ps3vram_out_ring(priv, XDR_IOIF + src_offset); | |
257 | ps3vram_out_ring(priv, dst_offset); | |
258 | ps3vram_out_ring(priv, len); | |
259 | ps3vram_out_ring(priv, len); | |
260 | ps3vram_out_ring(priv, len); | |
261 | ps3vram_out_ring(priv, count); | |
262 | ps3vram_out_ring(priv, (1 << 8) | 1); | |
263 | ps3vram_out_ring(priv, 0); | |
264 | ||
265 | ps3vram_notifier_reset(dev); | |
266 | ps3vram_begin_ring(priv, UPLOAD_SUBCH, | |
267 | NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); | |
268 | ps3vram_out_ring(priv, 0); | |
269 | ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1); | |
270 | ps3vram_out_ring(priv, 0); | |
271 | ps3vram_fire_ring(dev); | |
272 | if (ps3vram_notifier_wait(dev, 200) < 0) { | |
273 | dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); | |
274 | return -1; | |
275 | } | |
276 | ||
277 | return 0; | |
278 | } | |
279 | ||
280 | static int ps3vram_download(struct ps3_system_bus_device *dev, | |
281 | unsigned int src_offset, unsigned int dst_offset, | |
282 | int len, int count) | |
283 | { | |
284 | struct ps3vram_priv *priv = dev->core.driver_data; | |
285 | ||
286 | ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, | |
287 | NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); | |
288 | ps3vram_out_ring(priv, src_offset); | |
289 | ps3vram_out_ring(priv, XDR_IOIF + dst_offset); | |
290 | ps3vram_out_ring(priv, len); | |
291 | ps3vram_out_ring(priv, len); | |
292 | ps3vram_out_ring(priv, len); | |
293 | ps3vram_out_ring(priv, count); | |
294 | ps3vram_out_ring(priv, (1 << 8) | 1); | |
295 | ps3vram_out_ring(priv, 0); | |
296 | ||
297 | ps3vram_notifier_reset(dev); | |
298 | ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, | |
299 | NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); | |
300 | ps3vram_out_ring(priv, 0); | |
301 | ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1); | |
302 | ps3vram_out_ring(priv, 0); | |
303 | ps3vram_fire_ring(dev); | |
304 | if (ps3vram_notifier_wait(dev, 200) < 0) { | |
305 | dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); | |
306 | return -1; | |
307 | } | |
308 | ||
309 | return 0; | |
310 | } | |
311 | ||
312 | static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry) | |
313 | { | |
314 | struct ps3vram_priv *priv = dev->core.driver_data; | |
315 | struct ps3vram_cache *cache = &priv->cache; | |
316 | ||
317 | if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY)) | |
318 | return; | |
319 | ||
320 | dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry, | |
321 | cache->tags[entry].address); | |
322 | if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size, | |
323 | cache->tags[entry].address, DMA_PAGE_SIZE, | |
324 | cache->page_size / DMA_PAGE_SIZE) < 0) { | |
325 | dev_err(&dev->core, | |
326 | "Failed to upload from 0x%x to " "0x%x size 0x%x\n", | |
327 | entry * cache->page_size, cache->tags[entry].address, | |
328 | cache->page_size); | |
329 | } | |
330 | cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY; | |
331 | } | |
332 | ||
333 | static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry, | |
334 | unsigned int address) | |
335 | { | |
336 | struct ps3vram_priv *priv = dev->core.driver_data; | |
337 | struct ps3vram_cache *cache = &priv->cache; | |
338 | ||
339 | dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address); | |
340 | if (ps3vram_download(dev, address, | |
341 | CACHE_OFFSET + entry * cache->page_size, | |
342 | DMA_PAGE_SIZE, | |
343 | cache->page_size / DMA_PAGE_SIZE) < 0) { | |
344 | dev_err(&dev->core, | |
345 | "Failed to download from 0x%x to 0x%x size 0x%x\n", | |
346 | address, entry * cache->page_size, cache->page_size); | |
347 | } | |
348 | ||
349 | cache->tags[entry].address = address; | |
350 | cache->tags[entry].flags |= CACHE_PAGE_PRESENT; | |
351 | } | |
352 | ||
353 | ||
354 | static void ps3vram_cache_flush(struct ps3_system_bus_device *dev) | |
355 | { | |
356 | struct ps3vram_priv *priv = dev->core.driver_data; | |
357 | struct ps3vram_cache *cache = &priv->cache; | |
358 | int i; | |
359 | ||
360 | dev_dbg(&dev->core, "FLUSH\n"); | |
361 | for (i = 0; i < cache->page_count; i++) { | |
362 | ps3vram_cache_evict(dev, i); | |
363 | cache->tags[i].flags = 0; | |
364 | } | |
365 | } | |
366 | ||
367 | static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev, | |
368 | loff_t address) | |
369 | { | |
370 | struct ps3vram_priv *priv = dev->core.driver_data; | |
371 | struct ps3vram_cache *cache = &priv->cache; | |
372 | unsigned int base; | |
373 | unsigned int offset; | |
374 | int i; | |
375 | static int counter; | |
376 | ||
377 | offset = (unsigned int) (address & (cache->page_size - 1)); | |
378 | base = (unsigned int) (address - offset); | |
379 | ||
380 | /* fully associative check */ | |
381 | for (i = 0; i < cache->page_count; i++) { | |
382 | if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) && | |
383 | cache->tags[i].address == base) { | |
384 | cache->hit++; | |
385 | dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i, | |
386 | cache->tags[i].address); | |
387 | return i; | |
388 | } | |
389 | } | |
390 | ||
391 | /* choose a random entry */ | |
392 | i = (jiffies + (counter++)) % cache->page_count; | |
393 | dev_dbg(&dev->core, "Using entry %d\n", i); | |
394 | ||
395 | ps3vram_cache_evict(dev, i); | |
396 | ps3vram_cache_load(dev, i, base); | |
397 | ||
398 | cache->miss++; | |
399 | return i; | |
400 | } | |
401 | ||
402 | static int ps3vram_cache_init(struct ps3_system_bus_device *dev) | |
403 | { | |
404 | struct ps3vram_priv *priv = dev->core.driver_data; | |
405 | ||
406 | priv->cache.page_count = CACHE_PAGE_COUNT; | |
407 | priv->cache.page_size = CACHE_PAGE_SIZE; | |
408 | priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) * | |
409 | CACHE_PAGE_COUNT, GFP_KERNEL); | |
410 | if (priv->cache.tags == NULL) { | |
411 | dev_err(&dev->core, "Could not allocate cache tags\n"); | |
412 | return -ENOMEM; | |
413 | } | |
414 | ||
415 | dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n", | |
416 | CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024); | |
417 | ||
418 | return 0; | |
419 | } | |
420 | ||
421 | static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev) | |
422 | { | |
423 | struct ps3vram_priv *priv = dev->core.driver_data; | |
424 | ||
425 | ps3vram_cache_flush(dev); | |
426 | kfree(priv->cache.tags); | |
427 | } | |
428 | ||
429 | static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from, | |
430 | size_t len, size_t *retlen, u_char *buf) | |
431 | { | |
432 | struct ps3vram_priv *priv = dev->core.driver_data; | |
433 | unsigned int cached, count; | |
434 | ||
435 | dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__, | |
436 | (unsigned int)from, len); | |
437 | ||
438 | if (from >= priv->size) | |
439 | return -EIO; | |
440 | ||
441 | if (len > priv->size - from) | |
442 | len = priv->size - from; | |
443 | ||
444 | /* Copy from vram to buf */ | |
445 | count = len; | |
446 | while (count) { | |
447 | unsigned int offset, avail; | |
448 | unsigned int entry; | |
449 | ||
450 | offset = (unsigned int) (from & (priv->cache.page_size - 1)); | |
451 | avail = priv->cache.page_size - offset; | |
452 | ||
453 | mutex_lock(&priv->lock); | |
454 | ||
455 | entry = ps3vram_cache_match(dev, from); | |
456 | cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; | |
457 | ||
458 | dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x " | |
459 | "avail=%08x count=%08x\n", __func__, | |
460 | (unsigned int)from, cached, offset, avail, count); | |
461 | ||
462 | if (avail > count) | |
463 | avail = count; | |
464 | memcpy(buf, priv->xdr_buf + cached, avail); | |
465 | ||
466 | mutex_unlock(&priv->lock); | |
467 | ||
468 | buf += avail; | |
469 | count -= avail; | |
470 | from += avail; | |
471 | } | |
472 | ||
473 | *retlen = len; | |
474 | return 0; | |
475 | } | |
476 | ||
477 | static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to, | |
478 | size_t len, size_t *retlen, const u_char *buf) | |
479 | { | |
480 | struct ps3vram_priv *priv = dev->core.driver_data; | |
481 | unsigned int cached, count; | |
482 | ||
483 | if (to >= priv->size) | |
484 | return -EIO; | |
485 | ||
486 | if (len > priv->size - to) | |
487 | len = priv->size - to; | |
488 | ||
489 | /* Copy from buf to vram */ | |
490 | count = len; | |
491 | while (count) { | |
492 | unsigned int offset, avail; | |
493 | unsigned int entry; | |
494 | ||
495 | offset = (unsigned int) (to & (priv->cache.page_size - 1)); | |
496 | avail = priv->cache.page_size - offset; | |
497 | ||
498 | mutex_lock(&priv->lock); | |
499 | ||
500 | entry = ps3vram_cache_match(dev, to); | |
501 | cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; | |
502 | ||
503 | dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x " | |
504 | "avail=%08x count=%08x\n", __func__, (unsigned int)to, | |
505 | cached, offset, avail, count); | |
506 | ||
507 | if (avail > count) | |
508 | avail = count; | |
509 | memcpy(priv->xdr_buf + cached, buf, avail); | |
510 | ||
511 | priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY; | |
512 | ||
513 | mutex_unlock(&priv->lock); | |
514 | ||
515 | buf += avail; | |
516 | count -= avail; | |
517 | to += avail; | |
518 | } | |
519 | ||
520 | *retlen = len; | |
521 | return 0; | |
522 | } | |
523 | ||
524 | static int ps3vram_proc_show(struct seq_file *m, void *v) | |
525 | { | |
526 | struct ps3vram_priv *priv = m->private; | |
527 | ||
528 | seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss); | |
529 | return 0; | |
530 | } | |
531 | ||
532 | static int ps3vram_proc_open(struct inode *inode, struct file *file) | |
533 | { | |
534 | return single_open(file, ps3vram_proc_show, PDE(inode)->data); | |
535 | } | |
536 | ||
537 | static const struct file_operations ps3vram_proc_fops = { | |
538 | .owner = THIS_MODULE, | |
539 | .open = ps3vram_proc_open, | |
540 | .read = seq_read, | |
541 | .llseek = seq_lseek, | |
542 | .release = single_release, | |
543 | }; | |
544 | ||
545 | static void __devinit ps3vram_proc_init(struct ps3_system_bus_device *dev) | |
546 | { | |
547 | struct ps3vram_priv *priv = dev->core.driver_data; | |
548 | struct proc_dir_entry *pde; | |
549 | ||
3c20e2f2 GU |
550 | pde = proc_create_data(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops, |
551 | priv); | |
552 | if (!pde) | |
f507cd22 | 553 | dev_warn(&dev->core, "failed to create /proc entry\n"); |
f507cd22 GU |
554 | } |
555 | ||
556 | static int ps3vram_make_request(struct request_queue *q, struct bio *bio) | |
557 | { | |
558 | struct ps3_system_bus_device *dev = q->queuedata; | |
559 | int write = bio_data_dir(bio) == WRITE; | |
560 | const char *op = write ? "write" : "read"; | |
561 | loff_t offset = bio->bi_sector << 9; | |
562 | int error = 0; | |
563 | struct bio_vec *bvec; | |
564 | unsigned int i; | |
565 | ||
566 | dev_dbg(&dev->core, "%s\n", __func__); | |
567 | ||
568 | bio_for_each_segment(bvec, bio, i) { | |
569 | /* PS3 is ppc64, so we don't handle highmem */ | |
570 | char *ptr = page_address(bvec->bv_page) + bvec->bv_offset; | |
571 | size_t len = bvec->bv_len, retlen; | |
572 | ||
573 | dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op, | |
574 | len, offset); | |
575 | if (write) | |
576 | error = ps3vram_write(dev, offset, len, &retlen, ptr); | |
577 | else | |
578 | error = ps3vram_read(dev, offset, len, &retlen, ptr); | |
579 | ||
580 | if (error) { | |
581 | dev_err(&dev->core, "%s failed\n", op); | |
582 | goto out; | |
583 | } | |
584 | ||
585 | if (retlen != len) { | |
586 | dev_err(&dev->core, "Short %s\n", op); | |
734957c8 | 587 | error = -EIO; |
f507cd22 GU |
588 | goto out; |
589 | } | |
590 | ||
591 | offset += len; | |
592 | } | |
593 | ||
594 | dev_dbg(&dev->core, "%s completed\n", op); | |
595 | ||
596 | out: | |
597 | bio_endio(bio, error); | |
598 | return 0; | |
599 | } | |
600 | ||
601 | static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev) | |
602 | { | |
603 | struct ps3vram_priv *priv; | |
604 | int error, status; | |
605 | struct request_queue *queue; | |
606 | struct gendisk *gendisk; | |
56ac72db GU |
607 | u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar, |
608 | reports_size, xdr_lpar; | |
f507cd22 GU |
609 | char *rest; |
610 | ||
611 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
612 | if (!priv) { | |
613 | error = -ENOMEM; | |
614 | goto fail; | |
615 | } | |
616 | ||
617 | mutex_init(&priv->lock); | |
618 | dev->core.driver_data = priv; | |
619 | ||
620 | priv = dev->core.driver_data; | |
621 | ||
622 | /* Allocate XDR buffer (1MiB aligned) */ | |
623 | priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL, | |
624 | get_order(XDR_BUF_SIZE)); | |
625 | if (priv->xdr_buf == NULL) { | |
626 | dev_err(&dev->core, "Could not allocate XDR buffer\n"); | |
627 | error = -ENOMEM; | |
628 | goto fail_free_priv; | |
629 | } | |
630 | ||
631 | /* Put FIFO at begginning of XDR buffer */ | |
632 | priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET); | |
633 | priv->fifo_ptr = priv->fifo_base; | |
634 | ||
635 | /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */ | |
636 | if (ps3_open_hv_device(dev)) { | |
637 | dev_err(&dev->core, "ps3_open_hv_device failed\n"); | |
638 | error = -EAGAIN; | |
3273d877 | 639 | goto out_free_xdr_buf; |
f507cd22 GU |
640 | } |
641 | ||
642 | /* Request memory */ | |
643 | status = -1; | |
644 | ddr_size = ALIGN(memparse(size, &rest), 1024*1024); | |
645 | if (!ddr_size) { | |
646 | dev_err(&dev->core, "Specified size is too small\n"); | |
647 | error = -EINVAL; | |
648 | goto out_close_gpu; | |
649 | } | |
650 | ||
651 | while (ddr_size > 0) { | |
652 | status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0, | |
653 | &priv->memory_handle, | |
654 | &ddr_lpar); | |
655 | if (!status) | |
656 | break; | |
657 | ddr_size -= 1024*1024; | |
658 | } | |
659 | if (status) { | |
660 | dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n", | |
661 | status); | |
662 | error = -ENOMEM; | |
3273d877 | 663 | goto out_close_gpu; |
f507cd22 GU |
664 | } |
665 | ||
666 | /* Request context */ | |
667 | status = lv1_gpu_context_allocate(priv->memory_handle, 0, | |
668 | &priv->context_handle, &ctrl_lpar, | |
669 | &info_lpar, &reports_lpar, | |
670 | &reports_size); | |
671 | if (status) { | |
672 | dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n", | |
673 | status); | |
674 | error = -ENOMEM; | |
675 | goto out_free_memory; | |
676 | } | |
677 | ||
678 | /* Map XDR buffer to RSX */ | |
56ac72db | 679 | xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)); |
f507cd22 | 680 | status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, |
56ac72db GU |
681 | xdr_lpar, XDR_BUF_SIZE, |
682 | CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | | |
683 | CBE_IOPTE_M); | |
f507cd22 GU |
684 | if (status) { |
685 | dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n", | |
686 | status); | |
687 | error = -ENOMEM; | |
688 | goto out_free_context; | |
689 | } | |
690 | ||
691 | priv->ddr_base = ioremap_flags(ddr_lpar, ddr_size, _PAGE_NO_CACHE); | |
692 | ||
693 | if (!priv->ddr_base) { | |
694 | dev_err(&dev->core, "ioremap DDR failed\n"); | |
695 | error = -ENOMEM; | |
56ac72db | 696 | goto out_unmap_context; |
f507cd22 GU |
697 | } |
698 | ||
699 | priv->ctrl = ioremap(ctrl_lpar, 64 * 1024); | |
700 | if (!priv->ctrl) { | |
701 | dev_err(&dev->core, "ioremap CTRL failed\n"); | |
702 | error = -ENOMEM; | |
703 | goto out_unmap_vram; | |
704 | } | |
705 | ||
706 | priv->reports = ioremap(reports_lpar, reports_size); | |
707 | if (!priv->reports) { | |
708 | dev_err(&dev->core, "ioremap REPORTS failed\n"); | |
709 | error = -ENOMEM; | |
710 | goto out_unmap_ctrl; | |
711 | } | |
712 | ||
713 | mutex_lock(&ps3_gpu_mutex); | |
714 | ps3vram_init_ring(dev); | |
715 | mutex_unlock(&ps3_gpu_mutex); | |
716 | ||
717 | priv->size = ddr_size; | |
718 | ||
719 | ps3vram_bind(dev); | |
720 | ||
721 | mutex_lock(&ps3_gpu_mutex); | |
722 | error = ps3vram_wait_ring(dev, 100); | |
723 | mutex_unlock(&ps3_gpu_mutex); | |
724 | if (error < 0) { | |
725 | dev_err(&dev->core, "Failed to initialize channels\n"); | |
726 | error = -ETIMEDOUT; | |
727 | goto out_unmap_reports; | |
728 | } | |
729 | ||
730 | ps3vram_cache_init(dev); | |
731 | ps3vram_proc_init(dev); | |
732 | ||
733 | queue = blk_alloc_queue(GFP_KERNEL); | |
734 | if (!queue) { | |
735 | dev_err(&dev->core, "blk_alloc_queue failed\n"); | |
736 | error = -ENOMEM; | |
737 | goto out_cache_cleanup; | |
738 | } | |
739 | ||
740 | priv->queue = queue; | |
741 | queue->queuedata = dev; | |
742 | blk_queue_make_request(queue, ps3vram_make_request); | |
743 | blk_queue_max_phys_segments(queue, MAX_PHYS_SEGMENTS); | |
744 | blk_queue_max_hw_segments(queue, MAX_HW_SEGMENTS); | |
745 | blk_queue_max_segment_size(queue, MAX_SEGMENT_SIZE); | |
746 | blk_queue_max_sectors(queue, SAFE_MAX_SECTORS); | |
747 | ||
748 | gendisk = alloc_disk(1); | |
749 | if (!gendisk) { | |
750 | dev_err(&dev->core, "alloc_disk failed\n"); | |
751 | error = -ENOMEM; | |
752 | goto fail_cleanup_queue; | |
753 | } | |
754 | ||
755 | priv->gendisk = gendisk; | |
756 | gendisk->major = ps3vram_major; | |
757 | gendisk->first_minor = 0; | |
758 | gendisk->fops = &ps3vram_fops; | |
759 | gendisk->queue = queue; | |
760 | gendisk->private_data = dev; | |
761 | gendisk->driverfs_dev = &dev->core; | |
762 | strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name)); | |
763 | set_capacity(gendisk, priv->size >> 9); | |
764 | ||
765 | dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n", | |
766 | gendisk->disk_name, get_capacity(gendisk) >> 11); | |
767 | ||
768 | add_disk(gendisk); | |
769 | return 0; | |
770 | ||
771 | fail_cleanup_queue: | |
772 | blk_cleanup_queue(queue); | |
773 | out_cache_cleanup: | |
774 | remove_proc_entry(DEVICE_NAME, NULL); | |
775 | ps3vram_cache_cleanup(dev); | |
776 | out_unmap_reports: | |
777 | iounmap(priv->reports); | |
778 | out_unmap_ctrl: | |
779 | iounmap(priv->ctrl); | |
780 | out_unmap_vram: | |
781 | iounmap(priv->ddr_base); | |
56ac72db GU |
782 | out_unmap_context: |
783 | lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar, | |
784 | XDR_BUF_SIZE, CBE_IOPTE_M); | |
f507cd22 GU |
785 | out_free_context: |
786 | lv1_gpu_context_free(priv->context_handle); | |
787 | out_free_memory: | |
788 | lv1_gpu_memory_free(priv->memory_handle); | |
789 | out_close_gpu: | |
790 | ps3_close_hv_device(dev); | |
791 | out_free_xdr_buf: | |
792 | free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); | |
793 | fail_free_priv: | |
794 | kfree(priv); | |
795 | dev->core.driver_data = NULL; | |
796 | fail: | |
797 | return error; | |
798 | } | |
799 | ||
800 | static int ps3vram_remove(struct ps3_system_bus_device *dev) | |
801 | { | |
802 | struct ps3vram_priv *priv = dev->core.driver_data; | |
803 | ||
804 | del_gendisk(priv->gendisk); | |
805 | put_disk(priv->gendisk); | |
806 | blk_cleanup_queue(priv->queue); | |
807 | remove_proc_entry(DEVICE_NAME, NULL); | |
808 | ps3vram_cache_cleanup(dev); | |
809 | iounmap(priv->reports); | |
810 | iounmap(priv->ctrl); | |
811 | iounmap(priv->ddr_base); | |
56ac72db GU |
812 | lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, |
813 | ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)), | |
814 | XDR_BUF_SIZE, CBE_IOPTE_M); | |
f507cd22 GU |
815 | lv1_gpu_context_free(priv->context_handle); |
816 | lv1_gpu_memory_free(priv->memory_handle); | |
817 | ps3_close_hv_device(dev); | |
818 | free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); | |
819 | kfree(priv); | |
820 | dev->core.driver_data = NULL; | |
821 | return 0; | |
822 | } | |
823 | ||
824 | static struct ps3_system_bus_driver ps3vram = { | |
825 | .match_id = PS3_MATCH_ID_GPU, | |
826 | .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK, | |
827 | .core.name = DEVICE_NAME, | |
828 | .core.owner = THIS_MODULE, | |
829 | .probe = ps3vram_probe, | |
830 | .remove = ps3vram_remove, | |
831 | .shutdown = ps3vram_remove, | |
832 | }; | |
833 | ||
834 | ||
835 | static int __init ps3vram_init(void) | |
836 | { | |
837 | int error; | |
838 | ||
839 | if (!firmware_has_feature(FW_FEATURE_PS3_LV1)) | |
840 | return -ENODEV; | |
841 | ||
842 | error = register_blkdev(0, DEVICE_NAME); | |
843 | if (error <= 0) { | |
844 | pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error); | |
845 | return error; | |
846 | } | |
847 | ps3vram_major = error; | |
848 | ||
849 | pr_info("%s: registered block device major %d\n", DEVICE_NAME, | |
850 | ps3vram_major); | |
851 | ||
852 | error = ps3_system_bus_driver_register(&ps3vram); | |
853 | if (error) | |
854 | unregister_blkdev(ps3vram_major, DEVICE_NAME); | |
855 | ||
856 | return error; | |
857 | } | |
858 | ||
859 | static void __exit ps3vram_exit(void) | |
860 | { | |
861 | ps3_system_bus_driver_unregister(&ps3vram); | |
862 | unregister_blkdev(ps3vram_major, DEVICE_NAME); | |
863 | } | |
864 | ||
865 | module_init(ps3vram_init); | |
866 | module_exit(ps3vram_exit); | |
867 | ||
868 | MODULE_LICENSE("GPL"); | |
869 | MODULE_DESCRIPTION("PS3 Video RAM Storage Driver"); | |
870 | MODULE_AUTHOR("Sony Corporation"); | |
871 | MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK); |