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Commit | Line | Data |
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1da177e4 | 1 | /* |
bd4f36d6 MM |
2 | * Disk Array driver for HP Smart Array controllers. |
3 | * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P. | |
1da177e4 LT |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
bd4f36d6 | 7 | * the Free Software Foundation; version 2 of the License. |
1da177e4 LT |
8 | * |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
bd4f36d6 MM |
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
12 | * General Public License for more details. | |
1da177e4 LT |
13 | * |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
bd4f36d6 MM |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
17 | * 02111-1307, USA. | |
1da177e4 LT |
18 | * |
19 | * Questions/Comments/Bugfixes to iss_storagedev@hp.com | |
20 | * | |
21 | */ | |
22 | ||
1da177e4 LT |
23 | #include <linux/module.h> |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/types.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/major.h> | |
31 | #include <linux/fs.h> | |
32 | #include <linux/bio.h> | |
33 | #include <linux/blkpg.h> | |
34 | #include <linux/timer.h> | |
35 | #include <linux/proc_fs.h> | |
89b6e743 | 36 | #include <linux/seq_file.h> |
7c832835 | 37 | #include <linux/init.h> |
4d761609 | 38 | #include <linux/jiffies.h> |
1da177e4 LT |
39 | #include <linux/hdreg.h> |
40 | #include <linux/spinlock.h> | |
41 | #include <linux/compat.h> | |
b368c9dd | 42 | #include <linux/mutex.h> |
1da177e4 LT |
43 | #include <asm/uaccess.h> |
44 | #include <asm/io.h> | |
45 | ||
eb0df996 | 46 | #include <linux/dma-mapping.h> |
1da177e4 LT |
47 | #include <linux/blkdev.h> |
48 | #include <linux/genhd.h> | |
49 | #include <linux/completion.h> | |
d5d3b736 | 50 | #include <scsi/scsi.h> |
03bbfee5 MMOD |
51 | #include <scsi/sg.h> |
52 | #include <scsi/scsi_ioctl.h> | |
53 | #include <linux/cdrom.h> | |
231bc2a2 | 54 | #include <linux/scatterlist.h> |
0a9279cc | 55 | #include <linux/kthread.h> |
1da177e4 LT |
56 | |
57 | #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin)) | |
841fdffd MM |
58 | #define DRIVER_NAME "HP CISS Driver (v 3.6.26)" |
59 | #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26) | |
1da177e4 LT |
60 | |
61 | /* Embedded module documentation macros - see modules.h */ | |
62 | MODULE_AUTHOR("Hewlett-Packard Company"); | |
24aac480 | 63 | MODULE_DESCRIPTION("Driver for HP Smart Array Controllers"); |
841fdffd MM |
64 | MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); |
65 | MODULE_VERSION("3.6.26"); | |
1da177e4 LT |
66 | MODULE_LICENSE("GPL"); |
67 | ||
2a48fc0a | 68 | static DEFINE_MUTEX(cciss_mutex); |
2ec24ff1 SC |
69 | static int cciss_allow_hpsa; |
70 | module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR); | |
71 | MODULE_PARM_DESC(cciss_allow_hpsa, | |
72 | "Prevent cciss driver from accessing hardware known to be " | |
73 | " supported by the hpsa driver"); | |
74 | ||
1da177e4 LT |
75 | #include "cciss_cmd.h" |
76 | #include "cciss.h" | |
77 | #include <linux/cciss_ioctl.h> | |
78 | ||
79 | /* define the PCI info for the cards we can control */ | |
80 | static const struct pci_device_id cciss_pci_device_id[] = { | |
f82ccdb9 BH |
81 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070}, |
82 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080}, | |
83 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082}, | |
84 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083}, | |
85 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091}, | |
86 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A}, | |
87 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B}, | |
88 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C}, | |
89 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D}, | |
90 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225}, | |
91 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223}, | |
92 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234}, | |
93 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235}, | |
94 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211}, | |
95 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212}, | |
96 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213}, | |
97 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214}, | |
98 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215}, | |
de923916 | 99 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237}, |
9cff3b38 | 100 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D}, |
24aac480 MM |
101 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, |
102 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, | |
103 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, | |
104 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, | |
105 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, | |
77ca7286 MM |
106 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, |
107 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, | |
6362beea MM |
108 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, |
109 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, | |
110 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, | |
111 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, | |
112 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, | |
113 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, | |
1da177e4 LT |
114 | {0,} |
115 | }; | |
7c832835 | 116 | |
1da177e4 LT |
117 | MODULE_DEVICE_TABLE(pci, cciss_pci_device_id); |
118 | ||
1da177e4 LT |
119 | /* board_id = Subsystem Device ID & Vendor ID |
120 | * product = Marketing Name for the board | |
7c832835 | 121 | * access = Address of the struct of function pointers |
1da177e4 LT |
122 | */ |
123 | static struct board_type products[] = { | |
49153998 MM |
124 | {0x40700E11, "Smart Array 5300", &SA5_access}, |
125 | {0x40800E11, "Smart Array 5i", &SA5B_access}, | |
126 | {0x40820E11, "Smart Array 532", &SA5B_access}, | |
127 | {0x40830E11, "Smart Array 5312", &SA5B_access}, | |
128 | {0x409A0E11, "Smart Array 641", &SA5_access}, | |
129 | {0x409B0E11, "Smart Array 642", &SA5_access}, | |
130 | {0x409C0E11, "Smart Array 6400", &SA5_access}, | |
131 | {0x409D0E11, "Smart Array 6400 EM", &SA5_access}, | |
132 | {0x40910E11, "Smart Array 6i", &SA5_access}, | |
133 | {0x3225103C, "Smart Array P600", &SA5_access}, | |
49153998 MM |
134 | {0x3235103C, "Smart Array P400i", &SA5_access}, |
135 | {0x3211103C, "Smart Array E200i", &SA5_access}, | |
136 | {0x3212103C, "Smart Array E200", &SA5_access}, | |
137 | {0x3213103C, "Smart Array E200i", &SA5_access}, | |
138 | {0x3214103C, "Smart Array E200i", &SA5_access}, | |
139 | {0x3215103C, "Smart Array E200i", &SA5_access}, | |
140 | {0x3237103C, "Smart Array E500", &SA5_access}, | |
2ec24ff1 SC |
141 | /* controllers below this line are also supported by the hpsa driver. */ |
142 | #define HPSA_BOUNDARY 0x3223103C | |
143 | {0x3223103C, "Smart Array P800", &SA5_access}, | |
144 | {0x3234103C, "Smart Array P400", &SA5_access}, | |
49153998 MM |
145 | {0x323D103C, "Smart Array P700m", &SA5_access}, |
146 | {0x3241103C, "Smart Array P212", &SA5_access}, | |
147 | {0x3243103C, "Smart Array P410", &SA5_access}, | |
148 | {0x3245103C, "Smart Array P410i", &SA5_access}, | |
149 | {0x3247103C, "Smart Array P411", &SA5_access}, | |
150 | {0x3249103C, "Smart Array P812", &SA5_access}, | |
77ca7286 MM |
151 | {0x324A103C, "Smart Array P712m", &SA5_access}, |
152 | {0x324B103C, "Smart Array P711m", &SA5_access}, | |
6362beea MM |
153 | {0x3350103C, "Smart Array", &SA5_access}, |
154 | {0x3351103C, "Smart Array", &SA5_access}, | |
155 | {0x3352103C, "Smart Array", &SA5_access}, | |
156 | {0x3353103C, "Smart Array", &SA5_access}, | |
157 | {0x3354103C, "Smart Array", &SA5_access}, | |
158 | {0x3355103C, "Smart Array", &SA5_access}, | |
1da177e4 LT |
159 | }; |
160 | ||
d14c4ab5 | 161 | /* How long to wait (in milliseconds) for board to go into simple mode */ |
7c832835 | 162 | #define MAX_CONFIG_WAIT 30000 |
1da177e4 LT |
163 | #define MAX_IOCTL_CONFIG_WAIT 1000 |
164 | ||
165 | /*define how many times we will try a command because of bus resets */ | |
166 | #define MAX_CMD_RETRIES 3 | |
167 | ||
1da177e4 LT |
168 | #define MAX_CTLR 32 |
169 | ||
170 | /* Originally cciss driver only supports 8 major numbers */ | |
171 | #define MAX_CTLR_ORIG 8 | |
172 | ||
1da177e4 LT |
173 | static ctlr_info_t *hba[MAX_CTLR]; |
174 | ||
b368c9dd AP |
175 | static struct task_struct *cciss_scan_thread; |
176 | static DEFINE_MUTEX(scan_mutex); | |
177 | static LIST_HEAD(scan_q); | |
178 | ||
165125e1 | 179 | static void do_cciss_request(struct request_queue *q); |
0c2b3908 MM |
180 | static irqreturn_t do_cciss_intx(int irq, void *dev_id); |
181 | static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id); | |
ef7822c2 | 182 | static int cciss_open(struct block_device *bdev, fmode_t mode); |
6e9624b8 | 183 | static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode); |
ef7822c2 | 184 | static int cciss_release(struct gendisk *disk, fmode_t mode); |
8a6cfeb6 AB |
185 | static int do_ioctl(struct block_device *bdev, fmode_t mode, |
186 | unsigned int cmd, unsigned long arg); | |
ef7822c2 | 187 | static int cciss_ioctl(struct block_device *bdev, fmode_t mode, |
7c832835 | 188 | unsigned int cmd, unsigned long arg); |
a885c8c4 | 189 | static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo); |
1da177e4 | 190 | |
1da177e4 | 191 | static int cciss_revalidate(struct gendisk *disk); |
2d11d993 | 192 | static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl); |
a0ea8622 | 193 | static int deregister_disk(ctlr_info_t *h, int drv_index, |
2d11d993 | 194 | int clear_all, int via_ioctl); |
1da177e4 | 195 | |
f70dba83 | 196 | static void cciss_read_capacity(ctlr_info_t *h, int logvol, |
00988a35 | 197 | sector_t *total_size, unsigned int *block_size); |
f70dba83 | 198 | static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, |
00988a35 | 199 | sector_t *total_size, unsigned int *block_size); |
f70dba83 | 200 | static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, |
7b838bde | 201 | sector_t total_size, |
00988a35 | 202 | unsigned int block_size, InquiryData_struct *inq_buff, |
7c832835 | 203 | drive_info_struct *drv); |
dac5488a | 204 | static void __devinit cciss_interrupt_mode(ctlr_info_t *); |
7c832835 | 205 | static void start_io(ctlr_info_t *h); |
f70dba83 | 206 | static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, |
b57695fe | 207 | __u8 page_code, unsigned char scsi3addr[], |
208 | int cmd_type); | |
85cc61ae | 209 | static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, |
210 | int attempt_retry); | |
211 | static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c); | |
1da177e4 | 212 | |
d6f4965d | 213 | static int add_to_scan_list(struct ctlr_info *h); |
0a9279cc MM |
214 | static int scan_thread(void *data); |
215 | static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c); | |
617e1344 SC |
216 | static void cciss_hba_release(struct device *dev); |
217 | static void cciss_device_release(struct device *dev); | |
361e9b07 | 218 | static void cciss_free_gendisk(ctlr_info_t *h, int drv_index); |
9cef0d2f | 219 | static void cciss_free_drive_info(ctlr_info_t *h, int drv_index); |
29979a71 | 220 | static inline u32 next_command(ctlr_info_t *h); |
a6528d01 SC |
221 | static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev, |
222 | void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, | |
223 | u64 *cfg_offset); | |
224 | static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev, | |
225 | unsigned long *memory_bar); | |
226 | ||
33079b21 | 227 | |
5e216153 MM |
228 | /* performant mode helper functions */ |
229 | static void calc_bucket_map(int *bucket, int num_buckets, int nsgs, | |
230 | int *bucket_map); | |
231 | static void cciss_put_controller_into_performant_mode(ctlr_info_t *h); | |
33079b21 | 232 | |
1da177e4 | 233 | #ifdef CONFIG_PROC_FS |
f70dba83 | 234 | static void cciss_procinit(ctlr_info_t *h); |
1da177e4 | 235 | #else |
f70dba83 | 236 | static void cciss_procinit(ctlr_info_t *h) |
7c832835 BH |
237 | { |
238 | } | |
239 | #endif /* CONFIG_PROC_FS */ | |
1da177e4 LT |
240 | |
241 | #ifdef CONFIG_COMPAT | |
ef7822c2 AV |
242 | static int cciss_compat_ioctl(struct block_device *, fmode_t, |
243 | unsigned, unsigned long); | |
1da177e4 LT |
244 | #endif |
245 | ||
83d5cde4 | 246 | static const struct block_device_operations cciss_fops = { |
7c832835 | 247 | .owner = THIS_MODULE, |
6e9624b8 | 248 | .open = cciss_unlocked_open, |
ef7822c2 | 249 | .release = cciss_release, |
8a6cfeb6 | 250 | .ioctl = do_ioctl, |
7c832835 | 251 | .getgeo = cciss_getgeo, |
1da177e4 | 252 | #ifdef CONFIG_COMPAT |
ef7822c2 | 253 | .compat_ioctl = cciss_compat_ioctl, |
1da177e4 | 254 | #endif |
7c832835 | 255 | .revalidate_disk = cciss_revalidate, |
1da177e4 LT |
256 | }; |
257 | ||
5e216153 MM |
258 | /* set_performant_mode: Modify the tag for cciss performant |
259 | * set bit 0 for pull model, bits 3-1 for block fetch | |
260 | * register number | |
261 | */ | |
262 | static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c) | |
263 | { | |
264 | if (likely(h->transMethod == CFGTBL_Trans_Performant)) | |
265 | c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); | |
266 | } | |
267 | ||
1da177e4 LT |
268 | /* |
269 | * Enqueuing and dequeuing functions for cmdlists. | |
270 | */ | |
8a3173de | 271 | static inline void addQ(struct hlist_head *list, CommandList_struct *c) |
1da177e4 | 272 | { |
8a3173de | 273 | hlist_add_head(&c->list, list); |
1da177e4 LT |
274 | } |
275 | ||
8a3173de | 276 | static inline void removeQ(CommandList_struct *c) |
1da177e4 | 277 | { |
b59e64d0 HR |
278 | /* |
279 | * After kexec/dump some commands might still | |
280 | * be in flight, which the firmware will try | |
281 | * to complete. Resetting the firmware doesn't work | |
282 | * with old fw revisions, so we have to mark | |
283 | * them off as 'stale' to prevent the driver from | |
284 | * falling over. | |
285 | */ | |
286 | if (WARN_ON(hlist_unhashed(&c->list))) { | |
287 | c->cmd_type = CMD_MSG_STALE; | |
8a3173de | 288 | return; |
b59e64d0 | 289 | } |
8a3173de JA |
290 | |
291 | hlist_del_init(&c->list); | |
1da177e4 LT |
292 | } |
293 | ||
664a717d MM |
294 | static void enqueue_cmd_and_start_io(ctlr_info_t *h, |
295 | CommandList_struct *c) | |
296 | { | |
297 | unsigned long flags; | |
5e216153 | 298 | set_performant_mode(h, c); |
664a717d MM |
299 | spin_lock_irqsave(&h->lock, flags); |
300 | addQ(&h->reqQ, c); | |
301 | h->Qdepth++; | |
2a643ec6 SC |
302 | if (h->Qdepth > h->maxQsinceinit) |
303 | h->maxQsinceinit = h->Qdepth; | |
664a717d MM |
304 | start_io(h); |
305 | spin_unlock_irqrestore(&h->lock, flags); | |
306 | } | |
307 | ||
dccc9b56 | 308 | static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list, |
49fc5601 SC |
309 | int nr_cmds) |
310 | { | |
311 | int i; | |
312 | ||
313 | if (!cmd_sg_list) | |
314 | return; | |
315 | for (i = 0; i < nr_cmds; i++) { | |
dccc9b56 SC |
316 | kfree(cmd_sg_list[i]); |
317 | cmd_sg_list[i] = NULL; | |
49fc5601 SC |
318 | } |
319 | kfree(cmd_sg_list); | |
320 | } | |
321 | ||
dccc9b56 SC |
322 | static SGDescriptor_struct **cciss_allocate_sg_chain_blocks( |
323 | ctlr_info_t *h, int chainsize, int nr_cmds) | |
49fc5601 SC |
324 | { |
325 | int j; | |
dccc9b56 | 326 | SGDescriptor_struct **cmd_sg_list; |
49fc5601 SC |
327 | |
328 | if (chainsize <= 0) | |
329 | return NULL; | |
330 | ||
331 | cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL); | |
332 | if (!cmd_sg_list) | |
333 | return NULL; | |
334 | ||
335 | /* Build up chain blocks for each command */ | |
336 | for (j = 0; j < nr_cmds; j++) { | |
49fc5601 | 337 | /* Need a block of chainsized s/g elements. */ |
dccc9b56 SC |
338 | cmd_sg_list[j] = kmalloc((chainsize * |
339 | sizeof(*cmd_sg_list[j])), GFP_KERNEL); | |
340 | if (!cmd_sg_list[j]) { | |
49fc5601 SC |
341 | dev_err(&h->pdev->dev, "Cannot get memory " |
342 | "for s/g chains.\n"); | |
343 | goto clean; | |
344 | } | |
345 | } | |
346 | return cmd_sg_list; | |
347 | clean: | |
348 | cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds); | |
349 | return NULL; | |
350 | } | |
351 | ||
d45033ef SC |
352 | static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c) |
353 | { | |
354 | SGDescriptor_struct *chain_sg; | |
355 | u64bit temp64; | |
356 | ||
357 | if (c->Header.SGTotal <= h->max_cmd_sgentries) | |
358 | return; | |
359 | ||
360 | chain_sg = &c->SG[h->max_cmd_sgentries - 1]; | |
361 | temp64.val32.lower = chain_sg->Addr.lower; | |
362 | temp64.val32.upper = chain_sg->Addr.upper; | |
363 | pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); | |
364 | } | |
365 | ||
366 | static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c, | |
367 | SGDescriptor_struct *chain_block, int len) | |
368 | { | |
369 | SGDescriptor_struct *chain_sg; | |
370 | u64bit temp64; | |
371 | ||
372 | chain_sg = &c->SG[h->max_cmd_sgentries - 1]; | |
373 | chain_sg->Ext = CCISS_SG_CHAIN; | |
374 | chain_sg->Len = len; | |
375 | temp64.val = pci_map_single(h->pdev, chain_block, len, | |
376 | PCI_DMA_TODEVICE); | |
377 | chain_sg->Addr.lower = temp64.val32.lower; | |
378 | chain_sg->Addr.upper = temp64.val32.upper; | |
379 | } | |
380 | ||
1da177e4 LT |
381 | #include "cciss_scsi.c" /* For SCSI tape support */ |
382 | ||
1e6f2dc1 AB |
383 | static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", |
384 | "UNKNOWN" | |
385 | }; | |
0e4a9d03 | 386 | #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1) |
0f5486ec | 387 | |
1da177e4 LT |
388 | #ifdef CONFIG_PROC_FS |
389 | ||
390 | /* | |
391 | * Report information about this controller. | |
392 | */ | |
393 | #define ENG_GIG 1000000000 | |
394 | #define ENG_GIG_FACTOR (ENG_GIG/512) | |
89b6e743 | 395 | #define ENGAGE_SCSI "engage scsi" |
1da177e4 LT |
396 | |
397 | static struct proc_dir_entry *proc_cciss; | |
398 | ||
89b6e743 | 399 | static void cciss_seq_show_header(struct seq_file *seq) |
1da177e4 | 400 | { |
89b6e743 MM |
401 | ctlr_info_t *h = seq->private; |
402 | ||
403 | seq_printf(seq, "%s: HP %s Controller\n" | |
404 | "Board ID: 0x%08lx\n" | |
405 | "Firmware Version: %c%c%c%c\n" | |
406 | "IRQ: %d\n" | |
407 | "Logical drives: %d\n" | |
408 | "Current Q depth: %d\n" | |
409 | "Current # commands on controller: %d\n" | |
410 | "Max Q depth since init: %d\n" | |
411 | "Max # commands on controller since init: %d\n" | |
412 | "Max SG entries since init: %d\n", | |
413 | h->devname, | |
414 | h->product_name, | |
415 | (unsigned long)h->board_id, | |
416 | h->firm_ver[0], h->firm_ver[1], h->firm_ver[2], | |
5e216153 | 417 | h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT], |
89b6e743 MM |
418 | h->num_luns, |
419 | h->Qdepth, h->commands_outstanding, | |
420 | h->maxQsinceinit, h->max_outstanding, h->maxSG); | |
421 | ||
422 | #ifdef CONFIG_CISS_SCSI_TAPE | |
f70dba83 | 423 | cciss_seq_tape_report(seq, h); |
89b6e743 MM |
424 | #endif /* CONFIG_CISS_SCSI_TAPE */ |
425 | } | |
1da177e4 | 426 | |
89b6e743 MM |
427 | static void *cciss_seq_start(struct seq_file *seq, loff_t *pos) |
428 | { | |
429 | ctlr_info_t *h = seq->private; | |
89b6e743 | 430 | unsigned long flags; |
1da177e4 LT |
431 | |
432 | /* prevent displaying bogus info during configuration | |
433 | * or deconfiguration of a logical volume | |
434 | */ | |
f70dba83 | 435 | spin_lock_irqsave(&h->lock, flags); |
1da177e4 | 436 | if (h->busy_configuring) { |
f70dba83 | 437 | spin_unlock_irqrestore(&h->lock, flags); |
89b6e743 | 438 | return ERR_PTR(-EBUSY); |
1da177e4 LT |
439 | } |
440 | h->busy_configuring = 1; | |
f70dba83 | 441 | spin_unlock_irqrestore(&h->lock, flags); |
1da177e4 | 442 | |
89b6e743 MM |
443 | if (*pos == 0) |
444 | cciss_seq_show_header(seq); | |
445 | ||
446 | return pos; | |
447 | } | |
448 | ||
449 | static int cciss_seq_show(struct seq_file *seq, void *v) | |
450 | { | |
451 | sector_t vol_sz, vol_sz_frac; | |
452 | ctlr_info_t *h = seq->private; | |
453 | unsigned ctlr = h->ctlr; | |
454 | loff_t *pos = v; | |
9cef0d2f | 455 | drive_info_struct *drv = h->drv[*pos]; |
89b6e743 MM |
456 | |
457 | if (*pos > h->highest_lun) | |
458 | return 0; | |
459 | ||
531c2dc7 SC |
460 | if (drv == NULL) /* it's possible for h->drv[] to have holes. */ |
461 | return 0; | |
462 | ||
89b6e743 MM |
463 | if (drv->heads == 0) |
464 | return 0; | |
465 | ||
466 | vol_sz = drv->nr_blocks; | |
467 | vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR); | |
468 | vol_sz_frac *= 100; | |
469 | sector_div(vol_sz_frac, ENG_GIG_FACTOR); | |
470 | ||
fa52bec9 | 471 | if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN) |
89b6e743 MM |
472 | drv->raid_level = RAID_UNKNOWN; |
473 | seq_printf(seq, "cciss/c%dd%d:" | |
474 | "\t%4u.%02uGB\tRAID %s\n", | |
475 | ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac, | |
476 | raid_label[drv->raid_level]); | |
477 | return 0; | |
478 | } | |
479 | ||
480 | static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos) | |
481 | { | |
482 | ctlr_info_t *h = seq->private; | |
483 | ||
484 | if (*pos > h->highest_lun) | |
485 | return NULL; | |
486 | *pos += 1; | |
487 | ||
488 | return pos; | |
489 | } | |
490 | ||
491 | static void cciss_seq_stop(struct seq_file *seq, void *v) | |
492 | { | |
493 | ctlr_info_t *h = seq->private; | |
494 | ||
495 | /* Only reset h->busy_configuring if we succeeded in setting | |
496 | * it during cciss_seq_start. */ | |
497 | if (v == ERR_PTR(-EBUSY)) | |
498 | return; | |
7c832835 | 499 | |
1da177e4 | 500 | h->busy_configuring = 0; |
1da177e4 LT |
501 | } |
502 | ||
88e9d34c | 503 | static const struct seq_operations cciss_seq_ops = { |
89b6e743 MM |
504 | .start = cciss_seq_start, |
505 | .show = cciss_seq_show, | |
506 | .next = cciss_seq_next, | |
507 | .stop = cciss_seq_stop, | |
508 | }; | |
509 | ||
510 | static int cciss_seq_open(struct inode *inode, struct file *file) | |
511 | { | |
512 | int ret = seq_open(file, &cciss_seq_ops); | |
513 | struct seq_file *seq = file->private_data; | |
514 | ||
515 | if (!ret) | |
516 | seq->private = PDE(inode)->data; | |
517 | ||
518 | return ret; | |
519 | } | |
520 | ||
521 | static ssize_t | |
522 | cciss_proc_write(struct file *file, const char __user *buf, | |
523 | size_t length, loff_t *ppos) | |
1da177e4 | 524 | { |
89b6e743 MM |
525 | int err; |
526 | char *buffer; | |
527 | ||
528 | #ifndef CONFIG_CISS_SCSI_TAPE | |
529 | return -EINVAL; | |
1da177e4 LT |
530 | #endif |
531 | ||
89b6e743 | 532 | if (!buf || length > PAGE_SIZE - 1) |
7c832835 | 533 | return -EINVAL; |
89b6e743 MM |
534 | |
535 | buffer = (char *)__get_free_page(GFP_KERNEL); | |
536 | if (!buffer) | |
537 | return -ENOMEM; | |
538 | ||
539 | err = -EFAULT; | |
540 | if (copy_from_user(buffer, buf, length)) | |
541 | goto out; | |
542 | buffer[length] = '\0'; | |
543 | ||
544 | #ifdef CONFIG_CISS_SCSI_TAPE | |
545 | if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) { | |
546 | struct seq_file *seq = file->private_data; | |
547 | ctlr_info_t *h = seq->private; | |
89b6e743 | 548 | |
f70dba83 | 549 | err = cciss_engage_scsi(h); |
8721c81f | 550 | if (err == 0) |
89b6e743 MM |
551 | err = length; |
552 | } else | |
553 | #endif /* CONFIG_CISS_SCSI_TAPE */ | |
554 | err = -EINVAL; | |
7c832835 BH |
555 | /* might be nice to have "disengage" too, but it's not |
556 | safely possible. (only 1 module use count, lock issues.) */ | |
89b6e743 MM |
557 | |
558 | out: | |
559 | free_page((unsigned long)buffer); | |
560 | return err; | |
1da177e4 LT |
561 | } |
562 | ||
828c0950 | 563 | static const struct file_operations cciss_proc_fops = { |
89b6e743 MM |
564 | .owner = THIS_MODULE, |
565 | .open = cciss_seq_open, | |
566 | .read = seq_read, | |
567 | .llseek = seq_lseek, | |
568 | .release = seq_release, | |
569 | .write = cciss_proc_write, | |
570 | }; | |
571 | ||
f70dba83 | 572 | static void __devinit cciss_procinit(ctlr_info_t *h) |
1da177e4 LT |
573 | { |
574 | struct proc_dir_entry *pde; | |
575 | ||
89b6e743 | 576 | if (proc_cciss == NULL) |
928b4d8c | 577 | proc_cciss = proc_mkdir("driver/cciss", NULL); |
89b6e743 MM |
578 | if (!proc_cciss) |
579 | return; | |
f70dba83 | 580 | pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP | |
89b6e743 | 581 | S_IROTH, proc_cciss, |
f70dba83 | 582 | &cciss_proc_fops, h); |
1da177e4 | 583 | } |
7c832835 | 584 | #endif /* CONFIG_PROC_FS */ |
1da177e4 | 585 | |
7fe06326 AP |
586 | #define MAX_PRODUCT_NAME_LEN 19 |
587 | ||
588 | #define to_hba(n) container_of(n, struct ctlr_info, dev) | |
589 | #define to_drv(n) container_of(n, drive_info_struct, dev) | |
590 | ||
d6f4965d AP |
591 | static ssize_t host_store_rescan(struct device *dev, |
592 | struct device_attribute *attr, | |
593 | const char *buf, size_t count) | |
594 | { | |
595 | struct ctlr_info *h = to_hba(dev); | |
596 | ||
597 | add_to_scan_list(h); | |
598 | wake_up_process(cciss_scan_thread); | |
599 | wait_for_completion_interruptible(&h->scan_wait); | |
600 | ||
601 | return count; | |
602 | } | |
8ba95c69 | 603 | static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); |
7fe06326 AP |
604 | |
605 | static ssize_t dev_show_unique_id(struct device *dev, | |
606 | struct device_attribute *attr, | |
607 | char *buf) | |
608 | { | |
609 | drive_info_struct *drv = to_drv(dev); | |
610 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
611 | __u8 sn[16]; | |
612 | unsigned long flags; | |
613 | int ret = 0; | |
614 | ||
f70dba83 | 615 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
616 | if (h->busy_configuring) |
617 | ret = -EBUSY; | |
618 | else | |
619 | memcpy(sn, drv->serial_no, sizeof(sn)); | |
f70dba83 | 620 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
621 | |
622 | if (ret) | |
623 | return ret; | |
624 | else | |
625 | return snprintf(buf, 16 * 2 + 2, | |
626 | "%02X%02X%02X%02X%02X%02X%02X%02X" | |
627 | "%02X%02X%02X%02X%02X%02X%02X%02X\n", | |
628 | sn[0], sn[1], sn[2], sn[3], | |
629 | sn[4], sn[5], sn[6], sn[7], | |
630 | sn[8], sn[9], sn[10], sn[11], | |
631 | sn[12], sn[13], sn[14], sn[15]); | |
632 | } | |
8ba95c69 | 633 | static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL); |
7fe06326 AP |
634 | |
635 | static ssize_t dev_show_vendor(struct device *dev, | |
636 | struct device_attribute *attr, | |
637 | char *buf) | |
638 | { | |
639 | drive_info_struct *drv = to_drv(dev); | |
640 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
641 | char vendor[VENDOR_LEN + 1]; | |
642 | unsigned long flags; | |
643 | int ret = 0; | |
644 | ||
f70dba83 | 645 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
646 | if (h->busy_configuring) |
647 | ret = -EBUSY; | |
648 | else | |
649 | memcpy(vendor, drv->vendor, VENDOR_LEN + 1); | |
f70dba83 | 650 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
651 | |
652 | if (ret) | |
653 | return ret; | |
654 | else | |
655 | return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor); | |
656 | } | |
8ba95c69 | 657 | static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL); |
7fe06326 AP |
658 | |
659 | static ssize_t dev_show_model(struct device *dev, | |
660 | struct device_attribute *attr, | |
661 | char *buf) | |
662 | { | |
663 | drive_info_struct *drv = to_drv(dev); | |
664 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
665 | char model[MODEL_LEN + 1]; | |
666 | unsigned long flags; | |
667 | int ret = 0; | |
668 | ||
f70dba83 | 669 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
670 | if (h->busy_configuring) |
671 | ret = -EBUSY; | |
672 | else | |
673 | memcpy(model, drv->model, MODEL_LEN + 1); | |
f70dba83 | 674 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
675 | |
676 | if (ret) | |
677 | return ret; | |
678 | else | |
679 | return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model); | |
680 | } | |
8ba95c69 | 681 | static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL); |
7fe06326 AP |
682 | |
683 | static ssize_t dev_show_rev(struct device *dev, | |
684 | struct device_attribute *attr, | |
685 | char *buf) | |
686 | { | |
687 | drive_info_struct *drv = to_drv(dev); | |
688 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
689 | char rev[REV_LEN + 1]; | |
690 | unsigned long flags; | |
691 | int ret = 0; | |
692 | ||
f70dba83 | 693 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
694 | if (h->busy_configuring) |
695 | ret = -EBUSY; | |
696 | else | |
697 | memcpy(rev, drv->rev, REV_LEN + 1); | |
f70dba83 | 698 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
699 | |
700 | if (ret) | |
701 | return ret; | |
702 | else | |
703 | return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev); | |
704 | } | |
8ba95c69 | 705 | static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL); |
7fe06326 | 706 | |
ce84a8ae SC |
707 | static ssize_t cciss_show_lunid(struct device *dev, |
708 | struct device_attribute *attr, char *buf) | |
709 | { | |
9cef0d2f SC |
710 | drive_info_struct *drv = to_drv(dev); |
711 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
ce84a8ae SC |
712 | unsigned long flags; |
713 | unsigned char lunid[8]; | |
714 | ||
f70dba83 | 715 | spin_lock_irqsave(&h->lock, flags); |
ce84a8ae | 716 | if (h->busy_configuring) { |
f70dba83 | 717 | spin_unlock_irqrestore(&h->lock, flags); |
ce84a8ae SC |
718 | return -EBUSY; |
719 | } | |
720 | if (!drv->heads) { | |
f70dba83 | 721 | spin_unlock_irqrestore(&h->lock, flags); |
ce84a8ae SC |
722 | return -ENOTTY; |
723 | } | |
724 | memcpy(lunid, drv->LunID, sizeof(lunid)); | |
f70dba83 | 725 | spin_unlock_irqrestore(&h->lock, flags); |
ce84a8ae SC |
726 | return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", |
727 | lunid[0], lunid[1], lunid[2], lunid[3], | |
728 | lunid[4], lunid[5], lunid[6], lunid[7]); | |
729 | } | |
8ba95c69 | 730 | static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL); |
ce84a8ae | 731 | |
3ff1111d SC |
732 | static ssize_t cciss_show_raid_level(struct device *dev, |
733 | struct device_attribute *attr, char *buf) | |
734 | { | |
9cef0d2f SC |
735 | drive_info_struct *drv = to_drv(dev); |
736 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
3ff1111d SC |
737 | int raid; |
738 | unsigned long flags; | |
739 | ||
f70dba83 | 740 | spin_lock_irqsave(&h->lock, flags); |
3ff1111d | 741 | if (h->busy_configuring) { |
f70dba83 | 742 | spin_unlock_irqrestore(&h->lock, flags); |
3ff1111d SC |
743 | return -EBUSY; |
744 | } | |
745 | raid = drv->raid_level; | |
f70dba83 | 746 | spin_unlock_irqrestore(&h->lock, flags); |
3ff1111d SC |
747 | if (raid < 0 || raid > RAID_UNKNOWN) |
748 | raid = RAID_UNKNOWN; | |
749 | ||
750 | return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n", | |
751 | raid_label[raid]); | |
752 | } | |
8ba95c69 | 753 | static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL); |
3ff1111d | 754 | |
e272afec SC |
755 | static ssize_t cciss_show_usage_count(struct device *dev, |
756 | struct device_attribute *attr, char *buf) | |
757 | { | |
9cef0d2f SC |
758 | drive_info_struct *drv = to_drv(dev); |
759 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
e272afec SC |
760 | unsigned long flags; |
761 | int count; | |
762 | ||
f70dba83 | 763 | spin_lock_irqsave(&h->lock, flags); |
e272afec | 764 | if (h->busy_configuring) { |
f70dba83 | 765 | spin_unlock_irqrestore(&h->lock, flags); |
e272afec SC |
766 | return -EBUSY; |
767 | } | |
768 | count = drv->usage_count; | |
f70dba83 | 769 | spin_unlock_irqrestore(&h->lock, flags); |
e272afec SC |
770 | return snprintf(buf, 20, "%d\n", count); |
771 | } | |
8ba95c69 | 772 | static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL); |
e272afec | 773 | |
d6f4965d AP |
774 | static struct attribute *cciss_host_attrs[] = { |
775 | &dev_attr_rescan.attr, | |
776 | NULL | |
777 | }; | |
778 | ||
779 | static struct attribute_group cciss_host_attr_group = { | |
780 | .attrs = cciss_host_attrs, | |
781 | }; | |
782 | ||
9f792d9f | 783 | static const struct attribute_group *cciss_host_attr_groups[] = { |
d6f4965d AP |
784 | &cciss_host_attr_group, |
785 | NULL | |
786 | }; | |
787 | ||
788 | static struct device_type cciss_host_type = { | |
789 | .name = "cciss_host", | |
790 | .groups = cciss_host_attr_groups, | |
617e1344 | 791 | .release = cciss_hba_release, |
d6f4965d AP |
792 | }; |
793 | ||
7fe06326 AP |
794 | static struct attribute *cciss_dev_attrs[] = { |
795 | &dev_attr_unique_id.attr, | |
796 | &dev_attr_model.attr, | |
797 | &dev_attr_vendor.attr, | |
798 | &dev_attr_rev.attr, | |
ce84a8ae | 799 | &dev_attr_lunid.attr, |
3ff1111d | 800 | &dev_attr_raid_level.attr, |
e272afec | 801 | &dev_attr_usage_count.attr, |
7fe06326 AP |
802 | NULL |
803 | }; | |
804 | ||
805 | static struct attribute_group cciss_dev_attr_group = { | |
806 | .attrs = cciss_dev_attrs, | |
807 | }; | |
808 | ||
a4dbd674 | 809 | static const struct attribute_group *cciss_dev_attr_groups[] = { |
7fe06326 AP |
810 | &cciss_dev_attr_group, |
811 | NULL | |
812 | }; | |
813 | ||
814 | static struct device_type cciss_dev_type = { | |
815 | .name = "cciss_device", | |
816 | .groups = cciss_dev_attr_groups, | |
617e1344 | 817 | .release = cciss_device_release, |
7fe06326 AP |
818 | }; |
819 | ||
820 | static struct bus_type cciss_bus_type = { | |
821 | .name = "cciss", | |
822 | }; | |
823 | ||
617e1344 SC |
824 | /* |
825 | * cciss_hba_release is called when the reference count | |
826 | * of h->dev goes to zero. | |
827 | */ | |
828 | static void cciss_hba_release(struct device *dev) | |
829 | { | |
830 | /* | |
831 | * nothing to do, but need this to avoid a warning | |
832 | * about not having a release handler from lib/kref.c. | |
833 | */ | |
834 | } | |
7fe06326 AP |
835 | |
836 | /* | |
837 | * Initialize sysfs entry for each controller. This sets up and registers | |
838 | * the 'cciss#' directory for each individual controller under | |
839 | * /sys/bus/pci/devices/<dev>/. | |
840 | */ | |
841 | static int cciss_create_hba_sysfs_entry(struct ctlr_info *h) | |
842 | { | |
843 | device_initialize(&h->dev); | |
844 | h->dev.type = &cciss_host_type; | |
845 | h->dev.bus = &cciss_bus_type; | |
846 | dev_set_name(&h->dev, "%s", h->devname); | |
847 | h->dev.parent = &h->pdev->dev; | |
848 | ||
849 | return device_add(&h->dev); | |
850 | } | |
851 | ||
852 | /* | |
853 | * Remove sysfs entries for an hba. | |
854 | */ | |
855 | static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h) | |
856 | { | |
857 | device_del(&h->dev); | |
617e1344 SC |
858 | put_device(&h->dev); /* final put. */ |
859 | } | |
860 | ||
861 | /* cciss_device_release is called when the reference count | |
9cef0d2f | 862 | * of h->drv[x]dev goes to zero. |
617e1344 SC |
863 | */ |
864 | static void cciss_device_release(struct device *dev) | |
865 | { | |
9cef0d2f SC |
866 | drive_info_struct *drv = to_drv(dev); |
867 | kfree(drv); | |
7fe06326 AP |
868 | } |
869 | ||
870 | /* | |
871 | * Initialize sysfs for each logical drive. This sets up and registers | |
872 | * the 'c#d#' directory for each individual logical drive under | |
873 | * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from | |
874 | * /sys/block/cciss!c#d# to this entry. | |
875 | */ | |
617e1344 | 876 | static long cciss_create_ld_sysfs_entry(struct ctlr_info *h, |
7fe06326 AP |
877 | int drv_index) |
878 | { | |
617e1344 SC |
879 | struct device *dev; |
880 | ||
9cef0d2f | 881 | if (h->drv[drv_index]->device_initialized) |
8ce51966 SC |
882 | return 0; |
883 | ||
9cef0d2f | 884 | dev = &h->drv[drv_index]->dev; |
617e1344 SC |
885 | device_initialize(dev); |
886 | dev->type = &cciss_dev_type; | |
887 | dev->bus = &cciss_bus_type; | |
888 | dev_set_name(dev, "c%dd%d", h->ctlr, drv_index); | |
889 | dev->parent = &h->dev; | |
9cef0d2f | 890 | h->drv[drv_index]->device_initialized = 1; |
617e1344 | 891 | return device_add(dev); |
7fe06326 AP |
892 | } |
893 | ||
894 | /* | |
895 | * Remove sysfs entries for a logical drive. | |
896 | */ | |
8ce51966 SC |
897 | static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index, |
898 | int ctlr_exiting) | |
7fe06326 | 899 | { |
9cef0d2f | 900 | struct device *dev = &h->drv[drv_index]->dev; |
8ce51966 SC |
901 | |
902 | /* special case for c*d0, we only destroy it on controller exit */ | |
903 | if (drv_index == 0 && !ctlr_exiting) | |
904 | return; | |
905 | ||
617e1344 SC |
906 | device_del(dev); |
907 | put_device(dev); /* the "final" put. */ | |
9cef0d2f | 908 | h->drv[drv_index] = NULL; |
7fe06326 AP |
909 | } |
910 | ||
7c832835 BH |
911 | /* |
912 | * For operations that cannot sleep, a command block is allocated at init, | |
1da177e4 | 913 | * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track |
6b4d96b8 | 914 | * which ones are free or in use. |
7c832835 | 915 | */ |
6b4d96b8 | 916 | static CommandList_struct *cmd_alloc(ctlr_info_t *h) |
1da177e4 LT |
917 | { |
918 | CommandList_struct *c; | |
7c832835 | 919 | int i; |
1da177e4 LT |
920 | u64bit temp64; |
921 | dma_addr_t cmd_dma_handle, err_dma_handle; | |
922 | ||
6b4d96b8 SC |
923 | do { |
924 | i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); | |
925 | if (i == h->nr_cmds) | |
7c832835 | 926 | return NULL; |
6b4d96b8 SC |
927 | } while (test_and_set_bit(i & (BITS_PER_LONG - 1), |
928 | h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); | |
6b4d96b8 SC |
929 | c = h->cmd_pool + i; |
930 | memset(c, 0, sizeof(CommandList_struct)); | |
931 | cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct); | |
932 | c->err_info = h->errinfo_pool + i; | |
933 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); | |
934 | err_dma_handle = h->errinfo_pool_dhandle | |
935 | + i * sizeof(ErrorInfo_struct); | |
936 | h->nr_allocs++; | |
1da177e4 | 937 | |
6b4d96b8 | 938 | c->cmdindex = i; |
33079b21 | 939 | |
6b4d96b8 SC |
940 | INIT_HLIST_NODE(&c->list); |
941 | c->busaddr = (__u32) cmd_dma_handle; | |
942 | temp64.val = (__u64) err_dma_handle; | |
943 | c->ErrDesc.Addr.lower = temp64.val32.lower; | |
944 | c->ErrDesc.Addr.upper = temp64.val32.upper; | |
945 | c->ErrDesc.Len = sizeof(ErrorInfo_struct); | |
7c832835 | 946 | |
6b4d96b8 SC |
947 | c->ctlr = h->ctlr; |
948 | return c; | |
949 | } | |
33079b21 | 950 | |
6b4d96b8 SC |
951 | /* allocate a command using pci_alloc_consistent, used for ioctls, |
952 | * etc., not for the main i/o path. | |
953 | */ | |
954 | static CommandList_struct *cmd_special_alloc(ctlr_info_t *h) | |
955 | { | |
956 | CommandList_struct *c; | |
957 | u64bit temp64; | |
958 | dma_addr_t cmd_dma_handle, err_dma_handle; | |
959 | ||
960 | c = (CommandList_struct *) pci_alloc_consistent(h->pdev, | |
961 | sizeof(CommandList_struct), &cmd_dma_handle); | |
962 | if (c == NULL) | |
963 | return NULL; | |
964 | memset(c, 0, sizeof(CommandList_struct)); | |
965 | ||
966 | c->cmdindex = -1; | |
967 | ||
968 | c->err_info = (ErrorInfo_struct *) | |
969 | pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct), | |
970 | &err_dma_handle); | |
971 | ||
972 | if (c->err_info == NULL) { | |
973 | pci_free_consistent(h->pdev, | |
974 | sizeof(CommandList_struct), c, cmd_dma_handle); | |
975 | return NULL; | |
7c832835 | 976 | } |
6b4d96b8 | 977 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); |
1da177e4 | 978 | |
8a3173de | 979 | INIT_HLIST_NODE(&c->list); |
1da177e4 | 980 | c->busaddr = (__u32) cmd_dma_handle; |
7c832835 | 981 | temp64.val = (__u64) err_dma_handle; |
1da177e4 LT |
982 | c->ErrDesc.Addr.lower = temp64.val32.lower; |
983 | c->ErrDesc.Addr.upper = temp64.val32.upper; | |
984 | c->ErrDesc.Len = sizeof(ErrorInfo_struct); | |
1da177e4 | 985 | |
7c832835 BH |
986 | c->ctlr = h->ctlr; |
987 | return c; | |
1da177e4 LT |
988 | } |
989 | ||
6b4d96b8 | 990 | static void cmd_free(ctlr_info_t *h, CommandList_struct *c) |
1da177e4 LT |
991 | { |
992 | int i; | |
6b4d96b8 SC |
993 | |
994 | i = c - h->cmd_pool; | |
995 | clear_bit(i & (BITS_PER_LONG - 1), | |
996 | h->cmd_pool_bits + (i / BITS_PER_LONG)); | |
997 | h->nr_frees++; | |
998 | } | |
999 | ||
1000 | static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c) | |
1001 | { | |
1da177e4 LT |
1002 | u64bit temp64; |
1003 | ||
6b4d96b8 SC |
1004 | temp64.val32.lower = c->ErrDesc.Addr.lower; |
1005 | temp64.val32.upper = c->ErrDesc.Addr.upper; | |
1006 | pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct), | |
1007 | c->err_info, (dma_addr_t) temp64.val); | |
1008 | pci_free_consistent(h->pdev, sizeof(CommandList_struct), | |
1009 | c, (dma_addr_t) c->busaddr); | |
1da177e4 LT |
1010 | } |
1011 | ||
1012 | static inline ctlr_info_t *get_host(struct gendisk *disk) | |
1013 | { | |
7c832835 | 1014 | return disk->queue->queuedata; |
1da177e4 LT |
1015 | } |
1016 | ||
1017 | static inline drive_info_struct *get_drv(struct gendisk *disk) | |
1018 | { | |
1019 | return disk->private_data; | |
1020 | } | |
1021 | ||
1022 | /* | |
1023 | * Open. Make sure the device is really there. | |
1024 | */ | |
ef7822c2 | 1025 | static int cciss_open(struct block_device *bdev, fmode_t mode) |
1da177e4 | 1026 | { |
f70dba83 | 1027 | ctlr_info_t *h = get_host(bdev->bd_disk); |
ef7822c2 | 1028 | drive_info_struct *drv = get_drv(bdev->bd_disk); |
1da177e4 | 1029 | |
b2a4a43d | 1030 | dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name); |
2e043986 | 1031 | if (drv->busy_configuring) |
ddd47442 | 1032 | return -EBUSY; |
1da177e4 LT |
1033 | /* |
1034 | * Root is allowed to open raw volume zero even if it's not configured | |
1035 | * so array config can still work. Root is also allowed to open any | |
1036 | * volume that has a LUN ID, so it can issue IOCTL to reread the | |
1037 | * disk information. I don't think I really like this | |
1038 | * but I'm already using way to many device nodes to claim another one | |
1039 | * for "raw controller". | |
1040 | */ | |
7a06f789 | 1041 | if (drv->heads == 0) { |
ef7822c2 | 1042 | if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */ |
1da177e4 | 1043 | /* if not node 0 make sure it is a partition = 0 */ |
ef7822c2 | 1044 | if (MINOR(bdev->bd_dev) & 0x0f) { |
7c832835 | 1045 | return -ENXIO; |
1da177e4 | 1046 | /* if it is, make sure we have a LUN ID */ |
39ccf9a6 SC |
1047 | } else if (memcmp(drv->LunID, CTLR_LUNID, |
1048 | sizeof(drv->LunID))) { | |
1da177e4 LT |
1049 | return -ENXIO; |
1050 | } | |
1051 | } | |
1052 | if (!capable(CAP_SYS_ADMIN)) | |
1053 | return -EPERM; | |
1054 | } | |
1055 | drv->usage_count++; | |
f70dba83 | 1056 | h->usage_count++; |
1da177e4 LT |
1057 | return 0; |
1058 | } | |
7c832835 | 1059 | |
6e9624b8 AB |
1060 | static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode) |
1061 | { | |
1062 | int ret; | |
1063 | ||
2a48fc0a | 1064 | mutex_lock(&cciss_mutex); |
6e9624b8 | 1065 | ret = cciss_open(bdev, mode); |
2a48fc0a | 1066 | mutex_unlock(&cciss_mutex); |
6e9624b8 AB |
1067 | |
1068 | return ret; | |
1069 | } | |
1070 | ||
1da177e4 LT |
1071 | /* |
1072 | * Close. Sync first. | |
1073 | */ | |
ef7822c2 | 1074 | static int cciss_release(struct gendisk *disk, fmode_t mode) |
1da177e4 | 1075 | { |
f70dba83 | 1076 | ctlr_info_t *h; |
6e9624b8 | 1077 | drive_info_struct *drv; |
1da177e4 | 1078 | |
2a48fc0a | 1079 | mutex_lock(&cciss_mutex); |
f70dba83 | 1080 | h = get_host(disk); |
6e9624b8 | 1081 | drv = get_drv(disk); |
b2a4a43d | 1082 | dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name); |
1da177e4 | 1083 | drv->usage_count--; |
f70dba83 | 1084 | h->usage_count--; |
2a48fc0a | 1085 | mutex_unlock(&cciss_mutex); |
1da177e4 LT |
1086 | return 0; |
1087 | } | |
1088 | ||
ef7822c2 AV |
1089 | static int do_ioctl(struct block_device *bdev, fmode_t mode, |
1090 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1091 | { |
1092 | int ret; | |
2a48fc0a | 1093 | mutex_lock(&cciss_mutex); |
ef7822c2 | 1094 | ret = cciss_ioctl(bdev, mode, cmd, arg); |
2a48fc0a | 1095 | mutex_unlock(&cciss_mutex); |
1da177e4 LT |
1096 | return ret; |
1097 | } | |
1098 | ||
8a6cfeb6 AB |
1099 | #ifdef CONFIG_COMPAT |
1100 | ||
ef7822c2 AV |
1101 | static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, |
1102 | unsigned cmd, unsigned long arg); | |
1103 | static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, | |
1104 | unsigned cmd, unsigned long arg); | |
1da177e4 | 1105 | |
ef7822c2 AV |
1106 | static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode, |
1107 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1108 | { |
1109 | switch (cmd) { | |
1110 | case CCISS_GETPCIINFO: | |
1111 | case CCISS_GETINTINFO: | |
1112 | case CCISS_SETINTINFO: | |
1113 | case CCISS_GETNODENAME: | |
1114 | case CCISS_SETNODENAME: | |
1115 | case CCISS_GETHEARTBEAT: | |
1116 | case CCISS_GETBUSTYPES: | |
1117 | case CCISS_GETFIRMVER: | |
1118 | case CCISS_GETDRIVVER: | |
1119 | case CCISS_REVALIDVOLS: | |
1120 | case CCISS_DEREGDISK: | |
1121 | case CCISS_REGNEWDISK: | |
1122 | case CCISS_REGNEWD: | |
1123 | case CCISS_RESCANDISK: | |
1124 | case CCISS_GETLUNINFO: | |
ef7822c2 | 1125 | return do_ioctl(bdev, mode, cmd, arg); |
1da177e4 LT |
1126 | |
1127 | case CCISS_PASSTHRU32: | |
ef7822c2 | 1128 | return cciss_ioctl32_passthru(bdev, mode, cmd, arg); |
1da177e4 | 1129 | case CCISS_BIG_PASSTHRU32: |
ef7822c2 | 1130 | return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg); |
1da177e4 LT |
1131 | |
1132 | default: | |
1133 | return -ENOIOCTLCMD; | |
1134 | } | |
1135 | } | |
1136 | ||
ef7822c2 AV |
1137 | static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, |
1138 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1139 | { |
1140 | IOCTL32_Command_struct __user *arg32 = | |
7c832835 | 1141 | (IOCTL32_Command_struct __user *) arg; |
1da177e4 LT |
1142 | IOCTL_Command_struct arg64; |
1143 | IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); | |
1144 | int err; | |
1145 | u32 cp; | |
1146 | ||
1147 | err = 0; | |
7c832835 BH |
1148 | err |= |
1149 | copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | |
1150 | sizeof(arg64.LUN_info)); | |
1151 | err |= | |
1152 | copy_from_user(&arg64.Request, &arg32->Request, | |
1153 | sizeof(arg64.Request)); | |
1154 | err |= | |
1155 | copy_from_user(&arg64.error_info, &arg32->error_info, | |
1156 | sizeof(arg64.error_info)); | |
1da177e4 LT |
1157 | err |= get_user(arg64.buf_size, &arg32->buf_size); |
1158 | err |= get_user(cp, &arg32->buf); | |
1159 | arg64.buf = compat_ptr(cp); | |
1160 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | |
1161 | ||
1162 | if (err) | |
1163 | return -EFAULT; | |
1164 | ||
ef7822c2 | 1165 | err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p); |
1da177e4 LT |
1166 | if (err) |
1167 | return err; | |
7c832835 BH |
1168 | err |= |
1169 | copy_in_user(&arg32->error_info, &p->error_info, | |
1170 | sizeof(arg32->error_info)); | |
1da177e4 LT |
1171 | if (err) |
1172 | return -EFAULT; | |
1173 | return err; | |
1174 | } | |
1175 | ||
ef7822c2 AV |
1176 | static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, |
1177 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1178 | { |
1179 | BIG_IOCTL32_Command_struct __user *arg32 = | |
7c832835 | 1180 | (BIG_IOCTL32_Command_struct __user *) arg; |
1da177e4 | 1181 | BIG_IOCTL_Command_struct arg64; |
7c832835 BH |
1182 | BIG_IOCTL_Command_struct __user *p = |
1183 | compat_alloc_user_space(sizeof(arg64)); | |
1da177e4 LT |
1184 | int err; |
1185 | u32 cp; | |
1186 | ||
1187 | err = 0; | |
7c832835 BH |
1188 | err |= |
1189 | copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | |
1190 | sizeof(arg64.LUN_info)); | |
1191 | err |= | |
1192 | copy_from_user(&arg64.Request, &arg32->Request, | |
1193 | sizeof(arg64.Request)); | |
1194 | err |= | |
1195 | copy_from_user(&arg64.error_info, &arg32->error_info, | |
1196 | sizeof(arg64.error_info)); | |
1da177e4 LT |
1197 | err |= get_user(arg64.buf_size, &arg32->buf_size); |
1198 | err |= get_user(arg64.malloc_size, &arg32->malloc_size); | |
1199 | err |= get_user(cp, &arg32->buf); | |
1200 | arg64.buf = compat_ptr(cp); | |
1201 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | |
1202 | ||
1203 | if (err) | |
7c832835 | 1204 | return -EFAULT; |
1da177e4 | 1205 | |
ef7822c2 | 1206 | err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p); |
1da177e4 LT |
1207 | if (err) |
1208 | return err; | |
7c832835 BH |
1209 | err |= |
1210 | copy_in_user(&arg32->error_info, &p->error_info, | |
1211 | sizeof(arg32->error_info)); | |
1da177e4 LT |
1212 | if (err) |
1213 | return -EFAULT; | |
1214 | return err; | |
1215 | } | |
1216 | #endif | |
a885c8c4 CH |
1217 | |
1218 | static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo) | |
1219 | { | |
1220 | drive_info_struct *drv = get_drv(bdev->bd_disk); | |
1221 | ||
1222 | if (!drv->cylinders) | |
1223 | return -ENXIO; | |
1224 | ||
1225 | geo->heads = drv->heads; | |
1226 | geo->sectors = drv->sectors; | |
1227 | geo->cylinders = drv->cylinders; | |
1228 | return 0; | |
1229 | } | |
1230 | ||
f70dba83 | 1231 | static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c) |
0a9279cc MM |
1232 | { |
1233 | if (c->err_info->CommandStatus == CMD_TARGET_STATUS && | |
1234 | c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) | |
f70dba83 | 1235 | (void)check_for_unit_attention(h, c); |
0a9279cc | 1236 | } |
0a25a5ae SC |
1237 | |
1238 | static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp) | |
1da177e4 | 1239 | { |
0a25a5ae | 1240 | cciss_pci_info_struct pciinfo; |
1da177e4 | 1241 | |
0a25a5ae SC |
1242 | if (!argp) |
1243 | return -EINVAL; | |
1244 | pciinfo.domain = pci_domain_nr(h->pdev->bus); | |
1245 | pciinfo.bus = h->pdev->bus->number; | |
1246 | pciinfo.dev_fn = h->pdev->devfn; | |
1247 | pciinfo.board_id = h->board_id; | |
1248 | if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct))) | |
1249 | return -EFAULT; | |
1250 | return 0; | |
1251 | } | |
1da177e4 | 1252 | |
576e661c SC |
1253 | static int cciss_getintinfo(ctlr_info_t *h, void __user *argp) |
1254 | { | |
1255 | cciss_coalint_struct intinfo; | |
1da177e4 | 1256 | |
576e661c SC |
1257 | if (!argp) |
1258 | return -EINVAL; | |
1259 | intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay); | |
1260 | intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount); | |
1261 | if (copy_to_user | |
1262 | (argp, &intinfo, sizeof(cciss_coalint_struct))) | |
1263 | return -EFAULT; | |
1264 | return 0; | |
1265 | } | |
1da177e4 | 1266 | |
4c800eed SC |
1267 | static int cciss_setintinfo(ctlr_info_t *h, void __user *argp) |
1268 | { | |
1269 | cciss_coalint_struct intinfo; | |
1270 | unsigned long flags; | |
1271 | int i; | |
1da177e4 | 1272 | |
4c800eed SC |
1273 | if (!argp) |
1274 | return -EINVAL; | |
1275 | if (!capable(CAP_SYS_ADMIN)) | |
1276 | return -EPERM; | |
1277 | if (copy_from_user(&intinfo, argp, sizeof(intinfo))) | |
1278 | return -EFAULT; | |
1279 | if ((intinfo.delay == 0) && (intinfo.count == 0)) | |
1280 | return -EINVAL; | |
1281 | spin_lock_irqsave(&h->lock, flags); | |
1282 | /* Update the field, and then ring the doorbell */ | |
1283 | writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay)); | |
1284 | writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount)); | |
1285 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); | |
1286 | ||
1287 | for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { | |
1288 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | |
1289 | break; | |
1290 | udelay(1000); /* delay and try again */ | |
1291 | } | |
1292 | spin_unlock_irqrestore(&h->lock, flags); | |
1293 | if (i >= MAX_IOCTL_CONFIG_WAIT) | |
1294 | return -EAGAIN; | |
1295 | return 0; | |
1296 | } | |
1da177e4 | 1297 | |
25216109 SC |
1298 | static int cciss_getnodename(ctlr_info_t *h, void __user *argp) |
1299 | { | |
1300 | NodeName_type NodeName; | |
1301 | int i; | |
1da177e4 | 1302 | |
25216109 SC |
1303 | if (!argp) |
1304 | return -EINVAL; | |
1305 | for (i = 0; i < 16; i++) | |
1306 | NodeName[i] = readb(&h->cfgtable->ServerName[i]); | |
1307 | if (copy_to_user(argp, NodeName, sizeof(NodeName_type))) | |
1308 | return -EFAULT; | |
1309 | return 0; | |
1310 | } | |
7c832835 | 1311 | |
4f43f32c SC |
1312 | static int cciss_setnodename(ctlr_info_t *h, void __user *argp) |
1313 | { | |
1314 | NodeName_type NodeName; | |
1315 | unsigned long flags; | |
1316 | int i; | |
7c832835 | 1317 | |
4f43f32c SC |
1318 | if (!argp) |
1319 | return -EINVAL; | |
1320 | if (!capable(CAP_SYS_ADMIN)) | |
1321 | return -EPERM; | |
1322 | if (copy_from_user(NodeName, argp, sizeof(NodeName_type))) | |
1323 | return -EFAULT; | |
1324 | spin_lock_irqsave(&h->lock, flags); | |
1325 | /* Update the field, and then ring the doorbell */ | |
1326 | for (i = 0; i < 16; i++) | |
1327 | writeb(NodeName[i], &h->cfgtable->ServerName[i]); | |
1328 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); | |
1329 | for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { | |
1330 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | |
1331 | break; | |
1332 | udelay(1000); /* delay and try again */ | |
1333 | } | |
1334 | spin_unlock_irqrestore(&h->lock, flags); | |
1335 | if (i >= MAX_IOCTL_CONFIG_WAIT) | |
1336 | return -EAGAIN; | |
1337 | return 0; | |
1338 | } | |
7c832835 | 1339 | |
93c74931 SC |
1340 | static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp) |
1341 | { | |
1342 | Heartbeat_type heartbeat; | |
7c832835 | 1343 | |
93c74931 SC |
1344 | if (!argp) |
1345 | return -EINVAL; | |
1346 | heartbeat = readl(&h->cfgtable->HeartBeat); | |
1347 | if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type))) | |
1348 | return -EFAULT; | |
1349 | return 0; | |
1350 | } | |
0a9279cc | 1351 | |
d18dfad4 SC |
1352 | static int cciss_getbustypes(ctlr_info_t *h, void __user *argp) |
1353 | { | |
1354 | BusTypes_type BusTypes; | |
7c832835 | 1355 | |
d18dfad4 SC |
1356 | if (!argp) |
1357 | return -EINVAL; | |
1358 | BusTypes = readl(&h->cfgtable->BusTypes); | |
1359 | if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type))) | |
1360 | return -EFAULT; | |
1361 | return 0; | |
1362 | } | |
1363 | ||
8a4f7fbf SC |
1364 | static int cciss_getfirmver(ctlr_info_t *h, void __user *argp) |
1365 | { | |
1366 | FirmwareVer_type firmware; | |
1367 | ||
1368 | if (!argp) | |
1369 | return -EINVAL; | |
1370 | memcpy(firmware, h->firm_ver, 4); | |
1371 | ||
1372 | if (copy_to_user | |
1373 | (argp, firmware, sizeof(FirmwareVer_type))) | |
1374 | return -EFAULT; | |
1375 | return 0; | |
1376 | } | |
1377 | ||
c525919d SC |
1378 | static int cciss_getdrivver(ctlr_info_t *h, void __user *argp) |
1379 | { | |
1380 | DriverVer_type DriverVer = DRIVER_VERSION; | |
1381 | ||
1382 | if (!argp) | |
1383 | return -EINVAL; | |
1384 | if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) | |
1385 | return -EFAULT; | |
1386 | return 0; | |
1387 | } | |
1388 | ||
0894b32c SC |
1389 | static int cciss_getluninfo(ctlr_info_t *h, |
1390 | struct gendisk *disk, void __user *argp) | |
1391 | { | |
1392 | LogvolInfo_struct luninfo; | |
1393 | drive_info_struct *drv = get_drv(disk); | |
1394 | ||
1395 | if (!argp) | |
1396 | return -EINVAL; | |
1397 | memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID)); | |
1398 | luninfo.num_opens = drv->usage_count; | |
1399 | luninfo.num_parts = 0; | |
1400 | if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct))) | |
1401 | return -EFAULT; | |
1402 | return 0; | |
1403 | } | |
1404 | ||
f32f125b SC |
1405 | static int cciss_passthru(ctlr_info_t *h, void __user *argp) |
1406 | { | |
1407 | IOCTL_Command_struct iocommand; | |
1408 | CommandList_struct *c; | |
1409 | char *buff = NULL; | |
1410 | u64bit temp64; | |
1411 | DECLARE_COMPLETION_ONSTACK(wait); | |
1412 | ||
1413 | if (!argp) | |
1414 | return -EINVAL; | |
1415 | ||
1416 | if (!capable(CAP_SYS_RAWIO)) | |
1417 | return -EPERM; | |
1418 | ||
1419 | if (copy_from_user | |
1420 | (&iocommand, argp, sizeof(IOCTL_Command_struct))) | |
1421 | return -EFAULT; | |
1422 | if ((iocommand.buf_size < 1) && | |
1423 | (iocommand.Request.Type.Direction != XFER_NONE)) { | |
1424 | return -EINVAL; | |
1425 | } | |
1426 | if (iocommand.buf_size > 0) { | |
1427 | buff = kmalloc(iocommand.buf_size, GFP_KERNEL); | |
1428 | if (buff == NULL) | |
1429 | return -EFAULT; | |
1430 | } | |
1431 | if (iocommand.Request.Type.Direction == XFER_WRITE) { | |
1432 | /* Copy the data into the buffer we created */ | |
1433 | if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) { | |
1434 | kfree(buff); | |
1435 | return -EFAULT; | |
1436 | } | |
1437 | } else { | |
1438 | memset(buff, 0, iocommand.buf_size); | |
1439 | } | |
1440 | c = cmd_special_alloc(h); | |
1441 | if (!c) { | |
1442 | kfree(buff); | |
1443 | return -ENOMEM; | |
1444 | } | |
1445 | /* Fill in the command type */ | |
1446 | c->cmd_type = CMD_IOCTL_PEND; | |
1447 | /* Fill in Command Header */ | |
1448 | c->Header.ReplyQueue = 0; /* unused in simple mode */ | |
1449 | if (iocommand.buf_size > 0) { /* buffer to fill */ | |
1450 | c->Header.SGList = 1; | |
1451 | c->Header.SGTotal = 1; | |
1452 | } else { /* no buffers to fill */ | |
1453 | c->Header.SGList = 0; | |
1454 | c->Header.SGTotal = 0; | |
1455 | } | |
1456 | c->Header.LUN = iocommand.LUN_info; | |
1457 | /* use the kernel address the cmd block for tag */ | |
1458 | c->Header.Tag.lower = c->busaddr; | |
1459 | ||
1460 | /* Fill in Request block */ | |
1461 | c->Request = iocommand.Request; | |
1462 | ||
1463 | /* Fill in the scatter gather information */ | |
1464 | if (iocommand.buf_size > 0) { | |
1465 | temp64.val = pci_map_single(h->pdev, buff, | |
1466 | iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); | |
1467 | c->SG[0].Addr.lower = temp64.val32.lower; | |
1468 | c->SG[0].Addr.upper = temp64.val32.upper; | |
1469 | c->SG[0].Len = iocommand.buf_size; | |
1470 | c->SG[0].Ext = 0; /* we are not chaining */ | |
1471 | } | |
1472 | c->waiting = &wait; | |
1473 | ||
1474 | enqueue_cmd_and_start_io(h, c); | |
1475 | wait_for_completion(&wait); | |
1476 | ||
1477 | /* unlock the buffers from DMA */ | |
1478 | temp64.val32.lower = c->SG[0].Addr.lower; | |
1479 | temp64.val32.upper = c->SG[0].Addr.upper; | |
1480 | pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size, | |
1481 | PCI_DMA_BIDIRECTIONAL); | |
1482 | check_ioctl_unit_attention(h, c); | |
1483 | ||
1484 | /* Copy the error information out */ | |
1485 | iocommand.error_info = *(c->err_info); | |
1486 | if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) { | |
1487 | kfree(buff); | |
1488 | cmd_special_free(h, c); | |
1489 | return -EFAULT; | |
1490 | } | |
1491 | ||
1492 | if (iocommand.Request.Type.Direction == XFER_READ) { | |
1493 | /* Copy the data out of the buffer we created */ | |
1494 | if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { | |
7c832835 | 1495 | kfree(buff); |
6b4d96b8 | 1496 | cmd_special_free(h, c); |
f32f125b | 1497 | return -EFAULT; |
1da177e4 | 1498 | } |
f32f125b SC |
1499 | } |
1500 | kfree(buff); | |
1501 | cmd_special_free(h, c); | |
1502 | return 0; | |
1503 | } | |
1504 | ||
0c9f5ba7 SC |
1505 | static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp) |
1506 | { | |
1507 | BIG_IOCTL_Command_struct *ioc; | |
1508 | CommandList_struct *c; | |
1509 | unsigned char **buff = NULL; | |
1510 | int *buff_size = NULL; | |
1511 | u64bit temp64; | |
1512 | BYTE sg_used = 0; | |
1513 | int status = 0; | |
1514 | int i; | |
1515 | DECLARE_COMPLETION_ONSTACK(wait); | |
1516 | __u32 left; | |
1517 | __u32 sz; | |
1518 | BYTE __user *data_ptr; | |
1519 | ||
1520 | if (!argp) | |
1521 | return -EINVAL; | |
1522 | if (!capable(CAP_SYS_RAWIO)) | |
1523 | return -EPERM; | |
1524 | ioc = (BIG_IOCTL_Command_struct *) | |
1525 | kmalloc(sizeof(*ioc), GFP_KERNEL); | |
1526 | if (!ioc) { | |
1527 | status = -ENOMEM; | |
1528 | goto cleanup1; | |
1529 | } | |
1530 | if (copy_from_user(ioc, argp, sizeof(*ioc))) { | |
1531 | status = -EFAULT; | |
1532 | goto cleanup1; | |
1533 | } | |
1534 | if ((ioc->buf_size < 1) && | |
1535 | (ioc->Request.Type.Direction != XFER_NONE)) { | |
1536 | status = -EINVAL; | |
1537 | goto cleanup1; | |
1538 | } | |
1539 | /* Check kmalloc limits using all SGs */ | |
1540 | if (ioc->malloc_size > MAX_KMALLOC_SIZE) { | |
1541 | status = -EINVAL; | |
1542 | goto cleanup1; | |
1543 | } | |
1544 | if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) { | |
1545 | status = -EINVAL; | |
1546 | goto cleanup1; | |
1547 | } | |
1548 | buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL); | |
1549 | if (!buff) { | |
1550 | status = -ENOMEM; | |
1551 | goto cleanup1; | |
1552 | } | |
1553 | buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL); | |
1554 | if (!buff_size) { | |
1555 | status = -ENOMEM; | |
1556 | goto cleanup1; | |
1557 | } | |
1558 | left = ioc->buf_size; | |
1559 | data_ptr = ioc->buf; | |
1560 | while (left) { | |
1561 | sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; | |
1562 | buff_size[sg_used] = sz; | |
1563 | buff[sg_used] = kmalloc(sz, GFP_KERNEL); | |
1564 | if (buff[sg_used] == NULL) { | |
1565 | status = -ENOMEM; | |
1566 | goto cleanup1; | |
1567 | } | |
1568 | if (ioc->Request.Type.Direction == XFER_WRITE) { | |
1569 | if (copy_from_user(buff[sg_used], data_ptr, sz)) { | |
7c832835 BH |
1570 | status = -EFAULT; |
1571 | goto cleanup1; | |
1572 | } | |
0c9f5ba7 SC |
1573 | } else { |
1574 | memset(buff[sg_used], 0, sz); | |
1575 | } | |
1576 | left -= sz; | |
1577 | data_ptr += sz; | |
1578 | sg_used++; | |
1579 | } | |
1580 | c = cmd_special_alloc(h); | |
1581 | if (!c) { | |
1582 | status = -ENOMEM; | |
1583 | goto cleanup1; | |
1584 | } | |
1585 | c->cmd_type = CMD_IOCTL_PEND; | |
1586 | c->Header.ReplyQueue = 0; | |
fcfb5c0c SC |
1587 | c->Header.SGList = sg_used; |
1588 | c->Header.SGTotal = sg_used; | |
0c9f5ba7 SC |
1589 | c->Header.LUN = ioc->LUN_info; |
1590 | c->Header.Tag.lower = c->busaddr; | |
1591 | ||
1592 | c->Request = ioc->Request; | |
fcfb5c0c SC |
1593 | for (i = 0; i < sg_used; i++) { |
1594 | temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i], | |
0c9f5ba7 | 1595 | PCI_DMA_BIDIRECTIONAL); |
fcfb5c0c SC |
1596 | c->SG[i].Addr.lower = temp64.val32.lower; |
1597 | c->SG[i].Addr.upper = temp64.val32.upper; | |
1598 | c->SG[i].Len = buff_size[i]; | |
1599 | c->SG[i].Ext = 0; /* we are not chaining */ | |
0c9f5ba7 SC |
1600 | } |
1601 | c->waiting = &wait; | |
1602 | enqueue_cmd_and_start_io(h, c); | |
1603 | wait_for_completion(&wait); | |
1604 | /* unlock the buffers from DMA */ | |
1605 | for (i = 0; i < sg_used; i++) { | |
1606 | temp64.val32.lower = c->SG[i].Addr.lower; | |
1607 | temp64.val32.upper = c->SG[i].Addr.upper; | |
1608 | pci_unmap_single(h->pdev, | |
1609 | (dma_addr_t) temp64.val, buff_size[i], | |
1610 | PCI_DMA_BIDIRECTIONAL); | |
1611 | } | |
1612 | check_ioctl_unit_attention(h, c); | |
1613 | /* Copy the error information out */ | |
1614 | ioc->error_info = *(c->err_info); | |
1615 | if (copy_to_user(argp, ioc, sizeof(*ioc))) { | |
1616 | cmd_special_free(h, c); | |
1617 | status = -EFAULT; | |
1618 | goto cleanup1; | |
1619 | } | |
1620 | if (ioc->Request.Type.Direction == XFER_READ) { | |
1621 | /* Copy the data out of the buffer we created */ | |
1622 | BYTE __user *ptr = ioc->buf; | |
1623 | for (i = 0; i < sg_used; i++) { | |
1624 | if (copy_to_user(ptr, buff[i], buff_size[i])) { | |
6b4d96b8 | 1625 | cmd_special_free(h, c); |
7c832835 BH |
1626 | status = -EFAULT; |
1627 | goto cleanup1; | |
1628 | } | |
0c9f5ba7 | 1629 | ptr += buff_size[i]; |
1da177e4 | 1630 | } |
0c9f5ba7 SC |
1631 | } |
1632 | cmd_special_free(h, c); | |
1633 | status = 0; | |
1634 | cleanup1: | |
1635 | if (buff) { | |
1636 | for (i = 0; i < sg_used; i++) | |
1637 | kfree(buff[i]); | |
1638 | kfree(buff); | |
1639 | } | |
1640 | kfree(buff_size); | |
1641 | kfree(ioc); | |
1642 | return status; | |
1643 | } | |
1644 | ||
ef7822c2 | 1645 | static int cciss_ioctl(struct block_device *bdev, fmode_t mode, |
c525919d | 1646 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1647 | { |
1da177e4 | 1648 | struct gendisk *disk = bdev->bd_disk; |
f70dba83 | 1649 | ctlr_info_t *h = get_host(disk); |
1da177e4 LT |
1650 | void __user *argp = (void __user *)arg; |
1651 | ||
b2a4a43d SC |
1652 | dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n", |
1653 | cmd, arg); | |
7c832835 | 1654 | switch (cmd) { |
1da177e4 | 1655 | case CCISS_GETPCIINFO: |
0a25a5ae | 1656 | return cciss_getpciinfo(h, argp); |
1da177e4 | 1657 | case CCISS_GETINTINFO: |
576e661c | 1658 | return cciss_getintinfo(h, argp); |
1da177e4 | 1659 | case CCISS_SETINTINFO: |
4c800eed | 1660 | return cciss_setintinfo(h, argp); |
1da177e4 | 1661 | case CCISS_GETNODENAME: |
25216109 | 1662 | return cciss_getnodename(h, argp); |
1da177e4 | 1663 | case CCISS_SETNODENAME: |
4f43f32c | 1664 | return cciss_setnodename(h, argp); |
1da177e4 | 1665 | case CCISS_GETHEARTBEAT: |
93c74931 | 1666 | return cciss_getheartbeat(h, argp); |
1da177e4 | 1667 | case CCISS_GETBUSTYPES: |
d18dfad4 | 1668 | return cciss_getbustypes(h, argp); |
1da177e4 | 1669 | case CCISS_GETFIRMVER: |
8a4f7fbf | 1670 | return cciss_getfirmver(h, argp); |
7c832835 | 1671 | case CCISS_GETDRIVVER: |
c525919d | 1672 | return cciss_getdrivver(h, argp); |
6ae5ce8e MM |
1673 | case CCISS_DEREGDISK: |
1674 | case CCISS_REGNEWD: | |
1da177e4 | 1675 | case CCISS_REVALIDVOLS: |
f70dba83 | 1676 | return rebuild_lun_table(h, 0, 1); |
0894b32c SC |
1677 | case CCISS_GETLUNINFO: |
1678 | return cciss_getluninfo(h, disk, argp); | |
1da177e4 | 1679 | case CCISS_PASSTHRU: |
f32f125b | 1680 | return cciss_passthru(h, argp); |
0c9f5ba7 SC |
1681 | case CCISS_BIG_PASSTHRU: |
1682 | return cciss_bigpassthru(h, argp); | |
03bbfee5 MMOD |
1683 | |
1684 | /* scsi_cmd_ioctl handles these, below, though some are not */ | |
1685 | /* very meaningful for cciss. SG_IO is the main one people want. */ | |
1686 | ||
1687 | case SG_GET_VERSION_NUM: | |
1688 | case SG_SET_TIMEOUT: | |
1689 | case SG_GET_TIMEOUT: | |
1690 | case SG_GET_RESERVED_SIZE: | |
1691 | case SG_SET_RESERVED_SIZE: | |
1692 | case SG_EMULATED_HOST: | |
1693 | case SG_IO: | |
1694 | case SCSI_IOCTL_SEND_COMMAND: | |
ef7822c2 | 1695 | return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp); |
03bbfee5 MMOD |
1696 | |
1697 | /* scsi_cmd_ioctl would normally handle these, below, but */ | |
1698 | /* they aren't a good fit for cciss, as CD-ROMs are */ | |
1699 | /* not supported, and we don't have any bus/target/lun */ | |
1700 | /* which we present to the kernel. */ | |
1701 | ||
1702 | case CDROM_SEND_PACKET: | |
1703 | case CDROMCLOSETRAY: | |
1704 | case CDROMEJECT: | |
1705 | case SCSI_IOCTL_GET_IDLUN: | |
1706 | case SCSI_IOCTL_GET_BUS_NUMBER: | |
1da177e4 LT |
1707 | default: |
1708 | return -ENOTTY; | |
1709 | } | |
1da177e4 LT |
1710 | } |
1711 | ||
7b30f092 JA |
1712 | static void cciss_check_queues(ctlr_info_t *h) |
1713 | { | |
1714 | int start_queue = h->next_to_run; | |
1715 | int i; | |
1716 | ||
1717 | /* check to see if we have maxed out the number of commands that can | |
1718 | * be placed on the queue. If so then exit. We do this check here | |
1719 | * in case the interrupt we serviced was from an ioctl and did not | |
1720 | * free any new commands. | |
1721 | */ | |
f880632f | 1722 | if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) |
7b30f092 JA |
1723 | return; |
1724 | ||
1725 | /* We have room on the queue for more commands. Now we need to queue | |
1726 | * them up. We will also keep track of the next queue to run so | |
1727 | * that every queue gets a chance to be started first. | |
1728 | */ | |
1729 | for (i = 0; i < h->highest_lun + 1; i++) { | |
1730 | int curr_queue = (start_queue + i) % (h->highest_lun + 1); | |
1731 | /* make sure the disk has been added and the drive is real | |
1732 | * because this can be called from the middle of init_one. | |
1733 | */ | |
9cef0d2f SC |
1734 | if (!h->drv[curr_queue]) |
1735 | continue; | |
1736 | if (!(h->drv[curr_queue]->queue) || | |
1737 | !(h->drv[curr_queue]->heads)) | |
7b30f092 JA |
1738 | continue; |
1739 | blk_start_queue(h->gendisk[curr_queue]->queue); | |
1740 | ||
1741 | /* check to see if we have maxed out the number of commands | |
1742 | * that can be placed on the queue. | |
1743 | */ | |
f880632f | 1744 | if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) { |
7b30f092 JA |
1745 | if (curr_queue == start_queue) { |
1746 | h->next_to_run = | |
1747 | (start_queue + 1) % (h->highest_lun + 1); | |
1748 | break; | |
1749 | } else { | |
1750 | h->next_to_run = curr_queue; | |
1751 | break; | |
1752 | } | |
7b30f092 JA |
1753 | } |
1754 | } | |
1755 | } | |
1756 | ||
ca1e0484 MM |
1757 | static void cciss_softirq_done(struct request *rq) |
1758 | { | |
f70dba83 SC |
1759 | CommandList_struct *c = rq->completion_data; |
1760 | ctlr_info_t *h = hba[c->ctlr]; | |
1761 | SGDescriptor_struct *curr_sg = c->SG; | |
ca1e0484 | 1762 | u64bit temp64; |
664a717d | 1763 | unsigned long flags; |
ca1e0484 | 1764 | int i, ddir; |
5c07a311 | 1765 | int sg_index = 0; |
ca1e0484 | 1766 | |
f70dba83 | 1767 | if (c->Request.Type.Direction == XFER_READ) |
ca1e0484 MM |
1768 | ddir = PCI_DMA_FROMDEVICE; |
1769 | else | |
1770 | ddir = PCI_DMA_TODEVICE; | |
1771 | ||
1772 | /* command did not need to be retried */ | |
1773 | /* unmap the DMA mapping for all the scatter gather elements */ | |
f70dba83 | 1774 | for (i = 0; i < c->Header.SGList; i++) { |
5c07a311 | 1775 | if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) { |
f70dba83 | 1776 | cciss_unmap_sg_chain_block(h, c); |
5c07a311 | 1777 | /* Point to the next block */ |
f70dba83 | 1778 | curr_sg = h->cmd_sg_list[c->cmdindex]; |
5c07a311 DB |
1779 | sg_index = 0; |
1780 | } | |
1781 | temp64.val32.lower = curr_sg[sg_index].Addr.lower; | |
1782 | temp64.val32.upper = curr_sg[sg_index].Addr.upper; | |
1783 | pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len, | |
1784 | ddir); | |
1785 | ++sg_index; | |
ca1e0484 MM |
1786 | } |
1787 | ||
b2a4a43d | 1788 | dev_dbg(&h->pdev->dev, "Done with %p\n", rq); |
ca1e0484 | 1789 | |
c3a4d78c | 1790 | /* set the residual count for pc requests */ |
33659ebb | 1791 | if (rq->cmd_type == REQ_TYPE_BLOCK_PC) |
f70dba83 | 1792 | rq->resid_len = c->err_info->ResidualCnt; |
ac44e5b2 | 1793 | |
c3a4d78c | 1794 | blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO); |
3daeea29 | 1795 | |
ca1e0484 | 1796 | spin_lock_irqsave(&h->lock, flags); |
6b4d96b8 | 1797 | cmd_free(h, c); |
7b30f092 | 1798 | cciss_check_queues(h); |
ca1e0484 MM |
1799 | spin_unlock_irqrestore(&h->lock, flags); |
1800 | } | |
1801 | ||
39ccf9a6 SC |
1802 | static inline void log_unit_to_scsi3addr(ctlr_info_t *h, |
1803 | unsigned char scsi3addr[], uint32_t log_unit) | |
b57695fe | 1804 | { |
9cef0d2f SC |
1805 | memcpy(scsi3addr, h->drv[log_unit]->LunID, |
1806 | sizeof(h->drv[log_unit]->LunID)); | |
b57695fe | 1807 | } |
1808 | ||
7fe06326 AP |
1809 | /* This function gets the SCSI vendor, model, and revision of a logical drive |
1810 | * via the inquiry page 0. Model, vendor, and rev are set to empty strings if | |
1811 | * they cannot be read. | |
1812 | */ | |
f70dba83 | 1813 | static void cciss_get_device_descr(ctlr_info_t *h, int logvol, |
7fe06326 AP |
1814 | char *vendor, char *model, char *rev) |
1815 | { | |
1816 | int rc; | |
1817 | InquiryData_struct *inq_buf; | |
b57695fe | 1818 | unsigned char scsi3addr[8]; |
7fe06326 AP |
1819 | |
1820 | *vendor = '\0'; | |
1821 | *model = '\0'; | |
1822 | *rev = '\0'; | |
1823 | ||
1824 | inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); | |
1825 | if (!inq_buf) | |
1826 | return; | |
1827 | ||
f70dba83 SC |
1828 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
1829 | rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0, | |
7b838bde | 1830 | scsi3addr, TYPE_CMD); |
7fe06326 AP |
1831 | if (rc == IO_OK) { |
1832 | memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN); | |
1833 | vendor[VENDOR_LEN] = '\0'; | |
1834 | memcpy(model, &inq_buf->data_byte[16], MODEL_LEN); | |
1835 | model[MODEL_LEN] = '\0'; | |
1836 | memcpy(rev, &inq_buf->data_byte[32], REV_LEN); | |
1837 | rev[REV_LEN] = '\0'; | |
1838 | } | |
1839 | ||
1840 | kfree(inq_buf); | |
1841 | return; | |
1842 | } | |
1843 | ||
a72da29b MM |
1844 | /* This function gets the serial number of a logical drive via |
1845 | * inquiry page 0x83. Serial no. is 16 bytes. If the serial | |
1846 | * number cannot be had, for whatever reason, 16 bytes of 0xff | |
1847 | * are returned instead. | |
1848 | */ | |
f70dba83 | 1849 | static void cciss_get_serial_no(ctlr_info_t *h, int logvol, |
a72da29b MM |
1850 | unsigned char *serial_no, int buflen) |
1851 | { | |
1852 | #define PAGE_83_INQ_BYTES 64 | |
1853 | int rc; | |
1854 | unsigned char *buf; | |
b57695fe | 1855 | unsigned char scsi3addr[8]; |
a72da29b MM |
1856 | |
1857 | if (buflen > 16) | |
1858 | buflen = 16; | |
1859 | memset(serial_no, 0xff, buflen); | |
1860 | buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL); | |
1861 | if (!buf) | |
1862 | return; | |
1863 | memset(serial_no, 0, buflen); | |
f70dba83 SC |
1864 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
1865 | rc = sendcmd_withirq(h, CISS_INQUIRY, buf, | |
7b838bde | 1866 | PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD); |
a72da29b MM |
1867 | if (rc == IO_OK) |
1868 | memcpy(serial_no, &buf[8], buflen); | |
1869 | kfree(buf); | |
1870 | return; | |
1871 | } | |
1872 | ||
617e1344 SC |
1873 | /* |
1874 | * cciss_add_disk sets up the block device queue for a logical drive | |
1875 | */ | |
1876 | static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk, | |
6ae5ce8e MM |
1877 | int drv_index) |
1878 | { | |
1879 | disk->queue = blk_init_queue(do_cciss_request, &h->lock); | |
e8074f79 SC |
1880 | if (!disk->queue) |
1881 | goto init_queue_failure; | |
6ae5ce8e MM |
1882 | sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index); |
1883 | disk->major = h->major; | |
1884 | disk->first_minor = drv_index << NWD_SHIFT; | |
1885 | disk->fops = &cciss_fops; | |
9cef0d2f SC |
1886 | if (cciss_create_ld_sysfs_entry(h, drv_index)) |
1887 | goto cleanup_queue; | |
1888 | disk->private_data = h->drv[drv_index]; | |
1889 | disk->driverfs_dev = &h->drv[drv_index]->dev; | |
6ae5ce8e MM |
1890 | |
1891 | /* Set up queue information */ | |
1892 | blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask); | |
1893 | ||
1894 | /* This is a hardware imposed limit. */ | |
8a78362c | 1895 | blk_queue_max_segments(disk->queue, h->maxsgentries); |
6ae5ce8e | 1896 | |
086fa5ff | 1897 | blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors); |
6ae5ce8e MM |
1898 | |
1899 | blk_queue_softirq_done(disk->queue, cciss_softirq_done); | |
1900 | ||
1901 | disk->queue->queuedata = h; | |
1902 | ||
e1defc4f | 1903 | blk_queue_logical_block_size(disk->queue, |
9cef0d2f | 1904 | h->drv[drv_index]->block_size); |
6ae5ce8e MM |
1905 | |
1906 | /* Make sure all queue data is written out before */ | |
9cef0d2f | 1907 | /* setting h->drv[drv_index]->queue, as setting this */ |
6ae5ce8e MM |
1908 | /* allows the interrupt handler to start the queue */ |
1909 | wmb(); | |
9cef0d2f | 1910 | h->drv[drv_index]->queue = disk->queue; |
6ae5ce8e | 1911 | add_disk(disk); |
617e1344 SC |
1912 | return 0; |
1913 | ||
1914 | cleanup_queue: | |
1915 | blk_cleanup_queue(disk->queue); | |
1916 | disk->queue = NULL; | |
e8074f79 | 1917 | init_queue_failure: |
617e1344 | 1918 | return -1; |
6ae5ce8e MM |
1919 | } |
1920 | ||
ddd47442 | 1921 | /* This function will check the usage_count of the drive to be updated/added. |
a72da29b MM |
1922 | * If the usage_count is zero and it is a heretofore unknown drive, or, |
1923 | * the drive's capacity, geometry, or serial number has changed, | |
1924 | * then the drive information will be updated and the disk will be | |
1925 | * re-registered with the kernel. If these conditions don't hold, | |
1926 | * then it will be left alone for the next reboot. The exception to this | |
1927 | * is disk 0 which will always be left registered with the kernel since it | |
1928 | * is also the controller node. Any changes to disk 0 will show up on | |
1929 | * the next reboot. | |
7c832835 | 1930 | */ |
f70dba83 SC |
1931 | static void cciss_update_drive_info(ctlr_info_t *h, int drv_index, |
1932 | int first_time, int via_ioctl) | |
7c832835 | 1933 | { |
ddd47442 | 1934 | struct gendisk *disk; |
ddd47442 MM |
1935 | InquiryData_struct *inq_buff = NULL; |
1936 | unsigned int block_size; | |
00988a35 | 1937 | sector_t total_size; |
ddd47442 MM |
1938 | unsigned long flags = 0; |
1939 | int ret = 0; | |
a72da29b MM |
1940 | drive_info_struct *drvinfo; |
1941 | ||
1942 | /* Get information about the disk and modify the driver structure */ | |
1943 | inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); | |
9cef0d2f | 1944 | drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL); |
a72da29b MM |
1945 | if (inq_buff == NULL || drvinfo == NULL) |
1946 | goto mem_msg; | |
1947 | ||
1948 | /* testing to see if 16-byte CDBs are already being used */ | |
1949 | if (h->cciss_read == CCISS_READ_16) { | |
f70dba83 | 1950 | cciss_read_capacity_16(h, drv_index, |
a72da29b MM |
1951 | &total_size, &block_size); |
1952 | ||
1953 | } else { | |
f70dba83 | 1954 | cciss_read_capacity(h, drv_index, &total_size, &block_size); |
a72da29b MM |
1955 | /* if read_capacity returns all F's this volume is >2TB */ |
1956 | /* in size so we switch to 16-byte CDB's for all */ | |
1957 | /* read/write ops */ | |
1958 | if (total_size == 0xFFFFFFFFULL) { | |
f70dba83 | 1959 | cciss_read_capacity_16(h, drv_index, |
a72da29b MM |
1960 | &total_size, &block_size); |
1961 | h->cciss_read = CCISS_READ_16; | |
1962 | h->cciss_write = CCISS_WRITE_16; | |
1963 | } else { | |
1964 | h->cciss_read = CCISS_READ_10; | |
1965 | h->cciss_write = CCISS_WRITE_10; | |
1966 | } | |
1967 | } | |
1968 | ||
f70dba83 | 1969 | cciss_geometry_inquiry(h, drv_index, total_size, block_size, |
a72da29b MM |
1970 | inq_buff, drvinfo); |
1971 | drvinfo->block_size = block_size; | |
1972 | drvinfo->nr_blocks = total_size + 1; | |
1973 | ||
f70dba83 | 1974 | cciss_get_device_descr(h, drv_index, drvinfo->vendor, |
7fe06326 | 1975 | drvinfo->model, drvinfo->rev); |
f70dba83 | 1976 | cciss_get_serial_no(h, drv_index, drvinfo->serial_no, |
a72da29b | 1977 | sizeof(drvinfo->serial_no)); |
9cef0d2f SC |
1978 | /* Save the lunid in case we deregister the disk, below. */ |
1979 | memcpy(drvinfo->LunID, h->drv[drv_index]->LunID, | |
1980 | sizeof(drvinfo->LunID)); | |
a72da29b MM |
1981 | |
1982 | /* Is it the same disk we already know, and nothing's changed? */ | |
9cef0d2f | 1983 | if (h->drv[drv_index]->raid_level != -1 && |
a72da29b | 1984 | ((memcmp(drvinfo->serial_no, |
9cef0d2f SC |
1985 | h->drv[drv_index]->serial_no, 16) == 0) && |
1986 | drvinfo->block_size == h->drv[drv_index]->block_size && | |
1987 | drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks && | |
1988 | drvinfo->heads == h->drv[drv_index]->heads && | |
1989 | drvinfo->sectors == h->drv[drv_index]->sectors && | |
1990 | drvinfo->cylinders == h->drv[drv_index]->cylinders)) | |
a72da29b MM |
1991 | /* The disk is unchanged, nothing to update */ |
1992 | goto freeret; | |
a72da29b | 1993 | |
6ae5ce8e MM |
1994 | /* If we get here it's not the same disk, or something's changed, |
1995 | * so we need to * deregister it, and re-register it, if it's not | |
1996 | * in use. | |
1997 | * If the disk already exists then deregister it before proceeding | |
1998 | * (unless it's the first disk (for the controller node). | |
1999 | */ | |
9cef0d2f | 2000 | if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) { |
b2a4a43d | 2001 | dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index); |
f70dba83 | 2002 | spin_lock_irqsave(&h->lock, flags); |
9cef0d2f | 2003 | h->drv[drv_index]->busy_configuring = 1; |
f70dba83 | 2004 | spin_unlock_irqrestore(&h->lock, flags); |
e14ac670 | 2005 | |
9cef0d2f | 2006 | /* deregister_disk sets h->drv[drv_index]->queue = NULL |
6ae5ce8e MM |
2007 | * which keeps the interrupt handler from starting |
2008 | * the queue. | |
2009 | */ | |
2d11d993 | 2010 | ret = deregister_disk(h, drv_index, 0, via_ioctl); |
ddd47442 MM |
2011 | } |
2012 | ||
2013 | /* If the disk is in use return */ | |
2014 | if (ret) | |
a72da29b MM |
2015 | goto freeret; |
2016 | ||
6ae5ce8e | 2017 | /* Save the new information from cciss_geometry_inquiry |
9cef0d2f SC |
2018 | * and serial number inquiry. If the disk was deregistered |
2019 | * above, then h->drv[drv_index] will be NULL. | |
6ae5ce8e | 2020 | */ |
9cef0d2f SC |
2021 | if (h->drv[drv_index] == NULL) { |
2022 | drvinfo->device_initialized = 0; | |
2023 | h->drv[drv_index] = drvinfo; | |
2024 | drvinfo = NULL; /* so it won't be freed below. */ | |
2025 | } else { | |
2026 | /* special case for cxd0 */ | |
2027 | h->drv[drv_index]->block_size = drvinfo->block_size; | |
2028 | h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks; | |
2029 | h->drv[drv_index]->heads = drvinfo->heads; | |
2030 | h->drv[drv_index]->sectors = drvinfo->sectors; | |
2031 | h->drv[drv_index]->cylinders = drvinfo->cylinders; | |
2032 | h->drv[drv_index]->raid_level = drvinfo->raid_level; | |
2033 | memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16); | |
2034 | memcpy(h->drv[drv_index]->vendor, drvinfo->vendor, | |
2035 | VENDOR_LEN + 1); | |
2036 | memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1); | |
2037 | memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1); | |
2038 | } | |
ddd47442 MM |
2039 | |
2040 | ++h->num_luns; | |
2041 | disk = h->gendisk[drv_index]; | |
9cef0d2f | 2042 | set_capacity(disk, h->drv[drv_index]->nr_blocks); |
ddd47442 | 2043 | |
6ae5ce8e MM |
2044 | /* If it's not disk 0 (drv_index != 0) |
2045 | * or if it was disk 0, but there was previously | |
2046 | * no actual corresponding configured logical drive | |
2047 | * (raid_leve == -1) then we want to update the | |
2048 | * logical drive's information. | |
2049 | */ | |
361e9b07 SC |
2050 | if (drv_index || first_time) { |
2051 | if (cciss_add_disk(h, disk, drv_index) != 0) { | |
2052 | cciss_free_gendisk(h, drv_index); | |
9cef0d2f | 2053 | cciss_free_drive_info(h, drv_index); |
b2a4a43d SC |
2054 | dev_warn(&h->pdev->dev, "could not update disk %d\n", |
2055 | drv_index); | |
361e9b07 SC |
2056 | --h->num_luns; |
2057 | } | |
2058 | } | |
ddd47442 | 2059 | |
6ae5ce8e | 2060 | freeret: |
ddd47442 | 2061 | kfree(inq_buff); |
a72da29b | 2062 | kfree(drvinfo); |
ddd47442 | 2063 | return; |
6ae5ce8e | 2064 | mem_msg: |
b2a4a43d | 2065 | dev_err(&h->pdev->dev, "out of memory\n"); |
ddd47442 MM |
2066 | goto freeret; |
2067 | } | |
2068 | ||
2069 | /* This function will find the first index of the controllers drive array | |
9cef0d2f SC |
2070 | * that has a null drv pointer and allocate the drive info struct and |
2071 | * will return that index This is where new drives will be added. | |
2072 | * If the index to be returned is greater than the highest_lun index for | |
2073 | * the controller then highest_lun is set * to this new index. | |
2074 | * If there are no available indexes or if tha allocation fails, then -1 | |
2075 | * is returned. * "controller_node" is used to know if this is a real | |
2076 | * logical drive, or just the controller node, which determines if this | |
2077 | * counts towards highest_lun. | |
7c832835 | 2078 | */ |
9cef0d2f | 2079 | static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node) |
ddd47442 MM |
2080 | { |
2081 | int i; | |
9cef0d2f | 2082 | drive_info_struct *drv; |
ddd47442 | 2083 | |
9cef0d2f | 2084 | /* Search for an empty slot for our drive info */ |
7c832835 | 2085 | for (i = 0; i < CISS_MAX_LUN; i++) { |
9cef0d2f SC |
2086 | |
2087 | /* if not cxd0 case, and it's occupied, skip it. */ | |
2088 | if (h->drv[i] && i != 0) | |
2089 | continue; | |
2090 | /* | |
2091 | * If it's cxd0 case, and drv is alloc'ed already, and a | |
2092 | * disk is configured there, skip it. | |
2093 | */ | |
2094 | if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1) | |
2095 | continue; | |
2096 | ||
2097 | /* | |
2098 | * We've found an empty slot. Update highest_lun | |
2099 | * provided this isn't just the fake cxd0 controller node. | |
2100 | */ | |
2101 | if (i > h->highest_lun && !controller_node) | |
2102 | h->highest_lun = i; | |
2103 | ||
2104 | /* If adding a real disk at cxd0, and it's already alloc'ed */ | |
2105 | if (i == 0 && h->drv[i] != NULL) | |
ddd47442 | 2106 | return i; |
9cef0d2f SC |
2107 | |
2108 | /* | |
2109 | * Found an empty slot, not already alloc'ed. Allocate it. | |
2110 | * Mark it with raid_level == -1, so we know it's new later on. | |
2111 | */ | |
2112 | drv = kzalloc(sizeof(*drv), GFP_KERNEL); | |
2113 | if (!drv) | |
2114 | return -1; | |
2115 | drv->raid_level = -1; /* so we know it's new */ | |
2116 | h->drv[i] = drv; | |
2117 | return i; | |
ddd47442 MM |
2118 | } |
2119 | return -1; | |
2120 | } | |
2121 | ||
9cef0d2f SC |
2122 | static void cciss_free_drive_info(ctlr_info_t *h, int drv_index) |
2123 | { | |
2124 | kfree(h->drv[drv_index]); | |
2125 | h->drv[drv_index] = NULL; | |
2126 | } | |
2127 | ||
361e9b07 SC |
2128 | static void cciss_free_gendisk(ctlr_info_t *h, int drv_index) |
2129 | { | |
2130 | put_disk(h->gendisk[drv_index]); | |
2131 | h->gendisk[drv_index] = NULL; | |
2132 | } | |
2133 | ||
6ae5ce8e MM |
2134 | /* cciss_add_gendisk finds a free hba[]->drv structure |
2135 | * and allocates a gendisk if needed, and sets the lunid | |
2136 | * in the drvinfo structure. It returns the index into | |
2137 | * the ->drv[] array, or -1 if none are free. | |
2138 | * is_controller_node indicates whether highest_lun should | |
2139 | * count this disk, or if it's only being added to provide | |
2140 | * a means to talk to the controller in case no logical | |
2141 | * drives have yet been configured. | |
2142 | */ | |
39ccf9a6 SC |
2143 | static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[], |
2144 | int controller_node) | |
6ae5ce8e MM |
2145 | { |
2146 | int drv_index; | |
2147 | ||
9cef0d2f | 2148 | drv_index = cciss_alloc_drive_info(h, controller_node); |
6ae5ce8e MM |
2149 | if (drv_index == -1) |
2150 | return -1; | |
8ce51966 | 2151 | |
6ae5ce8e MM |
2152 | /*Check if the gendisk needs to be allocated */ |
2153 | if (!h->gendisk[drv_index]) { | |
2154 | h->gendisk[drv_index] = | |
2155 | alloc_disk(1 << NWD_SHIFT); | |
2156 | if (!h->gendisk[drv_index]) { | |
b2a4a43d SC |
2157 | dev_err(&h->pdev->dev, |
2158 | "could not allocate a new disk %d\n", | |
2159 | drv_index); | |
9cef0d2f | 2160 | goto err_free_drive_info; |
6ae5ce8e MM |
2161 | } |
2162 | } | |
9cef0d2f SC |
2163 | memcpy(h->drv[drv_index]->LunID, lunid, |
2164 | sizeof(h->drv[drv_index]->LunID)); | |
2165 | if (cciss_create_ld_sysfs_entry(h, drv_index)) | |
7fe06326 | 2166 | goto err_free_disk; |
6ae5ce8e MM |
2167 | /* Don't need to mark this busy because nobody */ |
2168 | /* else knows about this disk yet to contend */ | |
2169 | /* for access to it. */ | |
9cef0d2f | 2170 | h->drv[drv_index]->busy_configuring = 0; |
6ae5ce8e MM |
2171 | wmb(); |
2172 | return drv_index; | |
7fe06326 AP |
2173 | |
2174 | err_free_disk: | |
361e9b07 | 2175 | cciss_free_gendisk(h, drv_index); |
9cef0d2f SC |
2176 | err_free_drive_info: |
2177 | cciss_free_drive_info(h, drv_index); | |
7fe06326 | 2178 | return -1; |
6ae5ce8e MM |
2179 | } |
2180 | ||
2181 | /* This is for the special case of a controller which | |
2182 | * has no logical drives. In this case, we still need | |
2183 | * to register a disk so the controller can be accessed | |
2184 | * by the Array Config Utility. | |
2185 | */ | |
2186 | static void cciss_add_controller_node(ctlr_info_t *h) | |
2187 | { | |
2188 | struct gendisk *disk; | |
2189 | int drv_index; | |
2190 | ||
2191 | if (h->gendisk[0] != NULL) /* already did this? Then bail. */ | |
2192 | return; | |
2193 | ||
39ccf9a6 | 2194 | drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1); |
361e9b07 SC |
2195 | if (drv_index == -1) |
2196 | goto error; | |
9cef0d2f SC |
2197 | h->drv[drv_index]->block_size = 512; |
2198 | h->drv[drv_index]->nr_blocks = 0; | |
2199 | h->drv[drv_index]->heads = 0; | |
2200 | h->drv[drv_index]->sectors = 0; | |
2201 | h->drv[drv_index]->cylinders = 0; | |
2202 | h->drv[drv_index]->raid_level = -1; | |
2203 | memset(h->drv[drv_index]->serial_no, 0, 16); | |
6ae5ce8e | 2204 | disk = h->gendisk[drv_index]; |
361e9b07 SC |
2205 | if (cciss_add_disk(h, disk, drv_index) == 0) |
2206 | return; | |
2207 | cciss_free_gendisk(h, drv_index); | |
9cef0d2f | 2208 | cciss_free_drive_info(h, drv_index); |
361e9b07 | 2209 | error: |
b2a4a43d | 2210 | dev_warn(&h->pdev->dev, "could not add disk 0.\n"); |
361e9b07 | 2211 | return; |
6ae5ce8e MM |
2212 | } |
2213 | ||
ddd47442 | 2214 | /* This function will add and remove logical drives from the Logical |
d14c4ab5 | 2215 | * drive array of the controller and maintain persistency of ordering |
ddd47442 MM |
2216 | * so that mount points are preserved until the next reboot. This allows |
2217 | * for the removal of logical drives in the middle of the drive array | |
2218 | * without a re-ordering of those drives. | |
2219 | * INPUT | |
2220 | * h = The controller to perform the operations on | |
7c832835 | 2221 | */ |
2d11d993 SC |
2222 | static int rebuild_lun_table(ctlr_info_t *h, int first_time, |
2223 | int via_ioctl) | |
1da177e4 | 2224 | { |
ddd47442 MM |
2225 | int num_luns; |
2226 | ReportLunData_struct *ld_buff = NULL; | |
ddd47442 MM |
2227 | int return_code; |
2228 | int listlength = 0; | |
2229 | int i; | |
2230 | int drv_found; | |
2231 | int drv_index = 0; | |
39ccf9a6 | 2232 | unsigned char lunid[8] = CTLR_LUNID; |
1da177e4 | 2233 | unsigned long flags; |
ddd47442 | 2234 | |
6ae5ce8e MM |
2235 | if (!capable(CAP_SYS_RAWIO)) |
2236 | return -EPERM; | |
2237 | ||
ddd47442 | 2238 | /* Set busy_configuring flag for this operation */ |
f70dba83 | 2239 | spin_lock_irqsave(&h->lock, flags); |
7c832835 | 2240 | if (h->busy_configuring) { |
f70dba83 | 2241 | spin_unlock_irqrestore(&h->lock, flags); |
ddd47442 MM |
2242 | return -EBUSY; |
2243 | } | |
2244 | h->busy_configuring = 1; | |
f70dba83 | 2245 | spin_unlock_irqrestore(&h->lock, flags); |
ddd47442 | 2246 | |
a72da29b MM |
2247 | ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL); |
2248 | if (ld_buff == NULL) | |
2249 | goto mem_msg; | |
2250 | ||
f70dba83 | 2251 | return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff, |
b57695fe | 2252 | sizeof(ReportLunData_struct), |
2253 | 0, CTLR_LUNID, TYPE_CMD); | |
ddd47442 | 2254 | |
a72da29b MM |
2255 | if (return_code == IO_OK) |
2256 | listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength); | |
2257 | else { /* reading number of logical volumes failed */ | |
b2a4a43d SC |
2258 | dev_warn(&h->pdev->dev, |
2259 | "report logical volume command failed\n"); | |
a72da29b MM |
2260 | listlength = 0; |
2261 | goto freeret; | |
2262 | } | |
2263 | ||
2264 | num_luns = listlength / 8; /* 8 bytes per entry */ | |
2265 | if (num_luns > CISS_MAX_LUN) { | |
2266 | num_luns = CISS_MAX_LUN; | |
b2a4a43d | 2267 | dev_warn(&h->pdev->dev, "more luns configured" |
a72da29b MM |
2268 | " on controller than can be handled by" |
2269 | " this driver.\n"); | |
2270 | } | |
2271 | ||
6ae5ce8e MM |
2272 | if (num_luns == 0) |
2273 | cciss_add_controller_node(h); | |
2274 | ||
2275 | /* Compare controller drive array to driver's drive array | |
2276 | * to see if any drives are missing on the controller due | |
2277 | * to action of Array Config Utility (user deletes drive) | |
2278 | * and deregister logical drives which have disappeared. | |
2279 | */ | |
a72da29b MM |
2280 | for (i = 0; i <= h->highest_lun; i++) { |
2281 | int j; | |
2282 | drv_found = 0; | |
d8a0be6a SC |
2283 | |
2284 | /* skip holes in the array from already deleted drives */ | |
9cef0d2f | 2285 | if (h->drv[i] == NULL) |
d8a0be6a SC |
2286 | continue; |
2287 | ||
a72da29b | 2288 | for (j = 0; j < num_luns; j++) { |
39ccf9a6 | 2289 | memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid)); |
9cef0d2f | 2290 | if (memcmp(h->drv[i]->LunID, lunid, |
39ccf9a6 | 2291 | sizeof(lunid)) == 0) { |
a72da29b MM |
2292 | drv_found = 1; |
2293 | break; | |
2294 | } | |
2295 | } | |
2296 | if (!drv_found) { | |
2297 | /* Deregister it from the OS, it's gone. */ | |
f70dba83 | 2298 | spin_lock_irqsave(&h->lock, flags); |
9cef0d2f | 2299 | h->drv[i]->busy_configuring = 1; |
f70dba83 | 2300 | spin_unlock_irqrestore(&h->lock, flags); |
2d11d993 | 2301 | return_code = deregister_disk(h, i, 1, via_ioctl); |
9cef0d2f SC |
2302 | if (h->drv[i] != NULL) |
2303 | h->drv[i]->busy_configuring = 0; | |
ddd47442 | 2304 | } |
a72da29b | 2305 | } |
ddd47442 | 2306 | |
a72da29b MM |
2307 | /* Compare controller drive array to driver's drive array. |
2308 | * Check for updates in the drive information and any new drives | |
2309 | * on the controller due to ACU adding logical drives, or changing | |
2310 | * a logical drive's size, etc. Reregister any new/changed drives | |
2311 | */ | |
2312 | for (i = 0; i < num_luns; i++) { | |
2313 | int j; | |
ddd47442 | 2314 | |
a72da29b | 2315 | drv_found = 0; |
ddd47442 | 2316 | |
39ccf9a6 | 2317 | memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid)); |
a72da29b MM |
2318 | /* Find if the LUN is already in the drive array |
2319 | * of the driver. If so then update its info | |
2320 | * if not in use. If it does not exist then find | |
2321 | * the first free index and add it. | |
2322 | */ | |
2323 | for (j = 0; j <= h->highest_lun; j++) { | |
9cef0d2f SC |
2324 | if (h->drv[j] != NULL && |
2325 | memcmp(h->drv[j]->LunID, lunid, | |
2326 | sizeof(h->drv[j]->LunID)) == 0) { | |
a72da29b MM |
2327 | drv_index = j; |
2328 | drv_found = 1; | |
2329 | break; | |
ddd47442 | 2330 | } |
a72da29b | 2331 | } |
ddd47442 | 2332 | |
a72da29b MM |
2333 | /* check if the drive was found already in the array */ |
2334 | if (!drv_found) { | |
eece695f | 2335 | drv_index = cciss_add_gendisk(h, lunid, 0); |
a72da29b MM |
2336 | if (drv_index == -1) |
2337 | goto freeret; | |
a72da29b | 2338 | } |
f70dba83 | 2339 | cciss_update_drive_info(h, drv_index, first_time, via_ioctl); |
a72da29b | 2340 | } /* end for */ |
ddd47442 | 2341 | |
6ae5ce8e | 2342 | freeret: |
ddd47442 MM |
2343 | kfree(ld_buff); |
2344 | h->busy_configuring = 0; | |
2345 | /* We return -1 here to tell the ACU that we have registered/updated | |
2346 | * all of the drives that we can and to keep it from calling us | |
2347 | * additional times. | |
7c832835 | 2348 | */ |
ddd47442 | 2349 | return -1; |
6ae5ce8e | 2350 | mem_msg: |
b2a4a43d | 2351 | dev_err(&h->pdev->dev, "out of memory\n"); |
a72da29b | 2352 | h->busy_configuring = 0; |
ddd47442 MM |
2353 | goto freeret; |
2354 | } | |
2355 | ||
9ddb27b4 SC |
2356 | static void cciss_clear_drive_info(drive_info_struct *drive_info) |
2357 | { | |
2358 | /* zero out the disk size info */ | |
2359 | drive_info->nr_blocks = 0; | |
2360 | drive_info->block_size = 0; | |
2361 | drive_info->heads = 0; | |
2362 | drive_info->sectors = 0; | |
2363 | drive_info->cylinders = 0; | |
2364 | drive_info->raid_level = -1; | |
2365 | memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no)); | |
2366 | memset(drive_info->model, 0, sizeof(drive_info->model)); | |
2367 | memset(drive_info->rev, 0, sizeof(drive_info->rev)); | |
2368 | memset(drive_info->vendor, 0, sizeof(drive_info->vendor)); | |
2369 | /* | |
2370 | * don't clear the LUNID though, we need to remember which | |
2371 | * one this one is. | |
2372 | */ | |
2373 | } | |
2374 | ||
ddd47442 MM |
2375 | /* This function will deregister the disk and it's queue from the |
2376 | * kernel. It must be called with the controller lock held and the | |
2377 | * drv structures busy_configuring flag set. It's parameters are: | |
2378 | * | |
2379 | * disk = This is the disk to be deregistered | |
2380 | * drv = This is the drive_info_struct associated with the disk to be | |
2381 | * deregistered. It contains information about the disk used | |
2382 | * by the driver. | |
2383 | * clear_all = This flag determines whether or not the disk information | |
2384 | * is going to be completely cleared out and the highest_lun | |
2385 | * reset. Sometimes we want to clear out information about | |
d14c4ab5 | 2386 | * the disk in preparation for re-adding it. In this case |
ddd47442 MM |
2387 | * the highest_lun should be left unchanged and the LunID |
2388 | * should not be cleared. | |
2d11d993 SC |
2389 | * via_ioctl |
2390 | * This indicates whether we've reached this path via ioctl. | |
2391 | * This affects the maximum usage count allowed for c0d0 to be messed with. | |
2392 | * If this path is reached via ioctl(), then the max_usage_count will | |
2393 | * be 1, as the process calling ioctl() has got to have the device open. | |
2394 | * If we get here via sysfs, then the max usage count will be zero. | |
ddd47442 | 2395 | */ |
a0ea8622 | 2396 | static int deregister_disk(ctlr_info_t *h, int drv_index, |
2d11d993 | 2397 | int clear_all, int via_ioctl) |
ddd47442 | 2398 | { |
799202cb | 2399 | int i; |
a0ea8622 SC |
2400 | struct gendisk *disk; |
2401 | drive_info_struct *drv; | |
9cef0d2f | 2402 | int recalculate_highest_lun; |
1da177e4 LT |
2403 | |
2404 | if (!capable(CAP_SYS_RAWIO)) | |
2405 | return -EPERM; | |
2406 | ||
9cef0d2f | 2407 | drv = h->drv[drv_index]; |
a0ea8622 SC |
2408 | disk = h->gendisk[drv_index]; |
2409 | ||
1da177e4 | 2410 | /* make sure logical volume is NOT is use */ |
7c832835 | 2411 | if (clear_all || (h->gendisk[0] == disk)) { |
2d11d993 | 2412 | if (drv->usage_count > via_ioctl) |
7c832835 BH |
2413 | return -EBUSY; |
2414 | } else if (drv->usage_count > 0) | |
2415 | return -EBUSY; | |
1da177e4 | 2416 | |
9cef0d2f SC |
2417 | recalculate_highest_lun = (drv == h->drv[h->highest_lun]); |
2418 | ||
ddd47442 MM |
2419 | /* invalidate the devices and deregister the disk. If it is disk |
2420 | * zero do not deregister it but just zero out it's values. This | |
2421 | * allows us to delete disk zero but keep the controller registered. | |
7c832835 BH |
2422 | */ |
2423 | if (h->gendisk[0] != disk) { | |
5a9df732 | 2424 | struct request_queue *q = disk->queue; |
097d0264 | 2425 | if (disk->flags & GENHD_FL_UP) { |
8ce51966 | 2426 | cciss_destroy_ld_sysfs_entry(h, drv_index, 0); |
5a9df732 | 2427 | del_gendisk(disk); |
5a9df732 | 2428 | } |
9cef0d2f | 2429 | if (q) |
5a9df732 | 2430 | blk_cleanup_queue(q); |
5a9df732 AB |
2431 | /* If clear_all is set then we are deleting the logical |
2432 | * drive, not just refreshing its info. For drives | |
2433 | * other than disk 0 we will call put_disk. We do not | |
2434 | * do this for disk 0 as we need it to be able to | |
2435 | * configure the controller. | |
a72da29b | 2436 | */ |
5a9df732 AB |
2437 | if (clear_all){ |
2438 | /* This isn't pretty, but we need to find the | |
2439 | * disk in our array and NULL our the pointer. | |
2440 | * This is so that we will call alloc_disk if | |
2441 | * this index is used again later. | |
a72da29b | 2442 | */ |
5a9df732 | 2443 | for (i=0; i < CISS_MAX_LUN; i++){ |
a72da29b | 2444 | if (h->gendisk[i] == disk) { |
5a9df732 AB |
2445 | h->gendisk[i] = NULL; |
2446 | break; | |
799202cb | 2447 | } |
799202cb | 2448 | } |
5a9df732 | 2449 | put_disk(disk); |
ddd47442 | 2450 | } |
799202cb MM |
2451 | } else { |
2452 | set_capacity(disk, 0); | |
9cef0d2f | 2453 | cciss_clear_drive_info(drv); |
ddd47442 MM |
2454 | } |
2455 | ||
2456 | --h->num_luns; | |
ddd47442 | 2457 | |
9cef0d2f SC |
2458 | /* if it was the last disk, find the new hightest lun */ |
2459 | if (clear_all && recalculate_highest_lun) { | |
c2d45b4d | 2460 | int newhighest = -1; |
9cef0d2f SC |
2461 | for (i = 0; i <= h->highest_lun; i++) { |
2462 | /* if the disk has size > 0, it is available */ | |
2463 | if (h->drv[i] && h->drv[i]->heads) | |
2464 | newhighest = i; | |
1da177e4 | 2465 | } |
9cef0d2f | 2466 | h->highest_lun = newhighest; |
ddd47442 | 2467 | } |
e2019b58 | 2468 | return 0; |
1da177e4 | 2469 | } |
ddd47442 | 2470 | |
f70dba83 | 2471 | static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff, |
b57695fe | 2472 | size_t size, __u8 page_code, unsigned char *scsi3addr, |
2473 | int cmd_type) | |
1da177e4 | 2474 | { |
1da177e4 LT |
2475 | u64bit buff_dma_handle; |
2476 | int status = IO_OK; | |
2477 | ||
2478 | c->cmd_type = CMD_IOCTL_PEND; | |
2479 | c->Header.ReplyQueue = 0; | |
7c832835 | 2480 | if (buff != NULL) { |
1da177e4 | 2481 | c->Header.SGList = 1; |
7c832835 | 2482 | c->Header.SGTotal = 1; |
1da177e4 LT |
2483 | } else { |
2484 | c->Header.SGList = 0; | |
7c832835 | 2485 | c->Header.SGTotal = 0; |
1da177e4 LT |
2486 | } |
2487 | c->Header.Tag.lower = c->busaddr; | |
b57695fe | 2488 | memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); |
1da177e4 LT |
2489 | |
2490 | c->Request.Type.Type = cmd_type; | |
2491 | if (cmd_type == TYPE_CMD) { | |
7c832835 BH |
2492 | switch (cmd) { |
2493 | case CISS_INQUIRY: | |
1da177e4 | 2494 | /* are we trying to read a vital product page */ |
7c832835 | 2495 | if (page_code != 0) { |
1da177e4 LT |
2496 | c->Request.CDB[1] = 0x01; |
2497 | c->Request.CDB[2] = page_code; | |
2498 | } | |
2499 | c->Request.CDBLen = 6; | |
7c832835 | 2500 | c->Request.Type.Attribute = ATTR_SIMPLE; |
1da177e4 LT |
2501 | c->Request.Type.Direction = XFER_READ; |
2502 | c->Request.Timeout = 0; | |
7c832835 BH |
2503 | c->Request.CDB[0] = CISS_INQUIRY; |
2504 | c->Request.CDB[4] = size & 0xFF; | |
2505 | break; | |
1da177e4 LT |
2506 | case CISS_REPORT_LOG: |
2507 | case CISS_REPORT_PHYS: | |
7c832835 | 2508 | /* Talking to controller so It's a physical command |
1da177e4 | 2509 | mode = 00 target = 0. Nothing to write. |
7c832835 | 2510 | */ |
1da177e4 LT |
2511 | c->Request.CDBLen = 12; |
2512 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2513 | c->Request.Type.Direction = XFER_READ; | |
2514 | c->Request.Timeout = 0; | |
2515 | c->Request.CDB[0] = cmd; | |
b028461d | 2516 | c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ |
1da177e4 LT |
2517 | c->Request.CDB[7] = (size >> 16) & 0xFF; |
2518 | c->Request.CDB[8] = (size >> 8) & 0xFF; | |
2519 | c->Request.CDB[9] = size & 0xFF; | |
2520 | break; | |
2521 | ||
2522 | case CCISS_READ_CAPACITY: | |
1da177e4 LT |
2523 | c->Request.CDBLen = 10; |
2524 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2525 | c->Request.Type.Direction = XFER_READ; | |
2526 | c->Request.Timeout = 0; | |
2527 | c->Request.CDB[0] = cmd; | |
7c832835 | 2528 | break; |
00988a35 | 2529 | case CCISS_READ_CAPACITY_16: |
00988a35 MMOD |
2530 | c->Request.CDBLen = 16; |
2531 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2532 | c->Request.Type.Direction = XFER_READ; | |
2533 | c->Request.Timeout = 0; | |
2534 | c->Request.CDB[0] = cmd; | |
2535 | c->Request.CDB[1] = 0x10; | |
2536 | c->Request.CDB[10] = (size >> 24) & 0xFF; | |
2537 | c->Request.CDB[11] = (size >> 16) & 0xFF; | |
2538 | c->Request.CDB[12] = (size >> 8) & 0xFF; | |
2539 | c->Request.CDB[13] = size & 0xFF; | |
2540 | c->Request.Timeout = 0; | |
2541 | c->Request.CDB[0] = cmd; | |
2542 | break; | |
1da177e4 LT |
2543 | case CCISS_CACHE_FLUSH: |
2544 | c->Request.CDBLen = 12; | |
2545 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2546 | c->Request.Type.Direction = XFER_WRITE; | |
2547 | c->Request.Timeout = 0; | |
2548 | c->Request.CDB[0] = BMIC_WRITE; | |
2549 | c->Request.CDB[6] = BMIC_CACHE_FLUSH; | |
7c832835 | 2550 | break; |
88f627ae | 2551 | case TEST_UNIT_READY: |
88f627ae SC |
2552 | c->Request.CDBLen = 6; |
2553 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2554 | c->Request.Type.Direction = XFER_NONE; | |
2555 | c->Request.Timeout = 0; | |
2556 | break; | |
1da177e4 | 2557 | default: |
b2a4a43d | 2558 | dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd); |
e2019b58 | 2559 | return IO_ERROR; |
1da177e4 LT |
2560 | } |
2561 | } else if (cmd_type == TYPE_MSG) { | |
2562 | switch (cmd) { | |
7c832835 | 2563 | case 0: /* ABORT message */ |
3da8b713 | 2564 | c->Request.CDBLen = 12; |
2565 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2566 | c->Request.Type.Direction = XFER_WRITE; | |
2567 | c->Request.Timeout = 0; | |
7c832835 BH |
2568 | c->Request.CDB[0] = cmd; /* abort */ |
2569 | c->Request.CDB[1] = 0; /* abort a command */ | |
3da8b713 | 2570 | /* buff contains the tag of the command to abort */ |
2571 | memcpy(&c->Request.CDB[4], buff, 8); | |
2572 | break; | |
7c832835 | 2573 | case 1: /* RESET message */ |
88f627ae | 2574 | c->Request.CDBLen = 16; |
3da8b713 | 2575 | c->Request.Type.Attribute = ATTR_SIMPLE; |
88f627ae | 2576 | c->Request.Type.Direction = XFER_NONE; |
3da8b713 | 2577 | c->Request.Timeout = 0; |
2578 | memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); | |
7c832835 | 2579 | c->Request.CDB[0] = cmd; /* reset */ |
88f627ae | 2580 | c->Request.CDB[1] = 0x03; /* reset a target */ |
00988a35 | 2581 | break; |
1da177e4 LT |
2582 | case 3: /* No-Op message */ |
2583 | c->Request.CDBLen = 1; | |
2584 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2585 | c->Request.Type.Direction = XFER_WRITE; | |
2586 | c->Request.Timeout = 0; | |
2587 | c->Request.CDB[0] = cmd; | |
2588 | break; | |
2589 | default: | |
b2a4a43d SC |
2590 | dev_warn(&h->pdev->dev, |
2591 | "unknown message type %d\n", cmd); | |
1da177e4 LT |
2592 | return IO_ERROR; |
2593 | } | |
2594 | } else { | |
b2a4a43d | 2595 | dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); |
1da177e4 LT |
2596 | return IO_ERROR; |
2597 | } | |
2598 | /* Fill in the scatter gather information */ | |
2599 | if (size > 0) { | |
2600 | buff_dma_handle.val = (__u64) pci_map_single(h->pdev, | |
7c832835 BH |
2601 | buff, size, |
2602 | PCI_DMA_BIDIRECTIONAL); | |
1da177e4 LT |
2603 | c->SG[0].Addr.lower = buff_dma_handle.val32.lower; |
2604 | c->SG[0].Addr.upper = buff_dma_handle.val32.upper; | |
2605 | c->SG[0].Len = size; | |
7c832835 | 2606 | c->SG[0].Ext = 0; /* we are not chaining */ |
1da177e4 LT |
2607 | } |
2608 | return status; | |
2609 | } | |
7c832835 | 2610 | |
3c2ab402 | 2611 | static int check_target_status(ctlr_info_t *h, CommandList_struct *c) |
2612 | { | |
2613 | switch (c->err_info->ScsiStatus) { | |
2614 | case SAM_STAT_GOOD: | |
2615 | return IO_OK; | |
2616 | case SAM_STAT_CHECK_CONDITION: | |
2617 | switch (0xf & c->err_info->SenseInfo[2]) { | |
2618 | case 0: return IO_OK; /* no sense */ | |
2619 | case 1: return IO_OK; /* recovered error */ | |
2620 | default: | |
c08fac65 SC |
2621 | if (check_for_unit_attention(h, c)) |
2622 | return IO_NEEDS_RETRY; | |
b2a4a43d | 2623 | dev_warn(&h->pdev->dev, "cmd 0x%02x " |
3c2ab402 | 2624 | "check condition, sense key = 0x%02x\n", |
b2a4a43d | 2625 | c->Request.CDB[0], c->err_info->SenseInfo[2]); |
3c2ab402 | 2626 | } |
2627 | break; | |
2628 | default: | |
b2a4a43d SC |
2629 | dev_warn(&h->pdev->dev, "cmd 0x%02x" |
2630 | "scsi status = 0x%02x\n", | |
3c2ab402 | 2631 | c->Request.CDB[0], c->err_info->ScsiStatus); |
2632 | break; | |
2633 | } | |
2634 | return IO_ERROR; | |
2635 | } | |
2636 | ||
789a424a | 2637 | static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c) |
1da177e4 | 2638 | { |
5390cfc3 | 2639 | int return_status = IO_OK; |
7c832835 | 2640 | |
789a424a | 2641 | if (c->err_info->CommandStatus == CMD_SUCCESS) |
2642 | return IO_OK; | |
5390cfc3 | 2643 | |
2644 | switch (c->err_info->CommandStatus) { | |
2645 | case CMD_TARGET_STATUS: | |
3c2ab402 | 2646 | return_status = check_target_status(h, c); |
5390cfc3 | 2647 | break; |
2648 | case CMD_DATA_UNDERRUN: | |
2649 | case CMD_DATA_OVERRUN: | |
2650 | /* expected for inquiry and report lun commands */ | |
2651 | break; | |
2652 | case CMD_INVALID: | |
b2a4a43d | 2653 | dev_warn(&h->pdev->dev, "cmd 0x%02x is " |
5390cfc3 | 2654 | "reported invalid\n", c->Request.CDB[0]); |
2655 | return_status = IO_ERROR; | |
2656 | break; | |
2657 | case CMD_PROTOCOL_ERR: | |
b2a4a43d SC |
2658 | dev_warn(&h->pdev->dev, "cmd 0x%02x has " |
2659 | "protocol error\n", c->Request.CDB[0]); | |
5390cfc3 | 2660 | return_status = IO_ERROR; |
2661 | break; | |
2662 | case CMD_HARDWARE_ERR: | |
b2a4a43d | 2663 | dev_warn(&h->pdev->dev, "cmd 0x%02x had " |
5390cfc3 | 2664 | " hardware error\n", c->Request.CDB[0]); |
2665 | return_status = IO_ERROR; | |
2666 | break; | |
2667 | case CMD_CONNECTION_LOST: | |
b2a4a43d | 2668 | dev_warn(&h->pdev->dev, "cmd 0x%02x had " |
5390cfc3 | 2669 | "connection lost\n", c->Request.CDB[0]); |
2670 | return_status = IO_ERROR; | |
2671 | break; | |
2672 | case CMD_ABORTED: | |
b2a4a43d | 2673 | dev_warn(&h->pdev->dev, "cmd 0x%02x was " |
5390cfc3 | 2674 | "aborted\n", c->Request.CDB[0]); |
2675 | return_status = IO_ERROR; | |
2676 | break; | |
2677 | case CMD_ABORT_FAILED: | |
b2a4a43d | 2678 | dev_warn(&h->pdev->dev, "cmd 0x%02x reports " |
5390cfc3 | 2679 | "abort failed\n", c->Request.CDB[0]); |
2680 | return_status = IO_ERROR; | |
2681 | break; | |
2682 | case CMD_UNSOLICITED_ABORT: | |
b2a4a43d | 2683 | dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n", |
5390cfc3 | 2684 | c->Request.CDB[0]); |
789a424a | 2685 | return_status = IO_NEEDS_RETRY; |
5390cfc3 | 2686 | break; |
2687 | default: | |
b2a4a43d | 2688 | dev_warn(&h->pdev->dev, "cmd 0x%02x returned " |
5390cfc3 | 2689 | "unknown status %x\n", c->Request.CDB[0], |
2690 | c->err_info->CommandStatus); | |
2691 | return_status = IO_ERROR; | |
7c832835 | 2692 | } |
789a424a | 2693 | return return_status; |
2694 | } | |
2695 | ||
2696 | static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, | |
2697 | int attempt_retry) | |
2698 | { | |
2699 | DECLARE_COMPLETION_ONSTACK(wait); | |
2700 | u64bit buff_dma_handle; | |
789a424a | 2701 | int return_status = IO_OK; |
2702 | ||
2703 | resend_cmd2: | |
2704 | c->waiting = &wait; | |
664a717d | 2705 | enqueue_cmd_and_start_io(h, c); |
789a424a | 2706 | |
2707 | wait_for_completion(&wait); | |
2708 | ||
2709 | if (c->err_info->CommandStatus == 0 || !attempt_retry) | |
2710 | goto command_done; | |
2711 | ||
2712 | return_status = process_sendcmd_error(h, c); | |
2713 | ||
2714 | if (return_status == IO_NEEDS_RETRY && | |
2715 | c->retry_count < MAX_CMD_RETRIES) { | |
b2a4a43d | 2716 | dev_warn(&h->pdev->dev, "retrying 0x%02x\n", |
789a424a | 2717 | c->Request.CDB[0]); |
2718 | c->retry_count++; | |
2719 | /* erase the old error information */ | |
2720 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); | |
2721 | return_status = IO_OK; | |
2722 | INIT_COMPLETION(wait); | |
2723 | goto resend_cmd2; | |
2724 | } | |
5390cfc3 | 2725 | |
2726 | command_done: | |
1da177e4 | 2727 | /* unlock the buffers from DMA */ |
bb2a37bf MM |
2728 | buff_dma_handle.val32.lower = c->SG[0].Addr.lower; |
2729 | buff_dma_handle.val32.upper = c->SG[0].Addr.upper; | |
7c832835 BH |
2730 | pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val, |
2731 | c->SG[0].Len, PCI_DMA_BIDIRECTIONAL); | |
5390cfc3 | 2732 | return return_status; |
2733 | } | |
2734 | ||
f70dba83 | 2735 | static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, |
b57695fe | 2736 | __u8 page_code, unsigned char scsi3addr[], |
2737 | int cmd_type) | |
5390cfc3 | 2738 | { |
5390cfc3 | 2739 | CommandList_struct *c; |
2740 | int return_status; | |
2741 | ||
6b4d96b8 | 2742 | c = cmd_special_alloc(h); |
5390cfc3 | 2743 | if (!c) |
2744 | return -ENOMEM; | |
f70dba83 | 2745 | return_status = fill_cmd(h, c, cmd, buff, size, page_code, |
b57695fe | 2746 | scsi3addr, cmd_type); |
5390cfc3 | 2747 | if (return_status == IO_OK) |
789a424a | 2748 | return_status = sendcmd_withirq_core(h, c, 1); |
2749 | ||
6b4d96b8 | 2750 | cmd_special_free(h, c); |
7c832835 | 2751 | return return_status; |
1da177e4 | 2752 | } |
7c832835 | 2753 | |
f70dba83 | 2754 | static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, |
7b838bde | 2755 | sector_t total_size, |
7c832835 BH |
2756 | unsigned int block_size, |
2757 | InquiryData_struct *inq_buff, | |
2758 | drive_info_struct *drv) | |
1da177e4 LT |
2759 | { |
2760 | int return_code; | |
00988a35 | 2761 | unsigned long t; |
b57695fe | 2762 | unsigned char scsi3addr[8]; |
00988a35 | 2763 | |
1da177e4 | 2764 | memset(inq_buff, 0, sizeof(InquiryData_struct)); |
f70dba83 SC |
2765 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2766 | return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, | |
7b838bde | 2767 | sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD); |
1da177e4 | 2768 | if (return_code == IO_OK) { |
7c832835 | 2769 | if (inq_buff->data_byte[8] == 0xFF) { |
b2a4a43d SC |
2770 | dev_warn(&h->pdev->dev, |
2771 | "reading geometry failed, volume " | |
7c832835 | 2772 | "does not support reading geometry\n"); |
1da177e4 | 2773 | drv->heads = 255; |
b028461d | 2774 | drv->sectors = 32; /* Sectors per track */ |
7f42d3b8 | 2775 | drv->cylinders = total_size + 1; |
89f97ad1 | 2776 | drv->raid_level = RAID_UNKNOWN; |
1da177e4 | 2777 | } else { |
1da177e4 LT |
2778 | drv->heads = inq_buff->data_byte[6]; |
2779 | drv->sectors = inq_buff->data_byte[7]; | |
2780 | drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8; | |
2781 | drv->cylinders += inq_buff->data_byte[5]; | |
2782 | drv->raid_level = inq_buff->data_byte[8]; | |
3f7705ea MW |
2783 | } |
2784 | drv->block_size = block_size; | |
97c06978 | 2785 | drv->nr_blocks = total_size + 1; |
3f7705ea MW |
2786 | t = drv->heads * drv->sectors; |
2787 | if (t > 1) { | |
97c06978 MMOD |
2788 | sector_t real_size = total_size + 1; |
2789 | unsigned long rem = sector_div(real_size, t); | |
3f7705ea | 2790 | if (rem) |
97c06978 MMOD |
2791 | real_size++; |
2792 | drv->cylinders = real_size; | |
1da177e4 | 2793 | } |
7c832835 | 2794 | } else { /* Get geometry failed */ |
b2a4a43d | 2795 | dev_warn(&h->pdev->dev, "reading geometry failed\n"); |
1da177e4 | 2796 | } |
1da177e4 | 2797 | } |
7c832835 | 2798 | |
1da177e4 | 2799 | static void |
f70dba83 | 2800 | cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size, |
7c832835 | 2801 | unsigned int *block_size) |
1da177e4 | 2802 | { |
00988a35 | 2803 | ReadCapdata_struct *buf; |
1da177e4 | 2804 | int return_code; |
b57695fe | 2805 | unsigned char scsi3addr[8]; |
1aebe187 MK |
2806 | |
2807 | buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL); | |
2808 | if (!buf) { | |
b2a4a43d | 2809 | dev_warn(&h->pdev->dev, "out of memory\n"); |
00988a35 MMOD |
2810 | return; |
2811 | } | |
1aebe187 | 2812 | |
f70dba83 SC |
2813 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2814 | return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf, | |
7b838bde | 2815 | sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD); |
1da177e4 | 2816 | if (return_code == IO_OK) { |
4c1f2b31 AV |
2817 | *total_size = be32_to_cpu(*(__be32 *) buf->total_size); |
2818 | *block_size = be32_to_cpu(*(__be32 *) buf->block_size); | |
7c832835 | 2819 | } else { /* read capacity command failed */ |
b2a4a43d | 2820 | dev_warn(&h->pdev->dev, "read capacity failed\n"); |
1da177e4 LT |
2821 | *total_size = 0; |
2822 | *block_size = BLOCK_SIZE; | |
2823 | } | |
00988a35 | 2824 | kfree(buf); |
00988a35 MMOD |
2825 | } |
2826 | ||
f70dba83 | 2827 | static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, |
7b838bde | 2828 | sector_t *total_size, unsigned int *block_size) |
00988a35 MMOD |
2829 | { |
2830 | ReadCapdata_struct_16 *buf; | |
2831 | int return_code; | |
b57695fe | 2832 | unsigned char scsi3addr[8]; |
1aebe187 MK |
2833 | |
2834 | buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL); | |
2835 | if (!buf) { | |
b2a4a43d | 2836 | dev_warn(&h->pdev->dev, "out of memory\n"); |
00988a35 MMOD |
2837 | return; |
2838 | } | |
1aebe187 | 2839 | |
f70dba83 SC |
2840 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2841 | return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16, | |
2842 | buf, sizeof(ReadCapdata_struct_16), | |
7b838bde | 2843 | 0, scsi3addr, TYPE_CMD); |
00988a35 | 2844 | if (return_code == IO_OK) { |
4c1f2b31 AV |
2845 | *total_size = be64_to_cpu(*(__be64 *) buf->total_size); |
2846 | *block_size = be32_to_cpu(*(__be32 *) buf->block_size); | |
00988a35 | 2847 | } else { /* read capacity command failed */ |
b2a4a43d | 2848 | dev_warn(&h->pdev->dev, "read capacity failed\n"); |
00988a35 MMOD |
2849 | *total_size = 0; |
2850 | *block_size = BLOCK_SIZE; | |
2851 | } | |
b2a4a43d | 2852 | dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n", |
97c06978 | 2853 | (unsigned long long)*total_size+1, *block_size); |
00988a35 | 2854 | kfree(buf); |
1da177e4 LT |
2855 | } |
2856 | ||
1da177e4 LT |
2857 | static int cciss_revalidate(struct gendisk *disk) |
2858 | { | |
2859 | ctlr_info_t *h = get_host(disk); | |
2860 | drive_info_struct *drv = get_drv(disk); | |
2861 | int logvol; | |
7c832835 | 2862 | int FOUND = 0; |
1da177e4 | 2863 | unsigned int block_size; |
00988a35 | 2864 | sector_t total_size; |
1da177e4 LT |
2865 | InquiryData_struct *inq_buff = NULL; |
2866 | ||
7c832835 | 2867 | for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) { |
9cef0d2f | 2868 | if (memcmp(h->drv[logvol]->LunID, drv->LunID, |
39ccf9a6 | 2869 | sizeof(drv->LunID)) == 0) { |
7c832835 | 2870 | FOUND = 1; |
1da177e4 LT |
2871 | break; |
2872 | } | |
2873 | } | |
2874 | ||
7c832835 BH |
2875 | if (!FOUND) |
2876 | return 1; | |
1da177e4 | 2877 | |
7c832835 BH |
2878 | inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); |
2879 | if (inq_buff == NULL) { | |
b2a4a43d | 2880 | dev_warn(&h->pdev->dev, "out of memory\n"); |
7c832835 BH |
2881 | return 1; |
2882 | } | |
00988a35 | 2883 | if (h->cciss_read == CCISS_READ_10) { |
f70dba83 | 2884 | cciss_read_capacity(h, logvol, |
00988a35 MMOD |
2885 | &total_size, &block_size); |
2886 | } else { | |
f70dba83 | 2887 | cciss_read_capacity_16(h, logvol, |
00988a35 MMOD |
2888 | &total_size, &block_size); |
2889 | } | |
f70dba83 | 2890 | cciss_geometry_inquiry(h, logvol, total_size, block_size, |
7c832835 | 2891 | inq_buff, drv); |
1da177e4 | 2892 | |
e1defc4f | 2893 | blk_queue_logical_block_size(drv->queue, drv->block_size); |
1da177e4 LT |
2894 | set_capacity(disk, drv->nr_blocks); |
2895 | ||
1da177e4 LT |
2896 | kfree(inq_buff); |
2897 | return 0; | |
2898 | } | |
2899 | ||
1da177e4 LT |
2900 | /* |
2901 | * Map (physical) PCI mem into (virtual) kernel space | |
2902 | */ | |
2903 | static void __iomem *remap_pci_mem(ulong base, ulong size) | |
2904 | { | |
7c832835 BH |
2905 | ulong page_base = ((ulong) base) & PAGE_MASK; |
2906 | ulong page_offs = ((ulong) base) - page_base; | |
2907 | void __iomem *page_remapped = ioremap(page_base, page_offs + size); | |
1da177e4 | 2908 | |
7c832835 | 2909 | return page_remapped ? (page_remapped + page_offs) : NULL; |
1da177e4 LT |
2910 | } |
2911 | ||
7c832835 BH |
2912 | /* |
2913 | * Takes jobs of the Q and sends them to the hardware, then puts it on | |
2914 | * the Q to wait for completion. | |
2915 | */ | |
2916 | static void start_io(ctlr_info_t *h) | |
1da177e4 LT |
2917 | { |
2918 | CommandList_struct *c; | |
7c832835 | 2919 | |
8a3173de JA |
2920 | while (!hlist_empty(&h->reqQ)) { |
2921 | c = hlist_entry(h->reqQ.first, CommandList_struct, list); | |
1da177e4 LT |
2922 | /* can't do anything if fifo is full */ |
2923 | if ((h->access.fifo_full(h))) { | |
b2a4a43d | 2924 | dev_warn(&h->pdev->dev, "fifo full\n"); |
1da177e4 LT |
2925 | break; |
2926 | } | |
2927 | ||
7c832835 | 2928 | /* Get the first entry from the Request Q */ |
8a3173de | 2929 | removeQ(c); |
1da177e4 | 2930 | h->Qdepth--; |
7c832835 BH |
2931 | |
2932 | /* Tell the controller execute command */ | |
1da177e4 | 2933 | h->access.submit_command(h, c); |
7c832835 BH |
2934 | |
2935 | /* Put job onto the completed Q */ | |
8a3173de | 2936 | addQ(&h->cmpQ, c); |
1da177e4 LT |
2937 | } |
2938 | } | |
7c832835 | 2939 | |
f70dba83 | 2940 | /* Assumes that h->lock is held. */ |
1da177e4 LT |
2941 | /* Zeros out the error record and then resends the command back */ |
2942 | /* to the controller */ | |
7c832835 | 2943 | static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c) |
1da177e4 LT |
2944 | { |
2945 | /* erase the old error information */ | |
2946 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); | |
2947 | ||
2948 | /* add it to software queue and then send it to the controller */ | |
8a3173de | 2949 | addQ(&h->reqQ, c); |
1da177e4 | 2950 | h->Qdepth++; |
7c832835 | 2951 | if (h->Qdepth > h->maxQsinceinit) |
1da177e4 LT |
2952 | h->maxQsinceinit = h->Qdepth; |
2953 | ||
2954 | start_io(h); | |
2955 | } | |
a9925a06 | 2956 | |
1a614f50 SC |
2957 | static inline unsigned int make_status_bytes(unsigned int scsi_status_byte, |
2958 | unsigned int msg_byte, unsigned int host_byte, | |
2959 | unsigned int driver_byte) | |
2960 | { | |
2961 | /* inverse of macros in scsi.h */ | |
2962 | return (scsi_status_byte & 0xff) | | |
2963 | ((msg_byte & 0xff) << 8) | | |
2964 | ((host_byte & 0xff) << 16) | | |
2965 | ((driver_byte & 0xff) << 24); | |
2966 | } | |
2967 | ||
0a9279cc MM |
2968 | static inline int evaluate_target_status(ctlr_info_t *h, |
2969 | CommandList_struct *cmd, int *retry_cmd) | |
03bbfee5 MMOD |
2970 | { |
2971 | unsigned char sense_key; | |
1a614f50 SC |
2972 | unsigned char status_byte, msg_byte, host_byte, driver_byte; |
2973 | int error_value; | |
2974 | ||
0a9279cc | 2975 | *retry_cmd = 0; |
1a614f50 SC |
2976 | /* If we get in here, it means we got "target status", that is, scsi status */ |
2977 | status_byte = cmd->err_info->ScsiStatus; | |
2978 | driver_byte = DRIVER_OK; | |
2979 | msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */ | |
2980 | ||
33659ebb | 2981 | if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) |
1a614f50 SC |
2982 | host_byte = DID_PASSTHROUGH; |
2983 | else | |
2984 | host_byte = DID_OK; | |
2985 | ||
2986 | error_value = make_status_bytes(status_byte, msg_byte, | |
2987 | host_byte, driver_byte); | |
03bbfee5 | 2988 | |
1a614f50 | 2989 | if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) { |
33659ebb | 2990 | if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) |
b2a4a43d | 2991 | dev_warn(&h->pdev->dev, "cmd %p " |
03bbfee5 MMOD |
2992 | "has SCSI Status 0x%x\n", |
2993 | cmd, cmd->err_info->ScsiStatus); | |
1a614f50 | 2994 | return error_value; |
03bbfee5 MMOD |
2995 | } |
2996 | ||
2997 | /* check the sense key */ | |
2998 | sense_key = 0xf & cmd->err_info->SenseInfo[2]; | |
2999 | /* no status or recovered error */ | |
33659ebb CH |
3000 | if (((sense_key == 0x0) || (sense_key == 0x1)) && |
3001 | (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)) | |
1a614f50 | 3002 | error_value = 0; |
03bbfee5 | 3003 | |
0a9279cc | 3004 | if (check_for_unit_attention(h, cmd)) { |
33659ebb | 3005 | *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC); |
0a9279cc MM |
3006 | return 0; |
3007 | } | |
3008 | ||
33659ebb CH |
3009 | /* Not SG_IO or similar? */ |
3010 | if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) { | |
1a614f50 | 3011 | if (error_value != 0) |
b2a4a43d | 3012 | dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION" |
03bbfee5 | 3013 | " sense key = 0x%x\n", cmd, sense_key); |
1a614f50 | 3014 | return error_value; |
03bbfee5 MMOD |
3015 | } |
3016 | ||
3017 | /* SG_IO or similar, copy sense data back */ | |
3018 | if (cmd->rq->sense) { | |
3019 | if (cmd->rq->sense_len > cmd->err_info->SenseLen) | |
3020 | cmd->rq->sense_len = cmd->err_info->SenseLen; | |
3021 | memcpy(cmd->rq->sense, cmd->err_info->SenseInfo, | |
3022 | cmd->rq->sense_len); | |
3023 | } else | |
3024 | cmd->rq->sense_len = 0; | |
3025 | ||
1a614f50 | 3026 | return error_value; |
03bbfee5 MMOD |
3027 | } |
3028 | ||
7c832835 | 3029 | /* checks the status of the job and calls complete buffers to mark all |
a9925a06 JA |
3030 | * buffers for the completed job. Note that this function does not need |
3031 | * to hold the hba/queue lock. | |
7c832835 BH |
3032 | */ |
3033 | static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd, | |
3034 | int timeout) | |
1da177e4 | 3035 | { |
1da177e4 | 3036 | int retry_cmd = 0; |
198b7660 MMOD |
3037 | struct request *rq = cmd->rq; |
3038 | ||
3039 | rq->errors = 0; | |
7c832835 | 3040 | |
1da177e4 | 3041 | if (timeout) |
1a614f50 | 3042 | rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT); |
1da177e4 | 3043 | |
d38ae168 MMOD |
3044 | if (cmd->err_info->CommandStatus == 0) /* no error has occurred */ |
3045 | goto after_error_processing; | |
7c832835 | 3046 | |
d38ae168 | 3047 | switch (cmd->err_info->CommandStatus) { |
d38ae168 | 3048 | case CMD_TARGET_STATUS: |
0a9279cc | 3049 | rq->errors = evaluate_target_status(h, cmd, &retry_cmd); |
d38ae168 MMOD |
3050 | break; |
3051 | case CMD_DATA_UNDERRUN: | |
33659ebb | 3052 | if (cmd->rq->cmd_type == REQ_TYPE_FS) { |
b2a4a43d | 3053 | dev_warn(&h->pdev->dev, "cmd %p has" |
03bbfee5 MMOD |
3054 | " completed with data underrun " |
3055 | "reported\n", cmd); | |
c3a4d78c | 3056 | cmd->rq->resid_len = cmd->err_info->ResidualCnt; |
03bbfee5 | 3057 | } |
d38ae168 MMOD |
3058 | break; |
3059 | case CMD_DATA_OVERRUN: | |
33659ebb | 3060 | if (cmd->rq->cmd_type == REQ_TYPE_FS) |
b2a4a43d | 3061 | dev_warn(&h->pdev->dev, "cciss: cmd %p has" |
03bbfee5 MMOD |
3062 | " completed with data overrun " |
3063 | "reported\n", cmd); | |
d38ae168 MMOD |
3064 | break; |
3065 | case CMD_INVALID: | |
b2a4a43d | 3066 | dev_warn(&h->pdev->dev, "cciss: cmd %p is " |
d38ae168 | 3067 | "reported invalid\n", cmd); |
1a614f50 SC |
3068 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3069 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3070 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3071 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3072 | break; |
3073 | case CMD_PROTOCOL_ERR: | |
b2a4a43d SC |
3074 | dev_warn(&h->pdev->dev, "cciss: cmd %p has " |
3075 | "protocol error\n", cmd); | |
1a614f50 SC |
3076 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3077 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3078 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3079 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3080 | break; |
3081 | case CMD_HARDWARE_ERR: | |
b2a4a43d | 3082 | dev_warn(&h->pdev->dev, "cciss: cmd %p had " |
d38ae168 | 3083 | " hardware error\n", cmd); |
1a614f50 SC |
3084 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3085 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3086 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3087 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3088 | break; |
3089 | case CMD_CONNECTION_LOST: | |
b2a4a43d | 3090 | dev_warn(&h->pdev->dev, "cciss: cmd %p had " |
d38ae168 | 3091 | "connection lost\n", cmd); |
1a614f50 SC |
3092 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3093 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3094 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3095 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3096 | break; |
3097 | case CMD_ABORTED: | |
b2a4a43d | 3098 | dev_warn(&h->pdev->dev, "cciss: cmd %p was " |
d38ae168 | 3099 | "aborted\n", cmd); |
1a614f50 SC |
3100 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3101 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3102 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3103 | DID_PASSTHROUGH : DID_ABORT); | |
d38ae168 MMOD |
3104 | break; |
3105 | case CMD_ABORT_FAILED: | |
b2a4a43d | 3106 | dev_warn(&h->pdev->dev, "cciss: cmd %p reports " |
d38ae168 | 3107 | "abort failed\n", cmd); |
1a614f50 SC |
3108 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3109 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3110 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3111 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3112 | break; |
3113 | case CMD_UNSOLICITED_ABORT: | |
b2a4a43d | 3114 | dev_warn(&h->pdev->dev, "cciss%d: unsolicited " |
d38ae168 MMOD |
3115 | "abort %p\n", h->ctlr, cmd); |
3116 | if (cmd->retry_count < MAX_CMD_RETRIES) { | |
3117 | retry_cmd = 1; | |
b2a4a43d | 3118 | dev_warn(&h->pdev->dev, "retrying %p\n", cmd); |
d38ae168 MMOD |
3119 | cmd->retry_count++; |
3120 | } else | |
b2a4a43d SC |
3121 | dev_warn(&h->pdev->dev, |
3122 | "%p retried too many times\n", cmd); | |
1a614f50 SC |
3123 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3124 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3125 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3126 | DID_PASSTHROUGH : DID_ABORT); | |
d38ae168 MMOD |
3127 | break; |
3128 | case CMD_TIMEOUT: | |
b2a4a43d | 3129 | dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd); |
1a614f50 SC |
3130 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3131 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3132 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3133 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3134 | break; |
3135 | default: | |
b2a4a43d | 3136 | dev_warn(&h->pdev->dev, "cmd %p returned " |
d38ae168 MMOD |
3137 | "unknown status %x\n", cmd, |
3138 | cmd->err_info->CommandStatus); | |
1a614f50 SC |
3139 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3140 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3141 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3142 | DID_PASSTHROUGH : DID_ERROR); | |
1da177e4 | 3143 | } |
d38ae168 MMOD |
3144 | |
3145 | after_error_processing: | |
3146 | ||
1da177e4 | 3147 | /* We need to return this command */ |
7c832835 BH |
3148 | if (retry_cmd) { |
3149 | resend_cciss_cmd(h, cmd); | |
1da177e4 | 3150 | return; |
7c832835 | 3151 | } |
03bbfee5 | 3152 | cmd->rq->completion_data = cmd; |
a9925a06 | 3153 | blk_complete_request(cmd->rq); |
1da177e4 LT |
3154 | } |
3155 | ||
0c2b3908 MM |
3156 | static inline u32 cciss_tag_contains_index(u32 tag) |
3157 | { | |
5e216153 | 3158 | #define DIRECT_LOOKUP_BIT 0x10 |
0c2b3908 MM |
3159 | return tag & DIRECT_LOOKUP_BIT; |
3160 | } | |
3161 | ||
3162 | static inline u32 cciss_tag_to_index(u32 tag) | |
3163 | { | |
5e216153 | 3164 | #define DIRECT_LOOKUP_SHIFT 5 |
0c2b3908 MM |
3165 | return tag >> DIRECT_LOOKUP_SHIFT; |
3166 | } | |
3167 | ||
3168 | static inline u32 cciss_tag_discard_error_bits(u32 tag) | |
3169 | { | |
3170 | #define CCISS_ERROR_BITS 0x03 | |
3171 | return tag & ~CCISS_ERROR_BITS; | |
3172 | } | |
3173 | ||
3174 | static inline void cciss_mark_tag_indexed(u32 *tag) | |
3175 | { | |
3176 | *tag |= DIRECT_LOOKUP_BIT; | |
3177 | } | |
3178 | ||
3179 | static inline void cciss_set_tag_index(u32 *tag, u32 index) | |
3180 | { | |
3181 | *tag |= (index << DIRECT_LOOKUP_SHIFT); | |
3182 | } | |
3183 | ||
7c832835 BH |
3184 | /* |
3185 | * Get a request and submit it to the controller. | |
1da177e4 | 3186 | */ |
165125e1 | 3187 | static void do_cciss_request(struct request_queue *q) |
1da177e4 | 3188 | { |
7c832835 | 3189 | ctlr_info_t *h = q->queuedata; |
1da177e4 | 3190 | CommandList_struct *c; |
00988a35 MMOD |
3191 | sector_t start_blk; |
3192 | int seg; | |
1da177e4 LT |
3193 | struct request *creq; |
3194 | u64bit temp64; | |
5c07a311 DB |
3195 | struct scatterlist *tmp_sg; |
3196 | SGDescriptor_struct *curr_sg; | |
1da177e4 LT |
3197 | drive_info_struct *drv; |
3198 | int i, dir; | |
5c07a311 DB |
3199 | int sg_index = 0; |
3200 | int chained = 0; | |
1da177e4 LT |
3201 | |
3202 | /* We call start_io here in case there is a command waiting on the | |
3203 | * queue that has not been sent. | |
7c832835 | 3204 | */ |
1da177e4 LT |
3205 | if (blk_queue_plugged(q)) |
3206 | goto startio; | |
3207 | ||
7c832835 | 3208 | queue: |
9934c8c0 | 3209 | creq = blk_peek_request(q); |
1da177e4 LT |
3210 | if (!creq) |
3211 | goto startio; | |
3212 | ||
5c07a311 | 3213 | BUG_ON(creq->nr_phys_segments > h->maxsgentries); |
1da177e4 | 3214 | |
6b4d96b8 SC |
3215 | c = cmd_alloc(h); |
3216 | if (!c) | |
1da177e4 LT |
3217 | goto full; |
3218 | ||
9934c8c0 | 3219 | blk_start_request(creq); |
1da177e4 | 3220 | |
5c07a311 | 3221 | tmp_sg = h->scatter_list[c->cmdindex]; |
1da177e4 LT |
3222 | spin_unlock_irq(q->queue_lock); |
3223 | ||
3224 | c->cmd_type = CMD_RWREQ; | |
3225 | c->rq = creq; | |
7c832835 BH |
3226 | |
3227 | /* fill in the request */ | |
1da177e4 | 3228 | drv = creq->rq_disk->private_data; |
b028461d | 3229 | c->Header.ReplyQueue = 0; /* unused in simple mode */ |
33079b21 MM |
3230 | /* got command from pool, so use the command block index instead */ |
3231 | /* for direct lookups. */ | |
3232 | /* The first 2 bits are reserved for controller error reporting. */ | |
0c2b3908 MM |
3233 | cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex); |
3234 | cciss_mark_tag_indexed(&c->Header.Tag.lower); | |
39ccf9a6 | 3235 | memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID)); |
b028461d | 3236 | c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */ |
3237 | c->Request.Type.Type = TYPE_CMD; /* It is a command. */ | |
7c832835 BH |
3238 | c->Request.Type.Attribute = ATTR_SIMPLE; |
3239 | c->Request.Type.Direction = | |
a52de245 | 3240 | (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE; |
b028461d | 3241 | c->Request.Timeout = 0; /* Don't time out */ |
7c832835 | 3242 | c->Request.CDB[0] = |
00988a35 | 3243 | (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write; |
83096ebf | 3244 | start_blk = blk_rq_pos(creq); |
b2a4a43d | 3245 | dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n", |
83096ebf | 3246 | (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq)); |
5c07a311 | 3247 | sg_init_table(tmp_sg, h->maxsgentries); |
1da177e4 LT |
3248 | seg = blk_rq_map_sg(q, creq, tmp_sg); |
3249 | ||
7c832835 | 3250 | /* get the DMA records for the setup */ |
1da177e4 LT |
3251 | if (c->Request.Type.Direction == XFER_READ) |
3252 | dir = PCI_DMA_FROMDEVICE; | |
3253 | else | |
3254 | dir = PCI_DMA_TODEVICE; | |
3255 | ||
5c07a311 DB |
3256 | curr_sg = c->SG; |
3257 | sg_index = 0; | |
3258 | chained = 0; | |
3259 | ||
7c832835 | 3260 | for (i = 0; i < seg; i++) { |
5c07a311 DB |
3261 | if (((sg_index+1) == (h->max_cmd_sgentries)) && |
3262 | !chained && ((seg - i) > 1)) { | |
5c07a311 | 3263 | /* Point to next chain block. */ |
dccc9b56 | 3264 | curr_sg = h->cmd_sg_list[c->cmdindex]; |
5c07a311 DB |
3265 | sg_index = 0; |
3266 | chained = 1; | |
3267 | } | |
3268 | curr_sg[sg_index].Len = tmp_sg[i].length; | |
45711f1a | 3269 | temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]), |
5c07a311 DB |
3270 | tmp_sg[i].offset, |
3271 | tmp_sg[i].length, dir); | |
3272 | curr_sg[sg_index].Addr.lower = temp64.val32.lower; | |
3273 | curr_sg[sg_index].Addr.upper = temp64.val32.upper; | |
3274 | curr_sg[sg_index].Ext = 0; /* we are not chaining */ | |
5c07a311 | 3275 | ++sg_index; |
1da177e4 | 3276 | } |
d45033ef SC |
3277 | if (chained) |
3278 | cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex], | |
3279 | (seg - (h->max_cmd_sgentries - 1)) * | |
3280 | sizeof(SGDescriptor_struct)); | |
5c07a311 | 3281 | |
7c832835 BH |
3282 | /* track how many SG entries we are using */ |
3283 | if (seg > h->maxSG) | |
3284 | h->maxSG = seg; | |
1da177e4 | 3285 | |
b2a4a43d | 3286 | dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments " |
5c07a311 DB |
3287 | "chained[%d]\n", |
3288 | blk_rq_sectors(creq), seg, chained); | |
1da177e4 | 3289 | |
5e216153 MM |
3290 | c->Header.SGTotal = seg + chained; |
3291 | if (seg <= h->max_cmd_sgentries) | |
3292 | c->Header.SGList = c->Header.SGTotal; | |
3293 | else | |
5c07a311 | 3294 | c->Header.SGList = h->max_cmd_sgentries; |
5e216153 | 3295 | set_performant_mode(h, c); |
5c07a311 | 3296 | |
33659ebb | 3297 | if (likely(creq->cmd_type == REQ_TYPE_FS)) { |
03bbfee5 MMOD |
3298 | if(h->cciss_read == CCISS_READ_10) { |
3299 | c->Request.CDB[1] = 0; | |
b028461d | 3300 | c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */ |
03bbfee5 MMOD |
3301 | c->Request.CDB[3] = (start_blk >> 16) & 0xff; |
3302 | c->Request.CDB[4] = (start_blk >> 8) & 0xff; | |
3303 | c->Request.CDB[5] = start_blk & 0xff; | |
b028461d | 3304 | c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */ |
83096ebf TH |
3305 | c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff; |
3306 | c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff; | |
03bbfee5 MMOD |
3307 | c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0; |
3308 | } else { | |
582539e5 RD |
3309 | u32 upper32 = upper_32_bits(start_blk); |
3310 | ||
03bbfee5 MMOD |
3311 | c->Request.CDBLen = 16; |
3312 | c->Request.CDB[1]= 0; | |
b028461d | 3313 | c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */ |
582539e5 RD |
3314 | c->Request.CDB[3]= (upper32 >> 16) & 0xff; |
3315 | c->Request.CDB[4]= (upper32 >> 8) & 0xff; | |
3316 | c->Request.CDB[5]= upper32 & 0xff; | |
03bbfee5 MMOD |
3317 | c->Request.CDB[6]= (start_blk >> 24) & 0xff; |
3318 | c->Request.CDB[7]= (start_blk >> 16) & 0xff; | |
3319 | c->Request.CDB[8]= (start_blk >> 8) & 0xff; | |
3320 | c->Request.CDB[9]= start_blk & 0xff; | |
83096ebf TH |
3321 | c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff; |
3322 | c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff; | |
3323 | c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff; | |
3324 | c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff; | |
03bbfee5 MMOD |
3325 | c->Request.CDB[14] = c->Request.CDB[15] = 0; |
3326 | } | |
33659ebb | 3327 | } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) { |
03bbfee5 MMOD |
3328 | c->Request.CDBLen = creq->cmd_len; |
3329 | memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB); | |
00988a35 | 3330 | } else { |
b2a4a43d SC |
3331 | dev_warn(&h->pdev->dev, "bad request type %d\n", |
3332 | creq->cmd_type); | |
03bbfee5 | 3333 | BUG(); |
00988a35 | 3334 | } |
1da177e4 LT |
3335 | |
3336 | spin_lock_irq(q->queue_lock); | |
3337 | ||
8a3173de | 3338 | addQ(&h->reqQ, c); |
1da177e4 | 3339 | h->Qdepth++; |
7c832835 BH |
3340 | if (h->Qdepth > h->maxQsinceinit) |
3341 | h->maxQsinceinit = h->Qdepth; | |
1da177e4 LT |
3342 | |
3343 | goto queue; | |
00988a35 | 3344 | full: |
1da177e4 | 3345 | blk_stop_queue(q); |
00988a35 | 3346 | startio: |
1da177e4 LT |
3347 | /* We will already have the driver lock here so not need |
3348 | * to lock it. | |
7c832835 | 3349 | */ |
1da177e4 LT |
3350 | start_io(h); |
3351 | } | |
3352 | ||
3da8b713 | 3353 | static inline unsigned long get_next_completion(ctlr_info_t *h) |
3354 | { | |
3da8b713 | 3355 | return h->access.command_completed(h); |
3da8b713 | 3356 | } |
3357 | ||
3358 | static inline int interrupt_pending(ctlr_info_t *h) | |
3359 | { | |
3da8b713 | 3360 | return h->access.intr_pending(h); |
3da8b713 | 3361 | } |
3362 | ||
3363 | static inline long interrupt_not_for_us(ctlr_info_t *h) | |
3364 | { | |
81125860 | 3365 | return ((h->access.intr_pending(h) == 0) || |
2cf3af1c | 3366 | (h->interrupts_enabled == 0)); |
3da8b713 | 3367 | } |
3368 | ||
0c2b3908 MM |
3369 | static inline int bad_tag(ctlr_info_t *h, u32 tag_index, |
3370 | u32 raw_tag) | |
1da177e4 | 3371 | { |
0c2b3908 MM |
3372 | if (unlikely(tag_index >= h->nr_cmds)) { |
3373 | dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); | |
3374 | return 1; | |
3375 | } | |
3376 | return 0; | |
3377 | } | |
3378 | ||
3379 | static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c, | |
3380 | u32 raw_tag) | |
3381 | { | |
3382 | removeQ(c); | |
3383 | if (likely(c->cmd_type == CMD_RWREQ)) | |
3384 | complete_command(h, c, 0); | |
3385 | else if (c->cmd_type == CMD_IOCTL_PEND) | |
3386 | complete(c->waiting); | |
3387 | #ifdef CONFIG_CISS_SCSI_TAPE | |
3388 | else if (c->cmd_type == CMD_SCSI) | |
3389 | complete_scsi_command(c, 0, raw_tag); | |
3390 | #endif | |
3391 | } | |
3392 | ||
29979a71 MM |
3393 | static inline u32 next_command(ctlr_info_t *h) |
3394 | { | |
3395 | u32 a; | |
3396 | ||
3397 | if (unlikely(h->transMethod != CFGTBL_Trans_Performant)) | |
3398 | return h->access.command_completed(h); | |
3399 | ||
3400 | if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { | |
3401 | a = *(h->reply_pool_head); /* Next cmd in ring buffer */ | |
3402 | (h->reply_pool_head)++; | |
3403 | h->commands_outstanding--; | |
3404 | } else { | |
3405 | a = FIFO_EMPTY; | |
3406 | } | |
3407 | /* Check for wraparound */ | |
3408 | if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { | |
3409 | h->reply_pool_head = h->reply_pool; | |
3410 | h->reply_pool_wraparound ^= 1; | |
3411 | } | |
3412 | return a; | |
3413 | } | |
3414 | ||
0c2b3908 MM |
3415 | /* process completion of an indexed ("direct lookup") command */ |
3416 | static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag) | |
3417 | { | |
3418 | u32 tag_index; | |
1da177e4 | 3419 | CommandList_struct *c; |
0c2b3908 MM |
3420 | |
3421 | tag_index = cciss_tag_to_index(raw_tag); | |
3422 | if (bad_tag(h, tag_index, raw_tag)) | |
5e216153 | 3423 | return next_command(h); |
0c2b3908 MM |
3424 | c = h->cmd_pool + tag_index; |
3425 | finish_cmd(h, c, raw_tag); | |
5e216153 | 3426 | return next_command(h); |
0c2b3908 MM |
3427 | } |
3428 | ||
3429 | /* process completion of a non-indexed command */ | |
3430 | static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag) | |
3431 | { | |
3432 | u32 tag; | |
3433 | CommandList_struct *c = NULL; | |
3434 | struct hlist_node *tmp; | |
3435 | __u32 busaddr_masked, tag_masked; | |
3436 | ||
3437 | tag = cciss_tag_discard_error_bits(raw_tag); | |
3438 | hlist_for_each_entry(c, tmp, &h->cmpQ, list) { | |
3439 | busaddr_masked = cciss_tag_discard_error_bits(c->busaddr); | |
3440 | tag_masked = cciss_tag_discard_error_bits(tag); | |
3441 | if (busaddr_masked == tag_masked) { | |
3442 | finish_cmd(h, c, raw_tag); | |
5e216153 | 3443 | return next_command(h); |
0c2b3908 MM |
3444 | } |
3445 | } | |
3446 | bad_tag(h, h->nr_cmds + 1, raw_tag); | |
5e216153 | 3447 | return next_command(h); |
0c2b3908 MM |
3448 | } |
3449 | ||
3450 | static irqreturn_t do_cciss_intx(int irq, void *dev_id) | |
3451 | { | |
3452 | ctlr_info_t *h = dev_id; | |
1da177e4 | 3453 | unsigned long flags; |
0c2b3908 | 3454 | u32 raw_tag; |
1da177e4 | 3455 | |
3da8b713 | 3456 | if (interrupt_not_for_us(h)) |
1da177e4 | 3457 | return IRQ_NONE; |
f70dba83 | 3458 | spin_lock_irqsave(&h->lock, flags); |
3da8b713 | 3459 | while (interrupt_pending(h)) { |
0c2b3908 MM |
3460 | raw_tag = get_next_completion(h); |
3461 | while (raw_tag != FIFO_EMPTY) { | |
3462 | if (cciss_tag_contains_index(raw_tag)) | |
3463 | raw_tag = process_indexed_cmd(h, raw_tag); | |
3464 | else | |
3465 | raw_tag = process_nonindexed_cmd(h, raw_tag); | |
1da177e4 LT |
3466 | } |
3467 | } | |
f70dba83 | 3468 | spin_unlock_irqrestore(&h->lock, flags); |
0c2b3908 MM |
3469 | return IRQ_HANDLED; |
3470 | } | |
1da177e4 | 3471 | |
0c2b3908 MM |
3472 | /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never |
3473 | * check the interrupt pending register because it is not set. | |
3474 | */ | |
3475 | static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id) | |
3476 | { | |
3477 | ctlr_info_t *h = dev_id; | |
3478 | unsigned long flags; | |
3479 | u32 raw_tag; | |
8a3173de | 3480 | |
f70dba83 | 3481 | spin_lock_irqsave(&h->lock, flags); |
0c2b3908 MM |
3482 | raw_tag = get_next_completion(h); |
3483 | while (raw_tag != FIFO_EMPTY) { | |
3484 | if (cciss_tag_contains_index(raw_tag)) | |
3485 | raw_tag = process_indexed_cmd(h, raw_tag); | |
3486 | else | |
3487 | raw_tag = process_nonindexed_cmd(h, raw_tag); | |
1da177e4 | 3488 | } |
f70dba83 | 3489 | spin_unlock_irqrestore(&h->lock, flags); |
1da177e4 LT |
3490 | return IRQ_HANDLED; |
3491 | } | |
7c832835 | 3492 | |
b368c9dd AP |
3493 | /** |
3494 | * add_to_scan_list() - add controller to rescan queue | |
3495 | * @h: Pointer to the controller. | |
3496 | * | |
3497 | * Adds the controller to the rescan queue if not already on the queue. | |
3498 | * | |
3499 | * returns 1 if added to the queue, 0 if skipped (could be on the | |
3500 | * queue already, or the controller could be initializing or shutting | |
3501 | * down). | |
3502 | **/ | |
3503 | static int add_to_scan_list(struct ctlr_info *h) | |
3504 | { | |
3505 | struct ctlr_info *test_h; | |
3506 | int found = 0; | |
3507 | int ret = 0; | |
3508 | ||
3509 | if (h->busy_initializing) | |
3510 | return 0; | |
3511 | ||
3512 | if (!mutex_trylock(&h->busy_shutting_down)) | |
3513 | return 0; | |
3514 | ||
3515 | mutex_lock(&scan_mutex); | |
3516 | list_for_each_entry(test_h, &scan_q, scan_list) { | |
3517 | if (test_h == h) { | |
3518 | found = 1; | |
3519 | break; | |
3520 | } | |
3521 | } | |
3522 | if (!found && !h->busy_scanning) { | |
3523 | INIT_COMPLETION(h->scan_wait); | |
3524 | list_add_tail(&h->scan_list, &scan_q); | |
3525 | ret = 1; | |
3526 | } | |
3527 | mutex_unlock(&scan_mutex); | |
3528 | mutex_unlock(&h->busy_shutting_down); | |
3529 | ||
3530 | return ret; | |
3531 | } | |
3532 | ||
3533 | /** | |
3534 | * remove_from_scan_list() - remove controller from rescan queue | |
3535 | * @h: Pointer to the controller. | |
3536 | * | |
3537 | * Removes the controller from the rescan queue if present. Blocks if | |
fd8489cf SC |
3538 | * the controller is currently conducting a rescan. The controller |
3539 | * can be in one of three states: | |
3540 | * 1. Doesn't need a scan | |
3541 | * 2. On the scan list, but not scanning yet (we remove it) | |
3542 | * 3. Busy scanning (and not on the list). In this case we want to wait for | |
3543 | * the scan to complete to make sure the scanning thread for this | |
3544 | * controller is completely idle. | |
b368c9dd AP |
3545 | **/ |
3546 | static void remove_from_scan_list(struct ctlr_info *h) | |
3547 | { | |
3548 | struct ctlr_info *test_h, *tmp_h; | |
b368c9dd AP |
3549 | |
3550 | mutex_lock(&scan_mutex); | |
3551 | list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) { | |
fd8489cf | 3552 | if (test_h == h) { /* state 2. */ |
b368c9dd AP |
3553 | list_del(&h->scan_list); |
3554 | complete_all(&h->scan_wait); | |
3555 | mutex_unlock(&scan_mutex); | |
3556 | return; | |
3557 | } | |
3558 | } | |
fd8489cf SC |
3559 | if (h->busy_scanning) { /* state 3. */ |
3560 | mutex_unlock(&scan_mutex); | |
b368c9dd | 3561 | wait_for_completion(&h->scan_wait); |
fd8489cf SC |
3562 | } else { /* state 1, nothing to do. */ |
3563 | mutex_unlock(&scan_mutex); | |
3564 | } | |
b368c9dd AP |
3565 | } |
3566 | ||
3567 | /** | |
3568 | * scan_thread() - kernel thread used to rescan controllers | |
3569 | * @data: Ignored. | |
3570 | * | |
3571 | * A kernel thread used scan for drive topology changes on | |
3572 | * controllers. The thread processes only one controller at a time | |
3573 | * using a queue. Controllers are added to the queue using | |
3574 | * add_to_scan_list() and removed from the queue either after done | |
3575 | * processing or using remove_from_scan_list(). | |
3576 | * | |
3577 | * returns 0. | |
3578 | **/ | |
0a9279cc MM |
3579 | static int scan_thread(void *data) |
3580 | { | |
b368c9dd | 3581 | struct ctlr_info *h; |
0a9279cc | 3582 | |
b368c9dd AP |
3583 | while (1) { |
3584 | set_current_state(TASK_INTERRUPTIBLE); | |
3585 | schedule(); | |
0a9279cc MM |
3586 | if (kthread_should_stop()) |
3587 | break; | |
b368c9dd AP |
3588 | |
3589 | while (1) { | |
3590 | mutex_lock(&scan_mutex); | |
3591 | if (list_empty(&scan_q)) { | |
3592 | mutex_unlock(&scan_mutex); | |
3593 | break; | |
3594 | } | |
3595 | ||
3596 | h = list_entry(scan_q.next, | |
3597 | struct ctlr_info, | |
3598 | scan_list); | |
3599 | list_del(&h->scan_list); | |
3600 | h->busy_scanning = 1; | |
3601 | mutex_unlock(&scan_mutex); | |
3602 | ||
d06dfbd2 SC |
3603 | rebuild_lun_table(h, 0, 0); |
3604 | complete_all(&h->scan_wait); | |
3605 | mutex_lock(&scan_mutex); | |
3606 | h->busy_scanning = 0; | |
3607 | mutex_unlock(&scan_mutex); | |
b368c9dd | 3608 | } |
0a9279cc | 3609 | } |
b368c9dd | 3610 | |
0a9279cc MM |
3611 | return 0; |
3612 | } | |
3613 | ||
3614 | static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c) | |
3615 | { | |
3616 | if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) | |
3617 | return 0; | |
3618 | ||
3619 | switch (c->err_info->SenseInfo[12]) { | |
3620 | case STATE_CHANGED: | |
b2a4a43d SC |
3621 | dev_warn(&h->pdev->dev, "a state change " |
3622 | "detected, command retried\n"); | |
0a9279cc MM |
3623 | return 1; |
3624 | break; | |
3625 | case LUN_FAILED: | |
b2a4a43d SC |
3626 | dev_warn(&h->pdev->dev, "LUN failure " |
3627 | "detected, action required\n"); | |
0a9279cc MM |
3628 | return 1; |
3629 | break; | |
3630 | case REPORT_LUNS_CHANGED: | |
b2a4a43d | 3631 | dev_warn(&h->pdev->dev, "report LUN data changed\n"); |
da002184 SC |
3632 | /* |
3633 | * Here, we could call add_to_scan_list and wake up the scan thread, | |
3634 | * except that it's quite likely that we will get more than one | |
3635 | * REPORT_LUNS_CHANGED condition in quick succession, which means | |
3636 | * that those which occur after the first one will likely happen | |
3637 | * *during* the scan_thread's rescan. And the rescan code is not | |
3638 | * robust enough to restart in the middle, undoing what it has already | |
3639 | * done, and it's not clear that it's even possible to do this, since | |
3640 | * part of what it does is notify the block layer, which starts | |
3641 | * doing it's own i/o to read partition tables and so on, and the | |
3642 | * driver doesn't have visibility to know what might need undoing. | |
3643 | * In any event, if possible, it is horribly complicated to get right | |
3644 | * so we just don't do it for now. | |
3645 | * | |
3646 | * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012. | |
3647 | */ | |
0a9279cc MM |
3648 | return 1; |
3649 | break; | |
3650 | case POWER_OR_RESET: | |
b2a4a43d SC |
3651 | dev_warn(&h->pdev->dev, |
3652 | "a power on or device reset detected\n"); | |
0a9279cc MM |
3653 | return 1; |
3654 | break; | |
3655 | case UNIT_ATTENTION_CLEARED: | |
b2a4a43d SC |
3656 | dev_warn(&h->pdev->dev, |
3657 | "unit attention cleared by another initiator\n"); | |
0a9279cc MM |
3658 | return 1; |
3659 | break; | |
3660 | default: | |
b2a4a43d SC |
3661 | dev_warn(&h->pdev->dev, "unknown unit attention detected\n"); |
3662 | return 1; | |
0a9279cc MM |
3663 | } |
3664 | } | |
3665 | ||
7c832835 | 3666 | /* |
d14c4ab5 | 3667 | * We cannot read the structure directly, for portability we must use |
1da177e4 | 3668 | * the io functions. |
7c832835 | 3669 | * This is for debug only. |
1da177e4 | 3670 | */ |
b2a4a43d | 3671 | static void print_cfg_table(ctlr_info_t *h) |
1da177e4 LT |
3672 | { |
3673 | int i; | |
3674 | char temp_name[17]; | |
b2a4a43d | 3675 | CfgTable_struct *tb = h->cfgtable; |
1da177e4 | 3676 | |
b2a4a43d SC |
3677 | dev_dbg(&h->pdev->dev, "Controller Configuration information\n"); |
3678 | dev_dbg(&h->pdev->dev, "------------------------------------\n"); | |
7c832835 | 3679 | for (i = 0; i < 4; i++) |
1da177e4 | 3680 | temp_name[i] = readb(&(tb->Signature[i])); |
7c832835 | 3681 | temp_name[4] = '\0'; |
b2a4a43d SC |
3682 | dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name); |
3683 | dev_dbg(&h->pdev->dev, " Spec Number = %d\n", | |
3684 | readl(&(tb->SpecValence))); | |
3685 | dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n", | |
7c832835 | 3686 | readl(&(tb->TransportSupport))); |
b2a4a43d | 3687 | dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n", |
7c832835 | 3688 | readl(&(tb->TransportActive))); |
b2a4a43d | 3689 | dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n", |
7c832835 | 3690 | readl(&(tb->HostWrite.TransportRequest))); |
b2a4a43d | 3691 | dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n", |
7c832835 | 3692 | readl(&(tb->HostWrite.CoalIntDelay))); |
b2a4a43d | 3693 | dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n", |
7c832835 | 3694 | readl(&(tb->HostWrite.CoalIntCount))); |
b2a4a43d | 3695 | dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n", |
7c832835 | 3696 | readl(&(tb->CmdsOutMax))); |
b2a4a43d SC |
3697 | dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n", |
3698 | readl(&(tb->BusTypes))); | |
7c832835 | 3699 | for (i = 0; i < 16; i++) |
1da177e4 LT |
3700 | temp_name[i] = readb(&(tb->ServerName[i])); |
3701 | temp_name[16] = '\0'; | |
b2a4a43d SC |
3702 | dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name); |
3703 | dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n", | |
3704 | readl(&(tb->HeartBeat))); | |
1da177e4 | 3705 | } |
1da177e4 | 3706 | |
7c832835 | 3707 | static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) |
1da177e4 LT |
3708 | { |
3709 | int i, offset, mem_type, bar_type; | |
7c832835 | 3710 | if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ |
1da177e4 LT |
3711 | return 0; |
3712 | offset = 0; | |
7c832835 BH |
3713 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { |
3714 | bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; | |
1da177e4 LT |
3715 | if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) |
3716 | offset += 4; | |
3717 | else { | |
3718 | mem_type = pci_resource_flags(pdev, i) & | |
7c832835 | 3719 | PCI_BASE_ADDRESS_MEM_TYPE_MASK; |
1da177e4 | 3720 | switch (mem_type) { |
7c832835 BH |
3721 | case PCI_BASE_ADDRESS_MEM_TYPE_32: |
3722 | case PCI_BASE_ADDRESS_MEM_TYPE_1M: | |
3723 | offset += 4; /* 32 bit */ | |
3724 | break; | |
3725 | case PCI_BASE_ADDRESS_MEM_TYPE_64: | |
3726 | offset += 8; | |
3727 | break; | |
3728 | default: /* reserved in PCI 2.2 */ | |
b2a4a43d | 3729 | dev_warn(&pdev->dev, |
7c832835 BH |
3730 | "Base address is invalid\n"); |
3731 | return -1; | |
1da177e4 LT |
3732 | break; |
3733 | } | |
3734 | } | |
7c832835 BH |
3735 | if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) |
3736 | return i + 1; | |
1da177e4 LT |
3737 | } |
3738 | return -1; | |
3739 | } | |
3740 | ||
5e216153 MM |
3741 | /* Fill in bucket_map[], given nsgs (the max number of |
3742 | * scatter gather elements supported) and bucket[], | |
3743 | * which is an array of 8 integers. The bucket[] array | |
3744 | * contains 8 different DMA transfer sizes (in 16 | |
3745 | * byte increments) which the controller uses to fetch | |
3746 | * commands. This function fills in bucket_map[], which | |
3747 | * maps a given number of scatter gather elements to one of | |
3748 | * the 8 DMA transfer sizes. The point of it is to allow the | |
3749 | * controller to only do as much DMA as needed to fetch the | |
3750 | * command, with the DMA transfer size encoded in the lower | |
3751 | * bits of the command address. | |
3752 | */ | |
3753 | static void calc_bucket_map(int bucket[], int num_buckets, | |
3754 | int nsgs, int *bucket_map) | |
3755 | { | |
3756 | int i, j, b, size; | |
3757 | ||
3758 | /* even a command with 0 SGs requires 4 blocks */ | |
3759 | #define MINIMUM_TRANSFER_BLOCKS 4 | |
3760 | #define NUM_BUCKETS 8 | |
3761 | /* Note, bucket_map must have nsgs+1 entries. */ | |
3762 | for (i = 0; i <= nsgs; i++) { | |
3763 | /* Compute size of a command with i SG entries */ | |
3764 | size = i + MINIMUM_TRANSFER_BLOCKS; | |
3765 | b = num_buckets; /* Assume the biggest bucket */ | |
3766 | /* Find the bucket that is just big enough */ | |
3767 | for (j = 0; j < 8; j++) { | |
3768 | if (bucket[j] >= size) { | |
3769 | b = j; | |
3770 | break; | |
3771 | } | |
3772 | } | |
3773 | /* for a command with i SG entries, use bucket b. */ | |
3774 | bucket_map[i] = b; | |
3775 | } | |
3776 | } | |
3777 | ||
0f8a6a1e SC |
3778 | static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h) |
3779 | { | |
3780 | int i; | |
3781 | ||
3782 | /* under certain very rare conditions, this can take awhile. | |
3783 | * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right | |
3784 | * as we enter this code.) */ | |
3785 | for (i = 0; i < MAX_CONFIG_WAIT; i++) { | |
3786 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | |
3787 | break; | |
3788 | msleep(10); | |
3789 | } | |
3790 | } | |
3791 | ||
b9933135 SC |
3792 | static __devinit void cciss_enter_performant_mode(ctlr_info_t *h) |
3793 | { | |
3794 | /* This is a bit complicated. There are 8 registers on | |
3795 | * the controller which we write to to tell it 8 different | |
3796 | * sizes of commands which there may be. It's a way of | |
3797 | * reducing the DMA done to fetch each command. Encoded into | |
3798 | * each command's tag are 3 bits which communicate to the controller | |
3799 | * which of the eight sizes that command fits within. The size of | |
3800 | * each command depends on how many scatter gather entries there are. | |
3801 | * Each SG entry requires 16 bytes. The eight registers are programmed | |
3802 | * with the number of 16-byte blocks a command of that size requires. | |
3803 | * The smallest command possible requires 5 such 16 byte blocks. | |
3804 | * the largest command possible requires MAXSGENTRIES + 4 16-byte | |
3805 | * blocks. Note, this only extends to the SG entries contained | |
3806 | * within the command block, and does not extend to chained blocks | |
3807 | * of SG elements. bft[] contains the eight values we write to | |
3808 | * the registers. They are not evenly distributed, but have more | |
3809 | * sizes for small commands, and fewer sizes for larger commands. | |
3810 | */ | |
5e216153 | 3811 | __u32 trans_offset; |
b9933135 | 3812 | int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4}; |
5e216153 MM |
3813 | /* |
3814 | * 5 = 1 s/g entry or 4k | |
3815 | * 6 = 2 s/g entry or 8k | |
3816 | * 8 = 4 s/g entry or 16k | |
3817 | * 10 = 6 s/g entry or 24k | |
3818 | */ | |
5e216153 | 3819 | unsigned long register_value; |
5e216153 MM |
3820 | BUILD_BUG_ON(28 > MAXSGENTRIES + 4); |
3821 | ||
5e216153 MM |
3822 | h->reply_pool_wraparound = 1; /* spec: init to 1 */ |
3823 | ||
3824 | /* Controller spec: zero out this buffer. */ | |
3825 | memset(h->reply_pool, 0, h->max_commands * sizeof(__u64)); | |
3826 | h->reply_pool_head = h->reply_pool; | |
3827 | ||
3828 | trans_offset = readl(&(h->cfgtable->TransMethodOffset)); | |
3829 | calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries, | |
3830 | h->blockFetchTable); | |
3831 | writel(bft[0], &h->transtable->BlockFetch0); | |
3832 | writel(bft[1], &h->transtable->BlockFetch1); | |
3833 | writel(bft[2], &h->transtable->BlockFetch2); | |
3834 | writel(bft[3], &h->transtable->BlockFetch3); | |
3835 | writel(bft[4], &h->transtable->BlockFetch4); | |
3836 | writel(bft[5], &h->transtable->BlockFetch5); | |
3837 | writel(bft[6], &h->transtable->BlockFetch6); | |
3838 | writel(bft[7], &h->transtable->BlockFetch7); | |
3839 | ||
3840 | /* size of controller ring buffer */ | |
3841 | writel(h->max_commands, &h->transtable->RepQSize); | |
3842 | writel(1, &h->transtable->RepQCount); | |
3843 | writel(0, &h->transtable->RepQCtrAddrLow32); | |
3844 | writel(0, &h->transtable->RepQCtrAddrHigh32); | |
3845 | writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); | |
3846 | writel(0, &h->transtable->RepQAddr0High32); | |
3847 | writel(CFGTBL_Trans_Performant, | |
3848 | &(h->cfgtable->HostWrite.TransportRequest)); | |
3849 | ||
5e216153 | 3850 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); |
0f8a6a1e | 3851 | cciss_wait_for_mode_change_ack(h); |
5e216153 | 3852 | register_value = readl(&(h->cfgtable->TransportActive)); |
b9933135 | 3853 | if (!(register_value & CFGTBL_Trans_Performant)) |
b2a4a43d | 3854 | dev_warn(&h->pdev->dev, "cciss: unable to get board into" |
5e216153 | 3855 | " performant mode\n"); |
b9933135 SC |
3856 | } |
3857 | ||
3858 | static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h) | |
3859 | { | |
3860 | __u32 trans_support; | |
3861 | ||
3862 | dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n"); | |
3863 | /* Attempt to put controller into performant mode if supported */ | |
3864 | /* Does board support performant mode? */ | |
3865 | trans_support = readl(&(h->cfgtable->TransportSupport)); | |
3866 | if (!(trans_support & PERFORMANT_MODE)) | |
3867 | return; | |
3868 | ||
b2a4a43d | 3869 | dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n"); |
b9933135 SC |
3870 | /* Performant mode demands commands on a 32 byte boundary |
3871 | * pci_alloc_consistent aligns on page boundarys already. | |
3872 | * Just need to check if divisible by 32 | |
3873 | */ | |
3874 | if ((sizeof(CommandList_struct) % 32) != 0) { | |
b2a4a43d | 3875 | dev_warn(&h->pdev->dev, "%s %d %s\n", |
b9933135 SC |
3876 | "cciss info: command size[", |
3877 | (int)sizeof(CommandList_struct), | |
3878 | "] not divisible by 32, no performant mode..\n"); | |
5e216153 MM |
3879 | return; |
3880 | } | |
3881 | ||
b9933135 SC |
3882 | /* Performant mode ring buffer and supporting data structures */ |
3883 | h->reply_pool = (__u64 *)pci_alloc_consistent( | |
3884 | h->pdev, h->max_commands * sizeof(__u64), | |
3885 | &(h->reply_pool_dhandle)); | |
3886 | ||
3887 | /* Need a block fetch table for performant mode */ | |
3888 | h->blockFetchTable = kmalloc(((h->maxsgentries+1) * | |
3889 | sizeof(__u32)), GFP_KERNEL); | |
3890 | ||
3891 | if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL)) | |
3892 | goto clean_up; | |
3893 | ||
3894 | cciss_enter_performant_mode(h); | |
3895 | ||
5e216153 MM |
3896 | /* Change the access methods to the performant access methods */ |
3897 | h->access = SA5_performant_access; | |
b9933135 | 3898 | h->transMethod = CFGTBL_Trans_Performant; |
5e216153 MM |
3899 | |
3900 | return; | |
3901 | clean_up: | |
3902 | kfree(h->blockFetchTable); | |
3903 | if (h->reply_pool) | |
3904 | pci_free_consistent(h->pdev, | |
3905 | h->max_commands * sizeof(__u64), | |
3906 | h->reply_pool, | |
3907 | h->reply_pool_dhandle); | |
3908 | return; | |
3909 | ||
3910 | } /* cciss_put_controller_into_performant_mode */ | |
3911 | ||
fb86a35b MM |
3912 | /* If MSI/MSI-X is supported by the kernel we will try to enable it on |
3913 | * controllers that are capable. If not, we use IO-APIC mode. | |
3914 | */ | |
3915 | ||
f70dba83 | 3916 | static void __devinit cciss_interrupt_mode(ctlr_info_t *h) |
fb86a35b MM |
3917 | { |
3918 | #ifdef CONFIG_PCI_MSI | |
7c832835 BH |
3919 | int err; |
3920 | struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1}, | |
3921 | {0, 2}, {0, 3} | |
3922 | }; | |
fb86a35b MM |
3923 | |
3924 | /* Some boards advertise MSI but don't really support it */ | |
f70dba83 SC |
3925 | if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || |
3926 | (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) | |
fb86a35b MM |
3927 | goto default_int_mode; |
3928 | ||
f70dba83 SC |
3929 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { |
3930 | err = pci_enable_msix(h->pdev, cciss_msix_entries, 4); | |
7c832835 | 3931 | if (!err) { |
f70dba83 SC |
3932 | h->intr[0] = cciss_msix_entries[0].vector; |
3933 | h->intr[1] = cciss_msix_entries[1].vector; | |
3934 | h->intr[2] = cciss_msix_entries[2].vector; | |
3935 | h->intr[3] = cciss_msix_entries[3].vector; | |
3936 | h->msix_vector = 1; | |
7c832835 BH |
3937 | return; |
3938 | } | |
3939 | if (err > 0) { | |
b2a4a43d SC |
3940 | dev_warn(&h->pdev->dev, |
3941 | "only %d MSI-X vectors available\n", err); | |
1ecb9c0f | 3942 | goto default_int_mode; |
7c832835 | 3943 | } else { |
b2a4a43d SC |
3944 | dev_warn(&h->pdev->dev, |
3945 | "MSI-X init failed %d\n", err); | |
1ecb9c0f | 3946 | goto default_int_mode; |
7c832835 BH |
3947 | } |
3948 | } | |
f70dba83 SC |
3949 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { |
3950 | if (!pci_enable_msi(h->pdev)) | |
3951 | h->msi_vector = 1; | |
3952 | else | |
b2a4a43d | 3953 | dev_warn(&h->pdev->dev, "MSI init failed\n"); |
7c832835 | 3954 | } |
1ecb9c0f | 3955 | default_int_mode: |
7c832835 | 3956 | #endif /* CONFIG_PCI_MSI */ |
fb86a35b | 3957 | /* if we get here we're going to use the default interrupt mode */ |
f70dba83 | 3958 | h->intr[PERF_MODE_INT] = h->pdev->irq; |
fb86a35b MM |
3959 | return; |
3960 | } | |
3961 | ||
6539fa9b | 3962 | static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id) |
1da177e4 | 3963 | { |
6539fa9b SC |
3964 | int i; |
3965 | u32 subsystem_vendor_id, subsystem_device_id; | |
2ec24ff1 SC |
3966 | |
3967 | subsystem_vendor_id = pdev->subsystem_vendor; | |
3968 | subsystem_device_id = pdev->subsystem_device; | |
6539fa9b SC |
3969 | *board_id = ((subsystem_device_id << 16) & 0xffff0000) | |
3970 | subsystem_vendor_id; | |
2ec24ff1 SC |
3971 | |
3972 | for (i = 0; i < ARRAY_SIZE(products); i++) { | |
3973 | /* Stand aside for hpsa driver on request */ | |
3974 | if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY) | |
3975 | return -ENODEV; | |
6539fa9b SC |
3976 | if (*board_id == products[i].board_id) |
3977 | return i; | |
2ec24ff1 | 3978 | } |
6539fa9b SC |
3979 | dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n", |
3980 | *board_id); | |
3981 | return -ENODEV; | |
3982 | } | |
1da177e4 | 3983 | |
dd9c426e SC |
3984 | static inline bool cciss_board_disabled(ctlr_info_t *h) |
3985 | { | |
3986 | u16 command; | |
1da177e4 | 3987 | |
dd9c426e SC |
3988 | (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command); |
3989 | return ((command & PCI_COMMAND_MEMORY) == 0); | |
3990 | } | |
1da177e4 | 3991 | |
d474830d SC |
3992 | static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev, |
3993 | unsigned long *memory_bar) | |
3994 | { | |
3995 | int i; | |
4e570309 | 3996 | |
d474830d SC |
3997 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) |
3998 | if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { | |
3999 | /* addressing mode bits already removed */ | |
4000 | *memory_bar = pci_resource_start(pdev, i); | |
4001 | dev_dbg(&pdev->dev, "memory BAR = %lx\n", | |
4002 | *memory_bar); | |
4003 | return 0; | |
4004 | } | |
4005 | dev_warn(&pdev->dev, "no memory BAR found\n"); | |
4006 | return -ENODEV; | |
4007 | } | |
1da177e4 | 4008 | |
afa842fa SC |
4009 | static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev, |
4010 | void __iomem *vaddr, int wait_for_ready) | |
4011 | #define BOARD_READY 1 | |
4012 | #define BOARD_NOT_READY 0 | |
e99ba136 | 4013 | { |
afa842fa | 4014 | int i, iterations; |
e99ba136 | 4015 | u32 scratchpad; |
1da177e4 | 4016 | |
afa842fa SC |
4017 | if (wait_for_ready) |
4018 | iterations = CCISS_BOARD_READY_ITERATIONS; | |
4019 | else | |
4020 | iterations = CCISS_BOARD_NOT_READY_ITERATIONS; | |
4021 | ||
4022 | for (i = 0; i < iterations; i++) { | |
4023 | scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); | |
4024 | if (wait_for_ready) { | |
4025 | if (scratchpad == CCISS_FIRMWARE_READY) | |
4026 | return 0; | |
4027 | } else { | |
4028 | if (scratchpad != CCISS_FIRMWARE_READY) | |
4029 | return 0; | |
4030 | } | |
e99ba136 | 4031 | msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS); |
e1438581 | 4032 | } |
afa842fa | 4033 | dev_warn(&pdev->dev, "board not ready, timed out.\n"); |
e99ba136 SC |
4034 | return -ENODEV; |
4035 | } | |
e1438581 | 4036 | |
8e93bf6d SC |
4037 | static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev, |
4038 | void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, | |
4039 | u64 *cfg_offset) | |
4040 | { | |
4041 | *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); | |
4042 | *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); | |
4043 | *cfg_base_addr &= (u32) 0x0000ffff; | |
4044 | *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); | |
4045 | if (*cfg_base_addr_index == -1) { | |
4046 | dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, " | |
4047 | "*cfg_base_addr = 0x%08x\n", *cfg_base_addr); | |
4048 | return -ENODEV; | |
4049 | } | |
4050 | return 0; | |
4051 | } | |
1da177e4 | 4052 | |
4809d098 SC |
4053 | static int __devinit cciss_find_cfgtables(ctlr_info_t *h) |
4054 | { | |
4055 | u64 cfg_offset; | |
4056 | u32 cfg_base_addr; | |
4057 | u64 cfg_base_addr_index; | |
4058 | u32 trans_offset; | |
8e93bf6d | 4059 | int rc; |
1da177e4 | 4060 | |
8e93bf6d SC |
4061 | rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, |
4062 | &cfg_base_addr_index, &cfg_offset); | |
4063 | if (rc) | |
4064 | return rc; | |
4809d098 | 4065 | h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, |
8e93bf6d | 4066 | cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable)); |
4809d098 SC |
4067 | if (!h->cfgtable) |
4068 | return -ENOMEM; | |
4069 | /* Find performant mode table. */ | |
8e93bf6d | 4070 | trans_offset = readl(&h->cfgtable->TransMethodOffset); |
4809d098 SC |
4071 | h->transtable = remap_pci_mem(pci_resource_start(h->pdev, |
4072 | cfg_base_addr_index)+cfg_offset+trans_offset, | |
4073 | sizeof(*h->transtable)); | |
4074 | if (!h->transtable) | |
4075 | return -ENOMEM; | |
4076 | return 0; | |
4077 | } | |
1da177e4 | 4078 | |
adfbc1ff SC |
4079 | static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h) |
4080 | { | |
4081 | h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); | |
4082 | if (h->max_commands < 16) { | |
4083 | dev_warn(&h->pdev->dev, "Controller reports " | |
4084 | "max supported commands of %d, an obvious lie. " | |
4085 | "Using 16. Ensure that firmware is up to date.\n", | |
4086 | h->max_commands); | |
4087 | h->max_commands = 16; | |
1da177e4 | 4088 | } |
adfbc1ff | 4089 | } |
1da177e4 | 4090 | |
afadbf4b SC |
4091 | /* Interrogate the hardware for some limits: |
4092 | * max commands, max SG elements without chaining, and with chaining, | |
4093 | * SG chain block size, etc. | |
4094 | */ | |
4095 | static void __devinit cciss_find_board_params(ctlr_info_t *h) | |
4096 | { | |
adfbc1ff | 4097 | cciss_get_max_perf_mode_cmds(h); |
afadbf4b SC |
4098 | h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ |
4099 | h->maxsgentries = readl(&(h->cfgtable->MaxSGElements)); | |
5c07a311 | 4100 | /* |
afadbf4b | 4101 | * Limit in-command s/g elements to 32 save dma'able memory. |
5c07a311 DB |
4102 | * Howvever spec says if 0, use 31 |
4103 | */ | |
afadbf4b SC |
4104 | h->max_cmd_sgentries = 31; |
4105 | if (h->maxsgentries > 512) { | |
4106 | h->max_cmd_sgentries = 32; | |
4107 | h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1; | |
4108 | h->maxsgentries--; /* save one for chain pointer */ | |
5c07a311 | 4109 | } else { |
afadbf4b SC |
4110 | h->maxsgentries = 31; /* default to traditional values */ |
4111 | h->chainsize = 0; | |
5c07a311 | 4112 | } |
afadbf4b | 4113 | } |
5c07a311 | 4114 | |
501b92cd SC |
4115 | static inline bool CISS_signature_present(ctlr_info_t *h) |
4116 | { | |
4117 | if ((readb(&h->cfgtable->Signature[0]) != 'C') || | |
4118 | (readb(&h->cfgtable->Signature[1]) != 'I') || | |
4119 | (readb(&h->cfgtable->Signature[2]) != 'S') || | |
4120 | (readb(&h->cfgtable->Signature[3]) != 'S')) { | |
4121 | dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); | |
4122 | return false; | |
1da177e4 | 4123 | } |
501b92cd SC |
4124 | return true; |
4125 | } | |
4126 | ||
322e304c SC |
4127 | /* Need to enable prefetch in the SCSI core for 6400 in x86 */ |
4128 | static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h) | |
4129 | { | |
1da177e4 | 4130 | #ifdef CONFIG_X86 |
322e304c SC |
4131 | u32 prefetch; |
4132 | ||
4133 | prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); | |
4134 | prefetch |= 0x100; | |
4135 | writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); | |
1da177e4 | 4136 | #endif |
322e304c | 4137 | } |
1da177e4 | 4138 | |
bfd63ee5 SC |
4139 | /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result |
4140 | * in a prefetch beyond physical memory. | |
4141 | */ | |
4142 | static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h) | |
4143 | { | |
4144 | u32 dma_prefetch; | |
4145 | __u32 dma_refetch; | |
4146 | ||
4147 | if (h->board_id != 0x3225103C) | |
4148 | return; | |
4149 | dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); | |
4150 | dma_prefetch |= 0x8000; | |
4151 | writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); | |
4152 | pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch); | |
4153 | dma_refetch |= 0x1; | |
4154 | pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch); | |
4155 | } | |
4156 | ||
f70dba83 | 4157 | static int __devinit cciss_pci_init(ctlr_info_t *h) |
6539fa9b | 4158 | { |
4809d098 | 4159 | int prod_index, err; |
6539fa9b | 4160 | |
f70dba83 | 4161 | prod_index = cciss_lookup_board_id(h->pdev, &h->board_id); |
6539fa9b | 4162 | if (prod_index < 0) |
2ec24ff1 | 4163 | return -ENODEV; |
f70dba83 SC |
4164 | h->product_name = products[prod_index].product_name; |
4165 | h->access = *(products[prod_index].access); | |
1da177e4 | 4166 | |
f70dba83 | 4167 | if (cciss_board_disabled(h)) { |
b2a4a43d | 4168 | dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); |
c33ac89b | 4169 | return -ENODEV; |
1da177e4 | 4170 | } |
f70dba83 | 4171 | err = pci_enable_device(h->pdev); |
7c832835 | 4172 | if (err) { |
b2a4a43d | 4173 | dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n"); |
c33ac89b | 4174 | return err; |
f92e2f5f MM |
4175 | } |
4176 | ||
f70dba83 | 4177 | err = pci_request_regions(h->pdev, "cciss"); |
4e570309 | 4178 | if (err) { |
b2a4a43d SC |
4179 | dev_warn(&h->pdev->dev, |
4180 | "Cannot obtain PCI resources, aborting\n"); | |
872225ca | 4181 | return err; |
4e570309 | 4182 | } |
1da177e4 | 4183 | |
b2a4a43d SC |
4184 | dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq); |
4185 | dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id); | |
1da177e4 | 4186 | |
fb86a35b MM |
4187 | /* If the kernel supports MSI/MSI-X we will try to enable that functionality, |
4188 | * else we use the IO-APIC interrupt assigned to us by system ROM. | |
4189 | */ | |
f70dba83 SC |
4190 | cciss_interrupt_mode(h); |
4191 | err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr); | |
d474830d | 4192 | if (err) |
e1438581 | 4193 | goto err_out_free_res; |
f70dba83 SC |
4194 | h->vaddr = remap_pci_mem(h->paddr, 0x250); |
4195 | if (!h->vaddr) { | |
da550321 SC |
4196 | err = -ENOMEM; |
4197 | goto err_out_free_res; | |
7c832835 | 4198 | } |
afa842fa | 4199 | err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); |
e99ba136 | 4200 | if (err) |
4e570309 | 4201 | goto err_out_free_res; |
f70dba83 | 4202 | err = cciss_find_cfgtables(h); |
4809d098 | 4203 | if (err) |
4e570309 | 4204 | goto err_out_free_res; |
b2a4a43d | 4205 | print_cfg_table(h); |
f70dba83 | 4206 | cciss_find_board_params(h); |
1da177e4 | 4207 | |
f70dba83 | 4208 | if (!CISS_signature_present(h)) { |
c33ac89b | 4209 | err = -ENODEV; |
4e570309 | 4210 | goto err_out_free_res; |
1da177e4 | 4211 | } |
f70dba83 SC |
4212 | cciss_enable_scsi_prefetch(h); |
4213 | cciss_p600_dma_prefetch_quirk(h); | |
4214 | cciss_put_controller_into_performant_mode(h); | |
1da177e4 LT |
4215 | return 0; |
4216 | ||
5faad620 | 4217 | err_out_free_res: |
872225ca MM |
4218 | /* |
4219 | * Deliberately omit pci_disable_device(): it does something nasty to | |
4220 | * Smart Array controllers that pci_enable_device does not undo | |
4221 | */ | |
f70dba83 SC |
4222 | if (h->transtable) |
4223 | iounmap(h->transtable); | |
4224 | if (h->cfgtable) | |
4225 | iounmap(h->cfgtable); | |
4226 | if (h->vaddr) | |
4227 | iounmap(h->vaddr); | |
4228 | pci_release_regions(h->pdev); | |
c33ac89b | 4229 | return err; |
1da177e4 LT |
4230 | } |
4231 | ||
6ae5ce8e MM |
4232 | /* Function to find the first free pointer into our hba[] array |
4233 | * Returns -1 if no free entries are left. | |
7c832835 | 4234 | */ |
b2a4a43d | 4235 | static int alloc_cciss_hba(struct pci_dev *pdev) |
1da177e4 | 4236 | { |
799202cb | 4237 | int i; |
1da177e4 | 4238 | |
7c832835 | 4239 | for (i = 0; i < MAX_CTLR; i++) { |
1da177e4 | 4240 | if (!hba[i]) { |
f70dba83 | 4241 | ctlr_info_t *h; |
f2912a12 | 4242 | |
f70dba83 SC |
4243 | h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL); |
4244 | if (!h) | |
1da177e4 | 4245 | goto Enomem; |
f70dba83 | 4246 | hba[i] = h; |
1da177e4 LT |
4247 | return i; |
4248 | } | |
4249 | } | |
b2a4a43d | 4250 | dev_warn(&pdev->dev, "This driver supports a maximum" |
7c832835 | 4251 | " of %d controllers.\n", MAX_CTLR); |
799202cb MM |
4252 | return -1; |
4253 | Enomem: | |
b2a4a43d | 4254 | dev_warn(&pdev->dev, "out of memory.\n"); |
1da177e4 LT |
4255 | return -1; |
4256 | } | |
4257 | ||
f70dba83 | 4258 | static void free_hba(ctlr_info_t *h) |
1da177e4 | 4259 | { |
2c935593 | 4260 | int i; |
1da177e4 | 4261 | |
f70dba83 | 4262 | hba[h->ctlr] = NULL; |
2c935593 SC |
4263 | for (i = 0; i < h->highest_lun + 1; i++) |
4264 | if (h->gendisk[i] != NULL) | |
4265 | put_disk(h->gendisk[i]); | |
4266 | kfree(h); | |
1da177e4 LT |
4267 | } |
4268 | ||
82eb03cf CC |
4269 | /* Send a message CDB to the firmware. */ |
4270 | static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type) | |
4271 | { | |
4272 | typedef struct { | |
4273 | CommandListHeader_struct CommandHeader; | |
4274 | RequestBlock_struct Request; | |
4275 | ErrDescriptor_struct ErrorDescriptor; | |
4276 | } Command; | |
4277 | static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct); | |
4278 | Command *cmd; | |
4279 | dma_addr_t paddr64; | |
4280 | uint32_t paddr32, tag; | |
4281 | void __iomem *vaddr; | |
4282 | int i, err; | |
4283 | ||
4284 | vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); | |
4285 | if (vaddr == NULL) | |
4286 | return -ENOMEM; | |
4287 | ||
4288 | /* The Inbound Post Queue only accepts 32-bit physical addresses for the | |
4289 | CCISS commands, so they must be allocated from the lower 4GiB of | |
4290 | memory. */ | |
e930438c | 4291 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
82eb03cf CC |
4292 | if (err) { |
4293 | iounmap(vaddr); | |
4294 | return -ENOMEM; | |
4295 | } | |
4296 | ||
4297 | cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); | |
4298 | if (cmd == NULL) { | |
4299 | iounmap(vaddr); | |
4300 | return -ENOMEM; | |
4301 | } | |
4302 | ||
4303 | /* This must fit, because of the 32-bit consistent DMA mask. Also, | |
4304 | although there's no guarantee, we assume that the address is at | |
4305 | least 4-byte aligned (most likely, it's page-aligned). */ | |
4306 | paddr32 = paddr64; | |
4307 | ||
4308 | cmd->CommandHeader.ReplyQueue = 0; | |
4309 | cmd->CommandHeader.SGList = 0; | |
4310 | cmd->CommandHeader.SGTotal = 0; | |
4311 | cmd->CommandHeader.Tag.lower = paddr32; | |
4312 | cmd->CommandHeader.Tag.upper = 0; | |
4313 | memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); | |
4314 | ||
4315 | cmd->Request.CDBLen = 16; | |
4316 | cmd->Request.Type.Type = TYPE_MSG; | |
4317 | cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; | |
4318 | cmd->Request.Type.Direction = XFER_NONE; | |
4319 | cmd->Request.Timeout = 0; /* Don't time out */ | |
4320 | cmd->Request.CDB[0] = opcode; | |
4321 | cmd->Request.CDB[1] = type; | |
4322 | memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */ | |
4323 | ||
4324 | cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command); | |
4325 | cmd->ErrorDescriptor.Addr.upper = 0; | |
4326 | cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct); | |
4327 | ||
4328 | writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); | |
4329 | ||
4330 | for (i = 0; i < 10; i++) { | |
4331 | tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); | |
4332 | if ((tag & ~3) == paddr32) | |
4333 | break; | |
4334 | schedule_timeout_uninterruptible(HZ); | |
4335 | } | |
4336 | ||
4337 | iounmap(vaddr); | |
4338 | ||
4339 | /* we leak the DMA buffer here ... no choice since the controller could | |
4340 | still complete the command. */ | |
4341 | if (i == 10) { | |
b2a4a43d SC |
4342 | dev_err(&pdev->dev, |
4343 | "controller message %02x:%02x timed out\n", | |
82eb03cf CC |
4344 | opcode, type); |
4345 | return -ETIMEDOUT; | |
4346 | } | |
4347 | ||
4348 | pci_free_consistent(pdev, cmd_sz, cmd, paddr64); | |
4349 | ||
4350 | if (tag & 2) { | |
b2a4a43d | 4351 | dev_err(&pdev->dev, "controller message %02x:%02x failed\n", |
82eb03cf CC |
4352 | opcode, type); |
4353 | return -EIO; | |
4354 | } | |
4355 | ||
b2a4a43d | 4356 | dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", |
82eb03cf CC |
4357 | opcode, type); |
4358 | return 0; | |
4359 | } | |
4360 | ||
4361 | #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0) | |
4362 | #define cciss_noop(p) cciss_message(p, 3, 0) | |
4363 | ||
a6528d01 SC |
4364 | static int cciss_controller_hard_reset(struct pci_dev *pdev, |
4365 | void * __iomem vaddr, bool use_doorbell) | |
82eb03cf | 4366 | { |
a6528d01 SC |
4367 | u16 pmcsr; |
4368 | int pos; | |
82eb03cf | 4369 | |
a6528d01 SC |
4370 | if (use_doorbell) { |
4371 | /* For everything after the P600, the PCI power state method | |
4372 | * of resetting the controller doesn't work, so we have this | |
4373 | * other way using the doorbell register. | |
4374 | */ | |
4375 | dev_info(&pdev->dev, "using doorbell to reset controller\n"); | |
4376 | writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL); | |
4377 | msleep(1000); | |
4378 | } else { /* Try to do it the PCI power state way */ | |
4379 | ||
4380 | /* Quoting from the Open CISS Specification: "The Power | |
4381 | * Management Control/Status Register (CSR) controls the power | |
4382 | * state of the device. The normal operating state is D0, | |
4383 | * CSR=00h. The software off state is D3, CSR=03h. To reset | |
4384 | * the controller, place the interface device in D3 then to D0, | |
4385 | * this causes a secondary PCI reset which will reset the | |
4386 | * controller." */ | |
4387 | ||
4388 | pos = pci_find_capability(pdev, PCI_CAP_ID_PM); | |
4389 | if (pos == 0) { | |
4390 | dev_err(&pdev->dev, | |
4391 | "cciss_controller_hard_reset: " | |
4392 | "PCI PM not supported\n"); | |
4393 | return -ENODEV; | |
4394 | } | |
4395 | dev_info(&pdev->dev, "using PCI PM to reset controller\n"); | |
4396 | /* enter the D3hot power management state */ | |
4397 | pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); | |
4398 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | |
4399 | pmcsr |= PCI_D3hot; | |
4400 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | |
82eb03cf | 4401 | |
a6528d01 | 4402 | msleep(500); |
82eb03cf | 4403 | |
a6528d01 SC |
4404 | /* enter the D0 power management state */ |
4405 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | |
4406 | pmcsr |= PCI_D0; | |
4407 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | |
82eb03cf | 4408 | |
a6528d01 SC |
4409 | msleep(500); |
4410 | } | |
4411 | return 0; | |
4412 | } | |
82eb03cf | 4413 | |
a6528d01 SC |
4414 | /* This does a hard reset of the controller using PCI power management |
4415 | * states or using the doorbell register. */ | |
4416 | static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev) | |
4417 | { | |
a6528d01 SC |
4418 | u64 cfg_offset; |
4419 | u32 cfg_base_addr; | |
4420 | u64 cfg_base_addr_index; | |
4421 | void __iomem *vaddr; | |
4422 | unsigned long paddr; | |
4423 | u32 misc_fw_support, active_transport; | |
f442e64b | 4424 | int rc; |
a6528d01 SC |
4425 | CfgTable_struct __iomem *cfgtable; |
4426 | bool use_doorbell; | |
058a0f9f | 4427 | u32 board_id; |
f442e64b | 4428 | u16 command_register; |
a6528d01 SC |
4429 | |
4430 | /* For controllers as old a the p600, this is very nearly | |
4431 | * the same thing as | |
4432 | * | |
4433 | * pci_save_state(pci_dev); | |
4434 | * pci_set_power_state(pci_dev, PCI_D3hot); | |
4435 | * pci_set_power_state(pci_dev, PCI_D0); | |
4436 | * pci_restore_state(pci_dev); | |
4437 | * | |
a6528d01 SC |
4438 | * For controllers newer than the P600, the pci power state |
4439 | * method of resetting doesn't work so we have another way | |
4440 | * using the doorbell register. | |
4441 | */ | |
82eb03cf | 4442 | |
058a0f9f SC |
4443 | /* Exclude 640x boards. These are two pci devices in one slot |
4444 | * which share a battery backed cache module. One controls the | |
4445 | * cache, the other accesses the cache through the one that controls | |
4446 | * it. If we reset the one controlling the cache, the other will | |
4447 | * likely not be happy. Just forbid resetting this conjoined mess. | |
4448 | */ | |
4449 | cciss_lookup_board_id(pdev, &board_id); | |
4450 | if (board_id == 0x409C0E11 || board_id == 0x409D0E11) { | |
4451 | dev_warn(&pdev->dev, "Cannot reset Smart Array 640x " | |
4452 | "due to shared cache module."); | |
82eb03cf CC |
4453 | return -ENODEV; |
4454 | } | |
4455 | ||
f442e64b SC |
4456 | /* Save the PCI command register */ |
4457 | pci_read_config_word(pdev, 4, &command_register); | |
4458 | /* Turn the board off. This is so that later pci_restore_state() | |
4459 | * won't turn the board on before the rest of config space is ready. | |
4460 | */ | |
4461 | pci_disable_device(pdev); | |
4462 | pci_save_state(pdev); | |
82eb03cf | 4463 | |
a6528d01 SC |
4464 | /* find the first memory BAR, so we can find the cfg table */ |
4465 | rc = cciss_pci_find_memory_BAR(pdev, &paddr); | |
4466 | if (rc) | |
4467 | return rc; | |
4468 | vaddr = remap_pci_mem(paddr, 0x250); | |
4469 | if (!vaddr) | |
4470 | return -ENOMEM; | |
82eb03cf | 4471 | |
a6528d01 SC |
4472 | /* find cfgtable in order to check if reset via doorbell is supported */ |
4473 | rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, | |
4474 | &cfg_base_addr_index, &cfg_offset); | |
4475 | if (rc) | |
4476 | goto unmap_vaddr; | |
4477 | cfgtable = remap_pci_mem(pci_resource_start(pdev, | |
4478 | cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); | |
4479 | if (!cfgtable) { | |
4480 | rc = -ENOMEM; | |
4481 | goto unmap_vaddr; | |
4482 | } | |
82eb03cf | 4483 | |
a6528d01 SC |
4484 | /* If reset via doorbell register is supported, use that. */ |
4485 | misc_fw_support = readl(&cfgtable->misc_fw_support); | |
4486 | use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; | |
82eb03cf | 4487 | |
75230ff2 SC |
4488 | /* The doorbell reset seems to cause lockups on some Smart |
4489 | * Arrays (e.g. P410, P410i, maybe others). Until this is | |
4490 | * fixed or at least isolated, avoid the doorbell reset. | |
4491 | */ | |
4492 | use_doorbell = 0; | |
4493 | ||
a6528d01 SC |
4494 | rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell); |
4495 | if (rc) | |
4496 | goto unmap_cfgtable; | |
f442e64b SC |
4497 | pci_restore_state(pdev); |
4498 | rc = pci_enable_device(pdev); | |
4499 | if (rc) { | |
4500 | dev_warn(&pdev->dev, "failed to enable device.\n"); | |
4501 | goto unmap_cfgtable; | |
82eb03cf | 4502 | } |
f442e64b | 4503 | pci_write_config_word(pdev, 4, command_register); |
82eb03cf | 4504 | |
a6528d01 SC |
4505 | /* Some devices (notably the HP Smart Array 5i Controller) |
4506 | need a little pause here */ | |
4507 | msleep(CCISS_POST_RESET_PAUSE_MSECS); | |
4508 | ||
afa842fa SC |
4509 | /* Wait for board to become not ready, then ready. */ |
4510 | dev_info(&pdev->dev, "Waiting for board to become ready.\n"); | |
4511 | rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); | |
4512 | if (rc) /* Don't bail, might be E500, etc. which can't be reset */ | |
4513 | dev_warn(&pdev->dev, | |
4514 | "failed waiting for board to become not ready\n"); | |
4515 | rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY); | |
4516 | if (rc) { | |
4517 | dev_warn(&pdev->dev, | |
4518 | "failed waiting for board to become ready\n"); | |
4519 | goto unmap_cfgtable; | |
4520 | } | |
4521 | dev_info(&pdev->dev, "board ready.\n"); | |
4522 | ||
a6528d01 SC |
4523 | /* Controller should be in simple mode at this point. If it's not, |
4524 | * It means we're on one of those controllers which doesn't support | |
4525 | * the doorbell reset method and on which the PCI power management reset | |
4526 | * method doesn't work (P800, for example.) | |
4527 | * In those cases, don't try to proceed, as it generally doesn't work. | |
4528 | */ | |
4529 | active_transport = readl(&cfgtable->TransportActive); | |
4530 | if (active_transport & PERFORMANT_MODE) { | |
4531 | dev_warn(&pdev->dev, "Unable to successfully reset controller," | |
4532 | " Ignoring controller.\n"); | |
4533 | rc = -ENODEV; | |
4534 | } | |
4535 | ||
4536 | unmap_cfgtable: | |
4537 | iounmap(cfgtable); | |
4538 | ||
4539 | unmap_vaddr: | |
4540 | iounmap(vaddr); | |
4541 | return rc; | |
82eb03cf CC |
4542 | } |
4543 | ||
83123cb1 SC |
4544 | static __devinit int cciss_init_reset_devices(struct pci_dev *pdev) |
4545 | { | |
a6528d01 | 4546 | int rc, i; |
83123cb1 SC |
4547 | |
4548 | if (!reset_devices) | |
4549 | return 0; | |
4550 | ||
a6528d01 SC |
4551 | /* Reset the controller with a PCI power-cycle or via doorbell */ |
4552 | rc = cciss_kdump_hard_reset_controller(pdev); | |
83123cb1 | 4553 | |
a6528d01 SC |
4554 | /* -ENOTSUPP here means we cannot reset the controller |
4555 | * but it's already (and still) up and running in | |
058a0f9f SC |
4556 | * "performant mode". Or, it might be 640x, which can't reset |
4557 | * due to concerns about shared bbwc between 6402/6404 pair. | |
a6528d01 SC |
4558 | */ |
4559 | if (rc == -ENOTSUPP) | |
4560 | return 0; /* just try to do the kdump anyhow. */ | |
4561 | if (rc) | |
4562 | return -ENODEV; | |
83123cb1 SC |
4563 | |
4564 | /* Now try to get the controller to respond to a no-op */ | |
4565 | for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) { | |
4566 | if (cciss_noop(pdev) == 0) | |
4567 | break; | |
4568 | else | |
4569 | dev_warn(&pdev->dev, "no-op failed%s\n", | |
4570 | (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ? | |
4571 | "; re-trying" : "")); | |
4572 | msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS); | |
4573 | } | |
82eb03cf CC |
4574 | return 0; |
4575 | } | |
4576 | ||
1da177e4 LT |
4577 | /* |
4578 | * This is it. Find all the controllers and register them. I really hate | |
4579 | * stealing all these major device numbers. | |
4580 | * returns the number of block devices registered. | |
4581 | */ | |
4582 | static int __devinit cciss_init_one(struct pci_dev *pdev, | |
7c832835 | 4583 | const struct pci_device_id *ent) |
1da177e4 | 4584 | { |
1da177e4 | 4585 | int i; |
799202cb | 4586 | int j = 0; |
5c07a311 | 4587 | int k = 0; |
1da177e4 | 4588 | int rc; |
22bece00 | 4589 | int dac, return_code; |
212a5026 | 4590 | InquiryData_struct *inq_buff; |
f70dba83 | 4591 | ctlr_info_t *h; |
1da177e4 | 4592 | |
83123cb1 SC |
4593 | rc = cciss_init_reset_devices(pdev); |
4594 | if (rc) | |
4595 | return rc; | |
b2a4a43d | 4596 | i = alloc_cciss_hba(pdev); |
7c832835 | 4597 | if (i < 0) |
e2019b58 | 4598 | return -1; |
1f8ef380 | 4599 | |
f70dba83 SC |
4600 | h = hba[i]; |
4601 | h->pdev = pdev; | |
4602 | h->busy_initializing = 1; | |
4603 | INIT_HLIST_HEAD(&h->cmpQ); | |
4604 | INIT_HLIST_HEAD(&h->reqQ); | |
4605 | mutex_init(&h->busy_shutting_down); | |
1f8ef380 | 4606 | |
f70dba83 | 4607 | if (cciss_pci_init(h) != 0) |
2cfa948c | 4608 | goto clean_no_release_regions; |
1da177e4 | 4609 | |
f70dba83 SC |
4610 | sprintf(h->devname, "cciss%d", i); |
4611 | h->ctlr = i; | |
1da177e4 | 4612 | |
f70dba83 | 4613 | init_completion(&h->scan_wait); |
b368c9dd | 4614 | |
f70dba83 | 4615 | if (cciss_create_hba_sysfs_entry(h)) |
7fe06326 AP |
4616 | goto clean0; |
4617 | ||
1da177e4 | 4618 | /* configure PCI DMA stuff */ |
6a35528a | 4619 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) |
40aabb58 | 4620 | dac = 1; |
284901a9 | 4621 | else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) |
40aabb58 | 4622 | dac = 0; |
1da177e4 | 4623 | else { |
b2a4a43d | 4624 | dev_err(&h->pdev->dev, "no suitable DMA available\n"); |
1da177e4 LT |
4625 | goto clean1; |
4626 | } | |
4627 | ||
4628 | /* | |
4629 | * register with the major number, or get a dynamic major number | |
4630 | * by passing 0 as argument. This is done for greater than | |
4631 | * 8 controller support. | |
4632 | */ | |
4633 | if (i < MAX_CTLR_ORIG) | |
f70dba83 SC |
4634 | h->major = COMPAQ_CISS_MAJOR + i; |
4635 | rc = register_blkdev(h->major, h->devname); | |
7c832835 | 4636 | if (rc == -EBUSY || rc == -EINVAL) { |
b2a4a43d SC |
4637 | dev_err(&h->pdev->dev, |
4638 | "Unable to get major number %d for %s " | |
f70dba83 | 4639 | "on hba %d\n", h->major, h->devname, i); |
1da177e4 | 4640 | goto clean1; |
7c832835 | 4641 | } else { |
1da177e4 | 4642 | if (i >= MAX_CTLR_ORIG) |
f70dba83 | 4643 | h->major = rc; |
1da177e4 LT |
4644 | } |
4645 | ||
4646 | /* make sure the board interrupts are off */ | |
f70dba83 SC |
4647 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
4648 | if (h->msi_vector || h->msix_vector) { | |
4649 | if (request_irq(h->intr[PERF_MODE_INT], | |
0c2b3908 | 4650 | do_cciss_msix_intr, |
f70dba83 | 4651 | IRQF_DISABLED, h->devname, h)) { |
b2a4a43d | 4652 | dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", |
f70dba83 | 4653 | h->intr[PERF_MODE_INT], h->devname); |
0c2b3908 MM |
4654 | goto clean2; |
4655 | } | |
4656 | } else { | |
f70dba83 SC |
4657 | if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx, |
4658 | IRQF_DISABLED, h->devname, h)) { | |
b2a4a43d | 4659 | dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", |
f70dba83 | 4660 | h->intr[PERF_MODE_INT], h->devname); |
0c2b3908 MM |
4661 | goto clean2; |
4662 | } | |
1da177e4 | 4663 | } |
40aabb58 | 4664 | |
b2a4a43d | 4665 | dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n", |
f70dba83 SC |
4666 | h->devname, pdev->device, pci_name(pdev), |
4667 | h->intr[PERF_MODE_INT], dac ? "" : " not"); | |
7c832835 | 4668 | |
f70dba83 SC |
4669 | h->cmd_pool_bits = |
4670 | kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) | |
061837bc | 4671 | * sizeof(unsigned long), GFP_KERNEL); |
f70dba83 SC |
4672 | h->cmd_pool = (CommandList_struct *) |
4673 | pci_alloc_consistent(h->pdev, | |
4674 | h->nr_cmds * sizeof(CommandList_struct), | |
4675 | &(h->cmd_pool_dhandle)); | |
4676 | h->errinfo_pool = (ErrorInfo_struct *) | |
4677 | pci_alloc_consistent(h->pdev, | |
4678 | h->nr_cmds * sizeof(ErrorInfo_struct), | |
4679 | &(h->errinfo_pool_dhandle)); | |
4680 | if ((h->cmd_pool_bits == NULL) | |
4681 | || (h->cmd_pool == NULL) | |
4682 | || (h->errinfo_pool == NULL)) { | |
b2a4a43d | 4683 | dev_err(&h->pdev->dev, "out of memory"); |
1da177e4 LT |
4684 | goto clean4; |
4685 | } | |
5c07a311 DB |
4686 | |
4687 | /* Need space for temp scatter list */ | |
f70dba83 | 4688 | h->scatter_list = kmalloc(h->max_commands * |
5c07a311 DB |
4689 | sizeof(struct scatterlist *), |
4690 | GFP_KERNEL); | |
4ee69851 DC |
4691 | if (!h->scatter_list) |
4692 | goto clean4; | |
4693 | ||
f70dba83 SC |
4694 | for (k = 0; k < h->nr_cmds; k++) { |
4695 | h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) * | |
4696 | h->maxsgentries, | |
5c07a311 | 4697 | GFP_KERNEL); |
f70dba83 | 4698 | if (h->scatter_list[k] == NULL) { |
b2a4a43d SC |
4699 | dev_err(&h->pdev->dev, |
4700 | "could not allocate s/g lists\n"); | |
5c07a311 DB |
4701 | goto clean4; |
4702 | } | |
4703 | } | |
f70dba83 SC |
4704 | h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h, |
4705 | h->chainsize, h->nr_cmds); | |
4706 | if (!h->cmd_sg_list && h->chainsize > 0) | |
5c07a311 | 4707 | goto clean4; |
5c07a311 | 4708 | |
f70dba83 | 4709 | spin_lock_init(&h->lock); |
1da177e4 | 4710 | |
7c832835 | 4711 | /* Initialize the pdev driver private data. |
f70dba83 SC |
4712 | have it point to h. */ |
4713 | pci_set_drvdata(pdev, h); | |
7c832835 BH |
4714 | /* command and error info recs zeroed out before |
4715 | they are used */ | |
f70dba83 SC |
4716 | memset(h->cmd_pool_bits, 0, |
4717 | DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) | |
061837bc | 4718 | * sizeof(unsigned long)); |
1da177e4 | 4719 | |
f70dba83 SC |
4720 | h->num_luns = 0; |
4721 | h->highest_lun = -1; | |
6ae5ce8e | 4722 | for (j = 0; j < CISS_MAX_LUN; j++) { |
f70dba83 SC |
4723 | h->drv[j] = NULL; |
4724 | h->gendisk[j] = NULL; | |
6ae5ce8e | 4725 | } |
1da177e4 | 4726 | |
f70dba83 | 4727 | cciss_scsi_setup(h); |
1da177e4 LT |
4728 | |
4729 | /* Turn the interrupts on so we can service requests */ | |
f70dba83 | 4730 | h->access.set_intr_mask(h, CCISS_INTR_ON); |
1da177e4 | 4731 | |
22bece00 MM |
4732 | /* Get the firmware version */ |
4733 | inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); | |
4734 | if (inq_buff == NULL) { | |
b2a4a43d | 4735 | dev_err(&h->pdev->dev, "out of memory\n"); |
22bece00 MM |
4736 | goto clean4; |
4737 | } | |
4738 | ||
f70dba83 | 4739 | return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, |
b57695fe | 4740 | sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD); |
22bece00 | 4741 | if (return_code == IO_OK) { |
f70dba83 SC |
4742 | h->firm_ver[0] = inq_buff->data_byte[32]; |
4743 | h->firm_ver[1] = inq_buff->data_byte[33]; | |
4744 | h->firm_ver[2] = inq_buff->data_byte[34]; | |
4745 | h->firm_ver[3] = inq_buff->data_byte[35]; | |
22bece00 | 4746 | } else { /* send command failed */ |
b2a4a43d | 4747 | dev_warn(&h->pdev->dev, "unable to determine firmware" |
22bece00 MM |
4748 | " version of controller\n"); |
4749 | } | |
212a5026 | 4750 | kfree(inq_buff); |
22bece00 | 4751 | |
f70dba83 | 4752 | cciss_procinit(h); |
92c4231a | 4753 | |
f70dba83 | 4754 | h->cciss_max_sectors = 8192; |
92c4231a | 4755 | |
f70dba83 SC |
4756 | rebuild_lun_table(h, 1, 0); |
4757 | h->busy_initializing = 0; | |
e2019b58 | 4758 | return 1; |
1da177e4 | 4759 | |
6ae5ce8e | 4760 | clean4: |
f70dba83 | 4761 | kfree(h->cmd_pool_bits); |
5c07a311 | 4762 | /* Free up sg elements */ |
b0722cb1 | 4763 | for (k-- ; k >= 0; k--) |
f70dba83 SC |
4764 | kfree(h->scatter_list[k]); |
4765 | kfree(h->scatter_list); | |
4766 | cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); | |
4767 | if (h->cmd_pool) | |
4768 | pci_free_consistent(h->pdev, | |
4769 | h->nr_cmds * sizeof(CommandList_struct), | |
4770 | h->cmd_pool, h->cmd_pool_dhandle); | |
4771 | if (h->errinfo_pool) | |
4772 | pci_free_consistent(h->pdev, | |
4773 | h->nr_cmds * sizeof(ErrorInfo_struct), | |
4774 | h->errinfo_pool, | |
4775 | h->errinfo_pool_dhandle); | |
4776 | free_irq(h->intr[PERF_MODE_INT], h); | |
6ae5ce8e | 4777 | clean2: |
f70dba83 | 4778 | unregister_blkdev(h->major, h->devname); |
6ae5ce8e | 4779 | clean1: |
f70dba83 | 4780 | cciss_destroy_hba_sysfs_entry(h); |
7fe06326 | 4781 | clean0: |
2cfa948c SC |
4782 | pci_release_regions(pdev); |
4783 | clean_no_release_regions: | |
f70dba83 | 4784 | h->busy_initializing = 0; |
9cef0d2f | 4785 | |
872225ca MM |
4786 | /* |
4787 | * Deliberately omit pci_disable_device(): it does something nasty to | |
4788 | * Smart Array controllers that pci_enable_device does not undo | |
4789 | */ | |
799202cb | 4790 | pci_set_drvdata(pdev, NULL); |
f70dba83 | 4791 | free_hba(h); |
e2019b58 | 4792 | return -1; |
1da177e4 LT |
4793 | } |
4794 | ||
e9ca75b5 | 4795 | static void cciss_shutdown(struct pci_dev *pdev) |
1da177e4 | 4796 | { |
29009a03 SC |
4797 | ctlr_info_t *h; |
4798 | char *flush_buf; | |
7c832835 | 4799 | int return_code; |
1da177e4 | 4800 | |
29009a03 SC |
4801 | h = pci_get_drvdata(pdev); |
4802 | flush_buf = kzalloc(4, GFP_KERNEL); | |
4803 | if (!flush_buf) { | |
b2a4a43d | 4804 | dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n"); |
e9ca75b5 | 4805 | return; |
e9ca75b5 | 4806 | } |
29009a03 SC |
4807 | /* write all data in the battery backed cache to disk */ |
4808 | memset(flush_buf, 0, 4); | |
f70dba83 | 4809 | return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf, |
29009a03 SC |
4810 | 4, 0, CTLR_LUNID, TYPE_CMD); |
4811 | kfree(flush_buf); | |
4812 | if (return_code != IO_OK) | |
b2a4a43d | 4813 | dev_warn(&h->pdev->dev, "Error flushing cache\n"); |
29009a03 | 4814 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
5e216153 | 4815 | free_irq(h->intr[PERF_MODE_INT], h); |
e9ca75b5 GB |
4816 | } |
4817 | ||
4818 | static void __devexit cciss_remove_one(struct pci_dev *pdev) | |
4819 | { | |
f70dba83 | 4820 | ctlr_info_t *h; |
e9ca75b5 GB |
4821 | int i, j; |
4822 | ||
7c832835 | 4823 | if (pci_get_drvdata(pdev) == NULL) { |
b2a4a43d | 4824 | dev_err(&pdev->dev, "Unable to remove device\n"); |
1da177e4 LT |
4825 | return; |
4826 | } | |
0a9279cc | 4827 | |
f70dba83 SC |
4828 | h = pci_get_drvdata(pdev); |
4829 | i = h->ctlr; | |
7c832835 | 4830 | if (hba[i] == NULL) { |
b2a4a43d | 4831 | dev_err(&pdev->dev, "device appears to already be removed\n"); |
1da177e4 LT |
4832 | return; |
4833 | } | |
b6550777 | 4834 | |
f70dba83 | 4835 | mutex_lock(&h->busy_shutting_down); |
0a9279cc | 4836 | |
f70dba83 SC |
4837 | remove_from_scan_list(h); |
4838 | remove_proc_entry(h->devname, proc_cciss); | |
4839 | unregister_blkdev(h->major, h->devname); | |
b6550777 BH |
4840 | |
4841 | /* remove it from the disk list */ | |
4842 | for (j = 0; j < CISS_MAX_LUN; j++) { | |
f70dba83 | 4843 | struct gendisk *disk = h->gendisk[j]; |
b6550777 | 4844 | if (disk) { |
165125e1 | 4845 | struct request_queue *q = disk->queue; |
b6550777 | 4846 | |
097d0264 | 4847 | if (disk->flags & GENHD_FL_UP) { |
f70dba83 | 4848 | cciss_destroy_ld_sysfs_entry(h, j, 1); |
b6550777 | 4849 | del_gendisk(disk); |
097d0264 | 4850 | } |
b6550777 BH |
4851 | if (q) |
4852 | blk_cleanup_queue(q); | |
4853 | } | |
4854 | } | |
4855 | ||
ba198efb | 4856 | #ifdef CONFIG_CISS_SCSI_TAPE |
f70dba83 | 4857 | cciss_unregister_scsi(h); /* unhook from SCSI subsystem */ |
ba198efb | 4858 | #endif |
b6550777 | 4859 | |
e9ca75b5 | 4860 | cciss_shutdown(pdev); |
fb86a35b MM |
4861 | |
4862 | #ifdef CONFIG_PCI_MSI | |
f70dba83 SC |
4863 | if (h->msix_vector) |
4864 | pci_disable_msix(h->pdev); | |
4865 | else if (h->msi_vector) | |
4866 | pci_disable_msi(h->pdev); | |
7c832835 | 4867 | #endif /* CONFIG_PCI_MSI */ |
fb86a35b | 4868 | |
f70dba83 SC |
4869 | iounmap(h->transtable); |
4870 | iounmap(h->cfgtable); | |
4871 | iounmap(h->vaddr); | |
1da177e4 | 4872 | |
f70dba83 SC |
4873 | pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct), |
4874 | h->cmd_pool, h->cmd_pool_dhandle); | |
4875 | pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct), | |
4876 | h->errinfo_pool, h->errinfo_pool_dhandle); | |
4877 | kfree(h->cmd_pool_bits); | |
5c07a311 | 4878 | /* Free up sg elements */ |
f70dba83 SC |
4879 | for (j = 0; j < h->nr_cmds; j++) |
4880 | kfree(h->scatter_list[j]); | |
4881 | kfree(h->scatter_list); | |
4882 | cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); | |
872225ca MM |
4883 | /* |
4884 | * Deliberately omit pci_disable_device(): it does something nasty to | |
4885 | * Smart Array controllers that pci_enable_device does not undo | |
4886 | */ | |
7c832835 | 4887 | pci_release_regions(pdev); |
4e570309 | 4888 | pci_set_drvdata(pdev, NULL); |
f70dba83 SC |
4889 | cciss_destroy_hba_sysfs_entry(h); |
4890 | mutex_unlock(&h->busy_shutting_down); | |
4891 | free_hba(h); | |
7c832835 | 4892 | } |
1da177e4 LT |
4893 | |
4894 | static struct pci_driver cciss_pci_driver = { | |
7c832835 BH |
4895 | .name = "cciss", |
4896 | .probe = cciss_init_one, | |
4897 | .remove = __devexit_p(cciss_remove_one), | |
4898 | .id_table = cciss_pci_device_id, /* id_table */ | |
e9ca75b5 | 4899 | .shutdown = cciss_shutdown, |
1da177e4 LT |
4900 | }; |
4901 | ||
4902 | /* | |
4903 | * This is it. Register the PCI driver information for the cards we control | |
7c832835 | 4904 | * the OS will call our registered routines when it finds one of our cards. |
1da177e4 LT |
4905 | */ |
4906 | static int __init cciss_init(void) | |
4907 | { | |
7fe06326 AP |
4908 | int err; |
4909 | ||
10cbda97 JA |
4910 | /* |
4911 | * The hardware requires that commands are aligned on a 64-bit | |
4912 | * boundary. Given that we use pci_alloc_consistent() to allocate an | |
4913 | * array of them, the size must be a multiple of 8 bytes. | |
4914 | */ | |
1b7d0d28 | 4915 | BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT); |
1da177e4 LT |
4916 | printk(KERN_INFO DRIVER_NAME "\n"); |
4917 | ||
7fe06326 AP |
4918 | err = bus_register(&cciss_bus_type); |
4919 | if (err) | |
4920 | return err; | |
4921 | ||
b368c9dd AP |
4922 | /* Start the scan thread */ |
4923 | cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan"); | |
4924 | if (IS_ERR(cciss_scan_thread)) { | |
4925 | err = PTR_ERR(cciss_scan_thread); | |
4926 | goto err_bus_unregister; | |
4927 | } | |
4928 | ||
1da177e4 | 4929 | /* Register for our PCI devices */ |
7fe06326 AP |
4930 | err = pci_register_driver(&cciss_pci_driver); |
4931 | if (err) | |
b368c9dd | 4932 | goto err_thread_stop; |
7fe06326 | 4933 | |
617e1344 | 4934 | return err; |
7fe06326 | 4935 | |
b368c9dd AP |
4936 | err_thread_stop: |
4937 | kthread_stop(cciss_scan_thread); | |
4938 | err_bus_unregister: | |
7fe06326 | 4939 | bus_unregister(&cciss_bus_type); |
b368c9dd | 4940 | |
7fe06326 | 4941 | return err; |
1da177e4 LT |
4942 | } |
4943 | ||
4944 | static void __exit cciss_cleanup(void) | |
4945 | { | |
4946 | int i; | |
4947 | ||
4948 | pci_unregister_driver(&cciss_pci_driver); | |
4949 | /* double check that all controller entrys have been removed */ | |
7c832835 BH |
4950 | for (i = 0; i < MAX_CTLR; i++) { |
4951 | if (hba[i] != NULL) { | |
b2a4a43d SC |
4952 | dev_warn(&hba[i]->pdev->dev, |
4953 | "had to remove controller\n"); | |
1da177e4 LT |
4954 | cciss_remove_one(hba[i]->pdev); |
4955 | } | |
4956 | } | |
b368c9dd | 4957 | kthread_stop(cciss_scan_thread); |
928b4d8c | 4958 | remove_proc_entry("driver/cciss", NULL); |
7fe06326 | 4959 | bus_unregister(&cciss_bus_type); |
1da177e4 LT |
4960 | } |
4961 | ||
4962 | module_init(cciss_init); | |
4963 | module_exit(cciss_cleanup); |