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Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux...
[net-next-2.6.git] / drivers / block / DAC960.c
CommitLineData
1da177e4
LT		 1/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
5b76ffd5 6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
1da177e4
LT		 7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
868047fc
MW		 20#define DAC960_DriverVersion "2.5.49"
21#define DAC960_DriverDate "21 Aug 2007"
1da177e4
LT		 22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/bio.h>
29#include <linux/completion.h>
30#include <linux/delay.h>
31#include <linux/genhd.h>
32#include <linux/hdreg.h>
33#include <linux/blkpg.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/mm.h>
37#include <linux/slab.h>
38#include <linux/proc_fs.h>
39#include <linux/reboot.h>
40#include <linux/spinlock.h>
41#include <linux/timer.h>
42#include <linux/pci.h>
43#include <linux/init.h>
50297cbf 44#include <linux/jiffies.h>
62287fbb 45#include <linux/random.h>
1da177e4
LT		 46#include <asm/io.h>
47#include <asm/uaccess.h>
48#include "DAC960.h"
49
50#define DAC960_GAM_MINOR 252
51
52
53static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
54static int DAC960_ControllerCount;
55static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
56
57static long disk_size(DAC960_Controller_T *p, int drive_nr)
58{
59 if (p->FirmwareType == DAC960_V1_Controller) {
60 if (drive_nr >= p->LogicalDriveCount)
61 return 0;
62 return p->V1.LogicalDriveInformation[drive_nr].
63 LogicalDriveSize;
64 } else {
65 DAC960_V2_LogicalDeviceInfo_T *i =
66 p->V2.LogicalDeviceInformation[drive_nr];
67 if (i == NULL)
68 return 0;
69 return i->ConfigurableDeviceSize;
70 }
71}
72
73static int DAC960_open(struct inode *inode, struct file *file)
74{
75 struct gendisk *disk = inode->i_bdev->bd_disk;
76 DAC960_Controller_T *p = disk->queue->queuedata;
77 int drive_nr = (long)disk->private_data;
78
79 if (p->FirmwareType == DAC960_V1_Controller) {
80 if (p->V1.LogicalDriveInformation[drive_nr].
81 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
82 return -ENXIO;
83 } else {
84 DAC960_V2_LogicalDeviceInfo_T *i =
85 p->V2.LogicalDeviceInformation[drive_nr];
86 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
87 return -ENXIO;
88 }
89
90 check_disk_change(inode->i_bdev);
91
92 if (!get_capacity(p->disks[drive_nr]))
93 return -ENXIO;
94 return 0;
95}
96
a885c8c4 97static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1da177e4 98{
a885c8c4 99 struct gendisk *disk = bdev->bd_disk;
1da177e4
LT		 100 DAC960_Controller_T *p = disk->queue->queuedata;
101 int drive_nr = (long)disk->private_data;
1da177e4
LT		 102
103 if (p->FirmwareType == DAC960_V1_Controller) {
a885c8c4
CH		 104 geo->heads = p->V1.GeometryTranslationHeads;
105 geo->sectors = p->V1.GeometryTranslationSectors;
106 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
107 LogicalDriveSize / (geo->heads * geo->sectors);
1da177e4
LT		 108 } else {
109 DAC960_V2_LogicalDeviceInfo_T *i =
110 p->V2.LogicalDeviceInformation[drive_nr];
111 switch (i->DriveGeometry) {
112 case DAC960_V2_Geometry_128_32:
a885c8c4
CH		 113 geo->heads = 128;
114 geo->sectors = 32;
1da177e4
LT		 115 break;
116 case DAC960_V2_Geometry_255_63:
a885c8c4
CH		 117 geo->heads = 255;
118 geo->sectors = 63;
1da177e4
LT		 119 break;
120 default:
121 DAC960_Error("Illegal Logical Device Geometry %d\n",
122 p, i->DriveGeometry);
123 return -EINVAL;
124 }
125
a885c8c4
CH		 126 geo->cylinders = i->ConfigurableDeviceSize /
127 (geo->heads * geo->sectors);
1da177e4
LT		 128 }
129
a885c8c4 130 return 0;
1da177e4
LT		 131}
132
133static int DAC960_media_changed(struct gendisk *disk)
134{
135 DAC960_Controller_T *p = disk->queue->queuedata;
136 int drive_nr = (long)disk->private_data;
137
138 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
139 return 1;
140 return 0;
141}
142
143static int DAC960_revalidate_disk(struct gendisk *disk)
144{
145 DAC960_Controller_T *p = disk->queue->queuedata;
146 int unit = (long)disk->private_data;
147
148 set_capacity(disk, disk_size(p, unit));
149 return 0;
150}
151
152static struct block_device_operations DAC960_BlockDeviceOperations = {
153 .owner = THIS_MODULE,
154 .open = DAC960_open,
a885c8c4 155 .getgeo = DAC960_getgeo,
1da177e4
LT		 156 .media_changed = DAC960_media_changed,
157 .revalidate_disk = DAC960_revalidate_disk,
158};
159
160
161/*
162 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
163 Copyright Notice, and Electronic Mail Address.
164*/
165
166static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
167{
168 DAC960_Announce("***** DAC960 RAID Driver Version "
169 DAC960_DriverVersion " of "
170 DAC960_DriverDate " *****\n", Controller);
171 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
172 "<lnz@dandelion.com>\n", Controller);
173}
174
175
176/*
177 DAC960_Failure prints a standardized error message, and then returns false.
178*/
179
87d156bf 180static bool DAC960_Failure(DAC960_Controller_T *Controller,
1da177e4
LT		 181 unsigned char *ErrorMessage)
182{
183 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
184 Controller);
185 if (Controller->IO_Address == 0)
186 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
187 "PCI Address 0x%X\n", Controller,
188 Controller->Bus, Controller->Device,
189 Controller->Function, Controller->PCI_Address);
190 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
191 "0x%X PCI Address 0x%X\n", Controller,
192 Controller->Bus, Controller->Device,
193 Controller->Function, Controller->IO_Address,
194 Controller->PCI_Address);
195 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
196 return false;
197}
198
199/*
200 init_dma_loaf() and slice_dma_loaf() are helper functions for
201 aggregating the dma-mapped memory for a well-known collection of
202 data structures that are of different lengths.
203
204 These routines don't guarantee any alignment. The caller must
205 include any space needed for alignment in the sizes of the structures
206 that are passed in.
207 */
208
87d156bf 209static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
1da177e4
LT		 210 size_t len)
211{
212 void *cpu_addr;
213 dma_addr_t dma_handle;
214
215 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
216 if (cpu_addr == NULL)
217 return false;
218
219 loaf->cpu_free = loaf->cpu_base = cpu_addr;
220 loaf->dma_free =loaf->dma_base = dma_handle;
221 loaf->length = len;
222 memset(cpu_addr, 0, len);
223 return true;
224}
225
226static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
227 dma_addr_t *dma_handle)
228{
229 void *cpu_end = loaf->cpu_free + len;
230 void *cpu_addr = loaf->cpu_free;
231
089fe1b2 232 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
1da177e4
LT		 233 *dma_handle = loaf->dma_free;
234 loaf->cpu_free = cpu_end;
235 loaf->dma_free += len;
236 return cpu_addr;
237}
238
239static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
240{
241 if (loaf_handle->cpu_base != NULL)
242 pci_free_consistent(dev, loaf_handle->length,
243 loaf_handle->cpu_base, loaf_handle->dma_base);
244}
245
246
247/*
248 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
249 data structures for Controller. It returns true on success and false on
250 failure.
251*/
252
87d156bf 253static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
1da177e4
LT		 254{
255 int CommandAllocationLength, CommandAllocationGroupSize;
256 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
257 void *AllocationPointer = NULL;
258 void *ScatterGatherCPU = NULL;
259 dma_addr_t ScatterGatherDMA;
260 struct pci_pool *ScatterGatherPool;
261 void *RequestSenseCPU = NULL;
262 dma_addr_t RequestSenseDMA;
263 struct pci_pool *RequestSensePool = NULL;
264
265 if (Controller->FirmwareType == DAC960_V1_Controller)
266 {
267 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
268 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
269 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
270 Controller->PCIDevice,
271 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
272 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
273 if (ScatterGatherPool == NULL)
274 return DAC960_Failure(Controller,
275 "AUXILIARY STRUCTURE CREATION (SG)");
276 Controller->ScatterGatherPool = ScatterGatherPool;
277 }
278 else
279 {
280 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
281 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
282 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
283 Controller->PCIDevice,
284 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
285 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
286 if (ScatterGatherPool == NULL)
287 return DAC960_Failure(Controller,
288 "AUXILIARY STRUCTURE CREATION (SG)");
289 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
290 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
291 sizeof(int), 0);
292 if (RequestSensePool == NULL) {
293 pci_pool_destroy(ScatterGatherPool);
294 return DAC960_Failure(Controller,
295 "AUXILIARY STRUCTURE CREATION (SG)");
296 }
297 Controller->ScatterGatherPool = ScatterGatherPool;
298 Controller->V2.RequestSensePool = RequestSensePool;
299 }
300 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
301 Controller->FreeCommands = NULL;
302 for (CommandIdentifier = 1;
303 CommandIdentifier <= Controller->DriverQueueDepth;
304 CommandIdentifier++)
305 {
306 DAC960_Command_T *Command;
307 if (--CommandsRemaining <= 0)
308 {
309 CommandsRemaining =
310 Controller->DriverQueueDepth - CommandIdentifier + 1;
311 if (CommandsRemaining > CommandAllocationGroupSize)
312 CommandsRemaining = CommandAllocationGroupSize;
313 CommandGroupByteCount =
314 CommandsRemaining * CommandAllocationLength;
06ff37ff 315 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
1da177e4
LT		 316 if (AllocationPointer == NULL)
317 return DAC960_Failure(Controller,
318 "AUXILIARY STRUCTURE CREATION");
1da177e4
LT		 319 }
320 Command = (DAC960_Command_T *) AllocationPointer;
321 AllocationPointer += CommandAllocationLength;
322 Command->CommandIdentifier = CommandIdentifier;
323 Command->Controller = Controller;
324 Command->Next = Controller->FreeCommands;
325 Controller->FreeCommands = Command;
326 Controller->Commands[CommandIdentifier-1] = Command;
54e6ecb2 327 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
1da177e4
LT		 328 &ScatterGatherDMA);
329 if (ScatterGatherCPU == NULL)
330 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
331
332 if (RequestSensePool != NULL) {
54e6ecb2 333 RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
1da177e4
LT		 334 &RequestSenseDMA);
335 if (RequestSenseCPU == NULL) {
336 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
337 ScatterGatherDMA);
338 return DAC960_Failure(Controller,
339 "AUXILIARY STRUCTURE CREATION");
340 }
341 }
342 if (Controller->FirmwareType == DAC960_V1_Controller) {
343 Command->cmd_sglist = Command->V1.ScatterList;
344 Command->V1.ScatterGatherList =
345 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
346 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
347 } else {
348 Command->cmd_sglist = Command->V2.ScatterList;
349 Command->V2.ScatterGatherList =
350 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
351 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
352 Command->V2.RequestSense =
353 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
354 Command->V2.RequestSenseDMA = RequestSenseDMA;
355 }
356 }
357 return true;
358}
359
360
361/*
362 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
363 structures for Controller.
364*/
365
366static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
367{
368 int i;
369 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
370 struct pci_pool *RequestSensePool = NULL;
371 void *ScatterGatherCPU;
372 dma_addr_t ScatterGatherDMA;
373 void *RequestSenseCPU;
374 dma_addr_t RequestSenseDMA;
375 DAC960_Command_T *CommandGroup = NULL;
376
377
378 if (Controller->FirmwareType == DAC960_V2_Controller)
379 RequestSensePool = Controller->V2.RequestSensePool;
380
381 Controller->FreeCommands = NULL;
382 for (i = 0; i < Controller->DriverQueueDepth; i++)
383 {
384 DAC960_Command_T *Command = Controller->Commands[i];
385
386 if (Command == NULL)
387 continue;
388
389 if (Controller->FirmwareType == DAC960_V1_Controller) {
390 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
391 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
392 RequestSenseCPU = NULL;
393 RequestSenseDMA = (dma_addr_t)0;
394 } else {
395 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
396 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
397 RequestSenseCPU = (void *)Command->V2.RequestSense;
398 RequestSenseDMA = Command->V2.RequestSenseDMA;
399 }
400 if (ScatterGatherCPU != NULL)
401 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
402 if (RequestSenseCPU != NULL)
403 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
404
405 if ((Command->CommandIdentifier
406 % Controller->CommandAllocationGroupSize) == 1) {
407 /*
408 * We can't free the group of commands until all of the
409 * request sense and scatter gather dma structures are free.
410 * Remember the beginning of the group, but don't free it
411 * until we've reached the beginning of the next group.
412 */
6044ec88
JJ		 413 kfree(CommandGroup);
414 CommandGroup = Command;
1da177e4
LT		 415 }
416 Controller->Commands[i] = NULL;
417 }
6044ec88 418 kfree(CommandGroup);
1da177e4
LT		 419
420 if (Controller->CombinedStatusBuffer != NULL)
421 {
422 kfree(Controller->CombinedStatusBuffer);
423 Controller->CombinedStatusBuffer = NULL;
424 Controller->CurrentStatusBuffer = NULL;
425 }
426
427 if (ScatterGatherPool != NULL)
428 pci_pool_destroy(ScatterGatherPool);
6044ec88
JJ		 429 if (Controller->FirmwareType == DAC960_V1_Controller)
430 return;
1da177e4
LT		 431
432 if (RequestSensePool != NULL)
433 pci_pool_destroy(RequestSensePool);
434
6044ec88 435 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
1da177e4
LT		 436 kfree(Controller->V2.LogicalDeviceInformation[i]);
437 Controller->V2.LogicalDeviceInformation[i] = NULL;
6044ec88 438 }
1da177e4
LT		 439
440 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
441 {
6044ec88
JJ		 442 kfree(Controller->V2.PhysicalDeviceInformation[i]);
443 Controller->V2.PhysicalDeviceInformation[i] = NULL;
444 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
445 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
1da177e4
LT		 446 }
447}
448
449
450/*
451 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
452 Firmware Controllers.
453*/
454
455static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
456{
457 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
458 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
459 Command->V1.CommandStatus = 0;
460}
461
462
463/*
464 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
465 Firmware Controllers.
466*/
467
468static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
469{
470 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
471 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
472 Command->V2.CommandStatus = 0;
473}
474
475
476/*
477 DAC960_AllocateCommand allocates a Command structure from Controller's
478 free list. During driver initialization, a special initialization command
479 has been placed on the free list to guarantee that command allocation can
480 never fail.
481*/
482
483static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
484 *Controller)
485{
486 DAC960_Command_T *Command = Controller->FreeCommands;
487 if (Command == NULL) return NULL;
488 Controller->FreeCommands = Command->Next;
489 Command->Next = NULL;
490 return Command;
491}
492
493
494/*
495 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
496 free list.
497*/
498
499static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
500{
501 DAC960_Controller_T *Controller = Command->Controller;
502
503 Command->Request = NULL;
504 Command->Next = Controller->FreeCommands;
505 Controller->FreeCommands = Command;
506}
507
508
509/*
510 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
511*/
512
513static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
514{
515 spin_unlock_irq(&Controller->queue_lock);
516 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
517 spin_lock_irq(&Controller->queue_lock);
518}
519
5b76ffd5
CH		 520/*
521 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
522*/
523
524static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
525{
526 DAC960_Controller_T *Controller = Command->Controller;
527 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
528 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
529 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
530 Controller->V2.NextCommandMailbox;
531
532 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
533 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
534
535 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
536 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
537 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
538
539 Controller->V2.PreviousCommandMailbox2 =
540 Controller->V2.PreviousCommandMailbox1;
541 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
542
543 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
544 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
545
546 Controller->V2.NextCommandMailbox = NextCommandMailbox;
547}
1da177e4
LT		 548
549/*
550 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
551*/
552
553static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
554{
555 DAC960_Controller_T *Controller = Command->Controller;
556 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
557 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
558 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
559 Controller->V2.NextCommandMailbox;
560 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
561 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
562 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
563 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
564 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
565 Controller->V2.PreviousCommandMailbox2 =
566 Controller->V2.PreviousCommandMailbox1;
567 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
568 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
569 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
570 Controller->V2.NextCommandMailbox = NextCommandMailbox;
571}
572
573
574/*
575 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
576*/
577
578static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
579{
580 DAC960_Controller_T *Controller = Command->Controller;
581 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
582 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
583 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
584 Controller->V2.NextCommandMailbox;
585 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
586 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
587 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
588 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
589 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
590 Controller->V2.PreviousCommandMailbox2 =
591 Controller->V2.PreviousCommandMailbox1;
592 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
593 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
594 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
595 Controller->V2.NextCommandMailbox = NextCommandMailbox;
596}
597
598
599/*
600 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
601 Controllers with Dual Mode Firmware.
602*/
603
604static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
605{
606 DAC960_Controller_T *Controller = Command->Controller;
607 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
608 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
609 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
610 Controller->V1.NextCommandMailbox;
611 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
612 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
613 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
614 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
615 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
616 Controller->V1.PreviousCommandMailbox2 =
617 Controller->V1.PreviousCommandMailbox1;
618 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
619 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
620 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
621 Controller->V1.NextCommandMailbox = NextCommandMailbox;
622}
623
624
625/*
626 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
627 Controllers with Single Mode Firmware.
628*/
629
630static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
631{
632 DAC960_Controller_T *Controller = Command->Controller;
633 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
634 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
635 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
636 Controller->V1.NextCommandMailbox;
637 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
638 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
639 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
640 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
641 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
642 Controller->V1.PreviousCommandMailbox2 =
643 Controller->V1.PreviousCommandMailbox1;
644 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
645 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
646 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
647 Controller->V1.NextCommandMailbox = NextCommandMailbox;
648}
649
650
651/*
652 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
653 Controllers with Dual Mode Firmware.
654*/
655
656static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
657{
658 DAC960_Controller_T *Controller = Command->Controller;
659 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
660 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
661 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
662 Controller->V1.NextCommandMailbox;
663 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
664 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
665 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
666 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
667 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
668 Controller->V1.PreviousCommandMailbox2 =
669 Controller->V1.PreviousCommandMailbox1;
670 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
671 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
672 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
673 Controller->V1.NextCommandMailbox = NextCommandMailbox;
674}
675
676
677/*
678 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
679 Controllers with Single Mode Firmware.
680*/
681
682static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
683{
684 DAC960_Controller_T *Controller = Command->Controller;
685 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
686 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
687 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
688 Controller->V1.NextCommandMailbox;
689 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
690 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
691 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
692 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
693 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
694 Controller->V1.PreviousCommandMailbox2 =
695 Controller->V1.PreviousCommandMailbox1;
696 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
697 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
698 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
699 Controller->V1.NextCommandMailbox = NextCommandMailbox;
700}
701
702
703/*
704 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
705*/
706
707static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
708{
709 DAC960_Controller_T *Controller = Command->Controller;
710 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
711 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
712 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
713 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
714 udelay(1);
715 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
716 DAC960_PD_NewCommand(ControllerBaseAddress);
717}
718
719
720/*
721 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
722*/
723
724static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
725{
726 DAC960_Controller_T *Controller = Command->Controller;
727 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
728 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
729 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
730 switch (CommandMailbox->Common.CommandOpcode)
731 {
732 case DAC960_V1_Enquiry:
733 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
734 break;
735 case DAC960_V1_GetDeviceState:
736 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
737 break;
738 case DAC960_V1_Read:
739 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
740 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
741 break;
742 case DAC960_V1_Write:
743 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
744 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
745 break;
746 case DAC960_V1_ReadWithScatterGather:
747 CommandMailbox->Common.CommandOpcode =
748 DAC960_V1_ReadWithScatterGather_Old;
749 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
750 break;
751 case DAC960_V1_WriteWithScatterGather:
752 CommandMailbox->Common.CommandOpcode =
753 DAC960_V1_WriteWithScatterGather_Old;
754 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
755 break;
756 default:
757 break;
758 }
759 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
760 udelay(1);
761 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
762 DAC960_PD_NewCommand(ControllerBaseAddress);
763}
764
765
766/*
767 DAC960_ExecuteCommand executes Command and waits for completion.
768*/
769
770static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
771{
772 DAC960_Controller_T *Controller = Command->Controller;
6e9a4738 773 DECLARE_COMPLETION_ONSTACK(Completion);
1da177e4
LT		 774 unsigned long flags;
775 Command->Completion = &Completion;
776
777 spin_lock_irqsave(&Controller->queue_lock, flags);
778 DAC960_QueueCommand(Command);
779 spin_unlock_irqrestore(&Controller->queue_lock, flags);
780
781 if (in_interrupt())
782 return;
783 wait_for_completion(&Completion);
784}
785
786
787/*
788 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
789 Command and waits for completion. It returns true on success and false
790 on failure.
791*/
792
87d156bf 793static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
1da177e4
LT		 794 DAC960_V1_CommandOpcode_T CommandOpcode,
795 dma_addr_t DataDMA)
796{
797 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
798 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
799 DAC960_V1_CommandStatus_T CommandStatus;
800 DAC960_V1_ClearCommand(Command);
801 Command->CommandType = DAC960_ImmediateCommand;
802 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
803 CommandMailbox->Type3.BusAddress = DataDMA;
804 DAC960_ExecuteCommand(Command);
805 CommandStatus = Command->V1.CommandStatus;
806 DAC960_DeallocateCommand(Command);
807 return (CommandStatus == DAC960_V1_NormalCompletion);
808}
809
810
811/*
812 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
813 Command and waits for completion. It returns true on success and false
814 on failure.
815*/
816
87d156bf 817static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
1da177e4
LT		 818 DAC960_V1_CommandOpcode_T CommandOpcode,
819 unsigned char CommandOpcode2,
820 dma_addr_t DataDMA)
821{
822 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
823 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
824 DAC960_V1_CommandStatus_T CommandStatus;
825 DAC960_V1_ClearCommand(Command);
826 Command->CommandType = DAC960_ImmediateCommand;
827 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
828 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
829 CommandMailbox->Type3B.BusAddress = DataDMA;
830 DAC960_ExecuteCommand(Command);
831 CommandStatus = Command->V1.CommandStatus;
832 DAC960_DeallocateCommand(Command);
833 return (CommandStatus == DAC960_V1_NormalCompletion);
834}
835
836
837/*
838 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
839 Command and waits for completion. It returns true on success and false
840 on failure.
841*/
842
87d156bf 843static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
1da177e4
LT		 844 DAC960_V1_CommandOpcode_T CommandOpcode,
845 unsigned char Channel,
846 unsigned char TargetID,
847 dma_addr_t DataDMA)
848{
849 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
850 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
851 DAC960_V1_CommandStatus_T CommandStatus;
852 DAC960_V1_ClearCommand(Command);
853 Command->CommandType = DAC960_ImmediateCommand;
854 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
855 CommandMailbox->Type3D.Channel = Channel;
856 CommandMailbox->Type3D.TargetID = TargetID;
857 CommandMailbox->Type3D.BusAddress = DataDMA;
858 DAC960_ExecuteCommand(Command);
859 CommandStatus = Command->V1.CommandStatus;
860 DAC960_DeallocateCommand(Command);
861 return (CommandStatus == DAC960_V1_NormalCompletion);
862}
863
864
865/*
866 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
867 Reading IOCTL Command and waits for completion. It returns true on success
868 and false on failure.
869
870 Return data in The controller's HealthStatusBuffer, which is dma-able memory
871*/
872
87d156bf 873static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 874{
875 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
876 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
877 DAC960_V2_CommandStatus_T CommandStatus;
878 DAC960_V2_ClearCommand(Command);
879 Command->CommandType = DAC960_ImmediateCommand;
880 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
881 CommandMailbox->Common.CommandControlBits
882 .DataTransferControllerToHost = true;
883 CommandMailbox->Common.CommandControlBits
884 .NoAutoRequestSense = true;
885 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
886 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
887 CommandMailbox->Common.DataTransferMemoryAddress
888 .ScatterGatherSegments[0]
889 .SegmentDataPointer =
890 Controller->V2.HealthStatusBufferDMA;
891 CommandMailbox->Common.DataTransferMemoryAddress
892 .ScatterGatherSegments[0]
893 .SegmentByteCount =
894 CommandMailbox->Common.DataTransferSize;
895 DAC960_ExecuteCommand(Command);
896 CommandStatus = Command->V2.CommandStatus;
897 DAC960_DeallocateCommand(Command);
898 return (CommandStatus == DAC960_V2_NormalCompletion);
899}
900
901
902/*
903 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
904 Information Reading IOCTL Command and waits for completion. It returns
905 true on success and false on failure.
906
907 Data is returned in the controller's V2.NewControllerInformation dma-able
908 memory buffer.
909*/
910
87d156bf 911static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 912{
913 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
914 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
915 DAC960_V2_CommandStatus_T CommandStatus;
916 DAC960_V2_ClearCommand(Command);
917 Command->CommandType = DAC960_ImmediateCommand;
918 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
919 CommandMailbox->ControllerInfo.CommandControlBits
920 .DataTransferControllerToHost = true;
921 CommandMailbox->ControllerInfo.CommandControlBits
922 .NoAutoRequestSense = true;
923 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
924 CommandMailbox->ControllerInfo.ControllerNumber = 0;
925 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
926 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
927 .ScatterGatherSegments[0]
928 .SegmentDataPointer =
929 Controller->V2.NewControllerInformationDMA;
930 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
931 .ScatterGatherSegments[0]
932 .SegmentByteCount =
933 CommandMailbox->ControllerInfo.DataTransferSize;
934 DAC960_ExecuteCommand(Command);
935 CommandStatus = Command->V2.CommandStatus;
936 DAC960_DeallocateCommand(Command);
937 return (CommandStatus == DAC960_V2_NormalCompletion);
938}
939
940
941/*
942 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
943 Device Information Reading IOCTL Command and waits for completion. It
944 returns true on success and false on failure.
945
946 Data is returned in the controller's V2.NewLogicalDeviceInformation
947*/
948
87d156bf 949static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 950 unsigned short LogicalDeviceNumber)
951{
952 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
953 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
954 DAC960_V2_CommandStatus_T CommandStatus;
955
956 DAC960_V2_ClearCommand(Command);
957 Command->CommandType = DAC960_ImmediateCommand;
958 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
959 DAC960_V2_IOCTL;
960 CommandMailbox->LogicalDeviceInfo.CommandControlBits
961 .DataTransferControllerToHost = true;
962 CommandMailbox->LogicalDeviceInfo.CommandControlBits
963 .NoAutoRequestSense = true;
964 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
965 sizeof(DAC960_V2_LogicalDeviceInfo_T);
966 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
967 LogicalDeviceNumber;
968 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
969 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
970 .ScatterGatherSegments[0]
971 .SegmentDataPointer =
972 Controller->V2.NewLogicalDeviceInformationDMA;
973 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
974 .ScatterGatherSegments[0]
975 .SegmentByteCount =
976 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
977 DAC960_ExecuteCommand(Command);
978 CommandStatus = Command->V2.CommandStatus;
979 DAC960_DeallocateCommand(Command);
980 return (CommandStatus == DAC960_V2_NormalCompletion);
981}
982
983
984/*
985 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
986 Physical Device Information" IOCTL Command and waits for completion. It
987 returns true on success and false on failure.
988
989 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
990 this function is called for a given controller. This will return data
991 for the "first" device on that controller. The returned data includes a
992 Channel, TargetID, LogicalUnit that can be passed in to this routine to
993 get data for the NEXT device on that controller.
994
995 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
996 memory buffer.
997
998*/
999
87d156bf 1000static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 1001 unsigned char Channel,
1002 unsigned char TargetID,
1003 unsigned char LogicalUnit)
1004{
1005 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1006 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1007 DAC960_V2_CommandStatus_T CommandStatus;
1008
1009 DAC960_V2_ClearCommand(Command);
1010 Command->CommandType = DAC960_ImmediateCommand;
1011 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1012 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1013 .DataTransferControllerToHost = true;
1014 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1015 .NoAutoRequestSense = true;
1016 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1017 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1018 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1019 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1020 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1021 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1022 DAC960_V2_GetPhysicalDeviceInfoValid;
1023 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1024 .ScatterGatherSegments[0]
1025 .SegmentDataPointer =
1026 Controller->V2.NewPhysicalDeviceInformationDMA;
1027 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1028 .ScatterGatherSegments[0]
1029 .SegmentByteCount =
1030 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1031 DAC960_ExecuteCommand(Command);
1032 CommandStatus = Command->V2.CommandStatus;
1033 DAC960_DeallocateCommand(Command);
1034 return (CommandStatus == DAC960_V2_NormalCompletion);
1035}
1036
1037
1038static void DAC960_V2_ConstructNewUnitSerialNumber(
1039 DAC960_Controller_T *Controller,
1040 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1041 int LogicalUnit)
1042{
1043 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1044 CommandMailbox->SCSI_10.CommandControlBits
1045 .DataTransferControllerToHost = true;
1046 CommandMailbox->SCSI_10.CommandControlBits
1047 .NoAutoRequestSense = true;
1048 CommandMailbox->SCSI_10.DataTransferSize =
1049 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1050 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1051 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1052 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1053 CommandMailbox->SCSI_10.CDBLength = 6;
1054 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1055 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1056 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1057 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1058 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1059 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1060 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1061 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1062 .ScatterGatherSegments[0]
1063 .SegmentDataPointer =
1064 Controller->V2.NewInquiryUnitSerialNumberDMA;
1065 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1066 .ScatterGatherSegments[0]
1067 .SegmentByteCount =
1068 CommandMailbox->SCSI_10.DataTransferSize;
1069}
1070
1071
1072/*
1073 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1074 Inquiry command to a SCSI device identified by Channel number,
1075 Target id, Logical Unit Number. This function Waits for completion
1076 of the command.
1077
1078 The return data includes Unit Serial Number information for the
1079 specified device.
1080
1081 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1082 memory buffer.
1083*/
1084
87d156bf 1085static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1da177e4
LT		 1086 int Channel, int TargetID, int LogicalUnit)
1087{
1088 DAC960_Command_T *Command;
1089 DAC960_V2_CommandMailbox_T *CommandMailbox;
1090 DAC960_V2_CommandStatus_T CommandStatus;
1091
1092 Command = DAC960_AllocateCommand(Controller);
1093 CommandMailbox = &Command->V2.CommandMailbox;
1094 DAC960_V2_ClearCommand(Command);
1095 Command->CommandType = DAC960_ImmediateCommand;
1096
1097 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1098 Channel, TargetID, LogicalUnit);
1099
1100 DAC960_ExecuteCommand(Command);
1101 CommandStatus = Command->V2.CommandStatus;
1102 DAC960_DeallocateCommand(Command);
1103 return (CommandStatus == DAC960_V2_NormalCompletion);
1104}
1105
1106
1107/*
1108 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1109 Operation IOCTL Command and waits for completion. It returns true on
1110 success and false on failure.
1111*/
1112
87d156bf 1113static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1da177e4
LT		 1114 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1115 DAC960_V2_OperationDevice_T
1116 OperationDevice)
1117{
1118 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1119 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1120 DAC960_V2_CommandStatus_T CommandStatus;
1121 DAC960_V2_ClearCommand(Command);
1122 Command->CommandType = DAC960_ImmediateCommand;
1123 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1124 CommandMailbox->DeviceOperation.CommandControlBits
1125 .DataTransferControllerToHost = true;
1126 CommandMailbox->DeviceOperation.CommandControlBits
1127 .NoAutoRequestSense = true;
1128 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1129 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1130 DAC960_ExecuteCommand(Command);
1131 CommandStatus = Command->V2.CommandStatus;
1132 DAC960_DeallocateCommand(Command);
1133 return (CommandStatus == DAC960_V2_NormalCompletion);
1134}
1135
1136
1137/*
1138 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1139 for DAC960 V1 Firmware Controllers.
1140
1141 PD and P controller types have no memory mailbox, but still need the
1142 other dma mapped memory.
1143*/
1144
87d156bf 1145static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1146 *Controller)
1147{
1148 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1149 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1150 struct pci_dev *PCI_Device = Controller->PCIDevice;
1151 struct dma_loaf *DmaPages = &Controller->DmaPages;
1152 size_t DmaPagesSize;
1153 size_t CommandMailboxesSize;
1154 size_t StatusMailboxesSize;
1155
1156 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1157 dma_addr_t CommandMailboxesMemoryDMA;
1158
1159 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1160 dma_addr_t StatusMailboxesMemoryDMA;
1161
1162 DAC960_V1_CommandMailbox_T CommandMailbox;
1163 DAC960_V1_CommandStatus_T CommandStatus;
1164 int TimeoutCounter;
1165 int i;
1166
1167
868047fc 1168 if (pci_set_dma_mask(Controller->PCIDevice, DMA_32BIT_MASK))
1da177e4 1169 return DAC960_Failure(Controller, "DMA mask out of range");
868047fc 1170 Controller->BounceBufferLimit = DMA_32BIT_MASK;
1da177e4
LT		 1171
1172 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1173 CommandMailboxesSize = 0;
1174 StatusMailboxesSize = 0;
1175 } else {
1176 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1177 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1178 }
1179 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1180 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1181 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1182 sizeof(DAC960_V1_RebuildProgress_T) +
1183 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1184 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1185 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1186 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1187
1188 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1189 return false;
1190
1191
1192 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1193 goto skip_mailboxes;
1194
1195 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1196 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1197
1198 /* These are the base addresses for the command memory mailbox array */
1199 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1200 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1201
1202 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1203 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1204 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1205 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1206 Controller->V1.PreviousCommandMailbox2 =
1207 Controller->V1.LastCommandMailbox - 1;
1208
1209 /* These are the base addresses for the status memory mailbox array */
1210 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1211 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1212
1213 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1214 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1215 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1216 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1217 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1218
1219skip_mailboxes:
1220 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1221 sizeof(DAC960_V1_DCDB_T),
1222 &Controller->V1.MonitoringDCDB_DMA);
1223
1224 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1225 sizeof(DAC960_V1_Enquiry_T),
1226 &Controller->V1.NewEnquiryDMA);
1227
1228 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1229 sizeof(DAC960_V1_ErrorTable_T),
1230 &Controller->V1.NewErrorTableDMA);
1231
1232 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1233 sizeof(DAC960_V1_EventLogEntry_T),
1234 &Controller->V1.EventLogEntryDMA);
1235
1236 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1237 sizeof(DAC960_V1_RebuildProgress_T),
1238 &Controller->V1.RebuildProgressDMA);
1239
1240 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1241 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1242 &Controller->V1.NewLogicalDriveInformationDMA);
1243
1244 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1245 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1246 &Controller->V1.BackgroundInitializationStatusDMA);
1247
1248 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1249 sizeof(DAC960_V1_DeviceState_T),
1250 &Controller->V1.NewDeviceStateDMA);
1251
1252 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1253 sizeof(DAC960_SCSI_Inquiry_T),
1254 &Controller->V1.NewInquiryStandardDataDMA);
1255
1256 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1257 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1258 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1259
1260 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1261 return true;
1262
1263 /* Enable the Memory Mailbox Interface. */
1264 Controller->V1.DualModeMemoryMailboxInterface = true;
1265 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1266 CommandMailbox.TypeX.CommandIdentifier = 0;
1267 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1268 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1269 Controller->V1.FirstCommandMailboxDMA;
1270 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1271 Controller->V1.FirstStatusMailboxDMA;
1272#define TIMEOUT_COUNT 1000000
1273
1274 for (i = 0; i < 2; i++)
1275 switch (Controller->HardwareType)
1276 {
1277 case DAC960_LA_Controller:
1278 TimeoutCounter = TIMEOUT_COUNT;
1279 while (--TimeoutCounter >= 0)
1280 {
1281 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1282 break;
1283 udelay(10);
1284 }
1285 if (TimeoutCounter < 0) return false;
1286 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1287 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1288 TimeoutCounter = TIMEOUT_COUNT;
1289 while (--TimeoutCounter >= 0)
1290 {
1291 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1292 ControllerBaseAddress))
1293 break;
1294 udelay(10);
1295 }
1296 if (TimeoutCounter < 0) return false;
1297 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1298 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1299 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1300 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1301 Controller->V1.DualModeMemoryMailboxInterface = false;
1302 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1303 break;
1304 case DAC960_PG_Controller:
1305 TimeoutCounter = TIMEOUT_COUNT;
1306 while (--TimeoutCounter >= 0)
1307 {
1308 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1309 break;
1310 udelay(10);
1311 }
1312 if (TimeoutCounter < 0) return false;
1313 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1314 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1315
1316 TimeoutCounter = TIMEOUT_COUNT;
1317 while (--TimeoutCounter >= 0)
1318 {
1319 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1320 ControllerBaseAddress))
1321 break;
1322 udelay(10);
1323 }
1324 if (TimeoutCounter < 0) return false;
1325 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1326 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1327 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1328 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1329 Controller->V1.DualModeMemoryMailboxInterface = false;
1330 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1331 break;
1332 default:
1333 DAC960_Failure(Controller, "Unknown Controller Type\n");
1334 break;
1335 }
1336 return false;
1337}
1338
1339
1340/*
1341 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1342 for DAC960 V2 Firmware Controllers.
1343
1344 Aggregate the space needed for the controller's memory mailbox and
1345 the other data structures that will be targets of dma transfers with
1346 the controller. Allocate a dma-mapped region of memory to hold these
1347 structures. Then, save CPU pointers and dma_addr_t values to reference
1348 the structures that are contained in that region.
1349*/
1350
87d156bf 1351static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1352 *Controller)
1353{
1354 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1355 struct pci_dev *PCI_Device = Controller->PCIDevice;
1356 struct dma_loaf *DmaPages = &Controller->DmaPages;
1357 size_t DmaPagesSize;
1358 size_t CommandMailboxesSize;
1359 size_t StatusMailboxesSize;
1360
1361 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1362 dma_addr_t CommandMailboxesMemoryDMA;
1363
1364 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1365 dma_addr_t StatusMailboxesMemoryDMA;
1366
1367 DAC960_V2_CommandMailbox_T *CommandMailbox;
1368 dma_addr_t CommandMailboxDMA;
1369 DAC960_V2_CommandStatus_T CommandStatus;
1370
868047fc
MW		 1371 if (!pci_set_dma_mask(Controller->PCIDevice, DMA_64BIT_MASK))
1372 Controller->BounceBufferLimit = DMA_64BIT_MASK;
1373 else if (!pci_set_dma_mask(Controller->PCIDevice, DMA_32BIT_MASK))
1374 Controller->BounceBufferLimit = DMA_32BIT_MASK;
1375 else
1376 return DAC960_Failure(Controller, "DMA mask out of range");
1da177e4
LT		 1377
1378 /* This is a temporary dma mapping, used only in the scope of this function */
0a361e31 1379 CommandMailbox = pci_alloc_consistent(PCI_Device,
1da177e4
LT		 1380 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1381 if (CommandMailbox == NULL)
1382 return false;
1383
1384 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1385 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1386 DmaPagesSize =
1387 CommandMailboxesSize + StatusMailboxesSize +
1388 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1389 sizeof(DAC960_V2_ControllerInfo_T) +
1390 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1391 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1392 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1393 sizeof(DAC960_V2_Event_T) +
1394 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1395
1396 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1397 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1398 CommandMailbox, CommandMailboxDMA);
1399 return false;
1400 }
1401
1402 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1403 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1404
1405 /* These are the base addresses for the command memory mailbox array */
1406 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1407 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1408
1409 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1410 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1411 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1412 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1413 Controller->V2.PreviousCommandMailbox2 =
1414 Controller->V2.LastCommandMailbox - 1;
1415
1416 /* These are the base addresses for the status memory mailbox array */
1417 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1418 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1419
1420 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1421 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1422 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1423 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1424 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1425
1426 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1427 sizeof(DAC960_V2_HealthStatusBuffer_T),
1428 &Controller->V2.HealthStatusBufferDMA);
1429
1430 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1431 sizeof(DAC960_V2_ControllerInfo_T),
1432 &Controller->V2.NewControllerInformationDMA);
1433
1434 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1435 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1436 &Controller->V2.NewLogicalDeviceInformationDMA);
1437
1438 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1439 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1440 &Controller->V2.NewPhysicalDeviceInformationDMA);
1441
1442 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1443 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1444 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1445
1446 Controller->V2.Event = slice_dma_loaf(DmaPages,
1447 sizeof(DAC960_V2_Event_T),
1448 &Controller->V2.EventDMA);
1449
1450 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1451 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1452 &Controller->V2.PhysicalToLogicalDeviceDMA);
1453
1454 /*
1455 Enable the Memory Mailbox Interface.
1456
1457 I don't know why we can't just use one of the memory mailboxes
1458 we just allocated to do this, instead of using this temporary one.
1459 Try this change later.
1460 */
1461 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1462 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1463 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1464 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1465 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1466 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1467 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1468 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1469 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1470 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1471 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1472 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1473 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1474 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1475 Controller->V2.HealthStatusBufferDMA;
1476 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1477 Controller->V2.FirstCommandMailboxDMA;
1478 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1479 Controller->V2.FirstStatusMailboxDMA;
1480 switch (Controller->HardwareType)
1481 {
5b76ffd5
CH		 1482 case DAC960_GEM_Controller:
1483 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1484 udelay(1);
1485 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1486 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1487 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1488 udelay(1);
1489 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1490 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1491 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1492 break;
1da177e4
LT		 1493 case DAC960_BA_Controller:
1494 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1495 udelay(1);
1496 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1497 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1498 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1499 udelay(1);
1500 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1501 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1502 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1503 break;
1504 case DAC960_LP_Controller:
1505 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1506 udelay(1);
1507 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1508 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1509 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1510 udelay(1);
1511 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1512 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1513 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1514 break;
1515 default:
1516 DAC960_Failure(Controller, "Unknown Controller Type\n");
1517 CommandStatus = DAC960_V2_AbormalCompletion;
1518 break;
1519 }
1520 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1521 CommandMailbox, CommandMailboxDMA);
1522 return (CommandStatus == DAC960_V2_NormalCompletion);
1523}
1524
1525
1526/*
1527 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1528 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1529*/
1530
87d156bf 1531static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1532 *Controller)
1533{
1534 DAC960_V1_Enquiry2_T *Enquiry2;
1535 dma_addr_t Enquiry2DMA;
1536 DAC960_V1_Config2_T *Config2;
1537 dma_addr_t Config2DMA;
1538 int LogicalDriveNumber, Channel, TargetID;
1539 struct dma_loaf local_dma;
1540
1541 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1542 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1543 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1544
1545 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1546 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1547
1548 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1549 Controller->V1.NewEnquiryDMA)) {
1550 free_dma_loaf(Controller->PCIDevice, &local_dma);
1551 return DAC960_Failure(Controller, "ENQUIRY");
1552 }
1553 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1554 sizeof(DAC960_V1_Enquiry_T));
1555
1556 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1557 free_dma_loaf(Controller->PCIDevice, &local_dma);
1558 return DAC960_Failure(Controller, "ENQUIRY2");
1559 }
1560
1561 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1562 free_dma_loaf(Controller->PCIDevice, &local_dma);
1563 return DAC960_Failure(Controller, "READ CONFIG2");
1564 }
1565
1566 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1567 Controller->V1.NewLogicalDriveInformationDMA)) {
1568 free_dma_loaf(Controller->PCIDevice, &local_dma);
1569 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1570 }
1571 memcpy(&Controller->V1.LogicalDriveInformation,
1572 Controller->V1.NewLogicalDriveInformation,
1573 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1574
1575 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1576 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1577 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1578 Channel, TargetID,
1579 Controller->V1.NewDeviceStateDMA)) {
1580 free_dma_loaf(Controller->PCIDevice, &local_dma);
1581 return DAC960_Failure(Controller, "GET DEVICE STATE");
1582 }
1583 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1584 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1585 }
1586 /*
1587 Initialize the Controller Model Name and Full Model Name fields.
1588 */
1589 switch (Enquiry2->HardwareID.SubModel)
1590 {
1591 case DAC960_V1_P_PD_PU:
1592 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1593 strcpy(Controller->ModelName, "DAC960PU");
1594 else strcpy(Controller->ModelName, "DAC960PD");
1595 break;
1596 case DAC960_V1_PL:
1597 strcpy(Controller->ModelName, "DAC960PL");
1598 break;
1599 case DAC960_V1_PG:
1600 strcpy(Controller->ModelName, "DAC960PG");
1601 break;
1602 case DAC960_V1_PJ:
1603 strcpy(Controller->ModelName, "DAC960PJ");
1604 break;
1605 case DAC960_V1_PR:
1606 strcpy(Controller->ModelName, "DAC960PR");
1607 break;
1608 case DAC960_V1_PT:
1609 strcpy(Controller->ModelName, "DAC960PT");
1610 break;
1611 case DAC960_V1_PTL0:
1612 strcpy(Controller->ModelName, "DAC960PTL0");
1613 break;
1614 case DAC960_V1_PRL:
1615 strcpy(Controller->ModelName, "DAC960PRL");
1616 break;
1617 case DAC960_V1_PTL1:
1618 strcpy(Controller->ModelName, "DAC960PTL1");
1619 break;
1620 case DAC960_V1_1164P:
1621 strcpy(Controller->ModelName, "DAC1164P");
1622 break;
1623 default:
1624 free_dma_loaf(Controller->PCIDevice, &local_dma);
1625 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1626 }
1627 strcpy(Controller->FullModelName, "Mylex ");
1628 strcat(Controller->FullModelName, Controller->ModelName);
1629 /*
1630 Initialize the Controller Firmware Version field and verify that it
1631 is a supported firmware version. The supported firmware versions are:
1632
1633 DAC1164P 5.06 and above
1634 DAC960PTL/PRL/PJ/PG 4.06 and above
1635 DAC960PU/PD/PL 3.51 and above
1636 DAC960PU/PD/PL/P 2.73 and above
1637 */
1638#if defined(CONFIG_ALPHA)
1639 /*
1640 DEC Alpha machines were often equipped with DAC960 cards that were
1641 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1642 the last custom FW revision to be released by DEC for these older
1643 controllers, appears to work quite well with this driver.
1644
1645 Cards tested successfully were several versions each of the PD and
1646 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1647 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1648 back of the board, of:
1649
1650 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1651 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1652 */
1653# define FIRMWARE_27X "2.70"
1654#else
1655# define FIRMWARE_27X "2.73"
1656#endif
1657
1658 if (Enquiry2->FirmwareID.MajorVersion == 0)
1659 {
1660 Enquiry2->FirmwareID.MajorVersion =
1661 Controller->V1.Enquiry.MajorFirmwareVersion;
1662 Enquiry2->FirmwareID.MinorVersion =
1663 Controller->V1.Enquiry.MinorFirmwareVersion;
1664 Enquiry2->FirmwareID.FirmwareType = '0';
1665 Enquiry2->FirmwareID.TurnID = 0;
1666 }
1667 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1668 Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1669 Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1670 if (!((Controller->FirmwareVersion[0] == '5' &&
1671 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1672 (Controller->FirmwareVersion[0] == '4' &&
1673 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1674 (Controller->FirmwareVersion[0] == '3' &&
1675 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1676 (Controller->FirmwareVersion[0] == '2' &&
1677 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1678 {
1679 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1680 DAC960_Error("Firmware Version = '%s'\n", Controller,
1681 Controller->FirmwareVersion);
1682 free_dma_loaf(Controller->PCIDevice, &local_dma);
1683 return false;
1684 }
1685 /*
1686 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1687 Enclosure Management Enabled fields.
1688 */
1689 Controller->Channels = Enquiry2->ActualChannels;
1690 Controller->Targets = Enquiry2->MaxTargets;
1691 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1692 Controller->V1.SAFTE_EnclosureManagementEnabled =
1693 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1694 /*
1695 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1696 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1697 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1698 less than the Controller Queue Depth to allow for an automatic drive
1699 rebuild operation.
1700 */
1701 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1702 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1703 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1704 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1705 Controller->LogicalDriveCount =
1706 Controller->V1.Enquiry.NumberOfLogicalDrives;
1707 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1708 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1709 Controller->DriverScatterGatherLimit =
1710 Controller->ControllerScatterGatherLimit;
1711 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1712 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1713 /*
1714 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1715 */
1716 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1717 >> (10 - DAC960_BlockSizeBits);
1718 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1719 >> (10 - DAC960_BlockSizeBits);
1720 switch (Config2->DriveGeometry)
1721 {
1722 case DAC960_V1_Geometry_128_32:
1723 Controller->V1.GeometryTranslationHeads = 128;
1724 Controller->V1.GeometryTranslationSectors = 32;
1725 break;
1726 case DAC960_V1_Geometry_255_63:
1727 Controller->V1.GeometryTranslationHeads = 255;
1728 Controller->V1.GeometryTranslationSectors = 63;
1729 break;
1730 default:
1731 free_dma_loaf(Controller->PCIDevice, &local_dma);
1732 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1733 }
1734 /*
1735 Initialize the Background Initialization Status.
1736 */
1737 if ((Controller->FirmwareVersion[0] == '4' &&
1738 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1739 (Controller->FirmwareVersion[0] == '5' &&
1740 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1741 {
1742 Controller->V1.BackgroundInitializationStatusSupported = true;
1743 DAC960_V1_ExecuteType3B(Controller,
1744 DAC960_V1_BackgroundInitializationControl, 0x20,
1745 Controller->
1746 V1.BackgroundInitializationStatusDMA);
1747 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1748 Controller->V1.BackgroundInitializationStatus,
1749 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1750 }
1751 /*
1752 Initialize the Logical Drive Initially Accessible flag.
1753 */
1754 for (LogicalDriveNumber = 0;
1755 LogicalDriveNumber < Controller->LogicalDriveCount;
1756 LogicalDriveNumber++)
1757 if (Controller->V1.LogicalDriveInformation
1758 [LogicalDriveNumber].LogicalDriveState !=
1759 DAC960_V1_LogicalDrive_Offline)
1760 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1761 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1762 free_dma_loaf(Controller->PCIDevice, &local_dma);
1763 return true;
1764}
1765
1766
1767/*
1768 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1769 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1770*/
1771
87d156bf 1772static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1773 *Controller)
1774{
1775 DAC960_V2_ControllerInfo_T *ControllerInfo =
1776 &Controller->V2.ControllerInformation;
1777 unsigned short LogicalDeviceNumber = 0;
1778 int ModelNameLength;
1779
1780 /* Get data into dma-able area, then copy into permanant location */
1781 if (!DAC960_V2_NewControllerInfo(Controller))
1782 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1783 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1784 sizeof(DAC960_V2_ControllerInfo_T));
1785
1786
1787 if (!DAC960_V2_GeneralInfo(Controller))
1788 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1789
1790 /*
1791 Initialize the Controller Model Name and Full Model Name fields.
1792 */
1793 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1794 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1795 ModelNameLength = sizeof(Controller->ModelName)-1;
1796 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1797 ModelNameLength);
1798 ModelNameLength--;
1799 while (Controller->ModelName[ModelNameLength] == ' ' ||
1800 Controller->ModelName[ModelNameLength] == '\0')
1801 ModelNameLength--;
1802 Controller->ModelName[++ModelNameLength] = '\0';
1803 strcpy(Controller->FullModelName, "Mylex ");
1804 strcat(Controller->FullModelName, Controller->ModelName);
1805 /*
1806 Initialize the Controller Firmware Version field.
1807 */
1808 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1809 ControllerInfo->FirmwareMajorVersion,
1810 ControllerInfo->FirmwareMinorVersion,
1811 ControllerInfo->FirmwareTurnNumber);
1812 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1813 ControllerInfo->FirmwareMinorVersion == 0 &&
1814 ControllerInfo->FirmwareTurnNumber < 1)
1815 {
1816 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1817 Controller, Controller->FirmwareVersion);
1818 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1819 Controller);
1820 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1821 Controller);
1822 }
1823 /*
1824 Initialize the Controller Channels, Targets, and Memory Size.
1825 */
1826 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1827 Controller->Targets =
1828 ControllerInfo->MaximumTargetsPerChannel
1829 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1830 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1831 /*
1832 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1833 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1834 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1835 less than the Controller Queue Depth to allow for an automatic drive
1836 rebuild operation.
1837 */
1838 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1839 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1840 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1841 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1842 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1843 Controller->MaxBlocksPerCommand =
1844 ControllerInfo->MaximumDataTransferSizeInBlocks;
1845 Controller->ControllerScatterGatherLimit =
1846 ControllerInfo->MaximumScatterGatherEntries;
1847 Controller->DriverScatterGatherLimit =
1848 Controller->ControllerScatterGatherLimit;
1849 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1850 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1851 /*
1852 Initialize the Logical Device Information.
1853 */
1854 while (true)
1855 {
1856 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1857 Controller->V2.NewLogicalDeviceInformation;
1858 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1859 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1860
1861 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1862 break;
1863 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1864 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1865 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1866 Controller, LogicalDeviceNumber);
1867 break;
1868 }
1869 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1870 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1871 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1872 LogicalDeviceNumber++;
1873 continue;
1874 }
1875 PhysicalDevice.Controller = 0;
1876 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1877 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1878 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1879 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1880 PhysicalDevice;
1881 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1882 DAC960_V2_LogicalDevice_Offline)
1883 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
0a361e31
AD		 1884 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1885 GFP_ATOMIC);
1da177e4
LT		 1886 if (LogicalDeviceInfo == NULL)
1887 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1888 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1889 LogicalDeviceInfo;
1890 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1891 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1892 LogicalDeviceNumber++;
1893 }
1894 return true;
1895}
1896
1897
1898/*
1899 DAC960_ReportControllerConfiguration reports the Configuration Information
1900 for Controller.
1901*/
1902
87d156bf 1903static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1904 *Controller)
1905{
1906 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1907 Controller, Controller->ModelName);
1908 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1909 Controller, Controller->FirmwareVersion,
1910 Controller->Channels, Controller->MemorySize);
1911 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1912 Controller, Controller->Bus,
1913 Controller->Device, Controller->Function);
1914 if (Controller->IO_Address == 0)
1915 DAC960_Info("Unassigned\n", Controller);
1916 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1917 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1918 Controller, Controller->PCI_Address,
1919 (unsigned long) Controller->BaseAddress,
1920 Controller->IRQ_Channel);
1921 DAC960_Info(" Controller Queue Depth: %d, "
1922 "Maximum Blocks per Command: %d\n",
1923 Controller, Controller->ControllerQueueDepth,
1924 Controller->MaxBlocksPerCommand);
1925 DAC960_Info(" Driver Queue Depth: %d, "
1926 "Scatter/Gather Limit: %d of %d Segments\n",
1927 Controller, Controller->DriverQueueDepth,
1928 Controller->DriverScatterGatherLimit,
1929 Controller->ControllerScatterGatherLimit);
1930 if (Controller->FirmwareType == DAC960_V1_Controller)
1931 {
1932 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1933 "BIOS Geometry: %d/%d\n", Controller,
1934 Controller->V1.StripeSize,
1935 Controller->V1.SegmentSize,
1936 Controller->V1.GeometryTranslationHeads,
1937 Controller->V1.GeometryTranslationSectors);
1938 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1939 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1940 }
1941 return true;
1942}
1943
1944
1945/*
1946 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1947 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1948 Inquiry Unit Serial Number information for each device connected to
1949 Controller.
1950*/
1951
87d156bf 1952static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 1953 *Controller)
1954{
1955 struct dma_loaf local_dma;
1956
1957 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1958 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1959
1960 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1961 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1962
1963 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1964 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1965
1966 struct completion Completions[DAC960_V1_MaxChannels];
1967 unsigned long flags;
1968 int Channel, TargetID;
1969
1970 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1971 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1972 sizeof(DAC960_SCSI_Inquiry_T) +
1973 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1974 return DAC960_Failure(Controller,
1975 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1976
1977 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1978 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1979 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1980 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1981 sizeof(DAC960_SCSI_Inquiry_T),
1982 SCSI_Inquiry_dma + Channel);
1983 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1984 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1985 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1986 }
1987
1988 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1989 {
1990 /*
1991 * For each channel, submit a probe for a device on that channel.
1992 * The timeout interval for a device that is present is 10 seconds.
1993 * With this approach, the timeout periods can elapse in parallel
1994 * on each channel.
1995 */
1996 for (Channel = 0; Channel < Controller->Channels; Channel++)
1997 {
1998 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
1999 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2000 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2001 DAC960_Command_T *Command = Controller->Commands[Channel];
2002 struct completion *Completion = &Completions[Channel];
2003
2004 init_completion(Completion);
2005 DAC960_V1_ClearCommand(Command);
2006 Command->CommandType = DAC960_ImmediateCommand;
2007 Command->Completion = Completion;
2008 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2009 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2010 DCDB->Channel = Channel;
2011 DCDB->TargetID = TargetID;
2012 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2013 DCDB->EarlyStatus = false;
2014 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2015 DCDB->NoAutomaticRequestSense = false;
2016 DCDB->DisconnectPermitted = true;
2017 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2018 DCDB->BusAddress = NewInquiryStandardDataDMA;
2019 DCDB->CDBLength = 6;
2020 DCDB->TransferLengthHigh4 = 0;
2021 DCDB->SenseLength = sizeof(DCDB->SenseData);
2022 DCDB->CDB[0] = 0x12; /* INQUIRY */
2023 DCDB->CDB[1] = 0; /* EVPD = 0 */
2024 DCDB->CDB[2] = 0; /* Page Code */
2025 DCDB->CDB[3] = 0; /* Reserved */
2026 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2027 DCDB->CDB[5] = 0; /* Control */
2028
2029 spin_lock_irqsave(&Controller->queue_lock, flags);
2030 DAC960_QueueCommand(Command);
2031 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2032 }
2033 /*
2034 * Wait for the problems submitted in the previous loop
2035 * to complete. On the probes that are successful,
2036 * get the serial number of the device that was found.
2037 */
2038 for (Channel = 0; Channel < Controller->Channels; Channel++)
2039 {
2040 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2041 &Controller->V1.InquiryStandardData[Channel][TargetID];
2042 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2043 dma_addr_t NewInquiryUnitSerialNumberDMA =
2044 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2045 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2046 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2047 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2048 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2049 DAC960_Command_T *Command = Controller->Commands[Channel];
2050 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2051 struct completion *Completion = &Completions[Channel];
2052
2053 wait_for_completion(Completion);
2054
2055 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2056 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2057 InquiryStandardData->PeripheralDeviceType = 0x1F;
2058 continue;
2059 } else
2060 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2061
2062 /* Preserve Channel and TargetID values from the previous loop */
2063 Command->Completion = Completion;
2064 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2065 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2066 DCDB->SenseLength = sizeof(DCDB->SenseData);
2067 DCDB->CDB[0] = 0x12; /* INQUIRY */
2068 DCDB->CDB[1] = 1; /* EVPD = 1 */
2069 DCDB->CDB[2] = 0x80; /* Page Code */
2070 DCDB->CDB[3] = 0; /* Reserved */
2071 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2072 DCDB->CDB[5] = 0; /* Control */
2073
2074 spin_lock_irqsave(&Controller->queue_lock, flags);
2075 DAC960_QueueCommand(Command);
2076 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2077 wait_for_completion(Completion);
2078
2079 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2080 memset(InquiryUnitSerialNumber, 0,
2081 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2082 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2083 } else
2084 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2085 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2086 }
2087 }
2088 free_dma_loaf(Controller->PCIDevice, &local_dma);
2089 return true;
2090}
2091
2092
2093/*
2094 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2095 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2096 Information and SCSI Inquiry Unit Serial Number information for each
2097 device connected to Controller.
2098*/
2099
87d156bf 2100static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2101 *Controller)
2102{
2103 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2104 unsigned short PhysicalDeviceIndex = 0;
2105
2106 while (true)
2107 {
2108 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2109 Controller->V2.NewPhysicalDeviceInformation;
2110 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2111 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2112 Controller->V2.NewInquiryUnitSerialNumber;
2113 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2114
2115 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2116 break;
2117
0a361e31
AD		 2118 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2119 GFP_ATOMIC);
1da177e4
LT		 2120 if (PhysicalDeviceInfo == NULL)
2121 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2122 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2123 PhysicalDeviceInfo;
2124 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2125 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2126
0a361e31
AD		 2127 InquiryUnitSerialNumber = kmalloc(
2128 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
1da177e4
LT		 2129 if (InquiryUnitSerialNumber == NULL) {
2130 kfree(PhysicalDeviceInfo);
2131 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2132 }
2133 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2134 InquiryUnitSerialNumber;
2135
2136 Channel = NewPhysicalDeviceInfo->Channel;
2137 TargetID = NewPhysicalDeviceInfo->TargetID;
2138 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2139
2140 /*
2141 Some devices do NOT have Unit Serial Numbers.
2142 This command fails for them. But, we still want to
2143 remember those devices are there. Construct a
2144 UnitSerialNumber structure for the failure case.
2145 */
2146 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2147 memset(InquiryUnitSerialNumber, 0,
2148 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2149 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2150 } else
2151 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2152 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2153
2154 PhysicalDeviceIndex++;
2155 LogicalUnit++;
2156 }
2157 return true;
2158}
2159
2160
2161/*
2162 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2163 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2164 Unit Serial Number structures.
2165*/
2166
2167static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2168 *InquiryStandardData,
2169 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2170 *InquiryUnitSerialNumber,
2171 unsigned char *Vendor,
2172 unsigned char *Model,
2173 unsigned char *Revision,
2174 unsigned char *SerialNumber)
2175{
2176 int SerialNumberLength, i;
2177 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2178 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2179 {
2180 unsigned char VendorCharacter =
2181 InquiryStandardData->VendorIdentification[i];
2182 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2183 ? VendorCharacter : ' ');
2184 }
2185 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2186 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2187 {
2188 unsigned char ModelCharacter =
2189 InquiryStandardData->ProductIdentification[i];
2190 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2191 ? ModelCharacter : ' ');
2192 }
2193 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2194 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2195 {
2196 unsigned char RevisionCharacter =
2197 InquiryStandardData->ProductRevisionLevel[i];
2198 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2199 ? RevisionCharacter : ' ');
2200 }
2201 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2202 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2203 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2204 if (SerialNumberLength >
2205 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2206 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2207 for (i = 0; i < SerialNumberLength; i++)
2208 {
2209 unsigned char SerialNumberCharacter =
2210 InquiryUnitSerialNumber->ProductSerialNumber[i];
2211 SerialNumber[i] =
2212 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2213 ? SerialNumberCharacter : ' ');
2214 }
2215 SerialNumber[SerialNumberLength] = '\0';
2216}
2217
2218
2219/*
2220 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2221 Information for DAC960 V1 Firmware Controllers.
2222*/
2223
87d156bf 2224static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2225 *Controller)
2226{
2227 int LogicalDriveNumber, Channel, TargetID;
2228 DAC960_Info(" Physical Devices:\n", Controller);
2229 for (Channel = 0; Channel < Controller->Channels; Channel++)
2230 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2231 {
2232 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2233 &Controller->V1.InquiryStandardData[Channel][TargetID];
2234 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2235 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2236 DAC960_V1_DeviceState_T *DeviceState =
2237 &Controller->V1.DeviceState[Channel][TargetID];
2238 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2239 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2240 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2241 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2242 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2243 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2244 ->ProductSerialNumber)];
2245 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2246 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2247 Vendor, Model, Revision, SerialNumber);
2248 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2249 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2250 Vendor, Model, Revision);
2251 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2252 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2253 if (DeviceState->Present &&
2254 DeviceState->DeviceType == DAC960_V1_DiskType)
2255 {
2256 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2257 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2258 Controller,
2259 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2260 ? "Dead"
2261 : DeviceState->DeviceState
2262 == DAC960_V1_Device_WriteOnly
2263 ? "Write-Only"
2264 : DeviceState->DeviceState
2265 == DAC960_V1_Device_Online
2266 ? "Online" : "Standby"),
2267 DeviceState->DiskSize,
2268 Controller->V1.DeviceResetCount[Channel][TargetID]);
2269 else
2270 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2271 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2272 ? "Dead"
2273 : DeviceState->DeviceState
2274 == DAC960_V1_Device_WriteOnly
2275 ? "Write-Only"
2276 : DeviceState->DeviceState
2277 == DAC960_V1_Device_Online
2278 ? "Online" : "Standby"),
2279 DeviceState->DiskSize);
2280 }
2281 if (ErrorEntry->ParityErrorCount > 0 ||
2282 ErrorEntry->SoftErrorCount > 0 ||
2283 ErrorEntry->HardErrorCount > 0 ||
2284 ErrorEntry->MiscErrorCount > 0)
2285 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2286 "Hard: %d, Misc: %d\n", Controller,
2287 ErrorEntry->ParityErrorCount,
2288 ErrorEntry->SoftErrorCount,
2289 ErrorEntry->HardErrorCount,
2290 ErrorEntry->MiscErrorCount);
2291 }
2292 DAC960_Info(" Logical Drives:\n", Controller);
2293 for (LogicalDriveNumber = 0;
2294 LogicalDriveNumber < Controller->LogicalDriveCount;
2295 LogicalDriveNumber++)
2296 {
2297 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2298 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2299 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2300 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2301 LogicalDriveInformation->RAIDLevel,
2302 (LogicalDriveInformation->LogicalDriveState
2303 == DAC960_V1_LogicalDrive_Online
2304 ? "Online"
2305 : LogicalDriveInformation->LogicalDriveState
2306 == DAC960_V1_LogicalDrive_Critical
2307 ? "Critical" : "Offline"),
2308 LogicalDriveInformation->LogicalDriveSize,
2309 (LogicalDriveInformation->WriteBack
2310 ? "Write Back" : "Write Thru"));
2311 }
2312 return true;
2313}
2314
2315
2316/*
2317 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2318 Information for DAC960 V2 Firmware Controllers.
2319*/
2320
87d156bf 2321static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2322 *Controller)
2323{
2324 int PhysicalDeviceIndex, LogicalDriveNumber;
2325 DAC960_Info(" Physical Devices:\n", Controller);
2326 for (PhysicalDeviceIndex = 0;
2327 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2328 PhysicalDeviceIndex++)
2329 {
2330 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2331 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2332 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2333 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2334 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2335 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2336 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2337 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2338 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2339 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2340 if (PhysicalDeviceInfo == NULL) break;
2341 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2342 Vendor, Model, Revision, SerialNumber);
2343 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2344 Controller,
2345 PhysicalDeviceInfo->Channel,
2346 PhysicalDeviceInfo->TargetID,
2347 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2348 Vendor, Model, Revision);
2349 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2350 DAC960_Info(" %sAsynchronous\n", Controller,
2351 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2352 ? "Wide " :""));
2353 else
2354 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2355 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2356 ? "Wide " :""),
2357 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2358 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2359 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2360 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2361 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2362 DAC960_V2_Device_Unconfigured)
2363 continue;
2364 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2365 (PhysicalDeviceInfo->PhysicalDeviceState
2366 == DAC960_V2_Device_Online
2367 ? "Online"
2368 : PhysicalDeviceInfo->PhysicalDeviceState
2369 == DAC960_V2_Device_Rebuild
2370 ? "Rebuild"
2371 : PhysicalDeviceInfo->PhysicalDeviceState
2372 == DAC960_V2_Device_Missing
2373 ? "Missing"
2374 : PhysicalDeviceInfo->PhysicalDeviceState
2375 == DAC960_V2_Device_Critical
2376 ? "Critical"
2377 : PhysicalDeviceInfo->PhysicalDeviceState
2378 == DAC960_V2_Device_Dead
2379 ? "Dead"
2380 : PhysicalDeviceInfo->PhysicalDeviceState
2381 == DAC960_V2_Device_SuspectedDead
2382 ? "Suspected-Dead"
2383 : PhysicalDeviceInfo->PhysicalDeviceState
2384 == DAC960_V2_Device_CommandedOffline
2385 ? "Commanded-Offline"
2386 : PhysicalDeviceInfo->PhysicalDeviceState
2387 == DAC960_V2_Device_Standby
2388 ? "Standby" : "Unknown"),
2389 PhysicalDeviceInfo->ConfigurableDeviceSize);
2390 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2391 PhysicalDeviceInfo->SoftErrors == 0 &&
2392 PhysicalDeviceInfo->HardErrors == 0 &&
2393 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2394 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2395 PhysicalDeviceInfo->Retries == 0 &&
2396 PhysicalDeviceInfo->Aborts == 0 &&
2397 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2398 continue;
2399 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2400 "Hard: %d, Misc: %d\n", Controller,
2401 PhysicalDeviceInfo->ParityErrors,
2402 PhysicalDeviceInfo->SoftErrors,
2403 PhysicalDeviceInfo->HardErrors,
2404 PhysicalDeviceInfo->MiscellaneousErrors);
2405 DAC960_Info(" Timeouts: %d, Retries: %d, "
2406 "Aborts: %d, Predicted: %d\n", Controller,
2407 PhysicalDeviceInfo->CommandTimeouts,
2408 PhysicalDeviceInfo->Retries,
2409 PhysicalDeviceInfo->Aborts,
2410 PhysicalDeviceInfo->PredictedFailuresDetected);
2411 }
2412 DAC960_Info(" Logical Drives:\n", Controller);
2413 for (LogicalDriveNumber = 0;
2414 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2415 LogicalDriveNumber++)
2416 {
2417 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2418 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2419 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2420 "Read Cache Enabled",
2421 "Read Ahead Enabled",
2422 "Intelligent Read Ahead Enabled",
2423 "-", "-", "-", "-" };
2424 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2425 "Logical Device Read Only",
2426 "Write Cache Enabled",
2427 "Intelligent Write Cache Enabled",
2428 "-", "-", "-", "-" };
2429 unsigned char *GeometryTranslation;
2430 if (LogicalDeviceInfo == NULL) continue;
2431 switch (LogicalDeviceInfo->DriveGeometry)
2432 {
2433 case DAC960_V2_Geometry_128_32:
2434 GeometryTranslation = "128/32";
2435 break;
2436 case DAC960_V2_Geometry_255_63:
2437 GeometryTranslation = "255/63";
2438 break;
2439 default:
2440 GeometryTranslation = "Invalid";
2441 DAC960_Error("Illegal Logical Device Geometry %d\n",
2442 Controller, LogicalDeviceInfo->DriveGeometry);
2443 break;
2444 }
2445 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2446 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2447 LogicalDeviceInfo->RAIDLevel,
2448 (LogicalDeviceInfo->LogicalDeviceState
2449 == DAC960_V2_LogicalDevice_Online
2450 ? "Online"
2451 : LogicalDeviceInfo->LogicalDeviceState
2452 == DAC960_V2_LogicalDevice_Critical
2453 ? "Critical" : "Offline"),
2454 LogicalDeviceInfo->ConfigurableDeviceSize);
2455 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2456 Controller,
2457 (LogicalDeviceInfo->LogicalDeviceControl
2458 .LogicalDeviceInitialized
2459 ? "Initialized" : "Uninitialized"),
2460 GeometryTranslation);
2461 if (LogicalDeviceInfo->StripeSize == 0)
2462 {
2463 if (LogicalDeviceInfo->CacheLineSize == 0)
2464 DAC960_Info(" Stripe Size: N/A, "
2465 "Segment Size: N/A\n", Controller);
2466 else
2467 DAC960_Info(" Stripe Size: N/A, "
2468 "Segment Size: %dKB\n", Controller,
2469 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2470 }
2471 else
2472 {
2473 if (LogicalDeviceInfo->CacheLineSize == 0)
2474 DAC960_Info(" Stripe Size: %dKB, "
2475 "Segment Size: N/A\n", Controller,
2476 1 << (LogicalDeviceInfo->StripeSize - 2));
2477 else
2478 DAC960_Info(" Stripe Size: %dKB, "
2479 "Segment Size: %dKB\n", Controller,
2480 1 << (LogicalDeviceInfo->StripeSize - 2),
2481 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2482 }
2483 DAC960_Info(" %s, %s\n", Controller,
2484 ReadCacheStatus[
2485 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2486 WriteCacheStatus[
2487 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2488 if (LogicalDeviceInfo->SoftErrors > 0 ||
2489 LogicalDeviceInfo->CommandsFailed > 0 ||
2490 LogicalDeviceInfo->DeferredWriteErrors)
2491 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2492 "Deferred Write: %d\n", Controller,
2493 LogicalDeviceInfo->SoftErrors,
2494 LogicalDeviceInfo->CommandsFailed,
2495 LogicalDeviceInfo->DeferredWriteErrors);
2496
2497 }
2498 return true;
2499}
2500
2501/*
2502 DAC960_RegisterBlockDevice registers the Block Device structures
2503 associated with Controller.
2504*/
2505
87d156bf 2506static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
1da177e4
LT		 2507{
2508 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2509 int n;
2510
2511 /*
2512 Register the Block Device Major Number for this DAC960 Controller.
2513 */
2514 if (register_blkdev(MajorNumber, "dac960") < 0)
2515 return false;
2516
2517 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2518 struct gendisk *disk = Controller->disks[n];
2519 struct request_queue *RequestQueue;
2520
2521 /* for now, let all request queues share controller's lock */
2522 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2523 if (!RequestQueue) {
2524 printk("DAC960: failure to allocate request queue\n");
2525 continue;
2526 }
2527 Controller->RequestQueue[n] = RequestQueue;
2528 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2529 RequestQueue->queuedata = Controller;
2530 blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2531 blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2532 blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2533 disk->queue = RequestQueue;
2534 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
1da177e4
LT		 2535 disk->major = MajorNumber;
2536 disk->first_minor = n << DAC960_MaxPartitionsBits;
2537 disk->fops = &DAC960_BlockDeviceOperations;
2538 }
2539 /*
2540 Indicate the Block Device Registration completed successfully,
2541 */
2542 return true;
2543}
2544
2545
2546/*
2547 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2548 associated with Controller.
2549*/
2550
2551static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2552{
2553 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2554 int disk;
2555
2556 /* does order matter when deleting gendisk and cleanup in request queue? */
2557 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2558 del_gendisk(Controller->disks[disk]);
2559 blk_cleanup_queue(Controller->RequestQueue[disk]);
2560 Controller->RequestQueue[disk] = NULL;
2561 }
2562
2563 /*
2564 Unregister the Block Device Major Number for this DAC960 Controller.
2565 */
2566 unregister_blkdev(MajorNumber, "dac960");
2567}
2568
2569/*
2570 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2571 Information Partition Sector Counts and Block Sizes.
2572*/
2573
2574static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2575{
2576 int disk;
2577 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2578 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2579}
2580
2581/*
2582 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2583 the Error Status Register when the driver performs the BIOS handshaking.
2584 It returns true for fatal errors and false otherwise.
2585*/
2586
87d156bf 2587static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
1da177e4
LT		 2588 unsigned char ErrorStatus,
2589 unsigned char Parameter0,
2590 unsigned char Parameter1)
2591{
2592 switch (ErrorStatus)
2593 {
2594 case 0x00:
2595 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2596 Controller, Parameter1, Parameter0);
2597 break;
2598 case 0x08:
2599 if (Controller->DriveSpinUpMessageDisplayed) break;
2600 DAC960_Notice("Spinning Up Drives\n", Controller);
2601 Controller->DriveSpinUpMessageDisplayed = true;
2602 break;
2603 case 0x30:
2604 DAC960_Notice("Configuration Checksum Error\n", Controller);
2605 break;
2606 case 0x60:
2607 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2608 break;
2609 case 0x70:
2610 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2611 break;
2612 case 0x90:
2613 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2614 Controller, Parameter1, Parameter0);
2615 break;
2616 case 0xA0:
2617 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2618 break;
2619 case 0xB0:
2620 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2621 break;
2622 case 0xD0:
2623 DAC960_Notice("New Controller Configuration Found\n", Controller);
2624 break;
2625 case 0xF0:
2626 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2627 return true;
2628 default:
2629 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2630 Controller, ErrorStatus);
2631 return true;
2632 }
2633 return false;
2634}
2635
2636
2637/*
2638 * DAC960_DetectCleanup releases the resources that were allocated
2639 * during DAC960_DetectController(). DAC960_DetectController can
2640 * has several internal failure points, so not ALL resources may
2641 * have been allocated. It's important to free only
2642 * resources that HAVE been allocated. The code below always
2643 * tests that the resource has been allocated before attempting to
2644 * free it.
2645 */
2646static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2647{
2648 int i;
2649
2650 /* Free the memory mailbox, status, and related structures */
2651 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2652 if (Controller->MemoryMappedAddress) {
2653 switch(Controller->HardwareType)
2654 {
5b76ffd5
CH		 2655 case DAC960_GEM_Controller:
2656 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2657 break;
1da177e4
LT		 2658 case DAC960_BA_Controller:
2659 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2660 break;
2661 case DAC960_LP_Controller:
2662 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2663 break;
2664 case DAC960_LA_Controller:
2665 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2666 break;
2667 case DAC960_PG_Controller:
2668 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2669 break;
2670 case DAC960_PD_Controller:
2671 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2672 break;
2673 case DAC960_P_Controller:
2674 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2675 break;
2676 }
2677 iounmap(Controller->MemoryMappedAddress);
2678 }
2679 if (Controller->IRQ_Channel)
2680 free_irq(Controller->IRQ_Channel, Controller);
2681 if (Controller->IO_Address)
2682 release_region(Controller->IO_Address, 0x80);
2683 pci_disable_device(Controller->PCIDevice);
2684 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2685 put_disk(Controller->disks[i]);
2686 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2687 kfree(Controller);
2688}
2689
2690
2691/*
2692 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2693 PCI RAID Controllers by interrogating the PCI Configuration Space for
2694 Controller Type.
2695*/
2696
2697static DAC960_Controller_T *
2698DAC960_DetectController(struct pci_dev *PCI_Device,
2699 const struct pci_device_id *entry)
2700{
2701 struct DAC960_privdata *privdata =
2702 (struct DAC960_privdata *)entry->driver_data;
7d12e780 2703 irq_handler_t InterruptHandler = privdata->InterruptHandler;
1da177e4
LT		 2704 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2705 DAC960_Controller_T *Controller = NULL;
2706 unsigned char DeviceFunction = PCI_Device->devfn;
2707 unsigned char ErrorStatus, Parameter0, Parameter1;
2708 unsigned int IRQ_Channel;
2709 void __iomem *BaseAddress;
2710 int i;
2711
06ff37ff 2712 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
1da177e4
LT		 2713 if (Controller == NULL) {
2714 DAC960_Error("Unable to allocate Controller structure for "
2715 "Controller at\n", NULL);
2716 return NULL;
2717 }
1da177e4
LT		 2718 Controller->ControllerNumber = DAC960_ControllerCount;
2719 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2720 Controller->Bus = PCI_Device->bus->number;
2721 Controller->FirmwareType = privdata->FirmwareType;
2722 Controller->HardwareType = privdata->HardwareType;
2723 Controller->Device = DeviceFunction >> 3;
2724 Controller->Function = DeviceFunction & 0x7;
2725 Controller->PCIDevice = PCI_Device;
2726 strcpy(Controller->FullModelName, "DAC960");
2727
2728 if (pci_enable_device(PCI_Device))
2729 goto Failure;
2730
2731 switch (Controller->HardwareType)
2732 {
5b76ffd5
CH		 2733 case DAC960_GEM_Controller:
2734 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2735 break;
1da177e4
LT		 2736 case DAC960_BA_Controller:
2737 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2738 break;
2739 case DAC960_LP_Controller:
2740 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2741 break;
2742 case DAC960_LA_Controller:
2743 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2744 break;
2745 case DAC960_PG_Controller:
2746 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2747 break;
2748 case DAC960_PD_Controller:
2749 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2750 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2751 break;
2752 case DAC960_P_Controller:
2753 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2754 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2755 break;
2756 }
2757
2758 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2759 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2760 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2761 if (!Controller->disks[i])
2762 goto Failure;
2763 Controller->disks[i]->private_data = (void *)((long)i);
2764 }
2765 init_waitqueue_head(&Controller->CommandWaitQueue);
2766 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2767 spin_lock_init(&Controller->queue_lock);
2768 DAC960_AnnounceDriver(Controller);
2769 /*
2770 Map the Controller Register Window.
2771 */
2772 if (MemoryWindowSize < PAGE_SIZE)
2773 MemoryWindowSize = PAGE_SIZE;
2774 Controller->MemoryMappedAddress =
2775 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2776 Controller->BaseAddress =
2777 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2778 if (Controller->MemoryMappedAddress == NULL)
2779 {
2780 DAC960_Error("Unable to map Controller Register Window for "
2781 "Controller at\n", Controller);
2782 goto Failure;
2783 }
2784 BaseAddress = Controller->BaseAddress;
2785 switch (Controller->HardwareType)
2786 {
5b76ffd5
CH		 2787 case DAC960_GEM_Controller:
2788 DAC960_GEM_DisableInterrupts(BaseAddress);
2789 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2790 udelay(1000);
2791 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2792 {
2793 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2794 &Parameter0, &Parameter1) &&
2795 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2796 Parameter0, Parameter1))
2797 goto Failure;
2798 udelay(10);
2799 }
2800 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2801 {
2802 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2803 "for Controller at\n", Controller);
2804 goto Failure;
2805 }
2806 DAC960_GEM_EnableInterrupts(BaseAddress);
2807 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2808 Controller->ReadControllerConfiguration =
2809 DAC960_V2_ReadControllerConfiguration;
2810 Controller->ReadDeviceConfiguration =
2811 DAC960_V2_ReadDeviceConfiguration;
2812 Controller->ReportDeviceConfiguration =
2813 DAC960_V2_ReportDeviceConfiguration;
2814 Controller->QueueReadWriteCommand =
2815 DAC960_V2_QueueReadWriteCommand;
2816 break;
1da177e4
LT		 2817 case DAC960_BA_Controller:
2818 DAC960_BA_DisableInterrupts(BaseAddress);
2819 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2820 udelay(1000);
2821 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2822 {
2823 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2824 &Parameter0, &Parameter1) &&
2825 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2826 Parameter0, Parameter1))
2827 goto Failure;
2828 udelay(10);
2829 }
2830 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2831 {
2832 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2833 "for Controller at\n", Controller);
2834 goto Failure;
2835 }
2836 DAC960_BA_EnableInterrupts(BaseAddress);
2837 Controller->QueueCommand = DAC960_BA_QueueCommand;
2838 Controller->ReadControllerConfiguration =
2839 DAC960_V2_ReadControllerConfiguration;
2840 Controller->ReadDeviceConfiguration =
2841 DAC960_V2_ReadDeviceConfiguration;
2842 Controller->ReportDeviceConfiguration =
2843 DAC960_V2_ReportDeviceConfiguration;
2844 Controller->QueueReadWriteCommand =
2845 DAC960_V2_QueueReadWriteCommand;
2846 break;
2847 case DAC960_LP_Controller:
2848 DAC960_LP_DisableInterrupts(BaseAddress);
2849 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2850 udelay(1000);
2851 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2852 {
2853 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2854 &Parameter0, &Parameter1) &&
2855 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2856 Parameter0, Parameter1))
2857 goto Failure;
2858 udelay(10);
2859 }
2860 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2861 {
2862 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2863 "for Controller at\n", Controller);
2864 goto Failure;
2865 }
2866 DAC960_LP_EnableInterrupts(BaseAddress);
2867 Controller->QueueCommand = DAC960_LP_QueueCommand;
2868 Controller->ReadControllerConfiguration =
2869 DAC960_V2_ReadControllerConfiguration;
2870 Controller->ReadDeviceConfiguration =
2871 DAC960_V2_ReadDeviceConfiguration;
2872 Controller->ReportDeviceConfiguration =
2873 DAC960_V2_ReportDeviceConfiguration;
2874 Controller->QueueReadWriteCommand =
2875 DAC960_V2_QueueReadWriteCommand;
2876 break;
2877 case DAC960_LA_Controller:
2878 DAC960_LA_DisableInterrupts(BaseAddress);
2879 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2880 udelay(1000);
2881 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2882 {
2883 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2884 &Parameter0, &Parameter1) &&
2885 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2886 Parameter0, Parameter1))
2887 goto Failure;
2888 udelay(10);
2889 }
2890 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2891 {
2892 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2893 "for Controller at\n", Controller);
2894 goto Failure;
2895 }
2896 DAC960_LA_EnableInterrupts(BaseAddress);
2897 if (Controller->V1.DualModeMemoryMailboxInterface)
2898 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2899 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2900 Controller->ReadControllerConfiguration =
2901 DAC960_V1_ReadControllerConfiguration;
2902 Controller->ReadDeviceConfiguration =
2903 DAC960_V1_ReadDeviceConfiguration;
2904 Controller->ReportDeviceConfiguration =
2905 DAC960_V1_ReportDeviceConfiguration;
2906 Controller->QueueReadWriteCommand =
2907 DAC960_V1_QueueReadWriteCommand;
2908 break;
2909 case DAC960_PG_Controller:
2910 DAC960_PG_DisableInterrupts(BaseAddress);
2911 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2912 udelay(1000);
2913 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2914 {
2915 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2916 &Parameter0, &Parameter1) &&
2917 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2918 Parameter0, Parameter1))
2919 goto Failure;
2920 udelay(10);
2921 }
2922 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2923 {
2924 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2925 "for Controller at\n", Controller);
2926 goto Failure;
2927 }
2928 DAC960_PG_EnableInterrupts(BaseAddress);
2929 if (Controller->V1.DualModeMemoryMailboxInterface)
2930 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2931 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2932 Controller->ReadControllerConfiguration =
2933 DAC960_V1_ReadControllerConfiguration;
2934 Controller->ReadDeviceConfiguration =
2935 DAC960_V1_ReadDeviceConfiguration;
2936 Controller->ReportDeviceConfiguration =
2937 DAC960_V1_ReportDeviceConfiguration;
2938 Controller->QueueReadWriteCommand =
2939 DAC960_V1_QueueReadWriteCommand;
2940 break;
2941 case DAC960_PD_Controller:
2942 if (!request_region(Controller->IO_Address, 0x80,
2943 Controller->FullModelName)) {
2944 DAC960_Error("IO port 0x%d busy for Controller at\n",
2945 Controller, Controller->IO_Address);
2946 goto Failure;
2947 }
2948 DAC960_PD_DisableInterrupts(BaseAddress);
2949 DAC960_PD_AcknowledgeStatus(BaseAddress);
2950 udelay(1000);
2951 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2952 {
2953 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2954 &Parameter0, &Parameter1) &&
2955 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2956 Parameter0, Parameter1))
2957 goto Failure;
2958 udelay(10);
2959 }
2960 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2961 {
2962 DAC960_Error("Unable to allocate DMA mapped memory "
2963 "for Controller at\n", Controller);
2964 goto Failure;
2965 }
2966 DAC960_PD_EnableInterrupts(BaseAddress);
2967 Controller->QueueCommand = DAC960_PD_QueueCommand;
2968 Controller->ReadControllerConfiguration =
2969 DAC960_V1_ReadControllerConfiguration;
2970 Controller->ReadDeviceConfiguration =
2971 DAC960_V1_ReadDeviceConfiguration;
2972 Controller->ReportDeviceConfiguration =
2973 DAC960_V1_ReportDeviceConfiguration;
2974 Controller->QueueReadWriteCommand =
2975 DAC960_V1_QueueReadWriteCommand;
2976 break;
2977 case DAC960_P_Controller:
2978 if (!request_region(Controller->IO_Address, 0x80,
2979 Controller->FullModelName)){
2980 DAC960_Error("IO port 0x%d busy for Controller at\n",
2981 Controller, Controller->IO_Address);
2982 goto Failure;
2983 }
2984 DAC960_PD_DisableInterrupts(BaseAddress);
2985 DAC960_PD_AcknowledgeStatus(BaseAddress);
2986 udelay(1000);
2987 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2988 {
2989 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2990 &Parameter0, &Parameter1) &&
2991 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2992 Parameter0, Parameter1))
2993 goto Failure;
2994 udelay(10);
2995 }
2996 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2997 {
2998 DAC960_Error("Unable to allocate DMA mapped memory"
2999 "for Controller at\n", Controller);
3000 goto Failure;
3001 }
3002 DAC960_PD_EnableInterrupts(BaseAddress);
3003 Controller->QueueCommand = DAC960_P_QueueCommand;
3004 Controller->ReadControllerConfiguration =
3005 DAC960_V1_ReadControllerConfiguration;
3006 Controller->ReadDeviceConfiguration =
3007 DAC960_V1_ReadDeviceConfiguration;
3008 Controller->ReportDeviceConfiguration =
3009 DAC960_V1_ReportDeviceConfiguration;
3010 Controller->QueueReadWriteCommand =
3011 DAC960_V1_QueueReadWriteCommand;
3012 break;
3013 }
3014 /*
3015 Acquire shared access to the IRQ Channel.
3016 */
3017 IRQ_Channel = PCI_Device->irq;
69ab3912 3018 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
1da177e4
LT		 3019 Controller->FullModelName, Controller) < 0)
3020 {
3021 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3022 Controller, Controller->IRQ_Channel);
3023 goto Failure;
3024 }
3025 Controller->IRQ_Channel = IRQ_Channel;
3026 Controller->InitialCommand.CommandIdentifier = 1;
3027 Controller->InitialCommand.Controller = Controller;
3028 Controller->Commands[0] = &Controller->InitialCommand;
3029 Controller->FreeCommands = &Controller->InitialCommand;
3030 return Controller;
3031
3032Failure:
3033 if (Controller->IO_Address == 0)
3034 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3035 "PCI Address 0x%X\n", Controller,
3036 Controller->Bus, Controller->Device,
3037 Controller->Function, Controller->PCI_Address);
3038 else
3039 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3040 "0x%X PCI Address 0x%X\n", Controller,
3041 Controller->Bus, Controller->Device,
3042 Controller->Function, Controller->IO_Address,
3043 Controller->PCI_Address);
3044 DAC960_DetectCleanup(Controller);
3045 DAC960_ControllerCount--;
3046 return NULL;
3047}
3048
3049/*
3050 DAC960_InitializeController initializes Controller.
3051*/
3052
87d156bf 3053static bool
1da177e4
LT		 3054DAC960_InitializeController(DAC960_Controller_T *Controller)
3055{
3056 if (DAC960_ReadControllerConfiguration(Controller) &&
3057 DAC960_ReportControllerConfiguration(Controller) &&
3058 DAC960_CreateAuxiliaryStructures(Controller) &&
3059 DAC960_ReadDeviceConfiguration(Controller) &&
3060 DAC960_ReportDeviceConfiguration(Controller) &&
3061 DAC960_RegisterBlockDevice(Controller))
3062 {
3063 /*
3064 Initialize the Monitoring Timer.
3065 */
3066 init_timer(&Controller->MonitoringTimer);
3067 Controller->MonitoringTimer.expires =
3068 jiffies + DAC960_MonitoringTimerInterval;
3069 Controller->MonitoringTimer.data = (unsigned long) Controller;
3070 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3071 add_timer(&Controller->MonitoringTimer);
3072 Controller->ControllerInitialized = true;
3073 return true;
3074 }
3075 return false;
3076}
3077
3078
3079/*
3080 DAC960_FinalizeController finalizes Controller.
3081*/
3082
3083static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3084{
3085 if (Controller->ControllerInitialized)
3086 {
3087 unsigned long flags;
3088
3089 /*
3090 * Acquiring and releasing lock here eliminates
3091 * a very low probability race.
3092 *
3093 * The code below allocates controller command structures
3094 * from the free list without holding the controller lock.
3095 * This is safe assuming there is no other activity on
3096 * the controller at the time.
3097 *
3098 * But, there might be a monitoring command still
3099 * in progress. Setting the Shutdown flag while holding
3100 * the lock ensures that there is no monitoring command
3101 * in the interrupt handler currently, and any monitoring
3102 * commands that complete from this time on will NOT return
3103 * their command structure to the free list.
3104 */
3105
3106 spin_lock_irqsave(&Controller->queue_lock, flags);
3107 Controller->ShutdownMonitoringTimer = 1;
3108 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3109
3110 del_timer_sync(&Controller->MonitoringTimer);
3111 if (Controller->FirmwareType == DAC960_V1_Controller)
3112 {
3113 DAC960_Notice("Flushing Cache...", Controller);
3114 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3115 DAC960_Notice("done\n", Controller);
3116
3117 if (Controller->HardwareType == DAC960_PD_Controller)
3118 release_region(Controller->IO_Address, 0x80);
3119 }
3120 else
3121 {
3122 DAC960_Notice("Flushing Cache...", Controller);
3123 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3124 DAC960_V2_RAID_Controller);
3125 DAC960_Notice("done\n", Controller);
3126 }
3127 }
3128 DAC960_UnregisterBlockDevice(Controller);
3129 DAC960_DestroyAuxiliaryStructures(Controller);
3130 DAC960_DestroyProcEntries(Controller);
3131 DAC960_DetectCleanup(Controller);
3132}
3133
3134
3135/*
3136 DAC960_Probe verifies controller's existence and
3137 initializes the DAC960 Driver for that controller.
3138*/
3139
3140static int
3141DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3142{
3143 int disk;
3144 DAC960_Controller_T *Controller;
3145
3146 if (DAC960_ControllerCount == DAC960_MaxControllers)
3147 {
3148 DAC960_Error("More than %d DAC960 Controllers detected - "
3149 "ignoring from Controller at\n",
3150 NULL, DAC960_MaxControllers);
3151 return -ENODEV;
3152 }
3153
3154 Controller = DAC960_DetectController(dev, entry);
3155 if (!Controller)
3156 return -ENODEV;
3157
3158 if (!DAC960_InitializeController(Controller)) {
3159 DAC960_FinalizeController(Controller);
3160 return -ENODEV;
3161 }
3162
3163 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3164 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3165 add_disk(Controller->disks[disk]);
3166 }
3167 DAC960_CreateProcEntries(Controller);
3168 return 0;
3169}
3170
3171
3172/*
3173 DAC960_Finalize finalizes the DAC960 Driver.
3174*/
3175
3176static void DAC960_Remove(struct pci_dev *PCI_Device)
3177{
3178 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3179 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3180 if (Controller != NULL)
3181 DAC960_FinalizeController(Controller);
3182}
3183
3184
3185/*
3186 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3187 DAC960 V1 Firmware Controllers.
3188*/
3189
3190static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3191{
3192 DAC960_Controller_T *Controller = Command->Controller;
3193 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3194 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3195 Command->V1.ScatterGatherList;
3196 struct scatterlist *ScatterList = Command->V1.ScatterList;
3197
3198 DAC960_V1_ClearCommand(Command);
3199
3200 if (Command->SegmentCount == 1)
3201 {
3202 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3203 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3204 else
3205 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3206
3207 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3208 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3209 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3210 CommandMailbox->Type5.BusAddress =
3211 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3212 }
3213 else
3214 {
3215 int i;
3216
3217 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3218 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3219 else
3220 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3221
3222 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3223 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3224 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3225 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3226
3227 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3228
3229 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3230 ScatterGatherList->SegmentDataPointer =
3231 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3232 ScatterGatherList->SegmentByteCount =
3233 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3234 }
3235 }
3236 DAC960_QueueCommand(Command);
3237}
3238
3239
3240/*
3241 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3242 DAC960 V2 Firmware Controllers.
3243*/
3244
3245static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3246{
3247 DAC960_Controller_T *Controller = Command->Controller;
3248 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3249 struct scatterlist *ScatterList = Command->V2.ScatterList;
3250
3251 DAC960_V2_ClearCommand(Command);
3252
3253 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3254 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3255 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3256 CommandMailbox->SCSI_10.DataTransferSize =
3257 Command->BlockCount << DAC960_BlockSizeBits;
3258 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3259 CommandMailbox->SCSI_10.PhysicalDevice =
3260 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3261 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3262 CommandMailbox->SCSI_10.CDBLength = 10;
3263 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3264 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3265 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3266 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3267 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3268 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3269 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3270 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3271
3272 if (Command->SegmentCount == 1)
3273 {
3274 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3275 .ScatterGatherSegments[0]
3276 .SegmentDataPointer =
3277 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3278 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3279 .ScatterGatherSegments[0]
3280 .SegmentByteCount =
3281 CommandMailbox->SCSI_10.DataTransferSize;
3282 }
3283 else
3284 {
3285 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3286 int i;
3287
3288 if (Command->SegmentCount > 2)
3289 {
3290 ScatterGatherList = Command->V2.ScatterGatherList;
3291 CommandMailbox->SCSI_10.CommandControlBits
3292 .AdditionalScatterGatherListMemory = true;
3293 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3294 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3295 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3296 .ExtendedScatterGather.ScatterGatherList0Address =
3297 Command->V2.ScatterGatherListDMA;
3298 }
3299 else
3300 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3301 .ScatterGatherSegments;
3302
3303 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3304 ScatterGatherList->SegmentDataPointer =
3305 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3306 ScatterGatherList->SegmentByteCount =
3307 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3308 }
3309 }
3310 DAC960_QueueCommand(Command);
3311}
3312
3313
3314static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3315{
3316 struct request *Request;
3317 DAC960_Command_T *Command;
3318
3319 while(1) {
3320 Request = elv_next_request(req_q);
3321 if (!Request)
3322 return 1;
3323
3324 Command = DAC960_AllocateCommand(Controller);
3325 if (Command == NULL)
3326 return 0;
3327
3328 if (rq_data_dir(Request) == READ) {
3329 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3330 Command->CommandType = DAC960_ReadCommand;
3331 } else {
3332 Command->DmaDirection = PCI_DMA_TODEVICE;
3333 Command->CommandType = DAC960_WriteCommand;
3334 }
c00895ab 3335 Command->Completion = Request->end_io_data;
1da177e4
LT		 3336 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3337 Command->BlockNumber = Request->sector;
3338 Command->BlockCount = Request->nr_sectors;
3339 Command->Request = Request;
3340 blkdev_dequeue_request(Request);
3341 Command->SegmentCount = blk_rq_map_sg(req_q,
3342 Command->Request, Command->cmd_sglist);
3343 /* pci_map_sg MAY change the value of SegCount */
3344 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3345 Command->SegmentCount, Command->DmaDirection);
3346
3347 DAC960_QueueReadWriteCommand(Command);
3348 }
3349}
3350
3351/*
3352 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3353 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3354 this function should wait for a Command to become available if necessary.
3355 This function returns true if an I/O Request was queued and false otherwise.
3356*/
3357static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3358{
3359 int i;
3360
3361 if (!controller->ControllerInitialized)
3362 return;
3363
3364 /* Do this better later! */
3365 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3366 struct request_queue *req_q = controller->RequestQueue[i];
3367
3368 if (req_q == NULL)
3369 continue;
3370
3371 if (!DAC960_process_queue(controller, req_q)) {
3372 controller->req_q_index = i;
3373 return;
3374 }
3375 }
3376
3377 if (controller->req_q_index == 0)
3378 return;
3379
3380 for (i = 0; i < controller->req_q_index; i++) {
3381 struct request_queue *req_q = controller->RequestQueue[i];
3382
3383 if (req_q == NULL)
3384 continue;
3385
3386 if (!DAC960_process_queue(controller, req_q)) {
3387 controller->req_q_index = i;
3388 return;
3389 }
3390 }
3391}
3392
3393
3394/*
3395 DAC960_queue_partial_rw extracts one bio from the request already
3396 associated with argument command, and construct a new command block to retry I/O
3397 only on that bio. Queue that command to the controller.
3398
3399 This function re-uses a previously-allocated Command,
3400 there is no failure mode from trying to allocate a command.
3401*/
3402
3403static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3404{
3405 DAC960_Controller_T *Controller = Command->Controller;
3406 struct request *Request = Command->Request;
3407 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3408
3409 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3410 Command->CommandType = DAC960_ReadRetryCommand;
3411 else
3412 Command->CommandType = DAC960_WriteRetryCommand;
3413
3414 /*
3415 * We could be more efficient with these mapping requests
3416 * and map only the portions that we need. But since this
3417 * code should almost never be called, just go with a
3418 * simple coding.
3419 */
3420 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3421
3422 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3423 /*
3424 * Resubmitting the request sector at a time is really tedious.
3425 * But, this should almost never happen. So, we're willing to pay
3426 * this price so that in the end, as much of the transfer is completed
3427 * successfully as possible.
3428 */
3429 Command->SegmentCount = 1;
3430 Command->BlockNumber = Request->sector;
3431 Command->BlockCount = 1;
3432 DAC960_QueueReadWriteCommand(Command);
3433 return;
3434}
3435
3436/*
3437 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3438*/
3439
3440static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3441{
3442 DAC960_ProcessRequest(RequestQueue->queuedata);
3443}
3444
3445/*
3446 DAC960_ProcessCompletedBuffer performs completion processing for an
3447 individual Buffer.
3448*/
3449
87d156bf
RK		 3450static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3451 bool SuccessfulIO)
1da177e4
LT		 3452{
3453 struct request *Request = Command->Request;
3454 int UpToDate;
3455
3456 UpToDate = 0;
3457 if (SuccessfulIO)
3458 UpToDate = 1;
3459
3460 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3461 Command->SegmentCount, Command->DmaDirection);
3462
3463 if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) {
62287fbb 3464 add_disk_randomness(Request->rq_disk);
8ffdc655 3465 end_that_request_last(Request, UpToDate);
1da177e4
LT		 3466
3467 if (Command->Completion) {
3468 complete(Command->Completion);
3469 Command->Completion = NULL;
3470 }
3471 return true;
3472 }
3473 return false;
3474}
3475
3476/*
3477 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3478 when an error occurs on a Read or Write operation.
3479*/
3480
3481static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3482{
3483 DAC960_Controller_T *Controller = Command->Controller;
3484 unsigned char *CommandName = "UNKNOWN";
3485 switch (Command->CommandType)
3486 {
3487 case DAC960_ReadCommand:
3488 case DAC960_ReadRetryCommand:
3489 CommandName = "READ";
3490 break;
3491 case DAC960_WriteCommand:
3492 case DAC960_WriteRetryCommand:
3493 CommandName = "WRITE";
3494 break;
3495 case DAC960_MonitoringCommand:
3496 case DAC960_ImmediateCommand:
3497 case DAC960_QueuedCommand:
3498 break;
3499 }
3500 switch (Command->V1.CommandStatus)
3501 {
3502 case DAC960_V1_IrrecoverableDataError:
3503 DAC960_Error("Irrecoverable Data Error on %s:\n",
3504 Controller, CommandName);
3505 break;
3506 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3507 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3508 Controller, CommandName);
3509 break;
3510 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3511 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3512 "on %s:\n", Controller, CommandName);
3513 break;
3514 case DAC960_V1_BadDataEncountered:
3515 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3516 break;
3517 default:
3518 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3519 Controller, Command->V1.CommandStatus, CommandName);
3520 break;
3521 }
3522 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3523 Controller, Controller->ControllerNumber,
3524 Command->LogicalDriveNumber, Command->BlockNumber,
3525 Command->BlockNumber + Command->BlockCount - 1);
3526}
3527
3528
3529/*
3530 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3531 for DAC960 V1 Firmware Controllers.
3532*/
3533
3534static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3535{
3536 DAC960_Controller_T *Controller = Command->Controller;
3537 DAC960_CommandType_T CommandType = Command->CommandType;
3538 DAC960_V1_CommandOpcode_T CommandOpcode =
3539 Command->V1.CommandMailbox.Common.CommandOpcode;
3540 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3541
3542 if (CommandType == DAC960_ReadCommand ||
3543 CommandType == DAC960_WriteCommand)
3544 {
3545
3546#ifdef FORCE_RETRY_DEBUG
3547 CommandStatus = DAC960_V1_IrrecoverableDataError;
3548#endif
3549
3550 if (CommandStatus == DAC960_V1_NormalCompletion) {
3551
3552 if (!DAC960_ProcessCompletedRequest(Command, true))
3553 BUG();
3554
3555 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3556 CommandStatus == DAC960_V1_BadDataEncountered)
3557 {
3558 /*
3559 * break the command down into pieces and resubmit each
3560 * piece, hoping that some of them will succeed.
3561 */
3562 DAC960_queue_partial_rw(Command);
3563 return;
3564 }
3565 else
3566 {
3567 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3568 DAC960_V1_ReadWriteError(Command);
3569
3570 if (!DAC960_ProcessCompletedRequest(Command, false))
3571 BUG();
3572 }
3573 }
3574 else if (CommandType == DAC960_ReadRetryCommand ||
3575 CommandType == DAC960_WriteRetryCommand)
3576 {
87d156bf 3577 bool normal_completion;
1da177e4
LT		 3578#ifdef FORCE_RETRY_FAILURE_DEBUG
3579 static int retry_count = 1;
3580#endif
3581 /*
3582 Perform completion processing for the portion that was
3583 retried, and submit the next portion, if any.
3584 */
3585 normal_completion = true;
3586 if (CommandStatus != DAC960_V1_NormalCompletion) {
3587 normal_completion = false;
3588 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3589 DAC960_V1_ReadWriteError(Command);
3590 }
3591
3592#ifdef FORCE_RETRY_FAILURE_DEBUG
3593 if (!(++retry_count % 10000)) {
3594 printk("V1 error retry failure test\n");
3595 normal_completion = false;
3596 DAC960_V1_ReadWriteError(Command);
3597 }
3598#endif
3599
3600 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3601 DAC960_queue_partial_rw(Command);
3602 return;
3603 }
3604 }
3605
3606 else if (CommandType == DAC960_MonitoringCommand)
3607 {
3608 if (Controller->ShutdownMonitoringTimer)
3609 return;
3610 if (CommandOpcode == DAC960_V1_Enquiry)
3611 {
3612 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3613 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3614 unsigned int OldCriticalLogicalDriveCount =
3615 OldEnquiry->CriticalLogicalDriveCount;
3616 unsigned int NewCriticalLogicalDriveCount =
3617 NewEnquiry->CriticalLogicalDriveCount;
3618 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3619 {
3620 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3621 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3622 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3623 "Now Exists\n", Controller,
3624 LogicalDriveNumber,
3625 Controller->ControllerNumber,
3626 LogicalDriveNumber);
3627 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3628 DAC960_ComputeGenericDiskInfo(Controller);
3629 }
3630 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3631 {
3632 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3633 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3634 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3635 "No Longer Exists\n", Controller,
3636 LogicalDriveNumber,
3637 Controller->ControllerNumber,
3638 LogicalDriveNumber);
3639 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3640 DAC960_ComputeGenericDiskInfo(Controller);
3641 }
3642 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3643 OldEnquiry->StatusFlags.DeferredWriteError)
3644 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3645 (NewEnquiry->StatusFlags.DeferredWriteError
3646 ? "TRUE" : "FALSE"));
3647 if ((NewCriticalLogicalDriveCount > 0 ||
3648 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3649 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3650 NewEnquiry->OfflineLogicalDriveCount !=
3651 OldEnquiry->OfflineLogicalDriveCount) ||
3652 (NewEnquiry->DeadDriveCount > 0 ||
3653 NewEnquiry->DeadDriveCount !=
3654 OldEnquiry->DeadDriveCount) ||
3655 (NewEnquiry->EventLogSequenceNumber !=
3656 OldEnquiry->EventLogSequenceNumber) ||
3657 Controller->MonitoringTimerCount == 0 ||
50297cbf
MFP		 3658 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3659 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 3660 {
3661 Controller->V1.NeedLogicalDriveInformation = true;
3662 Controller->V1.NewEventLogSequenceNumber =
3663 NewEnquiry->EventLogSequenceNumber;
3664 Controller->V1.NeedErrorTableInformation = true;
3665 Controller->V1.NeedDeviceStateInformation = true;
3666 Controller->V1.StartDeviceStateScan = true;
3667 Controller->V1.NeedBackgroundInitializationStatus =
3668 Controller->V1.BackgroundInitializationStatusSupported;
3669 Controller->SecondaryMonitoringTime = jiffies;
3670 }
3671 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3672 NewEnquiry->RebuildFlag
3673 == DAC960_V1_BackgroundRebuildInProgress ||
3674 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3675 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3676 {
3677 Controller->V1.NeedRebuildProgress = true;
3678 Controller->V1.RebuildProgressFirst =
3679 (NewEnquiry->CriticalLogicalDriveCount <
3680 OldEnquiry->CriticalLogicalDriveCount);
3681 }
3682 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3683 switch (NewEnquiry->RebuildFlag)
3684 {
3685 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3686 DAC960_Progress("Consistency Check Completed Successfully\n",
3687 Controller);
3688 break;
3689 case DAC960_V1_StandbyRebuildInProgress:
3690 case DAC960_V1_BackgroundRebuildInProgress:
3691 break;
3692 case DAC960_V1_BackgroundCheckInProgress:
3693 Controller->V1.NeedConsistencyCheckProgress = true;
3694 break;
3695 case DAC960_V1_StandbyRebuildCompletedWithError:
3696 DAC960_Progress("Consistency Check Completed with Error\n",
3697 Controller);
3698 break;
3699 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3700 DAC960_Progress("Consistency Check Failed - "
3701 "Physical Device Failed\n", Controller);
3702 break;
3703 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3704 DAC960_Progress("Consistency Check Failed - "
3705 "Logical Drive Failed\n", Controller);
3706 break;
3707 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3708 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3709 Controller);
3710 break;
3711 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3712 DAC960_Progress("Consistency Check Successfully Terminated\n",
3713 Controller);
3714 break;
3715 }
3716 else if (NewEnquiry->RebuildFlag
3717 == DAC960_V1_BackgroundCheckInProgress)
3718 Controller->V1.NeedConsistencyCheckProgress = true;
3719 Controller->MonitoringAlertMode =
3720 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3721 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3722 NewEnquiry->DeadDriveCount > 0);
3723 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3724 {
3725 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3726 Controller->V1.RebuildFlagPending = true;
3727 }
3728 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3729 sizeof(DAC960_V1_Enquiry_T));
3730 }
3731 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3732 {
3733 static char
3734 *DAC960_EventMessages[] =
3735 { "killed because write recovery failed",
3736 "killed because of SCSI bus reset failure",
3737 "killed because of double check condition",
3738 "killed because it was removed",
3739 "killed because of gross error on SCSI chip",
3740 "killed because of bad tag returned from drive",
3741 "killed because of timeout on SCSI command",
3742 "killed because of reset SCSI command issued from system",
3743 "killed because busy or parity error count exceeded limit",
3744 "killed because of 'kill drive' command from system",
3745 "killed because of selection timeout",
3746 "killed due to SCSI phase sequence error",
3747 "killed due to unknown status" };
3748 DAC960_V1_EventLogEntry_T *EventLogEntry =
3749 Controller->V1.EventLogEntry;
3750 if (EventLogEntry->SequenceNumber ==
3751 Controller->V1.OldEventLogSequenceNumber)
3752 {
3753 unsigned char SenseKey = EventLogEntry->SenseKey;
3754 unsigned char AdditionalSenseCode =
3755 EventLogEntry->AdditionalSenseCode;
3756 unsigned char AdditionalSenseCodeQualifier =
3757 EventLogEntry->AdditionalSenseCodeQualifier;
3758 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3759 AdditionalSenseCode == 0x80 &&
3760 AdditionalSenseCodeQualifier <
945f390f 3761 ARRAY_SIZE(DAC960_EventMessages))
1da177e4
LT		 3762 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3763 EventLogEntry->Channel,
3764 EventLogEntry->TargetID,
3765 DAC960_EventMessages[
3766 AdditionalSenseCodeQualifier]);
3767 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3768 AdditionalSenseCode == 0x29)
3769 {
3770 if (Controller->MonitoringTimerCount > 0)
3771 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3772 [EventLogEntry->TargetID]++;
3773 }
3774 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3775 (SenseKey == DAC960_SenseKey_NotReady &&
3776 AdditionalSenseCode == 0x04 &&
3777 (AdditionalSenseCodeQualifier == 0x01 ||
3778 AdditionalSenseCodeQualifier == 0x02))))
3779 {
3780 DAC960_Critical("Physical Device %d:%d Error Log: "
3781 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3782 Controller,
3783 EventLogEntry->Channel,
3784 EventLogEntry->TargetID,
3785 SenseKey,
3786 AdditionalSenseCode,
3787 AdditionalSenseCodeQualifier);
3788 DAC960_Critical("Physical Device %d:%d Error Log: "
3789 "Information = %02X%02X%02X%02X "
3790 "%02X%02X%02X%02X\n",
3791 Controller,
3792 EventLogEntry->Channel,
3793 EventLogEntry->TargetID,
3794 EventLogEntry->Information[0],
3795 EventLogEntry->Information[1],
3796 EventLogEntry->Information[2],
3797 EventLogEntry->Information[3],
3798 EventLogEntry->CommandSpecificInformation[0],
3799 EventLogEntry->CommandSpecificInformation[1],
3800 EventLogEntry->CommandSpecificInformation[2],
3801 EventLogEntry->CommandSpecificInformation[3]);
3802 }
3803 }
3804 Controller->V1.OldEventLogSequenceNumber++;
3805 }
3806 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3807 {
3808 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3809 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3810 int Channel, TargetID;
3811 for (Channel = 0; Channel < Controller->Channels; Channel++)
3812 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3813 {
3814 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3815 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3816 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3817 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3818 if ((NewErrorEntry->ParityErrorCount !=
3819 OldErrorEntry->ParityErrorCount) ||
3820 (NewErrorEntry->SoftErrorCount !=
3821 OldErrorEntry->SoftErrorCount) ||
3822 (NewErrorEntry->HardErrorCount !=
3823 OldErrorEntry->HardErrorCount) ||
3824 (NewErrorEntry->MiscErrorCount !=
3825 OldErrorEntry->MiscErrorCount))
3826 DAC960_Critical("Physical Device %d:%d Errors: "
3827 "Parity = %d, Soft = %d, "
3828 "Hard = %d, Misc = %d\n",
3829 Controller, Channel, TargetID,
3830 NewErrorEntry->ParityErrorCount,
3831 NewErrorEntry->SoftErrorCount,
3832 NewErrorEntry->HardErrorCount,
3833 NewErrorEntry->MiscErrorCount);
3834 }
3835 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3836 sizeof(DAC960_V1_ErrorTable_T));
3837 }
3838 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3839 {
3840 DAC960_V1_DeviceState_T *OldDeviceState =
3841 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3842 [Controller->V1.DeviceStateTargetID];
3843 DAC960_V1_DeviceState_T *NewDeviceState =
3844 Controller->V1.NewDeviceState;
3845 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3846 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3847 Controller->V1.DeviceStateChannel,
3848 Controller->V1.DeviceStateTargetID,
3849 (NewDeviceState->DeviceState
3850 == DAC960_V1_Device_Dead
3851 ? "DEAD"
3852 : NewDeviceState->DeviceState
3853 == DAC960_V1_Device_WriteOnly
3854 ? "WRITE-ONLY"
3855 : NewDeviceState->DeviceState
3856 == DAC960_V1_Device_Online
3857 ? "ONLINE" : "STANDBY"));
3858 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3859 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3860 {
3861 Controller->V1.NeedDeviceInquiryInformation = true;
3862 Controller->V1.NeedDeviceSerialNumberInformation = true;
3863 Controller->V1.DeviceResetCount
3864 [Controller->V1.DeviceStateChannel]
3865 [Controller->V1.DeviceStateTargetID] = 0;
3866 }
3867 memcpy(OldDeviceState, NewDeviceState,
3868 sizeof(DAC960_V1_DeviceState_T));
3869 }
3870 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3871 {
3872 int LogicalDriveNumber;
3873 for (LogicalDriveNumber = 0;
3874 LogicalDriveNumber < Controller->LogicalDriveCount;
3875 LogicalDriveNumber++)
3876 {
3877 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3878 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3879 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3880 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3881 if (NewLogicalDriveInformation->LogicalDriveState !=
3882 OldLogicalDriveInformation->LogicalDriveState)
3883 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3884 "is now %s\n", Controller,
3885 LogicalDriveNumber,
3886 Controller->ControllerNumber,
3887 LogicalDriveNumber,
3888 (NewLogicalDriveInformation->LogicalDriveState
3889 == DAC960_V1_LogicalDrive_Online
3890 ? "ONLINE"
3891 : NewLogicalDriveInformation->LogicalDriveState
3892 == DAC960_V1_LogicalDrive_Critical
3893 ? "CRITICAL" : "OFFLINE"));
3894 if (NewLogicalDriveInformation->WriteBack !=
3895 OldLogicalDriveInformation->WriteBack)
3896 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3897 "is now %s\n", Controller,
3898 LogicalDriveNumber,
3899 Controller->ControllerNumber,
3900 LogicalDriveNumber,
3901 (NewLogicalDriveInformation->WriteBack
3902 ? "WRITE BACK" : "WRITE THRU"));
3903 }
3904 memcpy(&Controller->V1.LogicalDriveInformation,
3905 Controller->V1.NewLogicalDriveInformation,
3906 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3907 }
3908 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3909 {
3910 unsigned int LogicalDriveNumber =
3911 Controller->V1.RebuildProgress->LogicalDriveNumber;
3912 unsigned int LogicalDriveSize =
3913 Controller->V1.RebuildProgress->LogicalDriveSize;
3914 unsigned int BlocksCompleted =
3915 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3916 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3917 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3918 CommandStatus = DAC960_V1_RebuildSuccessful;
3919 switch (CommandStatus)
3920 {
3921 case DAC960_V1_NormalCompletion:
3922 Controller->EphemeralProgressMessage = true;
3923 DAC960_Progress("Rebuild in Progress: "
3924 "Logical Drive %d (/dev/rd/c%dd%d) "
3925 "%d%% completed\n",
3926 Controller, LogicalDriveNumber,
3927 Controller->ControllerNumber,
3928 LogicalDriveNumber,
3929 (100 * (BlocksCompleted >> 7))
3930 / (LogicalDriveSize >> 7));
3931 Controller->EphemeralProgressMessage = false;
3932 break;
3933 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3934 DAC960_Progress("Rebuild Failed due to "
3935 "Logical Drive Failure\n", Controller);
3936 break;
3937 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3938 DAC960_Progress("Rebuild Failed due to "
3939 "Bad Blocks on Other Drives\n", Controller);
3940 break;
3941 case DAC960_V1_RebuildFailed_NewDriveFailed:
3942 DAC960_Progress("Rebuild Failed due to "
3943 "Failure of Drive Being Rebuilt\n", Controller);
3944 break;
3945 case DAC960_V1_NoRebuildOrCheckInProgress:
3946 break;
3947 case DAC960_V1_RebuildSuccessful:
3948 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3949 break;
3950 case DAC960_V1_RebuildSuccessfullyTerminated:
3951 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3952 break;
3953 }
3954 Controller->V1.LastRebuildStatus = CommandStatus;
3955 if (CommandType != DAC960_MonitoringCommand &&
3956 Controller->V1.RebuildStatusPending)
3957 {
3958 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3959 Controller->V1.RebuildStatusPending = false;
3960 }
3961 else if (CommandType == DAC960_MonitoringCommand &&
3962 CommandStatus != DAC960_V1_NormalCompletion &&
3963 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3964 {
3965 Controller->V1.PendingRebuildStatus = CommandStatus;
3966 Controller->V1.RebuildStatusPending = true;
3967 }
3968 }
3969 else if (CommandOpcode == DAC960_V1_RebuildStat)
3970 {
3971 unsigned int LogicalDriveNumber =
3972 Controller->V1.RebuildProgress->LogicalDriveNumber;
3973 unsigned int LogicalDriveSize =
3974 Controller->V1.RebuildProgress->LogicalDriveSize;
3975 unsigned int BlocksCompleted =
3976 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3977 if (CommandStatus == DAC960_V1_NormalCompletion)
3978 {
3979 Controller->EphemeralProgressMessage = true;
3980 DAC960_Progress("Consistency Check in Progress: "
3981 "Logical Drive %d (/dev/rd/c%dd%d) "
3982 "%d%% completed\n",
3983 Controller, LogicalDriveNumber,
3984 Controller->ControllerNumber,
3985 LogicalDriveNumber,
3986 (100 * (BlocksCompleted >> 7))
3987 / (LogicalDriveSize >> 7));
3988 Controller->EphemeralProgressMessage = false;
3989 }
3990 }
3991 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3992 {
3993 unsigned int LogicalDriveNumber =
3994 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
3995 unsigned int LogicalDriveSize =
3996 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
3997 unsigned int BlocksCompleted =
3998 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
3999 switch (CommandStatus)
4000 {
4001 case DAC960_V1_NormalCompletion:
4002 switch (Controller->V1.BackgroundInitializationStatus->Status)
4003 {
4004 case DAC960_V1_BackgroundInitializationInvalid:
4005 break;
4006 case DAC960_V1_BackgroundInitializationStarted:
4007 DAC960_Progress("Background Initialization Started\n",
4008 Controller);
4009 break;
4010 case DAC960_V1_BackgroundInitializationInProgress:
4011 if (BlocksCompleted ==
4012 Controller->V1.LastBackgroundInitializationStatus.
4013 BlocksCompleted &&
4014 LogicalDriveNumber ==
4015 Controller->V1.LastBackgroundInitializationStatus.
4016 LogicalDriveNumber)
4017 break;
4018 Controller->EphemeralProgressMessage = true;
4019 DAC960_Progress("Background Initialization in Progress: "
4020 "Logical Drive %d (/dev/rd/c%dd%d) "
4021 "%d%% completed\n",
4022 Controller, LogicalDriveNumber,
4023 Controller->ControllerNumber,
4024 LogicalDriveNumber,
4025 (100 * (BlocksCompleted >> 7))
4026 / (LogicalDriveSize >> 7));
4027 Controller->EphemeralProgressMessage = false;
4028 break;
4029 case DAC960_V1_BackgroundInitializationSuspended:
4030 DAC960_Progress("Background Initialization Suspended\n",
4031 Controller);
4032 break;
4033 case DAC960_V1_BackgroundInitializationCancelled:
4034 DAC960_Progress("Background Initialization Cancelled\n",
4035 Controller);
4036 break;
4037 }
4038 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4039 Controller->V1.BackgroundInitializationStatus,
4040 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4041 break;
4042 case DAC960_V1_BackgroundInitSuccessful:
4043 if (Controller->V1.BackgroundInitializationStatus->Status ==
4044 DAC960_V1_BackgroundInitializationInProgress)
4045 DAC960_Progress("Background Initialization "
4046 "Completed Successfully\n", Controller);
4047 Controller->V1.BackgroundInitializationStatus->Status =
4048 DAC960_V1_BackgroundInitializationInvalid;
4049 break;
4050 case DAC960_V1_BackgroundInitAborted:
4051 if (Controller->V1.BackgroundInitializationStatus->Status ==
4052 DAC960_V1_BackgroundInitializationInProgress)
4053 DAC960_Progress("Background Initialization Aborted\n",
4054 Controller);
4055 Controller->V1.BackgroundInitializationStatus->Status =
4056 DAC960_V1_BackgroundInitializationInvalid;
4057 break;
4058 case DAC960_V1_NoBackgroundInitInProgress:
4059 break;
4060 }
4061 }
4062 else if (CommandOpcode == DAC960_V1_DCDB)
4063 {
4064 /*
4065 This is a bit ugly.
4066
4067 The InquiryStandardData and
4068 the InquiryUntitSerialNumber information
4069 retrieval operations BOTH use the DAC960_V1_DCDB
4070 commands. the test above can't distinguish between
4071 these two cases.
4072
4073 Instead, we rely on the order of code later in this
4074 function to ensure that DeviceInquiryInformation commands
4075 are submitted before DeviceSerialNumber commands.
4076 */
4077 if (Controller->V1.NeedDeviceInquiryInformation)
4078 {
4079 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4080 &Controller->V1.InquiryStandardData
4081 [Controller->V1.DeviceStateChannel]
4082 [Controller->V1.DeviceStateTargetID];
4083 if (CommandStatus != DAC960_V1_NormalCompletion)
4084 {
4085 memset(InquiryStandardData, 0,
4086 sizeof(DAC960_SCSI_Inquiry_T));
4087 InquiryStandardData->PeripheralDeviceType = 0x1F;
4088 }
4089 else
4090 memcpy(InquiryStandardData,
4091 Controller->V1.NewInquiryStandardData,
4092 sizeof(DAC960_SCSI_Inquiry_T));
4093 Controller->V1.NeedDeviceInquiryInformation = false;
4094 }
4095 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4096 {
4097 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4098 &Controller->V1.InquiryUnitSerialNumber
4099 [Controller->V1.DeviceStateChannel]
4100 [Controller->V1.DeviceStateTargetID];
4101 if (CommandStatus != DAC960_V1_NormalCompletion)
4102 {
4103 memset(InquiryUnitSerialNumber, 0,
4104 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4105 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4106 }
4107 else
4108 memcpy(InquiryUnitSerialNumber,
4109 Controller->V1.NewInquiryUnitSerialNumber,
4110 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4111 Controller->V1.NeedDeviceSerialNumberInformation = false;
4112 }
4113 }
4114 /*
4115 Begin submitting new monitoring commands.
4116 */
4117 if (Controller->V1.NewEventLogSequenceNumber
4118 - Controller->V1.OldEventLogSequenceNumber > 0)
4119 {
4120 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4121 DAC960_V1_PerformEventLogOperation;
4122 Command->V1.CommandMailbox.Type3E.OperationType =
4123 DAC960_V1_GetEventLogEntry;
4124 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4125 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4126 Controller->V1.OldEventLogSequenceNumber;
4127 Command->V1.CommandMailbox.Type3E.BusAddress =
4128 Controller->V1.EventLogEntryDMA;
4129 DAC960_QueueCommand(Command);
4130 return;
4131 }
4132 if (Controller->V1.NeedErrorTableInformation)
4133 {
4134 Controller->V1.NeedErrorTableInformation = false;
4135 Command->V1.CommandMailbox.Type3.CommandOpcode =
4136 DAC960_V1_GetErrorTable;
4137 Command->V1.CommandMailbox.Type3.BusAddress =
4138 Controller->V1.NewErrorTableDMA;
4139 DAC960_QueueCommand(Command);
4140 return;
4141 }
4142 if (Controller->V1.NeedRebuildProgress &&
4143 Controller->V1.RebuildProgressFirst)
4144 {
4145 Controller->V1.NeedRebuildProgress = false;
4146 Command->V1.CommandMailbox.Type3.CommandOpcode =
4147 DAC960_V1_GetRebuildProgress;
4148 Command->V1.CommandMailbox.Type3.BusAddress =
4149 Controller->V1.RebuildProgressDMA;
4150 DAC960_QueueCommand(Command);
4151 return;
4152 }
4153 if (Controller->V1.NeedDeviceStateInformation)
4154 {
4155 if (Controller->V1.NeedDeviceInquiryInformation)
4156 {
4157 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4158 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4159
4160 dma_addr_t NewInquiryStandardDataDMA =
4161 Controller->V1.NewInquiryStandardDataDMA;
4162
4163 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4164 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4165 DCDB->Channel = Controller->V1.DeviceStateChannel;
4166 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4167 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4168 DCDB->EarlyStatus = false;
4169 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4170 DCDB->NoAutomaticRequestSense = false;
4171 DCDB->DisconnectPermitted = true;
4172 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4173 DCDB->BusAddress = NewInquiryStandardDataDMA;
4174 DCDB->CDBLength = 6;
4175 DCDB->TransferLengthHigh4 = 0;
4176 DCDB->SenseLength = sizeof(DCDB->SenseData);
4177 DCDB->CDB[0] = 0x12; /* INQUIRY */
4178 DCDB->CDB[1] = 0; /* EVPD = 0 */
4179 DCDB->CDB[2] = 0; /* Page Code */
4180 DCDB->CDB[3] = 0; /* Reserved */
4181 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4182 DCDB->CDB[5] = 0; /* Control */
4183 DAC960_QueueCommand(Command);
4184 return;
4185 }
4186 if (Controller->V1.NeedDeviceSerialNumberInformation)
4187 {
4188 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4189 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4190 dma_addr_t NewInquiryUnitSerialNumberDMA =
4191 Controller->V1.NewInquiryUnitSerialNumberDMA;
4192
4193 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4194 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4195 DCDB->Channel = Controller->V1.DeviceStateChannel;
4196 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4197 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4198 DCDB->EarlyStatus = false;
4199 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4200 DCDB->NoAutomaticRequestSense = false;
4201 DCDB->DisconnectPermitted = true;
4202 DCDB->TransferLength =
4203 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4204 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4205 DCDB->CDBLength = 6;
4206 DCDB->TransferLengthHigh4 = 0;
4207 DCDB->SenseLength = sizeof(DCDB->SenseData);
4208 DCDB->CDB[0] = 0x12; /* INQUIRY */
4209 DCDB->CDB[1] = 1; /* EVPD = 1 */
4210 DCDB->CDB[2] = 0x80; /* Page Code */
4211 DCDB->CDB[3] = 0; /* Reserved */
4212 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4213 DCDB->CDB[5] = 0; /* Control */
4214 DAC960_QueueCommand(Command);
4215 return;
4216 }
4217 if (Controller->V1.StartDeviceStateScan)
4218 {
4219 Controller->V1.DeviceStateChannel = 0;
4220 Controller->V1.DeviceStateTargetID = 0;
4221 Controller->V1.StartDeviceStateScan = false;
4222 }
4223 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4224 {
4225 Controller->V1.DeviceStateChannel++;
4226 Controller->V1.DeviceStateTargetID = 0;
4227 }
4228 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4229 {
4230 Controller->V1.NewDeviceState->DeviceState =
4231 DAC960_V1_Device_Dead;
4232 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4233 DAC960_V1_GetDeviceState;
4234 Command->V1.CommandMailbox.Type3D.Channel =
4235 Controller->V1.DeviceStateChannel;
4236 Command->V1.CommandMailbox.Type3D.TargetID =
4237 Controller->V1.DeviceStateTargetID;
4238 Command->V1.CommandMailbox.Type3D.BusAddress =
4239 Controller->V1.NewDeviceStateDMA;
4240 DAC960_QueueCommand(Command);
4241 return;
4242 }
4243 Controller->V1.NeedDeviceStateInformation = false;
4244 }
4245 if (Controller->V1.NeedLogicalDriveInformation)
4246 {
4247 Controller->V1.NeedLogicalDriveInformation = false;
4248 Command->V1.CommandMailbox.Type3.CommandOpcode =
4249 DAC960_V1_GetLogicalDriveInformation;
4250 Command->V1.CommandMailbox.Type3.BusAddress =
4251 Controller->V1.NewLogicalDriveInformationDMA;
4252 DAC960_QueueCommand(Command);
4253 return;
4254 }
4255 if (Controller->V1.NeedRebuildProgress)
4256 {
4257 Controller->V1.NeedRebuildProgress = false;
4258 Command->V1.CommandMailbox.Type3.CommandOpcode =
4259 DAC960_V1_GetRebuildProgress;
4260 Command->V1.CommandMailbox.Type3.BusAddress =
4261 Controller->V1.RebuildProgressDMA;
4262 DAC960_QueueCommand(Command);
4263 return;
4264 }
4265 if (Controller->V1.NeedConsistencyCheckProgress)
4266 {
4267 Controller->V1.NeedConsistencyCheckProgress = false;
4268 Command->V1.CommandMailbox.Type3.CommandOpcode =
4269 DAC960_V1_RebuildStat;
4270 Command->V1.CommandMailbox.Type3.BusAddress =
4271 Controller->V1.RebuildProgressDMA;
4272 DAC960_QueueCommand(Command);
4273 return;
4274 }
4275 if (Controller->V1.NeedBackgroundInitializationStatus)
4276 {
4277 Controller->V1.NeedBackgroundInitializationStatus = false;
4278 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4279 DAC960_V1_BackgroundInitializationControl;
4280 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4281 Command->V1.CommandMailbox.Type3B.BusAddress =
4282 Controller->V1.BackgroundInitializationStatusDMA;
4283 DAC960_QueueCommand(Command);
4284 return;
4285 }
4286 Controller->MonitoringTimerCount++;
4287 Controller->MonitoringTimer.expires =
4288 jiffies + DAC960_MonitoringTimerInterval;
4289 add_timer(&Controller->MonitoringTimer);
4290 }
4291 if (CommandType == DAC960_ImmediateCommand)
4292 {
4293 complete(Command->Completion);
4294 Command->Completion = NULL;
4295 return;
4296 }
4297 if (CommandType == DAC960_QueuedCommand)
4298 {
4299 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4300 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4301 Command->V1.KernelCommand = NULL;
4302 if (CommandOpcode == DAC960_V1_DCDB)
4303 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4304 [KernelCommand->DCDB->TargetID] =
4305 false;
4306 DAC960_DeallocateCommand(Command);
4307 KernelCommand->CompletionFunction(KernelCommand);
4308 return;
4309 }
4310 /*
4311 Queue a Status Monitoring Command to the Controller using the just
4312 completed Command if one was deferred previously due to lack of a
4313 free Command when the Monitoring Timer Function was called.
4314 */
4315 if (Controller->MonitoringCommandDeferred)
4316 {
4317 Controller->MonitoringCommandDeferred = false;
4318 DAC960_V1_QueueMonitoringCommand(Command);
4319 return;
4320 }
4321 /*
4322 Deallocate the Command.
4323 */
4324 DAC960_DeallocateCommand(Command);
4325 /*
4326 Wake up any processes waiting on a free Command.
4327 */
4328 wake_up(&Controller->CommandWaitQueue);
4329}
4330
4331
4332/*
4333 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4334 when an error occurs on a Read or Write operation.
4335*/
4336
4337static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4338{
4339 DAC960_Controller_T *Controller = Command->Controller;
4340 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4341 "NOT READY", "MEDIUM ERROR",
4342 "HARDWARE ERROR", "ILLEGAL REQUEST",
4343 "UNIT ATTENTION", "DATA PROTECT",
4344 "BLANK CHECK", "VENDOR-SPECIFIC",
4345 "COPY ABORTED", "ABORTED COMMAND",
4346 "EQUAL", "VOLUME OVERFLOW",
4347 "MISCOMPARE", "RESERVED" };
4348 unsigned char *CommandName = "UNKNOWN";
4349 switch (Command->CommandType)
4350 {
4351 case DAC960_ReadCommand:
4352 case DAC960_ReadRetryCommand:
4353 CommandName = "READ";
4354 break;
4355 case DAC960_WriteCommand:
4356 case DAC960_WriteRetryCommand:
4357 CommandName = "WRITE";
4358 break;
4359 case DAC960_MonitoringCommand:
4360 case DAC960_ImmediateCommand:
4361 case DAC960_QueuedCommand:
4362 break;
4363 }
4364 DAC960_Error("Error Condition %s on %s:\n", Controller,
4365 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4366 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4367 Controller, Controller->ControllerNumber,
4368 Command->LogicalDriveNumber, Command->BlockNumber,
4369 Command->BlockNumber + Command->BlockCount - 1);
4370}
4371
4372
4373/*
4374 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4375 occurs.
4376*/
4377
4378static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4379 DAC960_V2_Event_T *Event)
4380{
4381 DAC960_SCSI_RequestSense_T *RequestSense =
4382 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4383 unsigned char MessageBuffer[DAC960_LineBufferSize];
4384 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4385 { /* Physical Device Events (0x0000 - 0x007F) */
4386 { 0x0001, "P Online" },
4387 { 0x0002, "P Standby" },
4388 { 0x0005, "P Automatic Rebuild Started" },
4389 { 0x0006, "P Manual Rebuild Started" },
4390 { 0x0007, "P Rebuild Completed" },
4391 { 0x0008, "P Rebuild Cancelled" },
4392 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4393 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4394 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4395 { 0x000C, "S Offline" },
4396 { 0x000D, "P Found" },
4397 { 0x000E, "P Removed" },
4398 { 0x000F, "P Unconfigured" },
4399 { 0x0010, "P Expand Capacity Started" },
4400 { 0x0011, "P Expand Capacity Completed" },
4401 { 0x0012, "P Expand Capacity Failed" },
4402 { 0x0013, "P Command Timed Out" },
4403 { 0x0014, "P Command Aborted" },
4404 { 0x0015, "P Command Retried" },
4405 { 0x0016, "P Parity Error" },
4406 { 0x0017, "P Soft Error" },
4407 { 0x0018, "P Miscellaneous Error" },
4408 { 0x0019, "P Reset" },
4409 { 0x001A, "P Active Spare Found" },
4410 { 0x001B, "P Warm Spare Found" },
4411 { 0x001C, "S Sense Data Received" },
4412 { 0x001D, "P Initialization Started" },
4413 { 0x001E, "P Initialization Completed" },
4414 { 0x001F, "P Initialization Failed" },
4415 { 0x0020, "P Initialization Cancelled" },
4416 { 0x0021, "P Failed because Write Recovery Failed" },
4417 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4418 { 0x0023, "P Failed because of Double Check Condition" },
4419 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4420 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4421 { 0x0026, "P Failed because of Bad Tag from Device" },
4422 { 0x0027, "P Failed because of Command Timeout" },
4423 { 0x0028, "P Failed because of System Reset" },
4424 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4425 { 0x002A, "P Failed because Host Set Device to Failed State" },
4426 { 0x002B, "P Failed because of Selection Timeout" },
4427 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4428 { 0x002D, "P Failed because Device Returned Unknown Status" },
4429 { 0x002E, "P Failed because Device Not Ready" },
4430 { 0x002F, "P Failed because Device Not Found at Startup" },
4431 { 0x0030, "P Failed because COD Write Operation Failed" },
4432 { 0x0031, "P Failed because BDT Write Operation Failed" },
4433 { 0x0039, "P Missing at Startup" },
4434 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4435 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4436 { 0x003D, "P Standby Rebuild Started" },
4437 /* Logical Device Events (0x0080 - 0x00FF) */
4438 { 0x0080, "M Consistency Check Started" },
4439 { 0x0081, "M Consistency Check Completed" },
4440 { 0x0082, "M Consistency Check Cancelled" },
4441 { 0x0083, "M Consistency Check Completed With Errors" },
4442 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4443 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4444 { 0x0086, "L Offline" },
4445 { 0x0087, "L Critical" },
4446 { 0x0088, "L Online" },
4447 { 0x0089, "M Automatic Rebuild Started" },
4448 { 0x008A, "M Manual Rebuild Started" },
4449 { 0x008B, "M Rebuild Completed" },
4450 { 0x008C, "M Rebuild Cancelled" },
4451 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4452 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4453 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4454 { 0x0090, "M Initialization Started" },
4455 { 0x0091, "M Initialization Completed" },
4456 { 0x0092, "M Initialization Cancelled" },
4457 { 0x0093, "M Initialization Failed" },
4458 { 0x0094, "L Found" },
4459 { 0x0095, "L Deleted" },
4460 { 0x0096, "M Expand Capacity Started" },
4461 { 0x0097, "M Expand Capacity Completed" },
4462 { 0x0098, "M Expand Capacity Failed" },
4463 { 0x0099, "L Bad Block Found" },
4464 { 0x009A, "L Size Changed" },
4465 { 0x009B, "L Type Changed" },
4466 { 0x009C, "L Bad Data Block Found" },
4467 { 0x009E, "L Read of Data Block in BDT" },
4468 { 0x009F, "L Write Back Data for Disk Block Lost" },
4469 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4470 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4471 { 0x00A2, "L Standby Rebuild Started" },
4472 /* Fault Management Events (0x0100 - 0x017F) */
4473 { 0x0140, "E Fan %d Failed" },
4474 { 0x0141, "E Fan %d OK" },
4475 { 0x0142, "E Fan %d Not Present" },
4476 { 0x0143, "E Power Supply %d Failed" },
4477 { 0x0144, "E Power Supply %d OK" },
4478 { 0x0145, "E Power Supply %d Not Present" },
4479 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4480 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4481 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4482 { 0x0149, "E Temperature Sensor %d Not Present" },
4483 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4484 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4485 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4486 /* Controller Events (0x0180 - 0x01FF) */
4487 { 0x0181, "C Cache Write Back Error" },
4488 { 0x0188, "C Battery Backup Unit Found" },
4489 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4490 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4491 { 0x0193, "C Installation Aborted" },
4492 { 0x0195, "C Battery Backup Unit Physically Removed" },
4493 { 0x0196, "C Memory Error During Warm Boot" },
4494 { 0x019E, "C Memory Soft ECC Error Corrected" },
4495 { 0x019F, "C Memory Hard ECC Error Corrected" },
4496 { 0x01A2, "C Battery Backup Unit Failed" },
4497 { 0x01AB, "C Mirror Race Recovery Failed" },
4498 { 0x01AC, "C Mirror Race on Critical Drive" },
4499 /* Controller Internal Processor Events */
4500 { 0x0380, "C Internal Controller Hung" },
4501 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4502 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4503 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4504 { 0, "" } };
4505 int EventListIndex = 0, EventCode;
4506 unsigned char EventType, *EventMessage;
4507 if (Event->EventCode == 0x1C &&
4508 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4509 (RequestSense->AdditionalSenseCode == 0x80 ||
4510 RequestSense->AdditionalSenseCode == 0x81))
4511 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4512 RequestSense->AdditionalSenseCodeQualifier;
4513 while (true)
4514 {
4515 EventCode = EventList[EventListIndex].EventCode;
4516 if (EventCode == Event->EventCode || EventCode == 0) break;
4517 EventListIndex++;
4518 }
4519 EventType = EventList[EventListIndex].EventMessage[0];
4520 EventMessage = &EventList[EventListIndex].EventMessage[2];
4521 if (EventCode == 0)
4522 {
4523 DAC960_Critical("Unknown Controller Event Code %04X\n",
4524 Controller, Event->EventCode);
4525 return;
4526 }
4527 switch (EventType)
4528 {
4529 case 'P':
4530 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4531 Event->Channel, Event->TargetID, EventMessage);
4532 break;
4533 case 'L':
4534 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4535 Event->LogicalUnit, Controller->ControllerNumber,
4536 Event->LogicalUnit, EventMessage);
4537 break;
4538 case 'M':
4539 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4540 Event->LogicalUnit, Controller->ControllerNumber,
4541 Event->LogicalUnit, EventMessage);
4542 break;
4543 case 'S':
4544 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4545 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4546 RequestSense->AdditionalSenseCode == 0x04 &&
4547 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4548 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4549 break;
4550 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4551 Event->Channel, Event->TargetID, EventMessage);
4552 DAC960_Critical("Physical Device %d:%d Request Sense: "
4553 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4554 Controller,
4555 Event->Channel,
4556 Event->TargetID,
4557 RequestSense->SenseKey,
4558 RequestSense->AdditionalSenseCode,
4559 RequestSense->AdditionalSenseCodeQualifier);
4560 DAC960_Critical("Physical Device %d:%d Request Sense: "
4561 "Information = %02X%02X%02X%02X "
4562 "%02X%02X%02X%02X\n",
4563 Controller,
4564 Event->Channel,
4565 Event->TargetID,
4566 RequestSense->Information[0],
4567 RequestSense->Information[1],
4568 RequestSense->Information[2],
4569 RequestSense->Information[3],
4570 RequestSense->CommandSpecificInformation[0],
4571 RequestSense->CommandSpecificInformation[1],
4572 RequestSense->CommandSpecificInformation[2],
4573 RequestSense->CommandSpecificInformation[3]);
4574 break;
4575 case 'E':
4576 if (Controller->SuppressEnclosureMessages) break;
4577 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4578 DAC960_Critical("Enclosure %d %s\n", Controller,
4579 Event->TargetID, MessageBuffer);
4580 break;
4581 case 'C':
4582 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4583 break;
4584 default:
4585 DAC960_Critical("Unknown Controller Event Code %04X\n",
4586 Controller, Event->EventCode);
4587 break;
4588 }
4589}
4590
4591
4592/*
4593 DAC960_V2_ReportProgress prints an appropriate progress message for
4594 Logical Device Long Operations.
4595*/
4596
4597static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4598 unsigned char *MessageString,
4599 unsigned int LogicalDeviceNumber,
4600 unsigned long BlocksCompleted,
4601 unsigned long LogicalDeviceSize)
4602{
4603 Controller->EphemeralProgressMessage = true;
4604 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4605 "%d%% completed\n", Controller,
4606 MessageString,
4607 LogicalDeviceNumber,
4608 Controller->ControllerNumber,
4609 LogicalDeviceNumber,
4610 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4611 Controller->EphemeralProgressMessage = false;
4612}
4613
4614
4615/*
4616 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4617 for DAC960 V2 Firmware Controllers.
4618*/
4619
4620static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4621{
4622 DAC960_Controller_T *Controller = Command->Controller;
4623 DAC960_CommandType_T CommandType = Command->CommandType;
4624 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4625 DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
4626 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4627
4628 if (CommandType == DAC960_ReadCommand ||
4629 CommandType == DAC960_WriteCommand)
4630 {
4631
4632#ifdef FORCE_RETRY_DEBUG
4633 CommandStatus = DAC960_V2_AbormalCompletion;
4634#endif
4635 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4636
4637 if (CommandStatus == DAC960_V2_NormalCompletion) {
4638
4639 if (!DAC960_ProcessCompletedRequest(Command, true))
4640 BUG();
4641
4642 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4643 {
4644 /*
4645 * break the command down into pieces and resubmit each
4646 * piece, hoping that some of them will succeed.
4647 */
4648 DAC960_queue_partial_rw(Command);
4649 return;
4650 }
4651 else
4652 {
4653 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4654 DAC960_V2_ReadWriteError(Command);
4655 /*
4656 Perform completion processing for all buffers in this I/O Request.
4657 */
4658 (void)DAC960_ProcessCompletedRequest(Command, false);
4659 }
4660 }
4661 else if (CommandType == DAC960_ReadRetryCommand ||
4662 CommandType == DAC960_WriteRetryCommand)
4663 {
87d156bf 4664 bool normal_completion;
1da177e4
LT		 4665
4666#ifdef FORCE_RETRY_FAILURE_DEBUG
4667 static int retry_count = 1;
4668#endif
4669 /*
4670 Perform completion processing for the portion that was
4671 retried, and submit the next portion, if any.
4672 */
4673 normal_completion = true;
4674 if (CommandStatus != DAC960_V2_NormalCompletion) {
4675 normal_completion = false;
4676 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4677 DAC960_V2_ReadWriteError(Command);
4678 }
4679
4680#ifdef FORCE_RETRY_FAILURE_DEBUG
4681 if (!(++retry_count % 10000)) {
4682 printk("V2 error retry failure test\n");
4683 normal_completion = false;
4684 DAC960_V2_ReadWriteError(Command);
4685 }
4686#endif
4687
4688 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4689 DAC960_queue_partial_rw(Command);
4690 return;
4691 }
4692 }
4693 else if (CommandType == DAC960_MonitoringCommand)
4694 {
4695 if (Controller->ShutdownMonitoringTimer)
4696 return;
4697 if (CommandOpcode == DAC960_V2_GetControllerInfo)
4698 {
4699 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4700 Controller->V2.NewControllerInformation;
4701 DAC960_V2_ControllerInfo_T *ControllerInfo =
4702 &Controller->V2.ControllerInformation;
4703 Controller->LogicalDriveCount =
4704 NewControllerInfo->LogicalDevicesPresent;
4705 Controller->V2.NeedLogicalDeviceInformation = true;
4706 Controller->V2.NeedPhysicalDeviceInformation = true;
4707 Controller->V2.StartLogicalDeviceInformationScan = true;
4708 Controller->V2.StartPhysicalDeviceInformationScan = true;
4709 Controller->MonitoringAlertMode =
4710 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4711 NewControllerInfo->LogicalDevicesOffline > 0 ||
4712 NewControllerInfo->PhysicalDisksCritical > 0 ||
4713 NewControllerInfo->PhysicalDisksOffline > 0);
4714 memcpy(ControllerInfo, NewControllerInfo,
4715 sizeof(DAC960_V2_ControllerInfo_T));
4716 }
4717 else if (CommandOpcode == DAC960_V2_GetEvent)
4718 {
4719 if (CommandStatus == DAC960_V2_NormalCompletion) {
4720 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4721 }
4722 Controller->V2.NextEventSequenceNumber++;
4723 }
4724 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4725 CommandStatus == DAC960_V2_NormalCompletion)
4726 {
4727 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4728 Controller->V2.NewPhysicalDeviceInformation;
4729 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4730 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4731 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4732 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4733 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4734 unsigned int DeviceIndex;
4735 while (PhysicalDeviceInfo != NULL &&
4736 (NewPhysicalDeviceInfo->Channel >
4737 PhysicalDeviceInfo->Channel ||
4738 (NewPhysicalDeviceInfo->Channel ==
4739 PhysicalDeviceInfo->Channel &&
4740 (NewPhysicalDeviceInfo->TargetID >
4741 PhysicalDeviceInfo->TargetID ||
4742 (NewPhysicalDeviceInfo->TargetID ==
4743 PhysicalDeviceInfo->TargetID &&
4744 NewPhysicalDeviceInfo->LogicalUnit >
4745 PhysicalDeviceInfo->LogicalUnit)))))
4746 {
4747 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4748 Controller,
4749 PhysicalDeviceInfo->Channel,
4750 PhysicalDeviceInfo->TargetID);
4751 Controller->V2.PhysicalDeviceInformation
4752 [PhysicalDeviceIndex] = NULL;
4753 Controller->V2.InquiryUnitSerialNumber
4754 [PhysicalDeviceIndex] = NULL;
4755 kfree(PhysicalDeviceInfo);
4756 kfree(InquiryUnitSerialNumber);
4757 for (DeviceIndex = PhysicalDeviceIndex;
4758 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4759 DeviceIndex++)
4760 {
4761 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4762 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4763 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4764 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4765 }
4766 Controller->V2.PhysicalDeviceInformation
4767 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4768 Controller->V2.InquiryUnitSerialNumber
4769 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4770 PhysicalDeviceInfo =
4771 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4772 InquiryUnitSerialNumber =
4773 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4774 }
4775 if (PhysicalDeviceInfo == NULL ||
4776 (NewPhysicalDeviceInfo->Channel !=
4777 PhysicalDeviceInfo->Channel) ||
4778 (NewPhysicalDeviceInfo->TargetID !=
4779 PhysicalDeviceInfo->TargetID) ||
4780 (NewPhysicalDeviceInfo->LogicalUnit !=
4781 PhysicalDeviceInfo->LogicalUnit))
4782 {
07fb75a5 4783 PhysicalDeviceInfo =
1da177e4
LT		 4784 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4785 InquiryUnitSerialNumber =
1da177e4
LT		 4786 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4787 GFP_ATOMIC);
07fb75a5
JJ		 4788 if (InquiryUnitSerialNumber == NULL ||
4789 PhysicalDeviceInfo == NULL)
1da177e4 4790 {
07fb75a5
JJ		 4791 kfree(InquiryUnitSerialNumber);
4792 InquiryUnitSerialNumber = NULL;
1da177e4
LT		 4793 kfree(PhysicalDeviceInfo);
4794 PhysicalDeviceInfo = NULL;
4795 }
4796 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4797 Controller,
4798 NewPhysicalDeviceInfo->Channel,
4799 NewPhysicalDeviceInfo->TargetID,
4800 (PhysicalDeviceInfo != NULL
4801 ? "" : " - Allocation Failed"));
4802 if (PhysicalDeviceInfo != NULL)
4803 {
4804 memset(PhysicalDeviceInfo, 0,
4805 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4806 PhysicalDeviceInfo->PhysicalDeviceState =
4807 DAC960_V2_Device_InvalidState;
4808 memset(InquiryUnitSerialNumber, 0,
4809 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4810 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4811 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4812 DeviceIndex > PhysicalDeviceIndex;
4813 DeviceIndex--)
4814 {
4815 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4816 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4817 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4818 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4819 }
4820 Controller->V2.PhysicalDeviceInformation
4821 [PhysicalDeviceIndex] =
4822 PhysicalDeviceInfo;
4823 Controller->V2.InquiryUnitSerialNumber
4824 [PhysicalDeviceIndex] =
4825 InquiryUnitSerialNumber;
4826 Controller->V2.NeedDeviceSerialNumberInformation = true;
4827 }
4828 }
4829 if (PhysicalDeviceInfo != NULL)
4830 {
4831 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4832 PhysicalDeviceInfo->PhysicalDeviceState)
4833 DAC960_Critical(
4834 "Physical Device %d:%d is now %s\n", Controller,
4835 NewPhysicalDeviceInfo->Channel,
4836 NewPhysicalDeviceInfo->TargetID,
4837 (NewPhysicalDeviceInfo->PhysicalDeviceState
4838 == DAC960_V2_Device_Online
4839 ? "ONLINE"
4840 : NewPhysicalDeviceInfo->PhysicalDeviceState
4841 == DAC960_V2_Device_Rebuild
4842 ? "REBUILD"
4843 : NewPhysicalDeviceInfo->PhysicalDeviceState
4844 == DAC960_V2_Device_Missing
4845 ? "MISSING"
4846 : NewPhysicalDeviceInfo->PhysicalDeviceState
4847 == DAC960_V2_Device_Critical
4848 ? "CRITICAL"
4849 : NewPhysicalDeviceInfo->PhysicalDeviceState
4850 == DAC960_V2_Device_Dead
4851 ? "DEAD"
4852 : NewPhysicalDeviceInfo->PhysicalDeviceState
4853 == DAC960_V2_Device_SuspectedDead
4854 ? "SUSPECTED-DEAD"
4855 : NewPhysicalDeviceInfo->PhysicalDeviceState
4856 == DAC960_V2_Device_CommandedOffline
4857 ? "COMMANDED-OFFLINE"
4858 : NewPhysicalDeviceInfo->PhysicalDeviceState
4859 == DAC960_V2_Device_Standby
4860 ? "STANDBY" : "UNKNOWN"));
4861 if ((NewPhysicalDeviceInfo->ParityErrors !=
4862 PhysicalDeviceInfo->ParityErrors) ||
4863 (NewPhysicalDeviceInfo->SoftErrors !=
4864 PhysicalDeviceInfo->SoftErrors) ||
4865 (NewPhysicalDeviceInfo->HardErrors !=
4866 PhysicalDeviceInfo->HardErrors) ||
4867 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4868 PhysicalDeviceInfo->MiscellaneousErrors) ||
4869 (NewPhysicalDeviceInfo->CommandTimeouts !=
4870 PhysicalDeviceInfo->CommandTimeouts) ||
4871 (NewPhysicalDeviceInfo->Retries !=
4872 PhysicalDeviceInfo->Retries) ||
4873 (NewPhysicalDeviceInfo->Aborts !=
4874 PhysicalDeviceInfo->Aborts) ||
4875 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4876 PhysicalDeviceInfo->PredictedFailuresDetected))
4877 {
4878 DAC960_Critical("Physical Device %d:%d Errors: "
4879 "Parity = %d, Soft = %d, "
4880 "Hard = %d, Misc = %d\n",
4881 Controller,
4882 NewPhysicalDeviceInfo->Channel,
4883 NewPhysicalDeviceInfo->TargetID,
4884 NewPhysicalDeviceInfo->ParityErrors,
4885 NewPhysicalDeviceInfo->SoftErrors,
4886 NewPhysicalDeviceInfo->HardErrors,
4887 NewPhysicalDeviceInfo->MiscellaneousErrors);
4888 DAC960_Critical("Physical Device %d:%d Errors: "
4889 "Timeouts = %d, Retries = %d, "
4890 "Aborts = %d, Predicted = %d\n",
4891 Controller,
4892 NewPhysicalDeviceInfo->Channel,
4893 NewPhysicalDeviceInfo->TargetID,
4894 NewPhysicalDeviceInfo->CommandTimeouts,
4895 NewPhysicalDeviceInfo->Retries,
4896 NewPhysicalDeviceInfo->Aborts,
4897 NewPhysicalDeviceInfo
4898 ->PredictedFailuresDetected);
4899 }
4900 if ((PhysicalDeviceInfo->PhysicalDeviceState
4901 == DAC960_V2_Device_Dead ||
4902 PhysicalDeviceInfo->PhysicalDeviceState
4903 == DAC960_V2_Device_InvalidState) &&
4904 NewPhysicalDeviceInfo->PhysicalDeviceState
4905 != DAC960_V2_Device_Dead)
4906 Controller->V2.NeedDeviceSerialNumberInformation = true;
4907 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4908 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4909 }
4910 NewPhysicalDeviceInfo->LogicalUnit++;
4911 Controller->V2.PhysicalDeviceIndex++;
4912 }
4913 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4914 {
4915 unsigned int DeviceIndex;
4916 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4917 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4918 DeviceIndex++)
4919 {
4920 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4921 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4922 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4923 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4924 if (PhysicalDeviceInfo == NULL) break;
4925 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4926 Controller,
4927 PhysicalDeviceInfo->Channel,
4928 PhysicalDeviceInfo->TargetID);
4929 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4930 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4931 kfree(PhysicalDeviceInfo);
4932 kfree(InquiryUnitSerialNumber);
4933 }
4934 Controller->V2.NeedPhysicalDeviceInformation = false;
4935 }
4936 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4937 CommandStatus == DAC960_V2_NormalCompletion)
4938 {
4939 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4940 Controller->V2.NewLogicalDeviceInformation;
4941 unsigned short LogicalDeviceNumber =
4942 NewLogicalDeviceInfo->LogicalDeviceNumber;
4943 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4944 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4945 if (LogicalDeviceInfo == NULL)
4946 {
4947 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4948 PhysicalDevice.Controller = 0;
4949 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4950 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4951 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4952 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4953 PhysicalDevice;
0a361e31
AD		 4954 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4955 GFP_ATOMIC);
1da177e4
LT		 4956 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4957 LogicalDeviceInfo;
4958 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4959 "Now Exists%s\n", Controller,
4960 LogicalDeviceNumber,
4961 Controller->ControllerNumber,
4962 LogicalDeviceNumber,
4963 (LogicalDeviceInfo != NULL
4964 ? "" : " - Allocation Failed"));
4965 if (LogicalDeviceInfo != NULL)
4966 {
4967 memset(LogicalDeviceInfo, 0,
4968 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4969 DAC960_ComputeGenericDiskInfo(Controller);
4970 }
4971 }
4972 if (LogicalDeviceInfo != NULL)
4973 {
4974 unsigned long LogicalDeviceSize =
4975 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4976 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4977 LogicalDeviceInfo->LogicalDeviceState)
4978 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4979 "is now %s\n", Controller,
4980 LogicalDeviceNumber,
4981 Controller->ControllerNumber,
4982 LogicalDeviceNumber,
4983 (NewLogicalDeviceInfo->LogicalDeviceState
4984 == DAC960_V2_LogicalDevice_Online
4985 ? "ONLINE"
4986 : NewLogicalDeviceInfo->LogicalDeviceState
4987 == DAC960_V2_LogicalDevice_Critical
4988 ? "CRITICAL" : "OFFLINE"));
4989 if ((NewLogicalDeviceInfo->SoftErrors !=
4990 LogicalDeviceInfo->SoftErrors) ||
4991 (NewLogicalDeviceInfo->CommandsFailed !=
4992 LogicalDeviceInfo->CommandsFailed) ||
4993 (NewLogicalDeviceInfo->DeferredWriteErrors !=
4994 LogicalDeviceInfo->DeferredWriteErrors))
4995 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
4996 "Soft = %d, Failed = %d, Deferred Write = %d\n",
4997 Controller, LogicalDeviceNumber,
4998 Controller->ControllerNumber,
4999 LogicalDeviceNumber,
5000 NewLogicalDeviceInfo->SoftErrors,
5001 NewLogicalDeviceInfo->CommandsFailed,
5002 NewLogicalDeviceInfo->DeferredWriteErrors);
5003 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5004 DAC960_V2_ReportProgress(Controller,
5005 "Consistency Check",
5006 LogicalDeviceNumber,
5007 NewLogicalDeviceInfo
5008 ->ConsistencyCheckBlockNumber,
5009 LogicalDeviceSize);
5010 else if (NewLogicalDeviceInfo->RebuildInProgress)
5011 DAC960_V2_ReportProgress(Controller,
5012 "Rebuild",
5013 LogicalDeviceNumber,
5014 NewLogicalDeviceInfo
5015 ->RebuildBlockNumber,
5016 LogicalDeviceSize);
5017 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5018 DAC960_V2_ReportProgress(Controller,
5019 "Background Initialization",
5020 LogicalDeviceNumber,
5021 NewLogicalDeviceInfo
5022 ->BackgroundInitializationBlockNumber,
5023 LogicalDeviceSize);
5024 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5025 DAC960_V2_ReportProgress(Controller,
5026 "Foreground Initialization",
5027 LogicalDeviceNumber,
5028 NewLogicalDeviceInfo
5029 ->ForegroundInitializationBlockNumber,
5030 LogicalDeviceSize);
5031 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5032 DAC960_V2_ReportProgress(Controller,
5033 "Data Migration",
5034 LogicalDeviceNumber,
5035 NewLogicalDeviceInfo
5036 ->DataMigrationBlockNumber,
5037 LogicalDeviceSize);
5038 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5039 DAC960_V2_ReportProgress(Controller,
5040 "Patrol Operation",
5041 LogicalDeviceNumber,
5042 NewLogicalDeviceInfo
5043 ->PatrolOperationBlockNumber,
5044 LogicalDeviceSize);
5045 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5046 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5047 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5048 "Background Initialization %s\n",
5049 Controller,
5050 LogicalDeviceNumber,
5051 Controller->ControllerNumber,
5052 LogicalDeviceNumber,
5053 (NewLogicalDeviceInfo->LogicalDeviceControl
5054 .LogicalDeviceInitialized
5055 ? "Completed" : "Failed"));
5056 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5057 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5058 }
5059 Controller->V2.LogicalDriveFoundDuringScan
5060 [LogicalDeviceNumber] = true;
5061 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5062 }
5063 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5064 {
5065 int LogicalDriveNumber;
5066 for (LogicalDriveNumber = 0;
5067 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5068 LogicalDriveNumber++)
5069 {
5070 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5071 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5072 if (LogicalDeviceInfo == NULL ||
5073 Controller->V2.LogicalDriveFoundDuringScan
5074 [LogicalDriveNumber])
5075 continue;
5076 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5077 "No Longer Exists\n", Controller,
5078 LogicalDriveNumber,
5079 Controller->ControllerNumber,
5080 LogicalDriveNumber);
5081 Controller->V2.LogicalDeviceInformation
5082 [LogicalDriveNumber] = NULL;
5083 kfree(LogicalDeviceInfo);
5084 Controller->LogicalDriveInitiallyAccessible
5085 [LogicalDriveNumber] = false;
5086 DAC960_ComputeGenericDiskInfo(Controller);
5087 }
5088 Controller->V2.NeedLogicalDeviceInformation = false;
5089 }
5090 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5091 {
5092 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5093 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5094
5095 if (CommandStatus != DAC960_V2_NormalCompletion) {
5096 memset(InquiryUnitSerialNumber,
5097 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5098 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5099 } else
5100 memcpy(InquiryUnitSerialNumber,
5101 Controller->V2.NewInquiryUnitSerialNumber,
5102 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5103
5104 Controller->V2.NeedDeviceSerialNumberInformation = false;
5105 }
5106
5107 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5108 - Controller->V2.NextEventSequenceNumber > 0)
5109 {
5110 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5111 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5112 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5113 Controller->V2.NextEventSequenceNumber >> 16;
5114 CommandMailbox->GetEvent.ControllerNumber = 0;
5115 CommandMailbox->GetEvent.IOCTL_Opcode =
5116 DAC960_V2_GetEvent;
5117 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5118 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5119 CommandMailbox->GetEvent.DataTransferMemoryAddress
5120 .ScatterGatherSegments[0]
5121 .SegmentDataPointer =
5122 Controller->V2.EventDMA;
5123 CommandMailbox->GetEvent.DataTransferMemoryAddress
5124 .ScatterGatherSegments[0]
5125 .SegmentByteCount =
5126 CommandMailbox->GetEvent.DataTransferSize;
5127 DAC960_QueueCommand(Command);
5128 return;
5129 }
5130 if (Controller->V2.NeedPhysicalDeviceInformation)
5131 {
5132 if (Controller->V2.NeedDeviceSerialNumberInformation)
5133 {
5134 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5135 Controller->V2.NewInquiryUnitSerialNumber;
5136 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5137
5138 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5139 Controller->V2.NewPhysicalDeviceInformation->Channel,
5140 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5141 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5142
5143
5144 DAC960_QueueCommand(Command);
5145 return;
5146 }
5147 if (Controller->V2.StartPhysicalDeviceInformationScan)
5148 {
5149 Controller->V2.PhysicalDeviceIndex = 0;
5150 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5151 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5152 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5153 Controller->V2.StartPhysicalDeviceInformationScan = false;
5154 }
5155 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5156 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5157 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5158 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5159 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5160 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5161 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5162 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5163 Controller->V2.NewPhysicalDeviceInformation->Channel;
5164 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5165 DAC960_V2_GetPhysicalDeviceInfoValid;
5166 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5167 .ScatterGatherSegments[0]
5168 .SegmentDataPointer =
5169 Controller->V2.NewPhysicalDeviceInformationDMA;
5170 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5171 .ScatterGatherSegments[0]
5172 .SegmentByteCount =
5173 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5174 DAC960_QueueCommand(Command);
5175 return;
5176 }
5177 if (Controller->V2.NeedLogicalDeviceInformation)
5178 {
5179 if (Controller->V2.StartLogicalDeviceInformationScan)
5180 {
5181 int LogicalDriveNumber;
5182 for (LogicalDriveNumber = 0;
5183 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5184 LogicalDriveNumber++)
5185 Controller->V2.LogicalDriveFoundDuringScan
5186 [LogicalDriveNumber] = false;
5187 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5188 Controller->V2.StartLogicalDeviceInformationScan = false;
5189 }
5190 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5191 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5192 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5193 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5194 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5195 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5196 DAC960_V2_GetLogicalDeviceInfoValid;
5197 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5198 .ScatterGatherSegments[0]
5199 .SegmentDataPointer =
5200 Controller->V2.NewLogicalDeviceInformationDMA;
5201 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5202 .ScatterGatherSegments[0]
5203 .SegmentByteCount =
5204 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5205 DAC960_QueueCommand(Command);
5206 return;
5207 }
5208 Controller->MonitoringTimerCount++;
5209 Controller->MonitoringTimer.expires =
5210 jiffies + DAC960_HealthStatusMonitoringInterval;
5211 add_timer(&Controller->MonitoringTimer);
5212 }
5213 if (CommandType == DAC960_ImmediateCommand)
5214 {
5215 complete(Command->Completion);
5216 Command->Completion = NULL;
5217 return;
5218 }
5219 if (CommandType == DAC960_QueuedCommand)
5220 {
5221 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5222 KernelCommand->CommandStatus = CommandStatus;
5223 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5224 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5225 Command->V2.KernelCommand = NULL;
5226 DAC960_DeallocateCommand(Command);
5227 KernelCommand->CompletionFunction(KernelCommand);
5228 return;
5229 }
5230 /*
5231 Queue a Status Monitoring Command to the Controller using the just
5232 completed Command if one was deferred previously due to lack of a
5233 free Command when the Monitoring Timer Function was called.
5234 */
5235 if (Controller->MonitoringCommandDeferred)
5236 {
5237 Controller->MonitoringCommandDeferred = false;
5238 DAC960_V2_QueueMonitoringCommand(Command);
5239 return;
5240 }
5241 /*
5242 Deallocate the Command.
5243 */
5244 DAC960_DeallocateCommand(Command);
5245 /*
5246 Wake up any processes waiting on a free Command.
5247 */
5248 wake_up(&Controller->CommandWaitQueue);
5249}
5250
5b76ffd5
CH		 5251/*
5252 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5253 Controllers.
5254*/
5255
5256static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
7d12e780 5257 void *DeviceIdentifier)
5b76ffd5 5258{
c7bec5ab 5259 DAC960_Controller_T *Controller = DeviceIdentifier;
5b76ffd5
CH		 5260 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5261 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5262 unsigned long flags;
5263
5264 spin_lock_irqsave(&Controller->queue_lock, flags);
5265 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5266 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5267 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5268 {
5269 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5270 NextStatusMailbox->Fields.CommandIdentifier;
5271 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5272 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5273 Command->V2.RequestSenseLength =
5274 NextStatusMailbox->Fields.RequestSenseLength;
5275 Command->V2.DataTransferResidue =
5276 NextStatusMailbox->Fields.DataTransferResidue;
5277 NextStatusMailbox->Words[0] = 0;
5278 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5279 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5280 DAC960_V2_ProcessCompletedCommand(Command);
5281 }
5282 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5283 /*
5284 Attempt to remove additional I/O Requests from the Controller's
5285 I/O Request Queue and queue them to the Controller.
5286 */
5287 DAC960_ProcessRequest(Controller);
5288 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5289 return IRQ_HANDLED;
5290}
1da177e4
LT		 5291
5292/*
5293 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5294 Controllers.
5295*/
5296
5297static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
7d12e780 5298 void *DeviceIdentifier)
1da177e4 5299{
c7bec5ab 5300 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5301 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5302 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5303 unsigned long flags;
5304
5305 spin_lock_irqsave(&Controller->queue_lock, flags);
5306 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5307 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5308 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5309 {
5310 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5311 NextStatusMailbox->Fields.CommandIdentifier;
5312 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5313 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5314 Command->V2.RequestSenseLength =
5315 NextStatusMailbox->Fields.RequestSenseLength;
5316 Command->V2.DataTransferResidue =
5317 NextStatusMailbox->Fields.DataTransferResidue;
5318 NextStatusMailbox->Words[0] = 0;
5319 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5320 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5321 DAC960_V2_ProcessCompletedCommand(Command);
5322 }
5323 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5324 /*
5325 Attempt to remove additional I/O Requests from the Controller's
5326 I/O Request Queue and queue them to the Controller.
5327 */
5328 DAC960_ProcessRequest(Controller);
5329 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5330 return IRQ_HANDLED;
5331}
5332
5333
5334/*
5335 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5336 Controllers.
5337*/
5338
5339static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
7d12e780 5340 void *DeviceIdentifier)
1da177e4 5341{
c7bec5ab 5342 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5343 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5344 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5345 unsigned long flags;
5346
5347 spin_lock_irqsave(&Controller->queue_lock, flags);
5348 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5349 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5350 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5351 {
5352 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5353 NextStatusMailbox->Fields.CommandIdentifier;
5354 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5355 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5356 Command->V2.RequestSenseLength =
5357 NextStatusMailbox->Fields.RequestSenseLength;
5358 Command->V2.DataTransferResidue =
5359 NextStatusMailbox->Fields.DataTransferResidue;
5360 NextStatusMailbox->Words[0] = 0;
5361 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5362 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5363 DAC960_V2_ProcessCompletedCommand(Command);
5364 }
5365 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5366 /*
5367 Attempt to remove additional I/O Requests from the Controller's
5368 I/O Request Queue and queue them to the Controller.
5369 */
5370 DAC960_ProcessRequest(Controller);
5371 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5372 return IRQ_HANDLED;
5373}
5374
5375
5376/*
5377 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5378 Controllers.
5379*/
5380
5381static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
7d12e780 5382 void *DeviceIdentifier)
1da177e4 5383{
c7bec5ab 5384 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5385 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5386 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5387 unsigned long flags;
5388
5389 spin_lock_irqsave(&Controller->queue_lock, flags);
5390 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5391 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5392 while (NextStatusMailbox->Fields.Valid)
5393 {
5394 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5395 NextStatusMailbox->Fields.CommandIdentifier;
5396 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5397 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5398 NextStatusMailbox->Word = 0;
5399 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5400 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5401 DAC960_V1_ProcessCompletedCommand(Command);
5402 }
5403 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5404 /*
5405 Attempt to remove additional I/O Requests from the Controller's
5406 I/O Request Queue and queue them to the Controller.
5407 */
5408 DAC960_ProcessRequest(Controller);
5409 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5410 return IRQ_HANDLED;
5411}
5412
5413
5414/*
5415 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5416 Controllers.
5417*/
5418
5419static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
7d12e780 5420 void *DeviceIdentifier)
1da177e4 5421{
c7bec5ab 5422 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5423 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5424 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5425 unsigned long flags;
5426
5427 spin_lock_irqsave(&Controller->queue_lock, flags);
5428 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5429 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5430 while (NextStatusMailbox->Fields.Valid)
5431 {
5432 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5433 NextStatusMailbox->Fields.CommandIdentifier;
5434 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5435 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5436 NextStatusMailbox->Word = 0;
5437 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5438 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5439 DAC960_V1_ProcessCompletedCommand(Command);
5440 }
5441 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5442 /*
5443 Attempt to remove additional I/O Requests from the Controller's
5444 I/O Request Queue and queue them to the Controller.
5445 */
5446 DAC960_ProcessRequest(Controller);
5447 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5448 return IRQ_HANDLED;
5449}
5450
5451
5452/*
5453 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5454 Controllers.
5455*/
5456
5457static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
7d12e780 5458 void *DeviceIdentifier)
1da177e4 5459{
c7bec5ab 5460 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5461 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5462 unsigned long flags;
5463
5464 spin_lock_irqsave(&Controller->queue_lock, flags);
5465 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5466 {
5467 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5468 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5469 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5470 Command->V1.CommandStatus =
5471 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5472 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5473 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5474 DAC960_V1_ProcessCompletedCommand(Command);
5475 }
5476 /*
5477 Attempt to remove additional I/O Requests from the Controller's
5478 I/O Request Queue and queue them to the Controller.
5479 */
5480 DAC960_ProcessRequest(Controller);
5481 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5482 return IRQ_HANDLED;
5483}
5484
5485
5486/*
5487 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5488 Controllers.
5489
5490 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5491 on the data having been placed into DAC960_Controller_T, rather than
5492 an arbitrary buffer.
5493*/
5494
5495static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
7d12e780 5496 void *DeviceIdentifier)
1da177e4 5497{
c7bec5ab 5498 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5499 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5500 unsigned long flags;
5501
5502 spin_lock_irqsave(&Controller->queue_lock, flags);
5503 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5504 {
5505 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5506 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5507 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5508 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5509 DAC960_V1_CommandOpcode_T CommandOpcode =
5510 CommandMailbox->Common.CommandOpcode;
5511 Command->V1.CommandStatus =
5512 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5513 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5514 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5515 switch (CommandOpcode)
5516 {
5517 case DAC960_V1_Enquiry_Old:
5518 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5519 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5520 break;
5521 case DAC960_V1_GetDeviceState_Old:
5522 Command->V1.CommandMailbox.Common.CommandOpcode =
5523 DAC960_V1_GetDeviceState;
5524 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5525 break;
5526 case DAC960_V1_Read_Old:
5527 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5528 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5529 break;
5530 case DAC960_V1_Write_Old:
5531 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5532 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5533 break;
5534 case DAC960_V1_ReadWithScatterGather_Old:
5535 Command->V1.CommandMailbox.Common.CommandOpcode =
5536 DAC960_V1_ReadWithScatterGather;
5537 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5538 break;
5539 case DAC960_V1_WriteWithScatterGather_Old:
5540 Command->V1.CommandMailbox.Common.CommandOpcode =
5541 DAC960_V1_WriteWithScatterGather;
5542 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5543 break;
5544 default:
5545 break;
5546 }
5547 DAC960_V1_ProcessCompletedCommand(Command);
5548 }
5549 /*
5550 Attempt to remove additional I/O Requests from the Controller's
5551 I/O Request Queue and queue them to the Controller.
5552 */
5553 DAC960_ProcessRequest(Controller);
5554 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5555 return IRQ_HANDLED;
5556}
5557
5558
5559/*
5560 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5561 Firmware Controllers.
5562*/
5563
5564static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5565{
5566 DAC960_Controller_T *Controller = Command->Controller;
5567 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5568 DAC960_V1_ClearCommand(Command);
5569 Command->CommandType = DAC960_MonitoringCommand;
5570 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5571 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5572 DAC960_QueueCommand(Command);
5573}
5574
5575
5576/*
5577 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5578 Firmware Controllers.
5579*/
5580
5581static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5582{
5583 DAC960_Controller_T *Controller = Command->Controller;
5584 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5585 DAC960_V2_ClearCommand(Command);
5586 Command->CommandType = DAC960_MonitoringCommand;
5587 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5588 CommandMailbox->ControllerInfo.CommandControlBits
5589 .DataTransferControllerToHost = true;
5590 CommandMailbox->ControllerInfo.CommandControlBits
5591 .NoAutoRequestSense = true;
5592 CommandMailbox->ControllerInfo.DataTransferSize =
5593 sizeof(DAC960_V2_ControllerInfo_T);
5594 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5595 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5596 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5597 .ScatterGatherSegments[0]
5598 .SegmentDataPointer =
5599 Controller->V2.NewControllerInformationDMA;
5600 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5601 .ScatterGatherSegments[0]
5602 .SegmentByteCount =
5603 CommandMailbox->ControllerInfo.DataTransferSize;
5604 DAC960_QueueCommand(Command);
5605}
5606
5607
5608/*
5609 DAC960_MonitoringTimerFunction is the timer function for monitoring
5610 the status of DAC960 Controllers.
5611*/
5612
5613static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
5614{
5615 DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
5616 DAC960_Command_T *Command;
5617 unsigned long flags;
5618
5619 if (Controller->FirmwareType == DAC960_V1_Controller)
5620 {
5621 spin_lock_irqsave(&Controller->queue_lock, flags);
5622 /*
5623 Queue a Status Monitoring Command to Controller.
5624 */
5625 Command = DAC960_AllocateCommand(Controller);
5626 if (Command != NULL)
5627 DAC960_V1_QueueMonitoringCommand(Command);
5628 else Controller->MonitoringCommandDeferred = true;
5629 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5630 }
5631 else
5632 {
5633 DAC960_V2_ControllerInfo_T *ControllerInfo =
5634 &Controller->V2.ControllerInformation;
5635 unsigned int StatusChangeCounter =
5636 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
87d156bf 5637 bool ForceMonitoringCommand = false;
50297cbf
MFP		 5638 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5639 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 5640 {
5641 int LogicalDriveNumber;
5642 for (LogicalDriveNumber = 0;
5643 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5644 LogicalDriveNumber++)
5645 {
5646 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5647 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5648 if (LogicalDeviceInfo == NULL) continue;
5649 if (!LogicalDeviceInfo->LogicalDeviceControl
5650 .LogicalDeviceInitialized)
5651 {
5652 ForceMonitoringCommand = true;
5653 break;
5654 }
5655 }
5656 Controller->SecondaryMonitoringTime = jiffies;
5657 }
5658 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5659 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5660 == Controller->V2.NextEventSequenceNumber &&
5661 (ControllerInfo->BackgroundInitializationsActive +
5662 ControllerInfo->LogicalDeviceInitializationsActive +
5663 ControllerInfo->PhysicalDeviceInitializationsActive +
5664 ControllerInfo->ConsistencyChecksActive +
5665 ControllerInfo->RebuildsActive +
5666 ControllerInfo->OnlineExpansionsActive == 0 ||
50297cbf
MFP		 5667 time_before(jiffies, Controller->PrimaryMonitoringTime
5668 + DAC960_MonitoringTimerInterval)) &&
1da177e4
LT		 5669 !ForceMonitoringCommand)
5670 {
5671 Controller->MonitoringTimer.expires =
5672 jiffies + DAC960_HealthStatusMonitoringInterval;
5673 add_timer(&Controller->MonitoringTimer);
5674 return;
5675 }
5676 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5677 Controller->PrimaryMonitoringTime = jiffies;
5678
5679 spin_lock_irqsave(&Controller->queue_lock, flags);
5680 /*
5681 Queue a Status Monitoring Command to Controller.
5682 */
5683 Command = DAC960_AllocateCommand(Controller);
5684 if (Command != NULL)
5685 DAC960_V2_QueueMonitoringCommand(Command);
5686 else Controller->MonitoringCommandDeferred = true;
5687 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5688 /*
5689 Wake up any processes waiting on a Health Status Buffer change.
5690 */
5691 wake_up(&Controller->HealthStatusWaitQueue);
5692 }
5693}
5694
5695/*
5696 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5697 additional bytes in the Combined Status Buffer and grows the buffer if
5698 necessary. It returns true if there is enough room and false otherwise.
5699*/
5700
87d156bf 5701static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
1da177e4
LT		 5702 unsigned int ByteCount)
5703{
5704 unsigned char *NewStatusBuffer;
5705 if (Controller->InitialStatusLength + 1 +
5706 Controller->CurrentStatusLength + ByteCount + 1 <=
5707 Controller->CombinedStatusBufferLength)
5708 return true;
5709 if (Controller->CombinedStatusBufferLength == 0)
5710 {
5711 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5712 while (NewStatusBufferLength < ByteCount)
5713 NewStatusBufferLength *= 2;
0a361e31
AD		 5714 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5715 GFP_ATOMIC);
1da177e4
LT		 5716 if (Controller->CombinedStatusBuffer == NULL) return false;
5717 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5718 return true;
5719 }
0a361e31
AD		 5720 NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5721 GFP_ATOMIC);
1da177e4
LT		 5722 if (NewStatusBuffer == NULL)
5723 {
5724 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5725 Controller);
5726 return false;
5727 }
5728 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5729 Controller->CombinedStatusBufferLength);
5730 kfree(Controller->CombinedStatusBuffer);
5731 Controller->CombinedStatusBuffer = NewStatusBuffer;
5732 Controller->CombinedStatusBufferLength *= 2;
5733 Controller->CurrentStatusBuffer =
5734 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5735 return true;
5736}
5737
5738
5739/*
5740 DAC960_Message prints Driver Messages.
5741*/
5742
5743static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5744 unsigned char *Format,
5745 DAC960_Controller_T *Controller,
5746 ...)
5747{
5748 static unsigned char Buffer[DAC960_LineBufferSize];
87d156bf 5749 static bool BeginningOfLine = true;
1da177e4
LT		 5750 va_list Arguments;
5751 int Length = 0;
5752 va_start(Arguments, Controller);
5753 Length = vsprintf(Buffer, Format, Arguments);
5754 va_end(Arguments);
5755 if (Controller == NULL)
5756 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5757 DAC960_ControllerCount, Buffer);
5758 else if (MessageLevel == DAC960_AnnounceLevel ||
5759 MessageLevel == DAC960_InfoLevel)
5760 {
5761 if (!Controller->ControllerInitialized)
5762 {
5763 if (DAC960_CheckStatusBuffer(Controller, Length))
5764 {
5765 strcpy(&Controller->CombinedStatusBuffer
5766 [Controller->InitialStatusLength],
5767 Buffer);
5768 Controller->InitialStatusLength += Length;
5769 Controller->CurrentStatusBuffer =
5770 &Controller->CombinedStatusBuffer
5771 [Controller->InitialStatusLength + 1];
5772 }
5773 if (MessageLevel == DAC960_AnnounceLevel)
5774 {
5775 static int AnnouncementLines = 0;
5776 if (++AnnouncementLines <= 2)
5777 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5778 Buffer);
5779 }
5780 else
5781 {
5782 if (BeginningOfLine)
5783 {
5784 if (Buffer[0] != '\n' || Length > 1)
5785 printk("%sDAC960#%d: %s",
5786 DAC960_MessageLevelMap[MessageLevel],
5787 Controller->ControllerNumber, Buffer);
5788 }
5789 else printk("%s", Buffer);
5790 }
5791 }
5792 else if (DAC960_CheckStatusBuffer(Controller, Length))
5793 {
5794 strcpy(&Controller->CurrentStatusBuffer[
5795 Controller->CurrentStatusLength], Buffer);
5796 Controller->CurrentStatusLength += Length;
5797 }
5798 }
5799 else if (MessageLevel == DAC960_ProgressLevel)
5800 {
5801 strcpy(Controller->ProgressBuffer, Buffer);
5802 Controller->ProgressBufferLength = Length;
5803 if (Controller->EphemeralProgressMessage)
5804 {
50297cbf
MFP		 5805 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5806 + DAC960_ProgressReportingInterval))
1da177e4
LT		 5807 {
5808 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5809 Controller->ControllerNumber, Buffer);
5810 Controller->LastProgressReportTime = jiffies;
5811 }
5812 }
5813 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5814 Controller->ControllerNumber, Buffer);
5815 }
5816 else if (MessageLevel == DAC960_UserCriticalLevel)
5817 {
5818 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5819 Buffer);
5820 Controller->UserStatusLength += Length;
5821 if (Buffer[0] != '\n' || Length > 1)
5822 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5823 Controller->ControllerNumber, Buffer);
5824 }
5825 else
5826 {
5827 if (BeginningOfLine)
5828 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5829 Controller->ControllerNumber, Buffer);
5830 else printk("%s", Buffer);
5831 }
5832 BeginningOfLine = (Buffer[Length-1] == '\n');
5833}
5834
5835
5836/*
5837 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5838 Channel:TargetID specification from a User Command string. It updates
5839 Channel and TargetID and returns true on success and false on failure.
5840*/
5841
87d156bf 5842static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
1da177e4
LT		 5843 char *UserCommandString,
5844 unsigned char *Channel,
5845 unsigned char *TargetID)
5846{
5847 char *NewUserCommandString = UserCommandString;
5848 unsigned long XChannel, XTargetID;
5849 while (*UserCommandString == ' ') UserCommandString++;
5850 if (UserCommandString == NewUserCommandString)
5851 return false;
5852 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5853 if (NewUserCommandString == UserCommandString ||
5854 *NewUserCommandString != ':' ||
5855 XChannel >= Controller->Channels)
5856 return false;
5857 UserCommandString = ++NewUserCommandString;
5858 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5859 if (NewUserCommandString == UserCommandString ||
5860 *NewUserCommandString != '\0' ||
5861 XTargetID >= Controller->Targets)
5862 return false;
5863 *Channel = XChannel;
5864 *TargetID = XTargetID;
5865 return true;
5866}
5867
5868
5869/*
5870 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5871 specification from a User Command string. It updates LogicalDriveNumber and
5872 returns true on success and false on failure.
5873*/
5874
87d156bf 5875static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
1da177e4
LT		 5876 char *UserCommandString,
5877 unsigned char *LogicalDriveNumber)
5878{
5879 char *NewUserCommandString = UserCommandString;
5880 unsigned long XLogicalDriveNumber;
5881 while (*UserCommandString == ' ') UserCommandString++;
5882 if (UserCommandString == NewUserCommandString)
5883 return false;
5884 XLogicalDriveNumber =
5885 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5886 if (NewUserCommandString == UserCommandString ||
5887 *NewUserCommandString != '\0' ||
5888 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5889 return false;
5890 *LogicalDriveNumber = XLogicalDriveNumber;
5891 return true;
5892}
5893
5894
5895/*
5896 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5897 DAC960 V1 Firmware Controllers.
5898*/
5899
5900static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5901 DAC960_Command_T *Command,
5902 unsigned char Channel,
5903 unsigned char TargetID,
5904 DAC960_V1_PhysicalDeviceState_T
5905 DeviceState,
5906 const unsigned char *DeviceStateString)
5907{
5908 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5909 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5910 CommandMailbox->Type3D.Channel = Channel;
5911 CommandMailbox->Type3D.TargetID = TargetID;
5912 CommandMailbox->Type3D.DeviceState = DeviceState;
5913 CommandMailbox->Type3D.Modifier = 0;
5914 DAC960_ExecuteCommand(Command);
5915 switch (Command->V1.CommandStatus)
5916 {
5917 case DAC960_V1_NormalCompletion:
5918 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5919 DeviceStateString, Channel, TargetID);
5920 break;
5921 case DAC960_V1_UnableToStartDevice:
5922 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5923 "Unable to Start Device\n", Controller,
5924 DeviceStateString, Channel, TargetID);
5925 break;
5926 case DAC960_V1_NoDeviceAtAddress:
5927 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5928 "No Device at Address\n", Controller,
5929 DeviceStateString, Channel, TargetID);
5930 break;
5931 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5932 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5933 "Invalid Channel or Target or Modifier\n",
5934 Controller, DeviceStateString, Channel, TargetID);
5935 break;
5936 case DAC960_V1_ChannelBusy:
5937 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5938 "Channel Busy\n", Controller,
5939 DeviceStateString, Channel, TargetID);
5940 break;
5941 default:
5942 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5943 "Unexpected Status %04X\n", Controller,
5944 DeviceStateString, Channel, TargetID,
5945 Command->V1.CommandStatus);
5946 break;
5947 }
5948}
5949
5950
5951/*
5952 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5953 Controllers.
5954*/
5955
87d156bf 5956static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 5957 unsigned char *UserCommand)
5958{
5959 DAC960_Command_T *Command;
5960 DAC960_V1_CommandMailbox_T *CommandMailbox;
5961 unsigned long flags;
5962 unsigned char Channel, TargetID, LogicalDriveNumber;
5963
5964 spin_lock_irqsave(&Controller->queue_lock, flags);
5965 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5966 DAC960_WaitForCommand(Controller);
5967 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5968 Controller->UserStatusLength = 0;
5969 DAC960_V1_ClearCommand(Command);
5970 Command->CommandType = DAC960_ImmediateCommand;
5971 CommandMailbox = &Command->V1.CommandMailbox;
5972 if (strcmp(UserCommand, "flush-cache") == 0)
5973 {
5974 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5975 DAC960_ExecuteCommand(Command);
5976 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5977 }
5978 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5979 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5980 &Channel, &TargetID))
5981 {
5982 DAC960_V1_DeviceState_T *DeviceState =
5983 &Controller->V1.DeviceState[Channel][TargetID];
5984 if (DeviceState->Present &&
5985 DeviceState->DeviceType == DAC960_V1_DiskType &&
5986 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5987 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5988 DAC960_V1_Device_Dead, "Kill");
5989 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5990 Controller, Channel, TargetID);
5991 }
5992 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
5993 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
5994 &Channel, &TargetID))
5995 {
5996 DAC960_V1_DeviceState_T *DeviceState =
5997 &Controller->V1.DeviceState[Channel][TargetID];
5998 if (DeviceState->Present &&
5999 DeviceState->DeviceType == DAC960_V1_DiskType &&
6000 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6001 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6002 DAC960_V1_Device_Online, "Make Online");
6003 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6004 Controller, Channel, TargetID);
6005
6006 }
6007 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6008 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6009 &Channel, &TargetID))
6010 {
6011 DAC960_V1_DeviceState_T *DeviceState =
6012 &Controller->V1.DeviceState[Channel][TargetID];
6013 if (DeviceState->Present &&
6014 DeviceState->DeviceType == DAC960_V1_DiskType &&
6015 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6016 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6017 DAC960_V1_Device_Standby, "Make Standby");
6018 else DAC960_UserCritical("Make Standby of Physical "
6019 "Device %d:%d Illegal\n",
6020 Controller, Channel, TargetID);
6021 }
6022 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6023 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6024 &Channel, &TargetID))
6025 {
6026 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6027 CommandMailbox->Type3D.Channel = Channel;
6028 CommandMailbox->Type3D.TargetID = TargetID;
6029 DAC960_ExecuteCommand(Command);
6030 switch (Command->V1.CommandStatus)
6031 {
6032 case DAC960_V1_NormalCompletion:
6033 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6034 Controller, Channel, TargetID);
6035 break;
6036 case DAC960_V1_AttemptToRebuildOnlineDrive:
6037 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6038 "Attempt to Rebuild Online or "
6039 "Unresponsive Drive\n",
6040 Controller, Channel, TargetID);
6041 break;
6042 case DAC960_V1_NewDiskFailedDuringRebuild:
6043 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6044 "New Disk Failed During Rebuild\n",
6045 Controller, Channel, TargetID);
6046 break;
6047 case DAC960_V1_InvalidDeviceAddress:
6048 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6049 "Invalid Device Address\n",
6050 Controller, Channel, TargetID);
6051 break;
6052 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6053 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6054 "Rebuild or Consistency Check Already "
6055 "in Progress\n", Controller, Channel, TargetID);
6056 break;
6057 default:
6058 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6059 "Unexpected Status %04X\n", Controller,
6060 Channel, TargetID, Command->V1.CommandStatus);
6061 break;
6062 }
6063 }
6064 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6065 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6066 &LogicalDriveNumber))
6067 {
6068 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6069 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6070 CommandMailbox->Type3C.AutoRestore = true;
6071 DAC960_ExecuteCommand(Command);
6072 switch (Command->V1.CommandStatus)
6073 {
6074 case DAC960_V1_NormalCompletion:
6075 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6076 "(/dev/rd/c%dd%d) Initiated\n",
6077 Controller, LogicalDriveNumber,
6078 Controller->ControllerNumber,
6079 LogicalDriveNumber);
6080 break;
6081 case DAC960_V1_DependentDiskIsDead:
6082 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6083 "(/dev/rd/c%dd%d) Failed - "
6084 "Dependent Physical Device is DEAD\n",
6085 Controller, LogicalDriveNumber,
6086 Controller->ControllerNumber,
6087 LogicalDriveNumber);
6088 break;
6089 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6090 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6091 "(/dev/rd/c%dd%d) Failed - "
6092 "Invalid or Nonredundant Logical Drive\n",
6093 Controller, LogicalDriveNumber,
6094 Controller->ControllerNumber,
6095 LogicalDriveNumber);
6096 break;
6097 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6098 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6099 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6100 "Consistency Check Already in Progress\n",
6101 Controller, LogicalDriveNumber,
6102 Controller->ControllerNumber,
6103 LogicalDriveNumber);
6104 break;
6105 default:
6106 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6107 "(/dev/rd/c%dd%d) Failed - "
6108 "Unexpected Status %04X\n",
6109 Controller, LogicalDriveNumber,
6110 Controller->ControllerNumber,
6111 LogicalDriveNumber, Command->V1.CommandStatus);
6112 break;
6113 }
6114 }
6115 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6116 strcmp(UserCommand, "cancel-consistency-check") == 0)
6117 {
6118 /*
6119 the OldRebuildRateConstant is never actually used
6120 once its value is retrieved from the controller.
6121 */
6122 unsigned char *OldRebuildRateConstant;
6123 dma_addr_t OldRebuildRateConstantDMA;
6124
6125 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6126 sizeof(char), &OldRebuildRateConstantDMA);
6127 if (OldRebuildRateConstant == NULL) {
6128 DAC960_UserCritical("Cancellation of Rebuild or "
6129 "Consistency Check Failed - "
6130 "Out of Memory",
6131 Controller);
6132 goto failure;
6133 }
6134 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6135 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6136 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6137 DAC960_ExecuteCommand(Command);
6138 switch (Command->V1.CommandStatus)
6139 {
6140 case DAC960_V1_NormalCompletion:
6141 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6142 Controller);
6143 break;
6144 default:
6145 DAC960_UserCritical("Cancellation of Rebuild or "
6146 "Consistency Check Failed - "
6147 "Unexpected Status %04X\n",
6148 Controller, Command->V1.CommandStatus);
6149 break;
6150 }
6151failure:
6152 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6153 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6154 }
6155 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6156 Controller, UserCommand);
6157
6158 spin_lock_irqsave(&Controller->queue_lock, flags);
6159 DAC960_DeallocateCommand(Command);
6160 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6161 return true;
6162}
6163
6164
6165/*
6166 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6167 TargetID into a Logical Device. It returns true on success and false
6168 on failure.
6169*/
6170
87d156bf 6171static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
1da177e4
LT		 6172 unsigned char Channel,
6173 unsigned char TargetID,
6174 unsigned short
6175 *LogicalDeviceNumber)
6176{
6177 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6178 DAC960_Controller_T *Controller = Command->Controller;
6179
6180 CommandMailbox = &Command->V2.CommandMailbox;
6181 memcpy(&SavedCommandMailbox, CommandMailbox,
6182 sizeof(DAC960_V2_CommandMailbox_T));
6183
6184 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6185 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6186 .DataTransferControllerToHost = true;
6187 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6188 .NoAutoRequestSense = true;
6189 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6190 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6191 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6192 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6193 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6194 DAC960_V2_TranslatePhysicalToLogicalDevice;
6195 CommandMailbox->Common.DataTransferMemoryAddress
6196 .ScatterGatherSegments[0]
6197 .SegmentDataPointer =
6198 Controller->V2.PhysicalToLogicalDeviceDMA;
6199 CommandMailbox->Common.DataTransferMemoryAddress
6200 .ScatterGatherSegments[0]
6201 .SegmentByteCount =
6202 CommandMailbox->Common.DataTransferSize;
6203
6204 DAC960_ExecuteCommand(Command);
6205 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6206
6207 memcpy(CommandMailbox, &SavedCommandMailbox,
6208 sizeof(DAC960_V2_CommandMailbox_T));
6209 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6210}
6211
6212
6213/*
6214 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6215 Controllers.
6216*/
6217
87d156bf 6218static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 6219 unsigned char *UserCommand)
6220{
6221 DAC960_Command_T *Command;
6222 DAC960_V2_CommandMailbox_T *CommandMailbox;
6223 unsigned long flags;
6224 unsigned char Channel, TargetID, LogicalDriveNumber;
6225 unsigned short LogicalDeviceNumber;
6226
6227 spin_lock_irqsave(&Controller->queue_lock, flags);
6228 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6229 DAC960_WaitForCommand(Controller);
6230 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6231 Controller->UserStatusLength = 0;
6232 DAC960_V2_ClearCommand(Command);
6233 Command->CommandType = DAC960_ImmediateCommand;
6234 CommandMailbox = &Command->V2.CommandMailbox;
6235 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6236 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6237 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6238 if (strcmp(UserCommand, "flush-cache") == 0)
6239 {
6240 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6241 CommandMailbox->DeviceOperation.OperationDevice =
6242 DAC960_V2_RAID_Controller;
6243 DAC960_ExecuteCommand(Command);
6244 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6245 }
6246 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6247 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6248 &Channel, &TargetID) &&
6249 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6250 &LogicalDeviceNumber))
6251 {
6252 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6253 LogicalDeviceNumber;
6254 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6255 DAC960_V2_SetDeviceState;
6256 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6257 DAC960_V2_Device_Dead;
6258 DAC960_ExecuteCommand(Command);
6259 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6260 Controller, Channel, TargetID,
6261 (Command->V2.CommandStatus
6262 == DAC960_V2_NormalCompletion
6263 ? "Succeeded" : "Failed"));
6264 }
6265 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6266 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6267 &Channel, &TargetID) &&
6268 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6269 &LogicalDeviceNumber))
6270 {
6271 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6272 LogicalDeviceNumber;
6273 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6274 DAC960_V2_SetDeviceState;
6275 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6276 DAC960_V2_Device_Online;
6277 DAC960_ExecuteCommand(Command);
6278 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6279 Controller, Channel, TargetID,
6280 (Command->V2.CommandStatus
6281 == DAC960_V2_NormalCompletion
6282 ? "Succeeded" : "Failed"));
6283 }
6284 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6285 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6286 &Channel, &TargetID) &&
6287 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6288 &LogicalDeviceNumber))
6289 {
6290 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6291 LogicalDeviceNumber;
6292 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6293 DAC960_V2_SetDeviceState;
6294 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6295 DAC960_V2_Device_Standby;
6296 DAC960_ExecuteCommand(Command);
6297 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6298 Controller, Channel, TargetID,
6299 (Command->V2.CommandStatus
6300 == DAC960_V2_NormalCompletion
6301 ? "Succeeded" : "Failed"));
6302 }
6303 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6304 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6305 &Channel, &TargetID) &&
6306 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6307 &LogicalDeviceNumber))
6308 {
6309 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6310 LogicalDeviceNumber;
6311 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6312 DAC960_V2_RebuildDeviceStart;
6313 DAC960_ExecuteCommand(Command);
6314 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6315 Controller, Channel, TargetID,
6316 (Command->V2.CommandStatus
6317 == DAC960_V2_NormalCompletion
6318 ? "Initiated" : "Not Initiated"));
6319 }
6320 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6321 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6322 &Channel, &TargetID) &&
6323 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6324 &LogicalDeviceNumber))
6325 {
6326 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6327 LogicalDeviceNumber;
6328 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6329 DAC960_V2_RebuildDeviceStop;
6330 DAC960_ExecuteCommand(Command);
6331 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6332 Controller, Channel, TargetID,
6333 (Command->V2.CommandStatus
6334 == DAC960_V2_NormalCompletion
6335 ? "Cancelled" : "Not Cancelled"));
6336 }
6337 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6338 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6339 &LogicalDriveNumber))
6340 {
6341 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6342 LogicalDriveNumber;
6343 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6344 DAC960_V2_ConsistencyCheckStart;
6345 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6346 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6347 DAC960_ExecuteCommand(Command);
6348 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6349 "(/dev/rd/c%dd%d) %s\n",
6350 Controller, LogicalDriveNumber,
6351 Controller->ControllerNumber,
6352 LogicalDriveNumber,
6353 (Command->V2.CommandStatus
6354 == DAC960_V2_NormalCompletion
6355 ? "Initiated" : "Not Initiated"));
6356 }
6357 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6358 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6359 &LogicalDriveNumber))
6360 {
6361 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6362 LogicalDriveNumber;
6363 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6364 DAC960_V2_ConsistencyCheckStop;
6365 DAC960_ExecuteCommand(Command);
6366 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6367 "(/dev/rd/c%dd%d) %s\n",
6368 Controller, LogicalDriveNumber,
6369 Controller->ControllerNumber,
6370 LogicalDriveNumber,
6371 (Command->V2.CommandStatus
6372 == DAC960_V2_NormalCompletion
6373 ? "Cancelled" : "Not Cancelled"));
6374 }
6375 else if (strcmp(UserCommand, "perform-discovery") == 0)
6376 {
6377 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6378 DAC960_ExecuteCommand(Command);
6379 DAC960_UserCritical("Discovery %s\n", Controller,
6380 (Command->V2.CommandStatus
6381 == DAC960_V2_NormalCompletion
6382 ? "Initiated" : "Not Initiated"));
6383 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6384 {
6385 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6386 CommandMailbox->ControllerInfo.CommandControlBits
6387 .DataTransferControllerToHost = true;
6388 CommandMailbox->ControllerInfo.CommandControlBits
6389 .NoAutoRequestSense = true;
6390 CommandMailbox->ControllerInfo.DataTransferSize =
6391 sizeof(DAC960_V2_ControllerInfo_T);
6392 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6393 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6394 DAC960_V2_GetControllerInfo;
6395 /*
6396 * How does this NOT race with the queued Monitoring
6397 * usage of this structure?
6398 */
6399 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6400 .ScatterGatherSegments[0]
6401 .SegmentDataPointer =
6402 Controller->V2.NewControllerInformationDMA;
6403 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6404 .ScatterGatherSegments[0]
6405 .SegmentByteCount =
6406 CommandMailbox->ControllerInfo.DataTransferSize;
6407 DAC960_ExecuteCommand(Command);
6408 while (Controller->V2.NewControllerInformation->PhysicalScanActive)
6409 {
6410 DAC960_ExecuteCommand(Command);
6411 sleep_on_timeout(&Controller->CommandWaitQueue, HZ);
6412 }
6413 DAC960_UserCritical("Discovery Completed\n", Controller);
6414 }
6415 }
6416 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6417 Controller->SuppressEnclosureMessages = true;
6418 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6419 Controller, UserCommand);
6420
6421 spin_lock_irqsave(&Controller->queue_lock, flags);
6422 DAC960_DeallocateCommand(Command);
6423 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6424 return true;
6425}
6426
6427
6428/*
6429 DAC960_ProcReadStatus implements reading /proc/rd/status.
6430*/
6431
6432static int DAC960_ProcReadStatus(char *Page, char **Start, off_t Offset,
6433 int Count, int *EOF, void *Data)
6434{
6435 unsigned char *StatusMessage = "OK\n";
6436 int ControllerNumber, BytesAvailable;
6437 for (ControllerNumber = 0;
6438 ControllerNumber < DAC960_ControllerCount;
6439 ControllerNumber++)
6440 {
6441 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6442 if (Controller == NULL) continue;
6443 if (Controller->MonitoringAlertMode)
6444 {
6445 StatusMessage = "ALERT\n";
6446 break;
6447 }
6448 }
6449 BytesAvailable = strlen(StatusMessage) - Offset;
6450 if (Count >= BytesAvailable)
6451 {
6452 Count = BytesAvailable;
6453 *EOF = true;
6454 }
6455 if (Count <= 0) return 0;
6456 *Start = Page;
6457 memcpy(Page, &StatusMessage[Offset], Count);
6458 return Count;
6459}
6460
6461
6462/*
6463 DAC960_ProcReadInitialStatus implements reading /proc/rd/cN/initial_status.
6464*/
6465
6466static int DAC960_ProcReadInitialStatus(char *Page, char **Start, off_t Offset,
6467 int Count, int *EOF, void *Data)
6468{
6469 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6470 int BytesAvailable = Controller->InitialStatusLength - Offset;
6471 if (Count >= BytesAvailable)
6472 {
6473 Count = BytesAvailable;
6474 *EOF = true;
6475 }
6476 if (Count <= 0) return 0;
6477 *Start = Page;
6478 memcpy(Page, &Controller->CombinedStatusBuffer[Offset], Count);
6479 return Count;
6480}
6481
6482
6483/*
6484 DAC960_ProcReadCurrentStatus implements reading /proc/rd/cN/current_status.
6485*/
6486
6487static int DAC960_ProcReadCurrentStatus(char *Page, char **Start, off_t Offset,
6488 int Count, int *EOF, void *Data)
6489{
6490 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6491 unsigned char *StatusMessage =
6492 "No Rebuild or Consistency Check in Progress\n";
6493 int ProgressMessageLength = strlen(StatusMessage);
6494 int BytesAvailable;
6495 if (jiffies != Controller->LastCurrentStatusTime)
6496 {
6497 Controller->CurrentStatusLength = 0;
6498 DAC960_AnnounceDriver(Controller);
6499 DAC960_ReportControllerConfiguration(Controller);
6500 DAC960_ReportDeviceConfiguration(Controller);
6501 if (Controller->ProgressBufferLength > 0)
6502 ProgressMessageLength = Controller->ProgressBufferLength;
6503 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6504 {
6505 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6506 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6507 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6508 if (Controller->ProgressBufferLength > 0)
6509 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6510 Controller->ProgressBuffer);
6511 else
6512 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6513 StatusMessage);
6514 Controller->CurrentStatusLength += ProgressMessageLength;
6515 }
6516 Controller->LastCurrentStatusTime = jiffies;
6517 }
6518 BytesAvailable = Controller->CurrentStatusLength - Offset;
6519 if (Count >= BytesAvailable)
6520 {
6521 Count = BytesAvailable;
6522 *EOF = true;
6523 }
6524 if (Count <= 0) return 0;
6525 *Start = Page;
6526 memcpy(Page, &Controller->CurrentStatusBuffer[Offset], Count);
6527 return Count;
6528}
6529
6530
6531/*
6532 DAC960_ProcReadUserCommand implements reading /proc/rd/cN/user_command.
6533*/
6534
6535static int DAC960_ProcReadUserCommand(char *Page, char **Start, off_t Offset,
6536 int Count, int *EOF, void *Data)
6537{
6538 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6539 int BytesAvailable = Controller->UserStatusLength - Offset;
6540 if (Count >= BytesAvailable)
6541 {
6542 Count = BytesAvailable;
6543 *EOF = true;
6544 }
6545 if (Count <= 0) return 0;
6546 *Start = Page;
6547 memcpy(Page, &Controller->UserStatusBuffer[Offset], Count);
6548 return Count;
6549}
6550
6551
6552/*
6553 DAC960_ProcWriteUserCommand implements writing /proc/rd/cN/user_command.
6554*/
6555
6556static int DAC960_ProcWriteUserCommand(struct file *file,
6557 const char __user *Buffer,
6558 unsigned long Count, void *Data)
6559{
6560 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6561 unsigned char CommandBuffer[80];
6562 int Length;
6563 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6564 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6565 CommandBuffer[Count] = '\0';
6566 Length = strlen(CommandBuffer);
6567 if (CommandBuffer[Length-1] == '\n')
6568 CommandBuffer[--Length] = '\0';
6569 if (Controller->FirmwareType == DAC960_V1_Controller)
6570 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6571 ? Count : -EBUSY);
6572 else
6573 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6574 ? Count : -EBUSY);
6575}
6576
6577
6578/*
6579 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6580 DAC960 Driver.
6581*/
6582
6583static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6584{
6585 struct proc_dir_entry *StatusProcEntry;
6586 struct proc_dir_entry *ControllerProcEntry;
6587 struct proc_dir_entry *UserCommandProcEntry;
6588
6589 if (DAC960_ProcDirectoryEntry == NULL) {
6590 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6591 StatusProcEntry = create_proc_read_entry("status", 0,
6592 DAC960_ProcDirectoryEntry,
6593 DAC960_ProcReadStatus, NULL);
6594 }
6595
6596 sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
6597 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6598 DAC960_ProcDirectoryEntry);
6599 create_proc_read_entry("initial_status", 0, ControllerProcEntry,
6600 DAC960_ProcReadInitialStatus, Controller);
6601 create_proc_read_entry("current_status", 0, ControllerProcEntry,
6602 DAC960_ProcReadCurrentStatus, Controller);
6603 UserCommandProcEntry =
6604 create_proc_read_entry("user_command", S_IWUSR | S_IRUSR,
6605 ControllerProcEntry, DAC960_ProcReadUserCommand,
6606 Controller);
6607 UserCommandProcEntry->write_proc = DAC960_ProcWriteUserCommand;
6608 Controller->ControllerProcEntry = ControllerProcEntry;
6609}
6610
6611
6612/*
6613 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6614 DAC960 Driver.
6615*/
6616
6617static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6618{
6619 if (Controller->ControllerProcEntry == NULL)
6620 return;
6621 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6622 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6623 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6624 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6625 Controller->ControllerProcEntry = NULL;
6626}
6627
6628#ifdef DAC960_GAM_MINOR
6629
6630/*
6631 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6632*/
6633
6634static int DAC960_gam_ioctl(struct inode *inode, struct file *file,
6635 unsigned int Request, unsigned long Argument)
6636{
6637 int ErrorCode = 0;
6638 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
6639 switch (Request)
6640 {
6641 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
6642 return DAC960_ControllerCount;
6643 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6644 {
6645 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6646 (DAC960_ControllerInfo_T __user *) Argument;
6647 DAC960_ControllerInfo_T ControllerInfo;
6648 DAC960_Controller_T *Controller;
6649 int ControllerNumber;
6650 if (UserSpaceControllerInfo == NULL) return -EINVAL;
6651 ErrorCode = get_user(ControllerNumber,
6652 &UserSpaceControllerInfo->ControllerNumber);
6653 if (ErrorCode != 0) return ErrorCode;
6654 if (ControllerNumber < 0 ||
6655 ControllerNumber > DAC960_ControllerCount - 1)
6656 return -ENXIO;
6657 Controller = DAC960_Controllers[ControllerNumber];
6658 if (Controller == NULL) return -ENXIO;
6659 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6660 ControllerInfo.ControllerNumber = ControllerNumber;
6661 ControllerInfo.FirmwareType = Controller->FirmwareType;
6662 ControllerInfo.Channels = Controller->Channels;
6663 ControllerInfo.Targets = Controller->Targets;
6664 ControllerInfo.PCI_Bus = Controller->Bus;
6665 ControllerInfo.PCI_Device = Controller->Device;
6666 ControllerInfo.PCI_Function = Controller->Function;
6667 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6668 ControllerInfo.PCI_Address = Controller->PCI_Address;
6669 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6670 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6671 return (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6672 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6673 }
6674 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6675 {
6676 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6677 (DAC960_V1_UserCommand_T __user *) Argument;
6678 DAC960_V1_UserCommand_T UserCommand;
6679 DAC960_Controller_T *Controller;
6680 DAC960_Command_T *Command = NULL;
6681 DAC960_V1_CommandOpcode_T CommandOpcode;
6682 DAC960_V1_CommandStatus_T CommandStatus;
6683 DAC960_V1_DCDB_T DCDB;
6684 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6685 dma_addr_t DCDB_IOBUFDMA;
6686 unsigned long flags;
6687 int ControllerNumber, DataTransferLength;
6688 unsigned char *DataTransferBuffer = NULL;
6689 dma_addr_t DataTransferBufferDMA;
6690 if (UserSpaceUserCommand == NULL) return -EINVAL;
6691 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6692 sizeof(DAC960_V1_UserCommand_T))) {
6693 ErrorCode = -EFAULT;
6694 goto Failure1a;
6695 }
6696 ControllerNumber = UserCommand.ControllerNumber;
6697 if (ControllerNumber < 0 ||
6698 ControllerNumber > DAC960_ControllerCount - 1)
6699 return -ENXIO;
6700 Controller = DAC960_Controllers[ControllerNumber];
6701 if (Controller == NULL) return -ENXIO;
6702 if (Controller->FirmwareType != DAC960_V1_Controller) return -EINVAL;
6703 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6704 DataTransferLength = UserCommand.DataTransferLength;
6705 if (CommandOpcode & 0x80) return -EINVAL;
6706 if (CommandOpcode == DAC960_V1_DCDB)
6707 {
6708 if (copy_from_user(&DCDB, UserCommand.DCDB,
6709 sizeof(DAC960_V1_DCDB_T))) {
6710 ErrorCode = -EFAULT;
6711 goto Failure1a;
6712 }
6713 if (DCDB.Channel >= DAC960_V1_MaxChannels) return -EINVAL;
6714 if (!((DataTransferLength == 0 &&
6715 DCDB.Direction
6716 == DAC960_V1_DCDB_NoDataTransfer) ||
6717 (DataTransferLength > 0 &&
6718 DCDB.Direction
6719 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6720 (DataTransferLength < 0 &&
6721 DCDB.Direction
6722 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6723 return -EINVAL;
6724 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6725 != abs(DataTransferLength))
6726 return -EINVAL;
6727 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6728 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6729 if (DCDB_IOBUF == NULL)
6730 return -ENOMEM;
6731 }
6732 if (DataTransferLength > 0)
6733 {
6734 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6735 DataTransferLength, &DataTransferBufferDMA);
6736 if (DataTransferBuffer == NULL) {
6737 ErrorCode = -ENOMEM;
6738 goto Failure1;
6739 }
6740 memset(DataTransferBuffer, 0, DataTransferLength);
6741 }
6742 else if (DataTransferLength < 0)
6743 {
6744 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6745 -DataTransferLength, &DataTransferBufferDMA);
6746 if (DataTransferBuffer == NULL) {
6747 ErrorCode = -ENOMEM;
6748 goto Failure1;
6749 }
6750 if (copy_from_user(DataTransferBuffer,
6751 UserCommand.DataTransferBuffer,
6752 -DataTransferLength)) {
6753 ErrorCode = -EFAULT;
6754 goto Failure1;
6755 }
6756 }
6757 if (CommandOpcode == DAC960_V1_DCDB)
6758 {
6759 spin_lock_irqsave(&Controller->queue_lock, flags);
6760 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6761 DAC960_WaitForCommand(Controller);
6762 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6763 [DCDB.TargetID])
6764 {
6765 spin_unlock_irq(&Controller->queue_lock);
6766 __wait_event(Controller->CommandWaitQueue,
6767 !Controller->V1.DirectCommandActive
6768 [DCDB.Channel][DCDB.TargetID]);
6769 spin_lock_irq(&Controller->queue_lock);
6770 }
6771 Controller->V1.DirectCommandActive[DCDB.Channel]
6772 [DCDB.TargetID] = true;
6773 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6774 DAC960_V1_ClearCommand(Command);
6775 Command->CommandType = DAC960_ImmediateCommand;
6776 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6777 sizeof(DAC960_V1_CommandMailbox_T));
6778 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6779 DCDB.BusAddress = DataTransferBufferDMA;
6780 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6781 }
6782 else
6783 {
6784 spin_lock_irqsave(&Controller->queue_lock, flags);
6785 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6786 DAC960_WaitForCommand(Controller);
6787 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6788 DAC960_V1_ClearCommand(Command);
6789 Command->CommandType = DAC960_ImmediateCommand;
6790 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6791 sizeof(DAC960_V1_CommandMailbox_T));
6792 if (DataTransferBuffer != NULL)
6793 Command->V1.CommandMailbox.Type3.BusAddress =
6794 DataTransferBufferDMA;
6795 }
6796 DAC960_ExecuteCommand(Command);
6797 CommandStatus = Command->V1.CommandStatus;
6798 spin_lock_irqsave(&Controller->queue_lock, flags);
6799 DAC960_DeallocateCommand(Command);
6800 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6801 if (DataTransferLength > 0)
6802 {
6803 if (copy_to_user(UserCommand.DataTransferBuffer,
6804 DataTransferBuffer, DataTransferLength)) {
6805 ErrorCode = -EFAULT;
6806 goto Failure1;
6807 }
6808 }
6809 if (CommandOpcode == DAC960_V1_DCDB)
6810 {
6811 /*
6812 I don't believe Target or Channel in the DCDB_IOBUF
6813 should be any different from the contents of DCDB.
6814 */
6815 Controller->V1.DirectCommandActive[DCDB.Channel]
6816 [DCDB.TargetID] = false;
6817 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6818 sizeof(DAC960_V1_DCDB_T))) {
6819 ErrorCode = -EFAULT;
6820 goto Failure1;
6821 }
6822 }
6823 ErrorCode = CommandStatus;
6824 Failure1:
6825 if (DataTransferBuffer != NULL)
6826 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6827 DataTransferBuffer, DataTransferBufferDMA);
6828 if (DCDB_IOBUF != NULL)
6829 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6830 DCDB_IOBUF, DCDB_IOBUFDMA);
6831 Failure1a:
6832 return ErrorCode;
6833 }
6834 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6835 {
6836 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6837 (DAC960_V2_UserCommand_T __user *) Argument;
6838 DAC960_V2_UserCommand_T UserCommand;
6839 DAC960_Controller_T *Controller;
6840 DAC960_Command_T *Command = NULL;
6841 DAC960_V2_CommandMailbox_T *CommandMailbox;
6842 DAC960_V2_CommandStatus_T CommandStatus;
6843 unsigned long flags;
6844 int ControllerNumber, DataTransferLength;
6845 int DataTransferResidue, RequestSenseLength;
6846 unsigned char *DataTransferBuffer = NULL;
6847 dma_addr_t DataTransferBufferDMA;
6848 unsigned char *RequestSenseBuffer = NULL;
6849 dma_addr_t RequestSenseBufferDMA;
6850 if (UserSpaceUserCommand == NULL) return -EINVAL;
6851 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6852 sizeof(DAC960_V2_UserCommand_T))) {
6853 ErrorCode = -EFAULT;
6854 goto Failure2a;
6855 }
6856 ControllerNumber = UserCommand.ControllerNumber;
6857 if (ControllerNumber < 0 ||
6858 ControllerNumber > DAC960_ControllerCount - 1)
6859 return -ENXIO;
6860 Controller = DAC960_Controllers[ControllerNumber];
6861 if (Controller == NULL) return -ENXIO;
6862 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
6863 DataTransferLength = UserCommand.DataTransferLength;
6864 if (DataTransferLength > 0)
6865 {
6866 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6867 DataTransferLength, &DataTransferBufferDMA);
6868 if (DataTransferBuffer == NULL) return -ENOMEM;
6869 memset(DataTransferBuffer, 0, DataTransferLength);
6870 }
6871 else if (DataTransferLength < 0)
6872 {
6873 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6874 -DataTransferLength, &DataTransferBufferDMA);
6875 if (DataTransferBuffer == NULL) return -ENOMEM;
6876 if (copy_from_user(DataTransferBuffer,
6877 UserCommand.DataTransferBuffer,
6878 -DataTransferLength)) {
6879 ErrorCode = -EFAULT;
6880 goto Failure2;
6881 }
6882 }
6883 RequestSenseLength = UserCommand.RequestSenseLength;
6884 if (RequestSenseLength > 0)
6885 {
6886 RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice,
6887 RequestSenseLength, &RequestSenseBufferDMA);
6888 if (RequestSenseBuffer == NULL)
6889 {
6890 ErrorCode = -ENOMEM;
6891 goto Failure2;
6892 }
6893 memset(RequestSenseBuffer, 0, RequestSenseLength);
6894 }
6895 spin_lock_irqsave(&Controller->queue_lock, flags);
6896 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6897 DAC960_WaitForCommand(Controller);
6898 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6899 DAC960_V2_ClearCommand(Command);
6900 Command->CommandType = DAC960_ImmediateCommand;
6901 CommandMailbox = &Command->V2.CommandMailbox;
6902 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6903 sizeof(DAC960_V2_CommandMailbox_T));
6904 CommandMailbox->Common.CommandControlBits
6905 .AdditionalScatterGatherListMemory = false;
6906 CommandMailbox->Common.CommandControlBits
6907 .NoAutoRequestSense = true;
6908 CommandMailbox->Common.DataTransferSize = 0;
6909 CommandMailbox->Common.DataTransferPageNumber = 0;
6910 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6911 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6912 if (DataTransferLength != 0)
6913 {
6914 if (DataTransferLength > 0)
6915 {
6916 CommandMailbox->Common.CommandControlBits
6917 .DataTransferControllerToHost = true;
6918 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6919 }
6920 else
6921 {
6922 CommandMailbox->Common.CommandControlBits
6923 .DataTransferControllerToHost = false;
6924 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6925 }
6926 CommandMailbox->Common.DataTransferMemoryAddress
6927 .ScatterGatherSegments[0]
6928 .SegmentDataPointer = DataTransferBufferDMA;
6929 CommandMailbox->Common.DataTransferMemoryAddress
6930 .ScatterGatherSegments[0]
6931 .SegmentByteCount =
6932 CommandMailbox->Common.DataTransferSize;
6933 }
6934 if (RequestSenseLength > 0)
6935 {
6936 CommandMailbox->Common.CommandControlBits
6937 .NoAutoRequestSense = false;
6938 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6939 CommandMailbox->Common.RequestSenseBusAddress =
6940 RequestSenseBufferDMA;
6941 }
6942 DAC960_ExecuteCommand(Command);
6943 CommandStatus = Command->V2.CommandStatus;
6944 RequestSenseLength = Command->V2.RequestSenseLength;
6945 DataTransferResidue = Command->V2.DataTransferResidue;
6946 spin_lock_irqsave(&Controller->queue_lock, flags);
6947 DAC960_DeallocateCommand(Command);
6948 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6949 if (RequestSenseLength > UserCommand.RequestSenseLength)
6950 RequestSenseLength = UserCommand.RequestSenseLength;
6951 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6952 &DataTransferResidue,
6953 sizeof(DataTransferResidue))) {
6954 ErrorCode = -EFAULT;
6955 goto Failure2;
6956 }
6957 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6958 &RequestSenseLength, sizeof(RequestSenseLength))) {
6959 ErrorCode = -EFAULT;
6960 goto Failure2;
6961 }
6962 if (DataTransferLength > 0)
6963 {
6964 if (copy_to_user(UserCommand.DataTransferBuffer,
6965 DataTransferBuffer, DataTransferLength)) {
6966 ErrorCode = -EFAULT;
6967 goto Failure2;
6968 }
6969 }
6970 if (RequestSenseLength > 0)
6971 {
6972 if (copy_to_user(UserCommand.RequestSenseBuffer,
6973 RequestSenseBuffer, RequestSenseLength)) {
6974 ErrorCode = -EFAULT;
6975 goto Failure2;
6976 }
6977 }
6978 ErrorCode = CommandStatus;
6979 Failure2:
6980 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6981 DataTransferBuffer, DataTransferBufferDMA);
6982 if (RequestSenseBuffer != NULL)
6983 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
6984 RequestSenseBuffer, RequestSenseBufferDMA);
6985 Failure2a:
6986 return ErrorCode;
6987 }
6988 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
6989 {
6990 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
6991 (DAC960_V2_GetHealthStatus_T __user *) Argument;
6992 DAC960_V2_GetHealthStatus_T GetHealthStatus;
6993 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
6994 DAC960_Controller_T *Controller;
6995 int ControllerNumber;
6996 if (UserSpaceGetHealthStatus == NULL) return -EINVAL;
6997 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
6998 sizeof(DAC960_V2_GetHealthStatus_T)))
6999 return -EFAULT;
7000 ControllerNumber = GetHealthStatus.ControllerNumber;
7001 if (ControllerNumber < 0 ||
7002 ControllerNumber > DAC960_ControllerCount - 1)
7003 return -ENXIO;
7004 Controller = DAC960_Controllers[ControllerNumber];
7005 if (Controller == NULL) return -ENXIO;
7006 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
7007 if (copy_from_user(&HealthStatusBuffer,
7008 GetHealthStatus.HealthStatusBuffer,
7009 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7010 return -EFAULT;
7011 while (Controller->V2.HealthStatusBuffer->StatusChangeCounter
7012 == HealthStatusBuffer.StatusChangeCounter &&
7013 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7014 == HealthStatusBuffer.NextEventSequenceNumber)
7015 {
7016 interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue,
7017 DAC960_MonitoringTimerInterval);
7018 if (signal_pending(current)) return -EINTR;
7019 }
7020 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7021 Controller->V2.HealthStatusBuffer,
7022 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7023 return -EFAULT;
7024 return 0;
7025 }
7026 }
7027 return -EINVAL;
7028}
7029
2b8693c0 7030static const struct file_operations DAC960_gam_fops = {
1da177e4
LT		 7031 .owner = THIS_MODULE,
7032 .ioctl = DAC960_gam_ioctl
7033};
7034
7035static struct miscdevice DAC960_gam_dev = {
7036 DAC960_GAM_MINOR,
7037 "dac960_gam",
7038 &DAC960_gam_fops
7039};
7040
7041static int DAC960_gam_init(void)
7042{
7043 int ret;
7044
7045 ret = misc_register(&DAC960_gam_dev);
7046 if (ret)
7047 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7048 return ret;
7049}
7050
7051static void DAC960_gam_cleanup(void)
7052{
7053 misc_deregister(&DAC960_gam_dev);
7054}
7055
7056#endif /* DAC960_GAM_MINOR */
7057
5b76ffd5
CH		 7058static struct DAC960_privdata DAC960_GEM_privdata = {
7059 .HardwareType = DAC960_GEM_Controller,
7060 .FirmwareType = DAC960_V2_Controller,
7061 .InterruptHandler = DAC960_GEM_InterruptHandler,
7062 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7063};
7064
7065
1da177e4
LT		 7066static struct DAC960_privdata DAC960_BA_privdata = {
7067 .HardwareType = DAC960_BA_Controller,
7068 .FirmwareType = DAC960_V2_Controller,
7069 .InterruptHandler = DAC960_BA_InterruptHandler,
7070 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7071};
7072
7073static struct DAC960_privdata DAC960_LP_privdata = {
7074 .HardwareType = DAC960_LP_Controller,
7075 .FirmwareType = DAC960_LP_Controller,
7076 .InterruptHandler = DAC960_LP_InterruptHandler,
7077 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7078};
7079
7080static struct DAC960_privdata DAC960_LA_privdata = {
7081 .HardwareType = DAC960_LA_Controller,
7082 .FirmwareType = DAC960_V1_Controller,
7083 .InterruptHandler = DAC960_LA_InterruptHandler,
7084 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7085};
7086
7087static struct DAC960_privdata DAC960_PG_privdata = {
7088 .HardwareType = DAC960_PG_Controller,
7089 .FirmwareType = DAC960_V1_Controller,
7090 .InterruptHandler = DAC960_PG_InterruptHandler,
7091 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7092};
7093
7094static struct DAC960_privdata DAC960_PD_privdata = {
7095 .HardwareType = DAC960_PD_Controller,
7096 .FirmwareType = DAC960_V1_Controller,
7097 .InterruptHandler = DAC960_PD_InterruptHandler,
7098 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7099};
7100
7101static struct DAC960_privdata DAC960_P_privdata = {
7102 .HardwareType = DAC960_P_Controller,
7103 .FirmwareType = DAC960_V1_Controller,
7104 .InterruptHandler = DAC960_P_InterruptHandler,
7105 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7106};
7107
7108static struct pci_device_id DAC960_id_table[] = {
5b76ffd5
CH		 7109 {
7110 .vendor = PCI_VENDOR_ID_MYLEX,
7111 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
fddafd3d 7112 .subvendor = PCI_VENDOR_ID_MYLEX,
5b76ffd5
CH		 7113 .subdevice = PCI_ANY_ID,
7114 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7115 },
1da177e4
LT		 7116 {
7117 .vendor = PCI_VENDOR_ID_MYLEX,
7118 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7119 .subvendor = PCI_ANY_ID,
7120 .subdevice = PCI_ANY_ID,
7121 .driver_data = (unsigned long) &DAC960_BA_privdata,
7122 },
7123 {
7124 .vendor = PCI_VENDOR_ID_MYLEX,
7125 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7126 .subvendor = PCI_ANY_ID,
7127 .subdevice = PCI_ANY_ID,
7128 .driver_data = (unsigned long) &DAC960_LP_privdata,
7129 },
7130 {
7131 .vendor = PCI_VENDOR_ID_DEC,
7132 .device = PCI_DEVICE_ID_DEC_21285,
7133 .subvendor = PCI_VENDOR_ID_MYLEX,
7134 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7135 .driver_data = (unsigned long) &DAC960_LA_privdata,
7136 },
7137 {
7138 .vendor = PCI_VENDOR_ID_MYLEX,
7139 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7140 .subvendor = PCI_ANY_ID,
7141 .subdevice = PCI_ANY_ID,
7142 .driver_data = (unsigned long) &DAC960_PG_privdata,
7143 },
7144 {
7145 .vendor = PCI_VENDOR_ID_MYLEX,
7146 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7147 .subvendor = PCI_ANY_ID,
7148 .subdevice = PCI_ANY_ID,
7149 .driver_data = (unsigned long) &DAC960_PD_privdata,
7150 },
7151 {
7152 .vendor = PCI_VENDOR_ID_MYLEX,
7153 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7154 .subvendor = PCI_ANY_ID,
7155 .subdevice = PCI_ANY_ID,
7156 .driver_data = (unsigned long) &DAC960_P_privdata,
7157 },
7158 {0, },
7159};
7160
7161MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7162
7163static struct pci_driver DAC960_pci_driver = {
7164 .name = "DAC960",
7165 .id_table = DAC960_id_table,
7166 .probe = DAC960_Probe,
7167 .remove = DAC960_Remove,
7168};
7169
7170static int DAC960_init_module(void)
7171{
7172 int ret;
7173
9bfab8ce 7174 ret = pci_register_driver(&DAC960_pci_driver);
1da177e4
LT		 7175#ifdef DAC960_GAM_MINOR
7176 if (!ret)
7177 DAC960_gam_init();
7178#endif
7179 return ret;
7180}
7181
7182static void DAC960_cleanup_module(void)
7183{
7184 int i;
7185
7186#ifdef DAC960_GAM_MINOR
7187 DAC960_gam_cleanup();
7188#endif
7189
7190 for (i = 0; i < DAC960_ControllerCount; i++) {
7191 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7192 if (Controller == NULL)
7193 continue;
7194 DAC960_FinalizeController(Controller);
7195 }
7196 if (DAC960_ProcDirectoryEntry != NULL) {
7197 remove_proc_entry("rd/status", NULL);
7198 remove_proc_entry("rd", NULL);
7199 }
7200 DAC960_ControllerCount = 0;
7201 pci_unregister_driver(&DAC960_pci_driver);
7202}
7203
7204module_init(DAC960_init_module);
7205module_exit(DAC960_cleanup_module);
7206
7207MODULE_LICENSE("GPL");
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