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[net-next-2.6.git] / drivers / block / DAC960.c
CommitLineData
1da177e4
LT		 1/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
5b76ffd5 6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
1da177e4
LT		 7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
07fb75a5
JJ		 20#define DAC960_DriverVersion "2.5.48"
21#define DAC960_DriverDate "14 May 2006"
1da177e4
LT		 22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/bio.h>
29#include <linux/completion.h>
30#include <linux/delay.h>
31#include <linux/genhd.h>
32#include <linux/hdreg.h>
33#include <linux/blkpg.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/mm.h>
37#include <linux/slab.h>
38#include <linux/proc_fs.h>
39#include <linux/reboot.h>
40#include <linux/spinlock.h>
41#include <linux/timer.h>
42#include <linux/pci.h>
43#include <linux/init.h>
50297cbf 44#include <linux/jiffies.h>
62287fbb 45#include <linux/random.h>
1da177e4
LT		 46#include <asm/io.h>
47#include <asm/uaccess.h>
48#include "DAC960.h"
49
50#define DAC960_GAM_MINOR 252
51
52
53static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
54static int DAC960_ControllerCount;
55static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
56
57static long disk_size(DAC960_Controller_T *p, int drive_nr)
58{
59 if (p->FirmwareType == DAC960_V1_Controller) {
60 if (drive_nr >= p->LogicalDriveCount)
61 return 0;
62 return p->V1.LogicalDriveInformation[drive_nr].
63 LogicalDriveSize;
64 } else {
65 DAC960_V2_LogicalDeviceInfo_T *i =
66 p->V2.LogicalDeviceInformation[drive_nr];
67 if (i == NULL)
68 return 0;
69 return i->ConfigurableDeviceSize;
70 }
71}
72
73static int DAC960_open(struct inode *inode, struct file *file)
74{
75 struct gendisk *disk = inode->i_bdev->bd_disk;
76 DAC960_Controller_T *p = disk->queue->queuedata;
77 int drive_nr = (long)disk->private_data;
78
79 if (p->FirmwareType == DAC960_V1_Controller) {
80 if (p->V1.LogicalDriveInformation[drive_nr].
81 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
82 return -ENXIO;
83 } else {
84 DAC960_V2_LogicalDeviceInfo_T *i =
85 p->V2.LogicalDeviceInformation[drive_nr];
86 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
87 return -ENXIO;
88 }
89
90 check_disk_change(inode->i_bdev);
91
92 if (!get_capacity(p->disks[drive_nr]))
93 return -ENXIO;
94 return 0;
95}
96
a885c8c4 97static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1da177e4 98{
a885c8c4 99 struct gendisk *disk = bdev->bd_disk;
1da177e4
LT		 100 DAC960_Controller_T *p = disk->queue->queuedata;
101 int drive_nr = (long)disk->private_data;
1da177e4
LT		 102
103 if (p->FirmwareType == DAC960_V1_Controller) {
a885c8c4
CH		 104 geo->heads = p->V1.GeometryTranslationHeads;
105 geo->sectors = p->V1.GeometryTranslationSectors;
106 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
107 LogicalDriveSize / (geo->heads * geo->sectors);
1da177e4
LT		 108 } else {
109 DAC960_V2_LogicalDeviceInfo_T *i =
110 p->V2.LogicalDeviceInformation[drive_nr];
111 switch (i->DriveGeometry) {
112 case DAC960_V2_Geometry_128_32:
a885c8c4
CH		 113 geo->heads = 128;
114 geo->sectors = 32;
1da177e4
LT		 115 break;
116 case DAC960_V2_Geometry_255_63:
a885c8c4
CH		 117 geo->heads = 255;
118 geo->sectors = 63;
1da177e4
LT		 119 break;
120 default:
121 DAC960_Error("Illegal Logical Device Geometry %d\n",
122 p, i->DriveGeometry);
123 return -EINVAL;
124 }
125
a885c8c4
CH		 126 geo->cylinders = i->ConfigurableDeviceSize /
127 (geo->heads * geo->sectors);
1da177e4
LT		 128 }
129
a885c8c4 130 return 0;
1da177e4
LT		 131}
132
133static int DAC960_media_changed(struct gendisk *disk)
134{
135 DAC960_Controller_T *p = disk->queue->queuedata;
136 int drive_nr = (long)disk->private_data;
137
138 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
139 return 1;
140 return 0;
141}
142
143static int DAC960_revalidate_disk(struct gendisk *disk)
144{
145 DAC960_Controller_T *p = disk->queue->queuedata;
146 int unit = (long)disk->private_data;
147
148 set_capacity(disk, disk_size(p, unit));
149 return 0;
150}
151
152static struct block_device_operations DAC960_BlockDeviceOperations = {
153 .owner = THIS_MODULE,
154 .open = DAC960_open,
a885c8c4 155 .getgeo = DAC960_getgeo,
1da177e4
LT		 156 .media_changed = DAC960_media_changed,
157 .revalidate_disk = DAC960_revalidate_disk,
158};
159
160
161/*
162 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
163 Copyright Notice, and Electronic Mail Address.
164*/
165
166static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
167{
168 DAC960_Announce("***** DAC960 RAID Driver Version "
169 DAC960_DriverVersion " of "
170 DAC960_DriverDate " *****\n", Controller);
171 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
172 "<lnz@dandelion.com>\n", Controller);
173}
174
175
176/*
177 DAC960_Failure prints a standardized error message, and then returns false.
178*/
179
87d156bf 180static bool DAC960_Failure(DAC960_Controller_T *Controller,
1da177e4
LT		 181 unsigned char *ErrorMessage)
182{
183 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
184 Controller);
185 if (Controller->IO_Address == 0)
186 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
187 "PCI Address 0x%X\n", Controller,
188 Controller->Bus, Controller->Device,
189 Controller->Function, Controller->PCI_Address);
190 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
191 "0x%X PCI Address 0x%X\n", Controller,
192 Controller->Bus, Controller->Device,
193 Controller->Function, Controller->IO_Address,
194 Controller->PCI_Address);
195 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
196 return false;
197}
198
199/*
200 init_dma_loaf() and slice_dma_loaf() are helper functions for
201 aggregating the dma-mapped memory for a well-known collection of
202 data structures that are of different lengths.
203
204 These routines don't guarantee any alignment. The caller must
205 include any space needed for alignment in the sizes of the structures
206 that are passed in.
207 */
208
87d156bf 209static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
1da177e4
LT		 210 size_t len)
211{
212 void *cpu_addr;
213 dma_addr_t dma_handle;
214
215 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
216 if (cpu_addr == NULL)
217 return false;
218
219 loaf->cpu_free = loaf->cpu_base = cpu_addr;
220 loaf->dma_free =loaf->dma_base = dma_handle;
221 loaf->length = len;
222 memset(cpu_addr, 0, len);
223 return true;
224}
225
226static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
227 dma_addr_t *dma_handle)
228{
229 void *cpu_end = loaf->cpu_free + len;
230 void *cpu_addr = loaf->cpu_free;
231
089fe1b2 232 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
1da177e4
LT		 233 *dma_handle = loaf->dma_free;
234 loaf->cpu_free = cpu_end;
235 loaf->dma_free += len;
236 return cpu_addr;
237}
238
239static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
240{
241 if (loaf_handle->cpu_base != NULL)
242 pci_free_consistent(dev, loaf_handle->length,
243 loaf_handle->cpu_base, loaf_handle->dma_base);
244}
245
246
247/*
248 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
249 data structures for Controller. It returns true on success and false on
250 failure.
251*/
252
87d156bf 253static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
1da177e4
LT		 254{
255 int CommandAllocationLength, CommandAllocationGroupSize;
256 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
257 void *AllocationPointer = NULL;
258 void *ScatterGatherCPU = NULL;
259 dma_addr_t ScatterGatherDMA;
260 struct pci_pool *ScatterGatherPool;
261 void *RequestSenseCPU = NULL;
262 dma_addr_t RequestSenseDMA;
263 struct pci_pool *RequestSensePool = NULL;
264
265 if (Controller->FirmwareType == DAC960_V1_Controller)
266 {
267 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
268 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
269 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
270 Controller->PCIDevice,
271 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
272 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
273 if (ScatterGatherPool == NULL)
274 return DAC960_Failure(Controller,
275 "AUXILIARY STRUCTURE CREATION (SG)");
276 Controller->ScatterGatherPool = ScatterGatherPool;
277 }
278 else
279 {
280 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
281 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
282 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
283 Controller->PCIDevice,
284 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
285 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
286 if (ScatterGatherPool == NULL)
287 return DAC960_Failure(Controller,
288 "AUXILIARY STRUCTURE CREATION (SG)");
289 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
290 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
291 sizeof(int), 0);
292 if (RequestSensePool == NULL) {
293 pci_pool_destroy(ScatterGatherPool);
294 return DAC960_Failure(Controller,
295 "AUXILIARY STRUCTURE CREATION (SG)");
296 }
297 Controller->ScatterGatherPool = ScatterGatherPool;
298 Controller->V2.RequestSensePool = RequestSensePool;
299 }
300 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
301 Controller->FreeCommands = NULL;
302 for (CommandIdentifier = 1;
303 CommandIdentifier <= Controller->DriverQueueDepth;
304 CommandIdentifier++)
305 {
306 DAC960_Command_T *Command;
307 if (--CommandsRemaining <= 0)
308 {
309 CommandsRemaining =
310 Controller->DriverQueueDepth - CommandIdentifier + 1;
311 if (CommandsRemaining > CommandAllocationGroupSize)
312 CommandsRemaining = CommandAllocationGroupSize;
313 CommandGroupByteCount =
314 CommandsRemaining * CommandAllocationLength;
06ff37ff 315 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
1da177e4
LT		 316 if (AllocationPointer == NULL)
317 return DAC960_Failure(Controller,
318 "AUXILIARY STRUCTURE CREATION");
1da177e4
LT		 319 }
320 Command = (DAC960_Command_T *) AllocationPointer;
321 AllocationPointer += CommandAllocationLength;
322 Command->CommandIdentifier = CommandIdentifier;
323 Command->Controller = Controller;
324 Command->Next = Controller->FreeCommands;
325 Controller->FreeCommands = Command;
326 Controller->Commands[CommandIdentifier-1] = Command;
54e6ecb2 327 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
1da177e4
LT		 328 &ScatterGatherDMA);
329 if (ScatterGatherCPU == NULL)
330 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
331
332 if (RequestSensePool != NULL) {
54e6ecb2 333 RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
1da177e4
LT		 334 &RequestSenseDMA);
335 if (RequestSenseCPU == NULL) {
336 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
337 ScatterGatherDMA);
338 return DAC960_Failure(Controller,
339 "AUXILIARY STRUCTURE CREATION");
340 }
341 }
342 if (Controller->FirmwareType == DAC960_V1_Controller) {
343 Command->cmd_sglist = Command->V1.ScatterList;
344 Command->V1.ScatterGatherList =
345 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
346 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
347 } else {
348 Command->cmd_sglist = Command->V2.ScatterList;
349 Command->V2.ScatterGatherList =
350 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
351 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
352 Command->V2.RequestSense =
353 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
354 Command->V2.RequestSenseDMA = RequestSenseDMA;
355 }
356 }
357 return true;
358}
359
360
361/*
362 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
363 structures for Controller.
364*/
365
366static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
367{
368 int i;
369 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
370 struct pci_pool *RequestSensePool = NULL;
371 void *ScatterGatherCPU;
372 dma_addr_t ScatterGatherDMA;
373 void *RequestSenseCPU;
374 dma_addr_t RequestSenseDMA;
375 DAC960_Command_T *CommandGroup = NULL;
376
377
378 if (Controller->FirmwareType == DAC960_V2_Controller)
379 RequestSensePool = Controller->V2.RequestSensePool;
380
381 Controller->FreeCommands = NULL;
382 for (i = 0; i < Controller->DriverQueueDepth; i++)
383 {
384 DAC960_Command_T *Command = Controller->Commands[i];
385
386 if (Command == NULL)
387 continue;
388
389 if (Controller->FirmwareType == DAC960_V1_Controller) {
390 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
391 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
392 RequestSenseCPU = NULL;
393 RequestSenseDMA = (dma_addr_t)0;
394 } else {
395 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
396 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
397 RequestSenseCPU = (void *)Command->V2.RequestSense;
398 RequestSenseDMA = Command->V2.RequestSenseDMA;
399 }
400 if (ScatterGatherCPU != NULL)
401 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
402 if (RequestSenseCPU != NULL)
403 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
404
405 if ((Command->CommandIdentifier
406 % Controller->CommandAllocationGroupSize) == 1) {
407 /*
408 * We can't free the group of commands until all of the
409 * request sense and scatter gather dma structures are free.
410 * Remember the beginning of the group, but don't free it
411 * until we've reached the beginning of the next group.
412 */
6044ec88
JJ		 413 kfree(CommandGroup);
414 CommandGroup = Command;
1da177e4
LT		 415 }
416 Controller->Commands[i] = NULL;
417 }
6044ec88 418 kfree(CommandGroup);
1da177e4
LT		 419
420 if (Controller->CombinedStatusBuffer != NULL)
421 {
422 kfree(Controller->CombinedStatusBuffer);
423 Controller->CombinedStatusBuffer = NULL;
424 Controller->CurrentStatusBuffer = NULL;
425 }
426
427 if (ScatterGatherPool != NULL)
428 pci_pool_destroy(ScatterGatherPool);
6044ec88
JJ		 429 if (Controller->FirmwareType == DAC960_V1_Controller)
430 return;
1da177e4
LT		 431
432 if (RequestSensePool != NULL)
433 pci_pool_destroy(RequestSensePool);
434
6044ec88 435 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
1da177e4
LT		 436 kfree(Controller->V2.LogicalDeviceInformation[i]);
437 Controller->V2.LogicalDeviceInformation[i] = NULL;
6044ec88 438 }
1da177e4
LT		 439
440 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
441 {
6044ec88
JJ		 442 kfree(Controller->V2.PhysicalDeviceInformation[i]);
443 Controller->V2.PhysicalDeviceInformation[i] = NULL;
444 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
445 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
1da177e4
LT		 446 }
447}
448
449
450/*
451 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
452 Firmware Controllers.
453*/
454
455static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
456{
457 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
458 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
459 Command->V1.CommandStatus = 0;
460}
461
462
463/*
464 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
465 Firmware Controllers.
466*/
467
468static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
469{
470 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
471 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
472 Command->V2.CommandStatus = 0;
473}
474
475
476/*
477 DAC960_AllocateCommand allocates a Command structure from Controller's
478 free list. During driver initialization, a special initialization command
479 has been placed on the free list to guarantee that command allocation can
480 never fail.
481*/
482
483static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
484 *Controller)
485{
486 DAC960_Command_T *Command = Controller->FreeCommands;
487 if (Command == NULL) return NULL;
488 Controller->FreeCommands = Command->Next;
489 Command->Next = NULL;
490 return Command;
491}
492
493
494/*
495 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
496 free list.
497*/
498
499static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
500{
501 DAC960_Controller_T *Controller = Command->Controller;
502
503 Command->Request = NULL;
504 Command->Next = Controller->FreeCommands;
505 Controller->FreeCommands = Command;
506}
507
508
509/*
510 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
511*/
512
513static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
514{
515 spin_unlock_irq(&Controller->queue_lock);
516 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
517 spin_lock_irq(&Controller->queue_lock);
518}
519
5b76ffd5
CH		 520/*
521 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
522*/
523
524static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
525{
526 DAC960_Controller_T *Controller = Command->Controller;
527 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
528 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
529 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
530 Controller->V2.NextCommandMailbox;
531
532 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
533 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
534
535 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
536 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
537 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
538
539 Controller->V2.PreviousCommandMailbox2 =
540 Controller->V2.PreviousCommandMailbox1;
541 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
542
543 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
544 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
545
546 Controller->V2.NextCommandMailbox = NextCommandMailbox;
547}
1da177e4
LT		 548
549/*
550 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
551*/
552
553static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
554{
555 DAC960_Controller_T *Controller = Command->Controller;
556 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
557 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
558 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
559 Controller->V2.NextCommandMailbox;
560 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
561 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
562 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
563 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
564 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
565 Controller->V2.PreviousCommandMailbox2 =
566 Controller->V2.PreviousCommandMailbox1;
567 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
568 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
569 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
570 Controller->V2.NextCommandMailbox = NextCommandMailbox;
571}
572
573
574/*
575 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
576*/
577
578static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
579{
580 DAC960_Controller_T *Controller = Command->Controller;
581 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
582 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
583 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
584 Controller->V2.NextCommandMailbox;
585 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
586 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
587 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
588 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
589 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
590 Controller->V2.PreviousCommandMailbox2 =
591 Controller->V2.PreviousCommandMailbox1;
592 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
593 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
594 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
595 Controller->V2.NextCommandMailbox = NextCommandMailbox;
596}
597
598
599/*
600 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
601 Controllers with Dual Mode Firmware.
602*/
603
604static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
605{
606 DAC960_Controller_T *Controller = Command->Controller;
607 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
608 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
609 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
610 Controller->V1.NextCommandMailbox;
611 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
612 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
613 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
614 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
615 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
616 Controller->V1.PreviousCommandMailbox2 =
617 Controller->V1.PreviousCommandMailbox1;
618 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
619 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
620 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
621 Controller->V1.NextCommandMailbox = NextCommandMailbox;
622}
623
624
625/*
626 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
627 Controllers with Single Mode Firmware.
628*/
629
630static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
631{
632 DAC960_Controller_T *Controller = Command->Controller;
633 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
634 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
635 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
636 Controller->V1.NextCommandMailbox;
637 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
638 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
639 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
640 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
641 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
642 Controller->V1.PreviousCommandMailbox2 =
643 Controller->V1.PreviousCommandMailbox1;
644 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
645 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
646 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
647 Controller->V1.NextCommandMailbox = NextCommandMailbox;
648}
649
650
651/*
652 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
653 Controllers with Dual Mode Firmware.
654*/
655
656static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
657{
658 DAC960_Controller_T *Controller = Command->Controller;
659 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
660 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
661 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
662 Controller->V1.NextCommandMailbox;
663 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
664 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
665 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
666 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
667 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
668 Controller->V1.PreviousCommandMailbox2 =
669 Controller->V1.PreviousCommandMailbox1;
670 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
671 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
672 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
673 Controller->V1.NextCommandMailbox = NextCommandMailbox;
674}
675
676
677/*
678 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
679 Controllers with Single Mode Firmware.
680*/
681
682static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
683{
684 DAC960_Controller_T *Controller = Command->Controller;
685 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
686 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
687 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
688 Controller->V1.NextCommandMailbox;
689 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
690 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
691 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
692 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
693 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
694 Controller->V1.PreviousCommandMailbox2 =
695 Controller->V1.PreviousCommandMailbox1;
696 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
697 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
698 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
699 Controller->V1.NextCommandMailbox = NextCommandMailbox;
700}
701
702
703/*
704 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
705*/
706
707static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
708{
709 DAC960_Controller_T *Controller = Command->Controller;
710 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
711 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
712 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
713 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
714 udelay(1);
715 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
716 DAC960_PD_NewCommand(ControllerBaseAddress);
717}
718
719
720/*
721 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
722*/
723
724static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
725{
726 DAC960_Controller_T *Controller = Command->Controller;
727 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
728 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
729 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
730 switch (CommandMailbox->Common.CommandOpcode)
731 {
732 case DAC960_V1_Enquiry:
733 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
734 break;
735 case DAC960_V1_GetDeviceState:
736 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
737 break;
738 case DAC960_V1_Read:
739 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
740 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
741 break;
742 case DAC960_V1_Write:
743 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
744 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
745 break;
746 case DAC960_V1_ReadWithScatterGather:
747 CommandMailbox->Common.CommandOpcode =
748 DAC960_V1_ReadWithScatterGather_Old;
749 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
750 break;
751 case DAC960_V1_WriteWithScatterGather:
752 CommandMailbox->Common.CommandOpcode =
753 DAC960_V1_WriteWithScatterGather_Old;
754 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
755 break;
756 default:
757 break;
758 }
759 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
760 udelay(1);
761 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
762 DAC960_PD_NewCommand(ControllerBaseAddress);
763}
764
765
766/*
767 DAC960_ExecuteCommand executes Command and waits for completion.
768*/
769
770static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
771{
772 DAC960_Controller_T *Controller = Command->Controller;
6e9a4738 773 DECLARE_COMPLETION_ONSTACK(Completion);
1da177e4
LT		 774 unsigned long flags;
775 Command->Completion = &Completion;
776
777 spin_lock_irqsave(&Controller->queue_lock, flags);
778 DAC960_QueueCommand(Command);
779 spin_unlock_irqrestore(&Controller->queue_lock, flags);
780
781 if (in_interrupt())
782 return;
783 wait_for_completion(&Completion);
784}
785
786
787/*
788 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
789 Command and waits for completion. It returns true on success and false
790 on failure.
791*/
792
87d156bf 793static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
1da177e4
LT		 794 DAC960_V1_CommandOpcode_T CommandOpcode,
795 dma_addr_t DataDMA)
796{
797 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
798 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
799 DAC960_V1_CommandStatus_T CommandStatus;
800 DAC960_V1_ClearCommand(Command);
801 Command->CommandType = DAC960_ImmediateCommand;
802 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
803 CommandMailbox->Type3.BusAddress = DataDMA;
804 DAC960_ExecuteCommand(Command);
805 CommandStatus = Command->V1.CommandStatus;
806 DAC960_DeallocateCommand(Command);
807 return (CommandStatus == DAC960_V1_NormalCompletion);
808}
809
810
811/*
812 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
813 Command and waits for completion. It returns true on success and false
814 on failure.
815*/
816
87d156bf 817static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
1da177e4
LT		 818 DAC960_V1_CommandOpcode_T CommandOpcode,
819 unsigned char CommandOpcode2,
820 dma_addr_t DataDMA)
821{
822 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
823 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
824 DAC960_V1_CommandStatus_T CommandStatus;
825 DAC960_V1_ClearCommand(Command);
826 Command->CommandType = DAC960_ImmediateCommand;
827 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
828 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
829 CommandMailbox->Type3B.BusAddress = DataDMA;
830 DAC960_ExecuteCommand(Command);
831 CommandStatus = Command->V1.CommandStatus;
832 DAC960_DeallocateCommand(Command);
833 return (CommandStatus == DAC960_V1_NormalCompletion);
834}
835
836
837/*
838 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
839 Command and waits for completion. It returns true on success and false
840 on failure.
841*/
842
87d156bf 843static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
1da177e4
LT		 844 DAC960_V1_CommandOpcode_T CommandOpcode,
845 unsigned char Channel,
846 unsigned char TargetID,
847 dma_addr_t DataDMA)
848{
849 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
850 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
851 DAC960_V1_CommandStatus_T CommandStatus;
852 DAC960_V1_ClearCommand(Command);
853 Command->CommandType = DAC960_ImmediateCommand;
854 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
855 CommandMailbox->Type3D.Channel = Channel;
856 CommandMailbox->Type3D.TargetID = TargetID;
857 CommandMailbox->Type3D.BusAddress = DataDMA;
858 DAC960_ExecuteCommand(Command);
859 CommandStatus = Command->V1.CommandStatus;
860 DAC960_DeallocateCommand(Command);
861 return (CommandStatus == DAC960_V1_NormalCompletion);
862}
863
864
865/*
866 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
867 Reading IOCTL Command and waits for completion. It returns true on success
868 and false on failure.
869
870 Return data in The controller's HealthStatusBuffer, which is dma-able memory
871*/
872
87d156bf 873static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 874{
875 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
876 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
877 DAC960_V2_CommandStatus_T CommandStatus;
878 DAC960_V2_ClearCommand(Command);
879 Command->CommandType = DAC960_ImmediateCommand;
880 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
881 CommandMailbox->Common.CommandControlBits
882 .DataTransferControllerToHost = true;
883 CommandMailbox->Common.CommandControlBits
884 .NoAutoRequestSense = true;
885 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
886 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
887 CommandMailbox->Common.DataTransferMemoryAddress
888 .ScatterGatherSegments[0]
889 .SegmentDataPointer =
890 Controller->V2.HealthStatusBufferDMA;
891 CommandMailbox->Common.DataTransferMemoryAddress
892 .ScatterGatherSegments[0]
893 .SegmentByteCount =
894 CommandMailbox->Common.DataTransferSize;
895 DAC960_ExecuteCommand(Command);
896 CommandStatus = Command->V2.CommandStatus;
897 DAC960_DeallocateCommand(Command);
898 return (CommandStatus == DAC960_V2_NormalCompletion);
899}
900
901
902/*
903 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
904 Information Reading IOCTL Command and waits for completion. It returns
905 true on success and false on failure.
906
907 Data is returned in the controller's V2.NewControllerInformation dma-able
908 memory buffer.
909*/
910
87d156bf 911static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 912{
913 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
914 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
915 DAC960_V2_CommandStatus_T CommandStatus;
916 DAC960_V2_ClearCommand(Command);
917 Command->CommandType = DAC960_ImmediateCommand;
918 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
919 CommandMailbox->ControllerInfo.CommandControlBits
920 .DataTransferControllerToHost = true;
921 CommandMailbox->ControllerInfo.CommandControlBits
922 .NoAutoRequestSense = true;
923 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
924 CommandMailbox->ControllerInfo.ControllerNumber = 0;
925 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
926 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
927 .ScatterGatherSegments[0]
928 .SegmentDataPointer =
929 Controller->V2.NewControllerInformationDMA;
930 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
931 .ScatterGatherSegments[0]
932 .SegmentByteCount =
933 CommandMailbox->ControllerInfo.DataTransferSize;
934 DAC960_ExecuteCommand(Command);
935 CommandStatus = Command->V2.CommandStatus;
936 DAC960_DeallocateCommand(Command);
937 return (CommandStatus == DAC960_V2_NormalCompletion);
938}
939
940
941/*
942 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
943 Device Information Reading IOCTL Command and waits for completion. It
944 returns true on success and false on failure.
945
946 Data is returned in the controller's V2.NewLogicalDeviceInformation
947*/
948
87d156bf 949static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 950 unsigned short LogicalDeviceNumber)
951{
952 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
953 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
954 DAC960_V2_CommandStatus_T CommandStatus;
955
956 DAC960_V2_ClearCommand(Command);
957 Command->CommandType = DAC960_ImmediateCommand;
958 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
959 DAC960_V2_IOCTL;
960 CommandMailbox->LogicalDeviceInfo.CommandControlBits
961 .DataTransferControllerToHost = true;
962 CommandMailbox->LogicalDeviceInfo.CommandControlBits
963 .NoAutoRequestSense = true;
964 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
965 sizeof(DAC960_V2_LogicalDeviceInfo_T);
966 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
967 LogicalDeviceNumber;
968 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
969 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
970 .ScatterGatherSegments[0]
971 .SegmentDataPointer =
972 Controller->V2.NewLogicalDeviceInformationDMA;
973 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
974 .ScatterGatherSegments[0]
975 .SegmentByteCount =
976 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
977 DAC960_ExecuteCommand(Command);
978 CommandStatus = Command->V2.CommandStatus;
979 DAC960_DeallocateCommand(Command);
980 return (CommandStatus == DAC960_V2_NormalCompletion);
981}
982
983
984/*
985 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
986 Physical Device Information" IOCTL Command and waits for completion. It
987 returns true on success and false on failure.
988
989 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
990 this function is called for a given controller. This will return data
991 for the "first" device on that controller. The returned data includes a
992 Channel, TargetID, LogicalUnit that can be passed in to this routine to
993 get data for the NEXT device on that controller.
994
995 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
996 memory buffer.
997
998*/
999
87d156bf 1000static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 1001 unsigned char Channel,
1002 unsigned char TargetID,
1003 unsigned char LogicalUnit)
1004{
1005 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1006 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1007 DAC960_V2_CommandStatus_T CommandStatus;
1008
1009 DAC960_V2_ClearCommand(Command);
1010 Command->CommandType = DAC960_ImmediateCommand;
1011 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1012 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1013 .DataTransferControllerToHost = true;
1014 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1015 .NoAutoRequestSense = true;
1016 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1017 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1018 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1019 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1020 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1021 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1022 DAC960_V2_GetPhysicalDeviceInfoValid;
1023 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1024 .ScatterGatherSegments[0]
1025 .SegmentDataPointer =
1026 Controller->V2.NewPhysicalDeviceInformationDMA;
1027 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1028 .ScatterGatherSegments[0]
1029 .SegmentByteCount =
1030 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1031 DAC960_ExecuteCommand(Command);
1032 CommandStatus = Command->V2.CommandStatus;
1033 DAC960_DeallocateCommand(Command);
1034 return (CommandStatus == DAC960_V2_NormalCompletion);
1035}
1036
1037
1038static void DAC960_V2_ConstructNewUnitSerialNumber(
1039 DAC960_Controller_T *Controller,
1040 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1041 int LogicalUnit)
1042{
1043 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1044 CommandMailbox->SCSI_10.CommandControlBits
1045 .DataTransferControllerToHost = true;
1046 CommandMailbox->SCSI_10.CommandControlBits
1047 .NoAutoRequestSense = true;
1048 CommandMailbox->SCSI_10.DataTransferSize =
1049 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1050 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1051 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1052 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1053 CommandMailbox->SCSI_10.CDBLength = 6;
1054 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1055 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1056 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1057 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1058 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1059 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1060 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1061 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1062 .ScatterGatherSegments[0]
1063 .SegmentDataPointer =
1064 Controller->V2.NewInquiryUnitSerialNumberDMA;
1065 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1066 .ScatterGatherSegments[0]
1067 .SegmentByteCount =
1068 CommandMailbox->SCSI_10.DataTransferSize;
1069}
1070
1071
1072/*
1073 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1074 Inquiry command to a SCSI device identified by Channel number,
1075 Target id, Logical Unit Number. This function Waits for completion
1076 of the command.
1077
1078 The return data includes Unit Serial Number information for the
1079 specified device.
1080
1081 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1082 memory buffer.
1083*/
1084
87d156bf 1085static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1da177e4
LT		 1086 int Channel, int TargetID, int LogicalUnit)
1087{
1088 DAC960_Command_T *Command;
1089 DAC960_V2_CommandMailbox_T *CommandMailbox;
1090 DAC960_V2_CommandStatus_T CommandStatus;
1091
1092 Command = DAC960_AllocateCommand(Controller);
1093 CommandMailbox = &Command->V2.CommandMailbox;
1094 DAC960_V2_ClearCommand(Command);
1095 Command->CommandType = DAC960_ImmediateCommand;
1096
1097 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1098 Channel, TargetID, LogicalUnit);
1099
1100 DAC960_ExecuteCommand(Command);
1101 CommandStatus = Command->V2.CommandStatus;
1102 DAC960_DeallocateCommand(Command);
1103 return (CommandStatus == DAC960_V2_NormalCompletion);
1104}
1105
1106
1107/*
1108 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1109 Operation IOCTL Command and waits for completion. It returns true on
1110 success and false on failure.
1111*/
1112
87d156bf 1113static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1da177e4
LT		 1114 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1115 DAC960_V2_OperationDevice_T
1116 OperationDevice)
1117{
1118 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1119 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1120 DAC960_V2_CommandStatus_T CommandStatus;
1121 DAC960_V2_ClearCommand(Command);
1122 Command->CommandType = DAC960_ImmediateCommand;
1123 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1124 CommandMailbox->DeviceOperation.CommandControlBits
1125 .DataTransferControllerToHost = true;
1126 CommandMailbox->DeviceOperation.CommandControlBits
1127 .NoAutoRequestSense = true;
1128 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1129 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1130 DAC960_ExecuteCommand(Command);
1131 CommandStatus = Command->V2.CommandStatus;
1132 DAC960_DeallocateCommand(Command);
1133 return (CommandStatus == DAC960_V2_NormalCompletion);
1134}
1135
1136
1137/*
1138 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1139 for DAC960 V1 Firmware Controllers.
1140
1141 PD and P controller types have no memory mailbox, but still need the
1142 other dma mapped memory.
1143*/
1144
87d156bf 1145static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1146 *Controller)
1147{
1148 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1149 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1150 struct pci_dev *PCI_Device = Controller->PCIDevice;
1151 struct dma_loaf *DmaPages = &Controller->DmaPages;
1152 size_t DmaPagesSize;
1153 size_t CommandMailboxesSize;
1154 size_t StatusMailboxesSize;
1155
1156 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1157 dma_addr_t CommandMailboxesMemoryDMA;
1158
1159 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1160 dma_addr_t StatusMailboxesMemoryDMA;
1161
1162 DAC960_V1_CommandMailbox_T CommandMailbox;
1163 DAC960_V1_CommandStatus_T CommandStatus;
1164 int TimeoutCounter;
1165 int i;
1166
1167
1168 if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V1_PciDmaMask))
1169 return DAC960_Failure(Controller, "DMA mask out of range");
1170 Controller->BounceBufferLimit = DAC690_V1_PciDmaMask;
1171
1172 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1173 CommandMailboxesSize = 0;
1174 StatusMailboxesSize = 0;
1175 } else {
1176 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1177 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1178 }
1179 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1180 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1181 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1182 sizeof(DAC960_V1_RebuildProgress_T) +
1183 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1184 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1185 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1186 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1187
1188 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1189 return false;
1190
1191
1192 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1193 goto skip_mailboxes;
1194
1195 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1196 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1197
1198 /* These are the base addresses for the command memory mailbox array */
1199 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1200 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1201
1202 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1203 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1204 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1205 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1206 Controller->V1.PreviousCommandMailbox2 =
1207 Controller->V1.LastCommandMailbox - 1;
1208
1209 /* These are the base addresses for the status memory mailbox array */
1210 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1211 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1212
1213 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1214 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1215 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1216 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1217 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1218
1219skip_mailboxes:
1220 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1221 sizeof(DAC960_V1_DCDB_T),
1222 &Controller->V1.MonitoringDCDB_DMA);
1223
1224 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1225 sizeof(DAC960_V1_Enquiry_T),
1226 &Controller->V1.NewEnquiryDMA);
1227
1228 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1229 sizeof(DAC960_V1_ErrorTable_T),
1230 &Controller->V1.NewErrorTableDMA);
1231
1232 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1233 sizeof(DAC960_V1_EventLogEntry_T),
1234 &Controller->V1.EventLogEntryDMA);
1235
1236 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1237 sizeof(DAC960_V1_RebuildProgress_T),
1238 &Controller->V1.RebuildProgressDMA);
1239
1240 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1241 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1242 &Controller->V1.NewLogicalDriveInformationDMA);
1243
1244 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1245 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1246 &Controller->V1.BackgroundInitializationStatusDMA);
1247
1248 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1249 sizeof(DAC960_V1_DeviceState_T),
1250 &Controller->V1.NewDeviceStateDMA);
1251
1252 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1253 sizeof(DAC960_SCSI_Inquiry_T),
1254 &Controller->V1.NewInquiryStandardDataDMA);
1255
1256 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1257 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1258 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1259
1260 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1261 return true;
1262
1263 /* Enable the Memory Mailbox Interface. */
1264 Controller->V1.DualModeMemoryMailboxInterface = true;
1265 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1266 CommandMailbox.TypeX.CommandIdentifier = 0;
1267 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1268 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1269 Controller->V1.FirstCommandMailboxDMA;
1270 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1271 Controller->V1.FirstStatusMailboxDMA;
1272#define TIMEOUT_COUNT 1000000
1273
1274 for (i = 0; i < 2; i++)
1275 switch (Controller->HardwareType)
1276 {
1277 case DAC960_LA_Controller:
1278 TimeoutCounter = TIMEOUT_COUNT;
1279 while (--TimeoutCounter >= 0)
1280 {
1281 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1282 break;
1283 udelay(10);
1284 }
1285 if (TimeoutCounter < 0) return false;
1286 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1287 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1288 TimeoutCounter = TIMEOUT_COUNT;
1289 while (--TimeoutCounter >= 0)
1290 {
1291 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1292 ControllerBaseAddress))
1293 break;
1294 udelay(10);
1295 }
1296 if (TimeoutCounter < 0) return false;
1297 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1298 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1299 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1300 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1301 Controller->V1.DualModeMemoryMailboxInterface = false;
1302 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1303 break;
1304 case DAC960_PG_Controller:
1305 TimeoutCounter = TIMEOUT_COUNT;
1306 while (--TimeoutCounter >= 0)
1307 {
1308 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1309 break;
1310 udelay(10);
1311 }
1312 if (TimeoutCounter < 0) return false;
1313 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1314 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1315
1316 TimeoutCounter = TIMEOUT_COUNT;
1317 while (--TimeoutCounter >= 0)
1318 {
1319 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1320 ControllerBaseAddress))
1321 break;
1322 udelay(10);
1323 }
1324 if (TimeoutCounter < 0) return false;
1325 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1326 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1327 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1328 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1329 Controller->V1.DualModeMemoryMailboxInterface = false;
1330 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1331 break;
1332 default:
1333 DAC960_Failure(Controller, "Unknown Controller Type\n");
1334 break;
1335 }
1336 return false;
1337}
1338
1339
1340/*
1341 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1342 for DAC960 V2 Firmware Controllers.
1343
1344 Aggregate the space needed for the controller's memory mailbox and
1345 the other data structures that will be targets of dma transfers with
1346 the controller. Allocate a dma-mapped region of memory to hold these
1347 structures. Then, save CPU pointers and dma_addr_t values to reference
1348 the structures that are contained in that region.
1349*/
1350
87d156bf 1351static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1352 *Controller)
1353{
1354 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1355 struct pci_dev *PCI_Device = Controller->PCIDevice;
1356 struct dma_loaf *DmaPages = &Controller->DmaPages;
1357 size_t DmaPagesSize;
1358 size_t CommandMailboxesSize;
1359 size_t StatusMailboxesSize;
1360
1361 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1362 dma_addr_t CommandMailboxesMemoryDMA;
1363
1364 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1365 dma_addr_t StatusMailboxesMemoryDMA;
1366
1367 DAC960_V2_CommandMailbox_T *CommandMailbox;
1368 dma_addr_t CommandMailboxDMA;
1369 DAC960_V2_CommandStatus_T CommandStatus;
1370
1371 if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V2_PciDmaMask))
1372 return DAC960_Failure(Controller, "DMA mask out of range");
1373 Controller->BounceBufferLimit = DAC690_V2_PciDmaMask;
1374
1375 /* This is a temporary dma mapping, used only in the scope of this function */
0a361e31 1376 CommandMailbox = pci_alloc_consistent(PCI_Device,
1da177e4
LT		 1377 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1378 if (CommandMailbox == NULL)
1379 return false;
1380
1381 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1382 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1383 DmaPagesSize =
1384 CommandMailboxesSize + StatusMailboxesSize +
1385 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1386 sizeof(DAC960_V2_ControllerInfo_T) +
1387 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1388 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1389 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1390 sizeof(DAC960_V2_Event_T) +
1391 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1392
1393 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1394 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1395 CommandMailbox, CommandMailboxDMA);
1396 return false;
1397 }
1398
1399 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1400 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1401
1402 /* These are the base addresses for the command memory mailbox array */
1403 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1404 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1405
1406 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1407 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1408 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1409 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1410 Controller->V2.PreviousCommandMailbox2 =
1411 Controller->V2.LastCommandMailbox - 1;
1412
1413 /* These are the base addresses for the status memory mailbox array */
1414 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1415 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1416
1417 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1418 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1419 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1420 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1421 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1422
1423 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1424 sizeof(DAC960_V2_HealthStatusBuffer_T),
1425 &Controller->V2.HealthStatusBufferDMA);
1426
1427 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1428 sizeof(DAC960_V2_ControllerInfo_T),
1429 &Controller->V2.NewControllerInformationDMA);
1430
1431 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1432 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1433 &Controller->V2.NewLogicalDeviceInformationDMA);
1434
1435 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1436 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1437 &Controller->V2.NewPhysicalDeviceInformationDMA);
1438
1439 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1440 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1441 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1442
1443 Controller->V2.Event = slice_dma_loaf(DmaPages,
1444 sizeof(DAC960_V2_Event_T),
1445 &Controller->V2.EventDMA);
1446
1447 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1448 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1449 &Controller->V2.PhysicalToLogicalDeviceDMA);
1450
1451 /*
1452 Enable the Memory Mailbox Interface.
1453
1454 I don't know why we can't just use one of the memory mailboxes
1455 we just allocated to do this, instead of using this temporary one.
1456 Try this change later.
1457 */
1458 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1459 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1460 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1461 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1462 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1463 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1464 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1465 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1466 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1467 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1468 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1469 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1470 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1471 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1472 Controller->V2.HealthStatusBufferDMA;
1473 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1474 Controller->V2.FirstCommandMailboxDMA;
1475 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1476 Controller->V2.FirstStatusMailboxDMA;
1477 switch (Controller->HardwareType)
1478 {
5b76ffd5
CH		 1479 case DAC960_GEM_Controller:
1480 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1481 udelay(1);
1482 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1483 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1484 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1485 udelay(1);
1486 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1487 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1488 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1489 break;
1da177e4
LT		 1490 case DAC960_BA_Controller:
1491 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1492 udelay(1);
1493 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1494 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1495 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1496 udelay(1);
1497 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1498 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1499 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1500 break;
1501 case DAC960_LP_Controller:
1502 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1503 udelay(1);
1504 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1505 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1506 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1507 udelay(1);
1508 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1509 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1510 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1511 break;
1512 default:
1513 DAC960_Failure(Controller, "Unknown Controller Type\n");
1514 CommandStatus = DAC960_V2_AbormalCompletion;
1515 break;
1516 }
1517 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1518 CommandMailbox, CommandMailboxDMA);
1519 return (CommandStatus == DAC960_V2_NormalCompletion);
1520}
1521
1522
1523/*
1524 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1525 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1526*/
1527
87d156bf 1528static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1529 *Controller)
1530{
1531 DAC960_V1_Enquiry2_T *Enquiry2;
1532 dma_addr_t Enquiry2DMA;
1533 DAC960_V1_Config2_T *Config2;
1534 dma_addr_t Config2DMA;
1535 int LogicalDriveNumber, Channel, TargetID;
1536 struct dma_loaf local_dma;
1537
1538 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1539 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1540 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1541
1542 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1543 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1544
1545 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1546 Controller->V1.NewEnquiryDMA)) {
1547 free_dma_loaf(Controller->PCIDevice, &local_dma);
1548 return DAC960_Failure(Controller, "ENQUIRY");
1549 }
1550 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1551 sizeof(DAC960_V1_Enquiry_T));
1552
1553 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1554 free_dma_loaf(Controller->PCIDevice, &local_dma);
1555 return DAC960_Failure(Controller, "ENQUIRY2");
1556 }
1557
1558 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1559 free_dma_loaf(Controller->PCIDevice, &local_dma);
1560 return DAC960_Failure(Controller, "READ CONFIG2");
1561 }
1562
1563 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1564 Controller->V1.NewLogicalDriveInformationDMA)) {
1565 free_dma_loaf(Controller->PCIDevice, &local_dma);
1566 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1567 }
1568 memcpy(&Controller->V1.LogicalDriveInformation,
1569 Controller->V1.NewLogicalDriveInformation,
1570 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1571
1572 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1573 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1574 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1575 Channel, TargetID,
1576 Controller->V1.NewDeviceStateDMA)) {
1577 free_dma_loaf(Controller->PCIDevice, &local_dma);
1578 return DAC960_Failure(Controller, "GET DEVICE STATE");
1579 }
1580 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1581 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1582 }
1583 /*
1584 Initialize the Controller Model Name and Full Model Name fields.
1585 */
1586 switch (Enquiry2->HardwareID.SubModel)
1587 {
1588 case DAC960_V1_P_PD_PU:
1589 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1590 strcpy(Controller->ModelName, "DAC960PU");
1591 else strcpy(Controller->ModelName, "DAC960PD");
1592 break;
1593 case DAC960_V1_PL:
1594 strcpy(Controller->ModelName, "DAC960PL");
1595 break;
1596 case DAC960_V1_PG:
1597 strcpy(Controller->ModelName, "DAC960PG");
1598 break;
1599 case DAC960_V1_PJ:
1600 strcpy(Controller->ModelName, "DAC960PJ");
1601 break;
1602 case DAC960_V1_PR:
1603 strcpy(Controller->ModelName, "DAC960PR");
1604 break;
1605 case DAC960_V1_PT:
1606 strcpy(Controller->ModelName, "DAC960PT");
1607 break;
1608 case DAC960_V1_PTL0:
1609 strcpy(Controller->ModelName, "DAC960PTL0");
1610 break;
1611 case DAC960_V1_PRL:
1612 strcpy(Controller->ModelName, "DAC960PRL");
1613 break;
1614 case DAC960_V1_PTL1:
1615 strcpy(Controller->ModelName, "DAC960PTL1");
1616 break;
1617 case DAC960_V1_1164P:
1618 strcpy(Controller->ModelName, "DAC1164P");
1619 break;
1620 default:
1621 free_dma_loaf(Controller->PCIDevice, &local_dma);
1622 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1623 }
1624 strcpy(Controller->FullModelName, "Mylex ");
1625 strcat(Controller->FullModelName, Controller->ModelName);
1626 /*
1627 Initialize the Controller Firmware Version field and verify that it
1628 is a supported firmware version. The supported firmware versions are:
1629
1630 DAC1164P 5.06 and above
1631 DAC960PTL/PRL/PJ/PG 4.06 and above
1632 DAC960PU/PD/PL 3.51 and above
1633 DAC960PU/PD/PL/P 2.73 and above
1634 */
1635#if defined(CONFIG_ALPHA)
1636 /*
1637 DEC Alpha machines were often equipped with DAC960 cards that were
1638 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1639 the last custom FW revision to be released by DEC for these older
1640 controllers, appears to work quite well with this driver.
1641
1642 Cards tested successfully were several versions each of the PD and
1643 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1644 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1645 back of the board, of:
1646
1647 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1648 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1649 */
1650# define FIRMWARE_27X "2.70"
1651#else
1652# define FIRMWARE_27X "2.73"
1653#endif
1654
1655 if (Enquiry2->FirmwareID.MajorVersion == 0)
1656 {
1657 Enquiry2->FirmwareID.MajorVersion =
1658 Controller->V1.Enquiry.MajorFirmwareVersion;
1659 Enquiry2->FirmwareID.MinorVersion =
1660 Controller->V1.Enquiry.MinorFirmwareVersion;
1661 Enquiry2->FirmwareID.FirmwareType = '0';
1662 Enquiry2->FirmwareID.TurnID = 0;
1663 }
1664 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1665 Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1666 Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1667 if (!((Controller->FirmwareVersion[0] == '5' &&
1668 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1669 (Controller->FirmwareVersion[0] == '4' &&
1670 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1671 (Controller->FirmwareVersion[0] == '3' &&
1672 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1673 (Controller->FirmwareVersion[0] == '2' &&
1674 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1675 {
1676 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1677 DAC960_Error("Firmware Version = '%s'\n", Controller,
1678 Controller->FirmwareVersion);
1679 free_dma_loaf(Controller->PCIDevice, &local_dma);
1680 return false;
1681 }
1682 /*
1683 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1684 Enclosure Management Enabled fields.
1685 */
1686 Controller->Channels = Enquiry2->ActualChannels;
1687 Controller->Targets = Enquiry2->MaxTargets;
1688 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1689 Controller->V1.SAFTE_EnclosureManagementEnabled =
1690 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1691 /*
1692 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1693 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1694 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1695 less than the Controller Queue Depth to allow for an automatic drive
1696 rebuild operation.
1697 */
1698 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1699 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1700 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1701 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1702 Controller->LogicalDriveCount =
1703 Controller->V1.Enquiry.NumberOfLogicalDrives;
1704 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1705 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1706 Controller->DriverScatterGatherLimit =
1707 Controller->ControllerScatterGatherLimit;
1708 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1709 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1710 /*
1711 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1712 */
1713 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1714 >> (10 - DAC960_BlockSizeBits);
1715 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1716 >> (10 - DAC960_BlockSizeBits);
1717 switch (Config2->DriveGeometry)
1718 {
1719 case DAC960_V1_Geometry_128_32:
1720 Controller->V1.GeometryTranslationHeads = 128;
1721 Controller->V1.GeometryTranslationSectors = 32;
1722 break;
1723 case DAC960_V1_Geometry_255_63:
1724 Controller->V1.GeometryTranslationHeads = 255;
1725 Controller->V1.GeometryTranslationSectors = 63;
1726 break;
1727 default:
1728 free_dma_loaf(Controller->PCIDevice, &local_dma);
1729 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1730 }
1731 /*
1732 Initialize the Background Initialization Status.
1733 */
1734 if ((Controller->FirmwareVersion[0] == '4' &&
1735 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1736 (Controller->FirmwareVersion[0] == '5' &&
1737 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1738 {
1739 Controller->V1.BackgroundInitializationStatusSupported = true;
1740 DAC960_V1_ExecuteType3B(Controller,
1741 DAC960_V1_BackgroundInitializationControl, 0x20,
1742 Controller->
1743 V1.BackgroundInitializationStatusDMA);
1744 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1745 Controller->V1.BackgroundInitializationStatus,
1746 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1747 }
1748 /*
1749 Initialize the Logical Drive Initially Accessible flag.
1750 */
1751 for (LogicalDriveNumber = 0;
1752 LogicalDriveNumber < Controller->LogicalDriveCount;
1753 LogicalDriveNumber++)
1754 if (Controller->V1.LogicalDriveInformation
1755 [LogicalDriveNumber].LogicalDriveState !=
1756 DAC960_V1_LogicalDrive_Offline)
1757 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1758 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1759 free_dma_loaf(Controller->PCIDevice, &local_dma);
1760 return true;
1761}
1762
1763
1764/*
1765 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1766 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1767*/
1768
87d156bf 1769static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1770 *Controller)
1771{
1772 DAC960_V2_ControllerInfo_T *ControllerInfo =
1773 &Controller->V2.ControllerInformation;
1774 unsigned short LogicalDeviceNumber = 0;
1775 int ModelNameLength;
1776
1777 /* Get data into dma-able area, then copy into permanant location */
1778 if (!DAC960_V2_NewControllerInfo(Controller))
1779 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1780 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1781 sizeof(DAC960_V2_ControllerInfo_T));
1782
1783
1784 if (!DAC960_V2_GeneralInfo(Controller))
1785 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1786
1787 /*
1788 Initialize the Controller Model Name and Full Model Name fields.
1789 */
1790 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1791 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1792 ModelNameLength = sizeof(Controller->ModelName)-1;
1793 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1794 ModelNameLength);
1795 ModelNameLength--;
1796 while (Controller->ModelName[ModelNameLength] == ' ' ||
1797 Controller->ModelName[ModelNameLength] == '\0')
1798 ModelNameLength--;
1799 Controller->ModelName[++ModelNameLength] = '\0';
1800 strcpy(Controller->FullModelName, "Mylex ");
1801 strcat(Controller->FullModelName, Controller->ModelName);
1802 /*
1803 Initialize the Controller Firmware Version field.
1804 */
1805 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1806 ControllerInfo->FirmwareMajorVersion,
1807 ControllerInfo->FirmwareMinorVersion,
1808 ControllerInfo->FirmwareTurnNumber);
1809 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1810 ControllerInfo->FirmwareMinorVersion == 0 &&
1811 ControllerInfo->FirmwareTurnNumber < 1)
1812 {
1813 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1814 Controller, Controller->FirmwareVersion);
1815 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1816 Controller);
1817 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1818 Controller);
1819 }
1820 /*
1821 Initialize the Controller Channels, Targets, and Memory Size.
1822 */
1823 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1824 Controller->Targets =
1825 ControllerInfo->MaximumTargetsPerChannel
1826 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1827 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1828 /*
1829 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1830 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1831 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1832 less than the Controller Queue Depth to allow for an automatic drive
1833 rebuild operation.
1834 */
1835 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1836 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1837 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1838 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1839 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1840 Controller->MaxBlocksPerCommand =
1841 ControllerInfo->MaximumDataTransferSizeInBlocks;
1842 Controller->ControllerScatterGatherLimit =
1843 ControllerInfo->MaximumScatterGatherEntries;
1844 Controller->DriverScatterGatherLimit =
1845 Controller->ControllerScatterGatherLimit;
1846 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1847 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1848 /*
1849 Initialize the Logical Device Information.
1850 */
1851 while (true)
1852 {
1853 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1854 Controller->V2.NewLogicalDeviceInformation;
1855 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1856 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1857
1858 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1859 break;
1860 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1861 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1862 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1863 Controller, LogicalDeviceNumber);
1864 break;
1865 }
1866 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1867 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1868 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1869 LogicalDeviceNumber++;
1870 continue;
1871 }
1872 PhysicalDevice.Controller = 0;
1873 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1874 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1875 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1876 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1877 PhysicalDevice;
1878 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1879 DAC960_V2_LogicalDevice_Offline)
1880 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
0a361e31
AD		 1881 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1882 GFP_ATOMIC);
1da177e4
LT		 1883 if (LogicalDeviceInfo == NULL)
1884 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1885 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1886 LogicalDeviceInfo;
1887 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1888 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1889 LogicalDeviceNumber++;
1890 }
1891 return true;
1892}
1893
1894
1895/*
1896 DAC960_ReportControllerConfiguration reports the Configuration Information
1897 for Controller.
1898*/
1899
87d156bf 1900static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1901 *Controller)
1902{
1903 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1904 Controller, Controller->ModelName);
1905 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1906 Controller, Controller->FirmwareVersion,
1907 Controller->Channels, Controller->MemorySize);
1908 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1909 Controller, Controller->Bus,
1910 Controller->Device, Controller->Function);
1911 if (Controller->IO_Address == 0)
1912 DAC960_Info("Unassigned\n", Controller);
1913 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1914 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1915 Controller, Controller->PCI_Address,
1916 (unsigned long) Controller->BaseAddress,
1917 Controller->IRQ_Channel);
1918 DAC960_Info(" Controller Queue Depth: %d, "
1919 "Maximum Blocks per Command: %d\n",
1920 Controller, Controller->ControllerQueueDepth,
1921 Controller->MaxBlocksPerCommand);
1922 DAC960_Info(" Driver Queue Depth: %d, "
1923 "Scatter/Gather Limit: %d of %d Segments\n",
1924 Controller, Controller->DriverQueueDepth,
1925 Controller->DriverScatterGatherLimit,
1926 Controller->ControllerScatterGatherLimit);
1927 if (Controller->FirmwareType == DAC960_V1_Controller)
1928 {
1929 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1930 "BIOS Geometry: %d/%d\n", Controller,
1931 Controller->V1.StripeSize,
1932 Controller->V1.SegmentSize,
1933 Controller->V1.GeometryTranslationHeads,
1934 Controller->V1.GeometryTranslationSectors);
1935 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1936 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1937 }
1938 return true;
1939}
1940
1941
1942/*
1943 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1944 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1945 Inquiry Unit Serial Number information for each device connected to
1946 Controller.
1947*/
1948
87d156bf 1949static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 1950 *Controller)
1951{
1952 struct dma_loaf local_dma;
1953
1954 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1955 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1956
1957 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1958 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1959
1960 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1961 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1962
1963 struct completion Completions[DAC960_V1_MaxChannels];
1964 unsigned long flags;
1965 int Channel, TargetID;
1966
1967 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1968 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1969 sizeof(DAC960_SCSI_Inquiry_T) +
1970 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1971 return DAC960_Failure(Controller,
1972 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1973
1974 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1975 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1976 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1977 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1978 sizeof(DAC960_SCSI_Inquiry_T),
1979 SCSI_Inquiry_dma + Channel);
1980 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1981 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1982 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1983 }
1984
1985 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1986 {
1987 /*
1988 * For each channel, submit a probe for a device on that channel.
1989 * The timeout interval for a device that is present is 10 seconds.
1990 * With this approach, the timeout periods can elapse in parallel
1991 * on each channel.
1992 */
1993 for (Channel = 0; Channel < Controller->Channels; Channel++)
1994 {
1995 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
1996 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
1997 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
1998 DAC960_Command_T *Command = Controller->Commands[Channel];
1999 struct completion *Completion = &Completions[Channel];
2000
2001 init_completion(Completion);
2002 DAC960_V1_ClearCommand(Command);
2003 Command->CommandType = DAC960_ImmediateCommand;
2004 Command->Completion = Completion;
2005 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2006 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2007 DCDB->Channel = Channel;
2008 DCDB->TargetID = TargetID;
2009 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2010 DCDB->EarlyStatus = false;
2011 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2012 DCDB->NoAutomaticRequestSense = false;
2013 DCDB->DisconnectPermitted = true;
2014 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2015 DCDB->BusAddress = NewInquiryStandardDataDMA;
2016 DCDB->CDBLength = 6;
2017 DCDB->TransferLengthHigh4 = 0;
2018 DCDB->SenseLength = sizeof(DCDB->SenseData);
2019 DCDB->CDB[0] = 0x12; /* INQUIRY */
2020 DCDB->CDB[1] = 0; /* EVPD = 0 */
2021 DCDB->CDB[2] = 0; /* Page Code */
2022 DCDB->CDB[3] = 0; /* Reserved */
2023 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2024 DCDB->CDB[5] = 0; /* Control */
2025
2026 spin_lock_irqsave(&Controller->queue_lock, flags);
2027 DAC960_QueueCommand(Command);
2028 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2029 }
2030 /*
2031 * Wait for the problems submitted in the previous loop
2032 * to complete. On the probes that are successful,
2033 * get the serial number of the device that was found.
2034 */
2035 for (Channel = 0; Channel < Controller->Channels; Channel++)
2036 {
2037 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2038 &Controller->V1.InquiryStandardData[Channel][TargetID];
2039 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2040 dma_addr_t NewInquiryUnitSerialNumberDMA =
2041 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2042 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2043 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2044 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2045 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2046 DAC960_Command_T *Command = Controller->Commands[Channel];
2047 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2048 struct completion *Completion = &Completions[Channel];
2049
2050 wait_for_completion(Completion);
2051
2052 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2053 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2054 InquiryStandardData->PeripheralDeviceType = 0x1F;
2055 continue;
2056 } else
2057 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2058
2059 /* Preserve Channel and TargetID values from the previous loop */
2060 Command->Completion = Completion;
2061 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2062 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2063 DCDB->SenseLength = sizeof(DCDB->SenseData);
2064 DCDB->CDB[0] = 0x12; /* INQUIRY */
2065 DCDB->CDB[1] = 1; /* EVPD = 1 */
2066 DCDB->CDB[2] = 0x80; /* Page Code */
2067 DCDB->CDB[3] = 0; /* Reserved */
2068 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2069 DCDB->CDB[5] = 0; /* Control */
2070
2071 spin_lock_irqsave(&Controller->queue_lock, flags);
2072 DAC960_QueueCommand(Command);
2073 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2074 wait_for_completion(Completion);
2075
2076 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2077 memset(InquiryUnitSerialNumber, 0,
2078 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2079 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2080 } else
2081 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2082 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2083 }
2084 }
2085 free_dma_loaf(Controller->PCIDevice, &local_dma);
2086 return true;
2087}
2088
2089
2090/*
2091 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2092 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2093 Information and SCSI Inquiry Unit Serial Number information for each
2094 device connected to Controller.
2095*/
2096
87d156bf 2097static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2098 *Controller)
2099{
2100 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2101 unsigned short PhysicalDeviceIndex = 0;
2102
2103 while (true)
2104 {
2105 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2106 Controller->V2.NewPhysicalDeviceInformation;
2107 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2108 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2109 Controller->V2.NewInquiryUnitSerialNumber;
2110 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2111
2112 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2113 break;
2114
0a361e31
AD		 2115 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2116 GFP_ATOMIC);
1da177e4
LT		 2117 if (PhysicalDeviceInfo == NULL)
2118 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2119 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2120 PhysicalDeviceInfo;
2121 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2122 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2123
0a361e31
AD		 2124 InquiryUnitSerialNumber = kmalloc(
2125 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
1da177e4
LT		 2126 if (InquiryUnitSerialNumber == NULL) {
2127 kfree(PhysicalDeviceInfo);
2128 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2129 }
2130 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2131 InquiryUnitSerialNumber;
2132
2133 Channel = NewPhysicalDeviceInfo->Channel;
2134 TargetID = NewPhysicalDeviceInfo->TargetID;
2135 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2136
2137 /*
2138 Some devices do NOT have Unit Serial Numbers.
2139 This command fails for them. But, we still want to
2140 remember those devices are there. Construct a
2141 UnitSerialNumber structure for the failure case.
2142 */
2143 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2144 memset(InquiryUnitSerialNumber, 0,
2145 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2146 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2147 } else
2148 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2149 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2150
2151 PhysicalDeviceIndex++;
2152 LogicalUnit++;
2153 }
2154 return true;
2155}
2156
2157
2158/*
2159 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2160 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2161 Unit Serial Number structures.
2162*/
2163
2164static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2165 *InquiryStandardData,
2166 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2167 *InquiryUnitSerialNumber,
2168 unsigned char *Vendor,
2169 unsigned char *Model,
2170 unsigned char *Revision,
2171 unsigned char *SerialNumber)
2172{
2173 int SerialNumberLength, i;
2174 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2175 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2176 {
2177 unsigned char VendorCharacter =
2178 InquiryStandardData->VendorIdentification[i];
2179 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2180 ? VendorCharacter : ' ');
2181 }
2182 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2183 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2184 {
2185 unsigned char ModelCharacter =
2186 InquiryStandardData->ProductIdentification[i];
2187 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2188 ? ModelCharacter : ' ');
2189 }
2190 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2191 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2192 {
2193 unsigned char RevisionCharacter =
2194 InquiryStandardData->ProductRevisionLevel[i];
2195 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2196 ? RevisionCharacter : ' ');
2197 }
2198 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2199 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2200 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2201 if (SerialNumberLength >
2202 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2203 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2204 for (i = 0; i < SerialNumberLength; i++)
2205 {
2206 unsigned char SerialNumberCharacter =
2207 InquiryUnitSerialNumber->ProductSerialNumber[i];
2208 SerialNumber[i] =
2209 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2210 ? SerialNumberCharacter : ' ');
2211 }
2212 SerialNumber[SerialNumberLength] = '\0';
2213}
2214
2215
2216/*
2217 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2218 Information for DAC960 V1 Firmware Controllers.
2219*/
2220
87d156bf 2221static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2222 *Controller)
2223{
2224 int LogicalDriveNumber, Channel, TargetID;
2225 DAC960_Info(" Physical Devices:\n", Controller);
2226 for (Channel = 0; Channel < Controller->Channels; Channel++)
2227 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2228 {
2229 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2230 &Controller->V1.InquiryStandardData[Channel][TargetID];
2231 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2232 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2233 DAC960_V1_DeviceState_T *DeviceState =
2234 &Controller->V1.DeviceState[Channel][TargetID];
2235 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2236 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2237 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2238 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2239 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2240 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2241 ->ProductSerialNumber)];
2242 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2243 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2244 Vendor, Model, Revision, SerialNumber);
2245 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2246 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2247 Vendor, Model, Revision);
2248 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2249 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2250 if (DeviceState->Present &&
2251 DeviceState->DeviceType == DAC960_V1_DiskType)
2252 {
2253 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2254 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2255 Controller,
2256 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2257 ? "Dead"
2258 : DeviceState->DeviceState
2259 == DAC960_V1_Device_WriteOnly
2260 ? "Write-Only"
2261 : DeviceState->DeviceState
2262 == DAC960_V1_Device_Online
2263 ? "Online" : "Standby"),
2264 DeviceState->DiskSize,
2265 Controller->V1.DeviceResetCount[Channel][TargetID]);
2266 else
2267 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2268 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2269 ? "Dead"
2270 : DeviceState->DeviceState
2271 == DAC960_V1_Device_WriteOnly
2272 ? "Write-Only"
2273 : DeviceState->DeviceState
2274 == DAC960_V1_Device_Online
2275 ? "Online" : "Standby"),
2276 DeviceState->DiskSize);
2277 }
2278 if (ErrorEntry->ParityErrorCount > 0 ||
2279 ErrorEntry->SoftErrorCount > 0 ||
2280 ErrorEntry->HardErrorCount > 0 ||
2281 ErrorEntry->MiscErrorCount > 0)
2282 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2283 "Hard: %d, Misc: %d\n", Controller,
2284 ErrorEntry->ParityErrorCount,
2285 ErrorEntry->SoftErrorCount,
2286 ErrorEntry->HardErrorCount,
2287 ErrorEntry->MiscErrorCount);
2288 }
2289 DAC960_Info(" Logical Drives:\n", Controller);
2290 for (LogicalDriveNumber = 0;
2291 LogicalDriveNumber < Controller->LogicalDriveCount;
2292 LogicalDriveNumber++)
2293 {
2294 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2295 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2296 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2297 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2298 LogicalDriveInformation->RAIDLevel,
2299 (LogicalDriveInformation->LogicalDriveState
2300 == DAC960_V1_LogicalDrive_Online
2301 ? "Online"
2302 : LogicalDriveInformation->LogicalDriveState
2303 == DAC960_V1_LogicalDrive_Critical
2304 ? "Critical" : "Offline"),
2305 LogicalDriveInformation->LogicalDriveSize,
2306 (LogicalDriveInformation->WriteBack
2307 ? "Write Back" : "Write Thru"));
2308 }
2309 return true;
2310}
2311
2312
2313/*
2314 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2315 Information for DAC960 V2 Firmware Controllers.
2316*/
2317
87d156bf 2318static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2319 *Controller)
2320{
2321 int PhysicalDeviceIndex, LogicalDriveNumber;
2322 DAC960_Info(" Physical Devices:\n", Controller);
2323 for (PhysicalDeviceIndex = 0;
2324 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2325 PhysicalDeviceIndex++)
2326 {
2327 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2328 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2329 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2330 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2331 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2332 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2333 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2334 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2335 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2336 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2337 if (PhysicalDeviceInfo == NULL) break;
2338 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2339 Vendor, Model, Revision, SerialNumber);
2340 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2341 Controller,
2342 PhysicalDeviceInfo->Channel,
2343 PhysicalDeviceInfo->TargetID,
2344 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2345 Vendor, Model, Revision);
2346 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2347 DAC960_Info(" %sAsynchronous\n", Controller,
2348 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2349 ? "Wide " :""));
2350 else
2351 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2352 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2353 ? "Wide " :""),
2354 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2355 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2356 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2357 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2358 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2359 DAC960_V2_Device_Unconfigured)
2360 continue;
2361 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2362 (PhysicalDeviceInfo->PhysicalDeviceState
2363 == DAC960_V2_Device_Online
2364 ? "Online"
2365 : PhysicalDeviceInfo->PhysicalDeviceState
2366 == DAC960_V2_Device_Rebuild
2367 ? "Rebuild"
2368 : PhysicalDeviceInfo->PhysicalDeviceState
2369 == DAC960_V2_Device_Missing
2370 ? "Missing"
2371 : PhysicalDeviceInfo->PhysicalDeviceState
2372 == DAC960_V2_Device_Critical
2373 ? "Critical"
2374 : PhysicalDeviceInfo->PhysicalDeviceState
2375 == DAC960_V2_Device_Dead
2376 ? "Dead"
2377 : PhysicalDeviceInfo->PhysicalDeviceState
2378 == DAC960_V2_Device_SuspectedDead
2379 ? "Suspected-Dead"
2380 : PhysicalDeviceInfo->PhysicalDeviceState
2381 == DAC960_V2_Device_CommandedOffline
2382 ? "Commanded-Offline"
2383 : PhysicalDeviceInfo->PhysicalDeviceState
2384 == DAC960_V2_Device_Standby
2385 ? "Standby" : "Unknown"),
2386 PhysicalDeviceInfo->ConfigurableDeviceSize);
2387 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2388 PhysicalDeviceInfo->SoftErrors == 0 &&
2389 PhysicalDeviceInfo->HardErrors == 0 &&
2390 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2391 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2392 PhysicalDeviceInfo->Retries == 0 &&
2393 PhysicalDeviceInfo->Aborts == 0 &&
2394 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2395 continue;
2396 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2397 "Hard: %d, Misc: %d\n", Controller,
2398 PhysicalDeviceInfo->ParityErrors,
2399 PhysicalDeviceInfo->SoftErrors,
2400 PhysicalDeviceInfo->HardErrors,
2401 PhysicalDeviceInfo->MiscellaneousErrors);
2402 DAC960_Info(" Timeouts: %d, Retries: %d, "
2403 "Aborts: %d, Predicted: %d\n", Controller,
2404 PhysicalDeviceInfo->CommandTimeouts,
2405 PhysicalDeviceInfo->Retries,
2406 PhysicalDeviceInfo->Aborts,
2407 PhysicalDeviceInfo->PredictedFailuresDetected);
2408 }
2409 DAC960_Info(" Logical Drives:\n", Controller);
2410 for (LogicalDriveNumber = 0;
2411 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2412 LogicalDriveNumber++)
2413 {
2414 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2415 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2416 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2417 "Read Cache Enabled",
2418 "Read Ahead Enabled",
2419 "Intelligent Read Ahead Enabled",
2420 "-", "-", "-", "-" };
2421 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2422 "Logical Device Read Only",
2423 "Write Cache Enabled",
2424 "Intelligent Write Cache Enabled",
2425 "-", "-", "-", "-" };
2426 unsigned char *GeometryTranslation;
2427 if (LogicalDeviceInfo == NULL) continue;
2428 switch (LogicalDeviceInfo->DriveGeometry)
2429 {
2430 case DAC960_V2_Geometry_128_32:
2431 GeometryTranslation = "128/32";
2432 break;
2433 case DAC960_V2_Geometry_255_63:
2434 GeometryTranslation = "255/63";
2435 break;
2436 default:
2437 GeometryTranslation = "Invalid";
2438 DAC960_Error("Illegal Logical Device Geometry %d\n",
2439 Controller, LogicalDeviceInfo->DriveGeometry);
2440 break;
2441 }
2442 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2443 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2444 LogicalDeviceInfo->RAIDLevel,
2445 (LogicalDeviceInfo->LogicalDeviceState
2446 == DAC960_V2_LogicalDevice_Online
2447 ? "Online"
2448 : LogicalDeviceInfo->LogicalDeviceState
2449 == DAC960_V2_LogicalDevice_Critical
2450 ? "Critical" : "Offline"),
2451 LogicalDeviceInfo->ConfigurableDeviceSize);
2452 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2453 Controller,
2454 (LogicalDeviceInfo->LogicalDeviceControl
2455 .LogicalDeviceInitialized
2456 ? "Initialized" : "Uninitialized"),
2457 GeometryTranslation);
2458 if (LogicalDeviceInfo->StripeSize == 0)
2459 {
2460 if (LogicalDeviceInfo->CacheLineSize == 0)
2461 DAC960_Info(" Stripe Size: N/A, "
2462 "Segment Size: N/A\n", Controller);
2463 else
2464 DAC960_Info(" Stripe Size: N/A, "
2465 "Segment Size: %dKB\n", Controller,
2466 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2467 }
2468 else
2469 {
2470 if (LogicalDeviceInfo->CacheLineSize == 0)
2471 DAC960_Info(" Stripe Size: %dKB, "
2472 "Segment Size: N/A\n", Controller,
2473 1 << (LogicalDeviceInfo->StripeSize - 2));
2474 else
2475 DAC960_Info(" Stripe Size: %dKB, "
2476 "Segment Size: %dKB\n", Controller,
2477 1 << (LogicalDeviceInfo->StripeSize - 2),
2478 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2479 }
2480 DAC960_Info(" %s, %s\n", Controller,
2481 ReadCacheStatus[
2482 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2483 WriteCacheStatus[
2484 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2485 if (LogicalDeviceInfo->SoftErrors > 0 ||
2486 LogicalDeviceInfo->CommandsFailed > 0 ||
2487 LogicalDeviceInfo->DeferredWriteErrors)
2488 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2489 "Deferred Write: %d\n", Controller,
2490 LogicalDeviceInfo->SoftErrors,
2491 LogicalDeviceInfo->CommandsFailed,
2492 LogicalDeviceInfo->DeferredWriteErrors);
2493
2494 }
2495 return true;
2496}
2497
2498/*
2499 DAC960_RegisterBlockDevice registers the Block Device structures
2500 associated with Controller.
2501*/
2502
87d156bf 2503static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
1da177e4
LT		 2504{
2505 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2506 int n;
2507
2508 /*
2509 Register the Block Device Major Number for this DAC960 Controller.
2510 */
2511 if (register_blkdev(MajorNumber, "dac960") < 0)
2512 return false;
2513
2514 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2515 struct gendisk *disk = Controller->disks[n];
2516 struct request_queue *RequestQueue;
2517
2518 /* for now, let all request queues share controller's lock */
2519 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2520 if (!RequestQueue) {
2521 printk("DAC960: failure to allocate request queue\n");
2522 continue;
2523 }
2524 Controller->RequestQueue[n] = RequestQueue;
2525 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2526 RequestQueue->queuedata = Controller;
2527 blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2528 blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2529 blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2530 disk->queue = RequestQueue;
2531 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
1da177e4
LT		 2532 disk->major = MajorNumber;
2533 disk->first_minor = n << DAC960_MaxPartitionsBits;
2534 disk->fops = &DAC960_BlockDeviceOperations;
2535 }
2536 /*
2537 Indicate the Block Device Registration completed successfully,
2538 */
2539 return true;
2540}
2541
2542
2543/*
2544 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2545 associated with Controller.
2546*/
2547
2548static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2549{
2550 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2551 int disk;
2552
2553 /* does order matter when deleting gendisk and cleanup in request queue? */
2554 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2555 del_gendisk(Controller->disks[disk]);
2556 blk_cleanup_queue(Controller->RequestQueue[disk]);
2557 Controller->RequestQueue[disk] = NULL;
2558 }
2559
2560 /*
2561 Unregister the Block Device Major Number for this DAC960 Controller.
2562 */
2563 unregister_blkdev(MajorNumber, "dac960");
2564}
2565
2566/*
2567 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2568 Information Partition Sector Counts and Block Sizes.
2569*/
2570
2571static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2572{
2573 int disk;
2574 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2575 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2576}
2577
2578/*
2579 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2580 the Error Status Register when the driver performs the BIOS handshaking.
2581 It returns true for fatal errors and false otherwise.
2582*/
2583
87d156bf 2584static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
1da177e4
LT		 2585 unsigned char ErrorStatus,
2586 unsigned char Parameter0,
2587 unsigned char Parameter1)
2588{
2589 switch (ErrorStatus)
2590 {
2591 case 0x00:
2592 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2593 Controller, Parameter1, Parameter0);
2594 break;
2595 case 0x08:
2596 if (Controller->DriveSpinUpMessageDisplayed) break;
2597 DAC960_Notice("Spinning Up Drives\n", Controller);
2598 Controller->DriveSpinUpMessageDisplayed = true;
2599 break;
2600 case 0x30:
2601 DAC960_Notice("Configuration Checksum Error\n", Controller);
2602 break;
2603 case 0x60:
2604 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2605 break;
2606 case 0x70:
2607 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2608 break;
2609 case 0x90:
2610 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2611 Controller, Parameter1, Parameter0);
2612 break;
2613 case 0xA0:
2614 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2615 break;
2616 case 0xB0:
2617 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2618 break;
2619 case 0xD0:
2620 DAC960_Notice("New Controller Configuration Found\n", Controller);
2621 break;
2622 case 0xF0:
2623 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2624 return true;
2625 default:
2626 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2627 Controller, ErrorStatus);
2628 return true;
2629 }
2630 return false;
2631}
2632
2633
2634/*
2635 * DAC960_DetectCleanup releases the resources that were allocated
2636 * during DAC960_DetectController(). DAC960_DetectController can
2637 * has several internal failure points, so not ALL resources may
2638 * have been allocated. It's important to free only
2639 * resources that HAVE been allocated. The code below always
2640 * tests that the resource has been allocated before attempting to
2641 * free it.
2642 */
2643static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2644{
2645 int i;
2646
2647 /* Free the memory mailbox, status, and related structures */
2648 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2649 if (Controller->MemoryMappedAddress) {
2650 switch(Controller->HardwareType)
2651 {
5b76ffd5
CH		 2652 case DAC960_GEM_Controller:
2653 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2654 break;
1da177e4
LT		 2655 case DAC960_BA_Controller:
2656 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2657 break;
2658 case DAC960_LP_Controller:
2659 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2660 break;
2661 case DAC960_LA_Controller:
2662 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2663 break;
2664 case DAC960_PG_Controller:
2665 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2666 break;
2667 case DAC960_PD_Controller:
2668 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2669 break;
2670 case DAC960_P_Controller:
2671 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2672 break;
2673 }
2674 iounmap(Controller->MemoryMappedAddress);
2675 }
2676 if (Controller->IRQ_Channel)
2677 free_irq(Controller->IRQ_Channel, Controller);
2678 if (Controller->IO_Address)
2679 release_region(Controller->IO_Address, 0x80);
2680 pci_disable_device(Controller->PCIDevice);
2681 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2682 put_disk(Controller->disks[i]);
2683 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2684 kfree(Controller);
2685}
2686
2687
2688/*
2689 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2690 PCI RAID Controllers by interrogating the PCI Configuration Space for
2691 Controller Type.
2692*/
2693
2694static DAC960_Controller_T *
2695DAC960_DetectController(struct pci_dev *PCI_Device,
2696 const struct pci_device_id *entry)
2697{
2698 struct DAC960_privdata *privdata =
2699 (struct DAC960_privdata *)entry->driver_data;
7d12e780 2700 irq_handler_t InterruptHandler = privdata->InterruptHandler;
1da177e4
LT		 2701 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2702 DAC960_Controller_T *Controller = NULL;
2703 unsigned char DeviceFunction = PCI_Device->devfn;
2704 unsigned char ErrorStatus, Parameter0, Parameter1;
2705 unsigned int IRQ_Channel;
2706 void __iomem *BaseAddress;
2707 int i;
2708
06ff37ff 2709 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
1da177e4
LT		 2710 if (Controller == NULL) {
2711 DAC960_Error("Unable to allocate Controller structure for "
2712 "Controller at\n", NULL);
2713 return NULL;
2714 }
1da177e4
LT		 2715 Controller->ControllerNumber = DAC960_ControllerCount;
2716 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2717 Controller->Bus = PCI_Device->bus->number;
2718 Controller->FirmwareType = privdata->FirmwareType;
2719 Controller->HardwareType = privdata->HardwareType;
2720 Controller->Device = DeviceFunction >> 3;
2721 Controller->Function = DeviceFunction & 0x7;
2722 Controller->PCIDevice = PCI_Device;
2723 strcpy(Controller->FullModelName, "DAC960");
2724
2725 if (pci_enable_device(PCI_Device))
2726 goto Failure;
2727
2728 switch (Controller->HardwareType)
2729 {
5b76ffd5
CH		 2730 case DAC960_GEM_Controller:
2731 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2732 break;
1da177e4
LT		 2733 case DAC960_BA_Controller:
2734 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2735 break;
2736 case DAC960_LP_Controller:
2737 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2738 break;
2739 case DAC960_LA_Controller:
2740 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2741 break;
2742 case DAC960_PG_Controller:
2743 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2744 break;
2745 case DAC960_PD_Controller:
2746 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2747 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2748 break;
2749 case DAC960_P_Controller:
2750 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2751 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2752 break;
2753 }
2754
2755 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2756 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2757 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2758 if (!Controller->disks[i])
2759 goto Failure;
2760 Controller->disks[i]->private_data = (void *)((long)i);
2761 }
2762 init_waitqueue_head(&Controller->CommandWaitQueue);
2763 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2764 spin_lock_init(&Controller->queue_lock);
2765 DAC960_AnnounceDriver(Controller);
2766 /*
2767 Map the Controller Register Window.
2768 */
2769 if (MemoryWindowSize < PAGE_SIZE)
2770 MemoryWindowSize = PAGE_SIZE;
2771 Controller->MemoryMappedAddress =
2772 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2773 Controller->BaseAddress =
2774 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2775 if (Controller->MemoryMappedAddress == NULL)
2776 {
2777 DAC960_Error("Unable to map Controller Register Window for "
2778 "Controller at\n", Controller);
2779 goto Failure;
2780 }
2781 BaseAddress = Controller->BaseAddress;
2782 switch (Controller->HardwareType)
2783 {
5b76ffd5
CH		 2784 case DAC960_GEM_Controller:
2785 DAC960_GEM_DisableInterrupts(BaseAddress);
2786 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2787 udelay(1000);
2788 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2789 {
2790 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2791 &Parameter0, &Parameter1) &&
2792 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2793 Parameter0, Parameter1))
2794 goto Failure;
2795 udelay(10);
2796 }
2797 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2798 {
2799 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2800 "for Controller at\n", Controller);
2801 goto Failure;
2802 }
2803 DAC960_GEM_EnableInterrupts(BaseAddress);
2804 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2805 Controller->ReadControllerConfiguration =
2806 DAC960_V2_ReadControllerConfiguration;
2807 Controller->ReadDeviceConfiguration =
2808 DAC960_V2_ReadDeviceConfiguration;
2809 Controller->ReportDeviceConfiguration =
2810 DAC960_V2_ReportDeviceConfiguration;
2811 Controller->QueueReadWriteCommand =
2812 DAC960_V2_QueueReadWriteCommand;
2813 break;
1da177e4
LT		 2814 case DAC960_BA_Controller:
2815 DAC960_BA_DisableInterrupts(BaseAddress);
2816 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2817 udelay(1000);
2818 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2819 {
2820 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2821 &Parameter0, &Parameter1) &&
2822 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2823 Parameter0, Parameter1))
2824 goto Failure;
2825 udelay(10);
2826 }
2827 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2828 {
2829 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2830 "for Controller at\n", Controller);
2831 goto Failure;
2832 }
2833 DAC960_BA_EnableInterrupts(BaseAddress);
2834 Controller->QueueCommand = DAC960_BA_QueueCommand;
2835 Controller->ReadControllerConfiguration =
2836 DAC960_V2_ReadControllerConfiguration;
2837 Controller->ReadDeviceConfiguration =
2838 DAC960_V2_ReadDeviceConfiguration;
2839 Controller->ReportDeviceConfiguration =
2840 DAC960_V2_ReportDeviceConfiguration;
2841 Controller->QueueReadWriteCommand =
2842 DAC960_V2_QueueReadWriteCommand;
2843 break;
2844 case DAC960_LP_Controller:
2845 DAC960_LP_DisableInterrupts(BaseAddress);
2846 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2847 udelay(1000);
2848 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2849 {
2850 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2851 &Parameter0, &Parameter1) &&
2852 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2853 Parameter0, Parameter1))
2854 goto Failure;
2855 udelay(10);
2856 }
2857 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2858 {
2859 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2860 "for Controller at\n", Controller);
2861 goto Failure;
2862 }
2863 DAC960_LP_EnableInterrupts(BaseAddress);
2864 Controller->QueueCommand = DAC960_LP_QueueCommand;
2865 Controller->ReadControllerConfiguration =
2866 DAC960_V2_ReadControllerConfiguration;
2867 Controller->ReadDeviceConfiguration =
2868 DAC960_V2_ReadDeviceConfiguration;
2869 Controller->ReportDeviceConfiguration =
2870 DAC960_V2_ReportDeviceConfiguration;
2871 Controller->QueueReadWriteCommand =
2872 DAC960_V2_QueueReadWriteCommand;
2873 break;
2874 case DAC960_LA_Controller:
2875 DAC960_LA_DisableInterrupts(BaseAddress);
2876 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2877 udelay(1000);
2878 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2879 {
2880 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2881 &Parameter0, &Parameter1) &&
2882 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2883 Parameter0, Parameter1))
2884 goto Failure;
2885 udelay(10);
2886 }
2887 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2888 {
2889 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2890 "for Controller at\n", Controller);
2891 goto Failure;
2892 }
2893 DAC960_LA_EnableInterrupts(BaseAddress);
2894 if (Controller->V1.DualModeMemoryMailboxInterface)
2895 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2896 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2897 Controller->ReadControllerConfiguration =
2898 DAC960_V1_ReadControllerConfiguration;
2899 Controller->ReadDeviceConfiguration =
2900 DAC960_V1_ReadDeviceConfiguration;
2901 Controller->ReportDeviceConfiguration =
2902 DAC960_V1_ReportDeviceConfiguration;
2903 Controller->QueueReadWriteCommand =
2904 DAC960_V1_QueueReadWriteCommand;
2905 break;
2906 case DAC960_PG_Controller:
2907 DAC960_PG_DisableInterrupts(BaseAddress);
2908 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2909 udelay(1000);
2910 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2911 {
2912 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2913 &Parameter0, &Parameter1) &&
2914 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2915 Parameter0, Parameter1))
2916 goto Failure;
2917 udelay(10);
2918 }
2919 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2920 {
2921 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2922 "for Controller at\n", Controller);
2923 goto Failure;
2924 }
2925 DAC960_PG_EnableInterrupts(BaseAddress);
2926 if (Controller->V1.DualModeMemoryMailboxInterface)
2927 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2928 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2929 Controller->ReadControllerConfiguration =
2930 DAC960_V1_ReadControllerConfiguration;
2931 Controller->ReadDeviceConfiguration =
2932 DAC960_V1_ReadDeviceConfiguration;
2933 Controller->ReportDeviceConfiguration =
2934 DAC960_V1_ReportDeviceConfiguration;
2935 Controller->QueueReadWriteCommand =
2936 DAC960_V1_QueueReadWriteCommand;
2937 break;
2938 case DAC960_PD_Controller:
2939 if (!request_region(Controller->IO_Address, 0x80,
2940 Controller->FullModelName)) {
2941 DAC960_Error("IO port 0x%d busy for Controller at\n",
2942 Controller, Controller->IO_Address);
2943 goto Failure;
2944 }
2945 DAC960_PD_DisableInterrupts(BaseAddress);
2946 DAC960_PD_AcknowledgeStatus(BaseAddress);
2947 udelay(1000);
2948 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2949 {
2950 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2951 &Parameter0, &Parameter1) &&
2952 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2953 Parameter0, Parameter1))
2954 goto Failure;
2955 udelay(10);
2956 }
2957 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2958 {
2959 DAC960_Error("Unable to allocate DMA mapped memory "
2960 "for Controller at\n", Controller);
2961 goto Failure;
2962 }
2963 DAC960_PD_EnableInterrupts(BaseAddress);
2964 Controller->QueueCommand = DAC960_PD_QueueCommand;
2965 Controller->ReadControllerConfiguration =
2966 DAC960_V1_ReadControllerConfiguration;
2967 Controller->ReadDeviceConfiguration =
2968 DAC960_V1_ReadDeviceConfiguration;
2969 Controller->ReportDeviceConfiguration =
2970 DAC960_V1_ReportDeviceConfiguration;
2971 Controller->QueueReadWriteCommand =
2972 DAC960_V1_QueueReadWriteCommand;
2973 break;
2974 case DAC960_P_Controller:
2975 if (!request_region(Controller->IO_Address, 0x80,
2976 Controller->FullModelName)){
2977 DAC960_Error("IO port 0x%d busy for Controller at\n",
2978 Controller, Controller->IO_Address);
2979 goto Failure;
2980 }
2981 DAC960_PD_DisableInterrupts(BaseAddress);
2982 DAC960_PD_AcknowledgeStatus(BaseAddress);
2983 udelay(1000);
2984 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2985 {
2986 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2987 &Parameter0, &Parameter1) &&
2988 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2989 Parameter0, Parameter1))
2990 goto Failure;
2991 udelay(10);
2992 }
2993 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2994 {
2995 DAC960_Error("Unable to allocate DMA mapped memory"
2996 "for Controller at\n", Controller);
2997 goto Failure;
2998 }
2999 DAC960_PD_EnableInterrupts(BaseAddress);
3000 Controller->QueueCommand = DAC960_P_QueueCommand;
3001 Controller->ReadControllerConfiguration =
3002 DAC960_V1_ReadControllerConfiguration;
3003 Controller->ReadDeviceConfiguration =
3004 DAC960_V1_ReadDeviceConfiguration;
3005 Controller->ReportDeviceConfiguration =
3006 DAC960_V1_ReportDeviceConfiguration;
3007 Controller->QueueReadWriteCommand =
3008 DAC960_V1_QueueReadWriteCommand;
3009 break;
3010 }
3011 /*
3012 Acquire shared access to the IRQ Channel.
3013 */
3014 IRQ_Channel = PCI_Device->irq;
69ab3912 3015 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
1da177e4
LT		 3016 Controller->FullModelName, Controller) < 0)
3017 {
3018 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3019 Controller, Controller->IRQ_Channel);
3020 goto Failure;
3021 }
3022 Controller->IRQ_Channel = IRQ_Channel;
3023 Controller->InitialCommand.CommandIdentifier = 1;
3024 Controller->InitialCommand.Controller = Controller;
3025 Controller->Commands[0] = &Controller->InitialCommand;
3026 Controller->FreeCommands = &Controller->InitialCommand;
3027 return Controller;
3028
3029Failure:
3030 if (Controller->IO_Address == 0)
3031 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3032 "PCI Address 0x%X\n", Controller,
3033 Controller->Bus, Controller->Device,
3034 Controller->Function, Controller->PCI_Address);
3035 else
3036 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3037 "0x%X PCI Address 0x%X\n", Controller,
3038 Controller->Bus, Controller->Device,
3039 Controller->Function, Controller->IO_Address,
3040 Controller->PCI_Address);
3041 DAC960_DetectCleanup(Controller);
3042 DAC960_ControllerCount--;
3043 return NULL;
3044}
3045
3046/*
3047 DAC960_InitializeController initializes Controller.
3048*/
3049
87d156bf 3050static bool
1da177e4
LT		 3051DAC960_InitializeController(DAC960_Controller_T *Controller)
3052{
3053 if (DAC960_ReadControllerConfiguration(Controller) &&
3054 DAC960_ReportControllerConfiguration(Controller) &&
3055 DAC960_CreateAuxiliaryStructures(Controller) &&
3056 DAC960_ReadDeviceConfiguration(Controller) &&
3057 DAC960_ReportDeviceConfiguration(Controller) &&
3058 DAC960_RegisterBlockDevice(Controller))
3059 {
3060 /*
3061 Initialize the Monitoring Timer.
3062 */
3063 init_timer(&Controller->MonitoringTimer);
3064 Controller->MonitoringTimer.expires =
3065 jiffies + DAC960_MonitoringTimerInterval;
3066 Controller->MonitoringTimer.data = (unsigned long) Controller;
3067 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3068 add_timer(&Controller->MonitoringTimer);
3069 Controller->ControllerInitialized = true;
3070 return true;
3071 }
3072 return false;
3073}
3074
3075
3076/*
3077 DAC960_FinalizeController finalizes Controller.
3078*/
3079
3080static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3081{
3082 if (Controller->ControllerInitialized)
3083 {
3084 unsigned long flags;
3085
3086 /*
3087 * Acquiring and releasing lock here eliminates
3088 * a very low probability race.
3089 *
3090 * The code below allocates controller command structures
3091 * from the free list without holding the controller lock.
3092 * This is safe assuming there is no other activity on
3093 * the controller at the time.
3094 *
3095 * But, there might be a monitoring command still
3096 * in progress. Setting the Shutdown flag while holding
3097 * the lock ensures that there is no monitoring command
3098 * in the interrupt handler currently, and any monitoring
3099 * commands that complete from this time on will NOT return
3100 * their command structure to the free list.
3101 */
3102
3103 spin_lock_irqsave(&Controller->queue_lock, flags);
3104 Controller->ShutdownMonitoringTimer = 1;
3105 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3106
3107 del_timer_sync(&Controller->MonitoringTimer);
3108 if (Controller->FirmwareType == DAC960_V1_Controller)
3109 {
3110 DAC960_Notice("Flushing Cache...", Controller);
3111 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3112 DAC960_Notice("done\n", Controller);
3113
3114 if (Controller->HardwareType == DAC960_PD_Controller)
3115 release_region(Controller->IO_Address, 0x80);
3116 }
3117 else
3118 {
3119 DAC960_Notice("Flushing Cache...", Controller);
3120 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3121 DAC960_V2_RAID_Controller);
3122 DAC960_Notice("done\n", Controller);
3123 }
3124 }
3125 DAC960_UnregisterBlockDevice(Controller);
3126 DAC960_DestroyAuxiliaryStructures(Controller);
3127 DAC960_DestroyProcEntries(Controller);
3128 DAC960_DetectCleanup(Controller);
3129}
3130
3131
3132/*
3133 DAC960_Probe verifies controller's existence and
3134 initializes the DAC960 Driver for that controller.
3135*/
3136
3137static int
3138DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3139{
3140 int disk;
3141 DAC960_Controller_T *Controller;
3142
3143 if (DAC960_ControllerCount == DAC960_MaxControllers)
3144 {
3145 DAC960_Error("More than %d DAC960 Controllers detected - "
3146 "ignoring from Controller at\n",
3147 NULL, DAC960_MaxControllers);
3148 return -ENODEV;
3149 }
3150
3151 Controller = DAC960_DetectController(dev, entry);
3152 if (!Controller)
3153 return -ENODEV;
3154
3155 if (!DAC960_InitializeController(Controller)) {
3156 DAC960_FinalizeController(Controller);
3157 return -ENODEV;
3158 }
3159
3160 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3161 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3162 add_disk(Controller->disks[disk]);
3163 }
3164 DAC960_CreateProcEntries(Controller);
3165 return 0;
3166}
3167
3168
3169/*
3170 DAC960_Finalize finalizes the DAC960 Driver.
3171*/
3172
3173static void DAC960_Remove(struct pci_dev *PCI_Device)
3174{
3175 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3176 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3177 if (Controller != NULL)
3178 DAC960_FinalizeController(Controller);
3179}
3180
3181
3182/*
3183 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3184 DAC960 V1 Firmware Controllers.
3185*/
3186
3187static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3188{
3189 DAC960_Controller_T *Controller = Command->Controller;
3190 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3191 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3192 Command->V1.ScatterGatherList;
3193 struct scatterlist *ScatterList = Command->V1.ScatterList;
3194
3195 DAC960_V1_ClearCommand(Command);
3196
3197 if (Command->SegmentCount == 1)
3198 {
3199 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3200 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3201 else
3202 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3203
3204 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3205 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3206 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3207 CommandMailbox->Type5.BusAddress =
3208 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3209 }
3210 else
3211 {
3212 int i;
3213
3214 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3215 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3216 else
3217 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3218
3219 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3220 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3221 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3222 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3223
3224 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3225
3226 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3227 ScatterGatherList->SegmentDataPointer =
3228 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3229 ScatterGatherList->SegmentByteCount =
3230 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3231 }
3232 }
3233 DAC960_QueueCommand(Command);
3234}
3235
3236
3237/*
3238 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3239 DAC960 V2 Firmware Controllers.
3240*/
3241
3242static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3243{
3244 DAC960_Controller_T *Controller = Command->Controller;
3245 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3246 struct scatterlist *ScatterList = Command->V2.ScatterList;
3247
3248 DAC960_V2_ClearCommand(Command);
3249
3250 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3251 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3252 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3253 CommandMailbox->SCSI_10.DataTransferSize =
3254 Command->BlockCount << DAC960_BlockSizeBits;
3255 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3256 CommandMailbox->SCSI_10.PhysicalDevice =
3257 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3258 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3259 CommandMailbox->SCSI_10.CDBLength = 10;
3260 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3261 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3262 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3263 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3264 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3265 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3266 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3267 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3268
3269 if (Command->SegmentCount == 1)
3270 {
3271 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3272 .ScatterGatherSegments[0]
3273 .SegmentDataPointer =
3274 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3275 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3276 .ScatterGatherSegments[0]
3277 .SegmentByteCount =
3278 CommandMailbox->SCSI_10.DataTransferSize;
3279 }
3280 else
3281 {
3282 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3283 int i;
3284
3285 if (Command->SegmentCount > 2)
3286 {
3287 ScatterGatherList = Command->V2.ScatterGatherList;
3288 CommandMailbox->SCSI_10.CommandControlBits
3289 .AdditionalScatterGatherListMemory = true;
3290 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3291 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3292 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3293 .ExtendedScatterGather.ScatterGatherList0Address =
3294 Command->V2.ScatterGatherListDMA;
3295 }
3296 else
3297 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3298 .ScatterGatherSegments;
3299
3300 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3301 ScatterGatherList->SegmentDataPointer =
3302 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3303 ScatterGatherList->SegmentByteCount =
3304 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3305 }
3306 }
3307 DAC960_QueueCommand(Command);
3308}
3309
3310
3311static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3312{
3313 struct request *Request;
3314 DAC960_Command_T *Command;
3315
3316 while(1) {
3317 Request = elv_next_request(req_q);
3318 if (!Request)
3319 return 1;
3320
3321 Command = DAC960_AllocateCommand(Controller);
3322 if (Command == NULL)
3323 return 0;
3324
3325 if (rq_data_dir(Request) == READ) {
3326 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3327 Command->CommandType = DAC960_ReadCommand;
3328 } else {
3329 Command->DmaDirection = PCI_DMA_TODEVICE;
3330 Command->CommandType = DAC960_WriteCommand;
3331 }
c00895ab 3332 Command->Completion = Request->end_io_data;
1da177e4
LT		 3333 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3334 Command->BlockNumber = Request->sector;
3335 Command->BlockCount = Request->nr_sectors;
3336 Command->Request = Request;
3337 blkdev_dequeue_request(Request);
3338 Command->SegmentCount = blk_rq_map_sg(req_q,
3339 Command->Request, Command->cmd_sglist);
3340 /* pci_map_sg MAY change the value of SegCount */
3341 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3342 Command->SegmentCount, Command->DmaDirection);
3343
3344 DAC960_QueueReadWriteCommand(Command);
3345 }
3346}
3347
3348/*
3349 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3350 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3351 this function should wait for a Command to become available if necessary.
3352 This function returns true if an I/O Request was queued and false otherwise.
3353*/
3354static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3355{
3356 int i;
3357
3358 if (!controller->ControllerInitialized)
3359 return;
3360
3361 /* Do this better later! */
3362 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3363 struct request_queue *req_q = controller->RequestQueue[i];
3364
3365 if (req_q == NULL)
3366 continue;
3367
3368 if (!DAC960_process_queue(controller, req_q)) {
3369 controller->req_q_index = i;
3370 return;
3371 }
3372 }
3373
3374 if (controller->req_q_index == 0)
3375 return;
3376
3377 for (i = 0; i < controller->req_q_index; i++) {
3378 struct request_queue *req_q = controller->RequestQueue[i];
3379
3380 if (req_q == NULL)
3381 continue;
3382
3383 if (!DAC960_process_queue(controller, req_q)) {
3384 controller->req_q_index = i;
3385 return;
3386 }
3387 }
3388}
3389
3390
3391/*
3392 DAC960_queue_partial_rw extracts one bio from the request already
3393 associated with argument command, and construct a new command block to retry I/O
3394 only on that bio. Queue that command to the controller.
3395
3396 This function re-uses a previously-allocated Command,
3397 there is no failure mode from trying to allocate a command.
3398*/
3399
3400static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3401{
3402 DAC960_Controller_T *Controller = Command->Controller;
3403 struct request *Request = Command->Request;
3404 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3405
3406 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3407 Command->CommandType = DAC960_ReadRetryCommand;
3408 else
3409 Command->CommandType = DAC960_WriteRetryCommand;
3410
3411 /*
3412 * We could be more efficient with these mapping requests
3413 * and map only the portions that we need. But since this
3414 * code should almost never be called, just go with a
3415 * simple coding.
3416 */
3417 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3418
3419 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3420 /*
3421 * Resubmitting the request sector at a time is really tedious.
3422 * But, this should almost never happen. So, we're willing to pay
3423 * this price so that in the end, as much of the transfer is completed
3424 * successfully as possible.
3425 */
3426 Command->SegmentCount = 1;
3427 Command->BlockNumber = Request->sector;
3428 Command->BlockCount = 1;
3429 DAC960_QueueReadWriteCommand(Command);
3430 return;
3431}
3432
3433/*
3434 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3435*/
3436
3437static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3438{
3439 DAC960_ProcessRequest(RequestQueue->queuedata);
3440}
3441
3442/*
3443 DAC960_ProcessCompletedBuffer performs completion processing for an
3444 individual Buffer.
3445*/
3446
87d156bf
RK		 3447static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3448 bool SuccessfulIO)
1da177e4
LT		 3449{
3450 struct request *Request = Command->Request;
3451 int UpToDate;
3452
3453 UpToDate = 0;
3454 if (SuccessfulIO)
3455 UpToDate = 1;
3456
3457 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3458 Command->SegmentCount, Command->DmaDirection);
3459
3460 if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) {
62287fbb 3461 add_disk_randomness(Request->rq_disk);
8ffdc655 3462 end_that_request_last(Request, UpToDate);
1da177e4
LT		 3463
3464 if (Command->Completion) {
3465 complete(Command->Completion);
3466 Command->Completion = NULL;
3467 }
3468 return true;
3469 }
3470 return false;
3471}
3472
3473/*
3474 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3475 when an error occurs on a Read or Write operation.
3476*/
3477
3478static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3479{
3480 DAC960_Controller_T *Controller = Command->Controller;
3481 unsigned char *CommandName = "UNKNOWN";
3482 switch (Command->CommandType)
3483 {
3484 case DAC960_ReadCommand:
3485 case DAC960_ReadRetryCommand:
3486 CommandName = "READ";
3487 break;
3488 case DAC960_WriteCommand:
3489 case DAC960_WriteRetryCommand:
3490 CommandName = "WRITE";
3491 break;
3492 case DAC960_MonitoringCommand:
3493 case DAC960_ImmediateCommand:
3494 case DAC960_QueuedCommand:
3495 break;
3496 }
3497 switch (Command->V1.CommandStatus)
3498 {
3499 case DAC960_V1_IrrecoverableDataError:
3500 DAC960_Error("Irrecoverable Data Error on %s:\n",
3501 Controller, CommandName);
3502 break;
3503 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3504 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3505 Controller, CommandName);
3506 break;
3507 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3508 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3509 "on %s:\n", Controller, CommandName);
3510 break;
3511 case DAC960_V1_BadDataEncountered:
3512 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3513 break;
3514 default:
3515 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3516 Controller, Command->V1.CommandStatus, CommandName);
3517 break;
3518 }
3519 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3520 Controller, Controller->ControllerNumber,
3521 Command->LogicalDriveNumber, Command->BlockNumber,
3522 Command->BlockNumber + Command->BlockCount - 1);
3523}
3524
3525
3526/*
3527 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3528 for DAC960 V1 Firmware Controllers.
3529*/
3530
3531static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3532{
3533 DAC960_Controller_T *Controller = Command->Controller;
3534 DAC960_CommandType_T CommandType = Command->CommandType;
3535 DAC960_V1_CommandOpcode_T CommandOpcode =
3536 Command->V1.CommandMailbox.Common.CommandOpcode;
3537 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3538
3539 if (CommandType == DAC960_ReadCommand ||
3540 CommandType == DAC960_WriteCommand)
3541 {
3542
3543#ifdef FORCE_RETRY_DEBUG
3544 CommandStatus = DAC960_V1_IrrecoverableDataError;
3545#endif
3546
3547 if (CommandStatus == DAC960_V1_NormalCompletion) {
3548
3549 if (!DAC960_ProcessCompletedRequest(Command, true))
3550 BUG();
3551
3552 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3553 CommandStatus == DAC960_V1_BadDataEncountered)
3554 {
3555 /*
3556 * break the command down into pieces and resubmit each
3557 * piece, hoping that some of them will succeed.
3558 */
3559 DAC960_queue_partial_rw(Command);
3560 return;
3561 }
3562 else
3563 {
3564 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3565 DAC960_V1_ReadWriteError(Command);
3566
3567 if (!DAC960_ProcessCompletedRequest(Command, false))
3568 BUG();
3569 }
3570 }
3571 else if (CommandType == DAC960_ReadRetryCommand ||
3572 CommandType == DAC960_WriteRetryCommand)
3573 {
87d156bf 3574 bool normal_completion;
1da177e4
LT		 3575#ifdef FORCE_RETRY_FAILURE_DEBUG
3576 static int retry_count = 1;
3577#endif
3578 /*
3579 Perform completion processing for the portion that was
3580 retried, and submit the next portion, if any.
3581 */
3582 normal_completion = true;
3583 if (CommandStatus != DAC960_V1_NormalCompletion) {
3584 normal_completion = false;
3585 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3586 DAC960_V1_ReadWriteError(Command);
3587 }
3588
3589#ifdef FORCE_RETRY_FAILURE_DEBUG
3590 if (!(++retry_count % 10000)) {
3591 printk("V1 error retry failure test\n");
3592 normal_completion = false;
3593 DAC960_V1_ReadWriteError(Command);
3594 }
3595#endif
3596
3597 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3598 DAC960_queue_partial_rw(Command);
3599 return;
3600 }
3601 }
3602
3603 else if (CommandType == DAC960_MonitoringCommand)
3604 {
3605 if (Controller->ShutdownMonitoringTimer)
3606 return;
3607 if (CommandOpcode == DAC960_V1_Enquiry)
3608 {
3609 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3610 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3611 unsigned int OldCriticalLogicalDriveCount =
3612 OldEnquiry->CriticalLogicalDriveCount;
3613 unsigned int NewCriticalLogicalDriveCount =
3614 NewEnquiry->CriticalLogicalDriveCount;
3615 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3616 {
3617 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3618 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3619 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3620 "Now Exists\n", Controller,
3621 LogicalDriveNumber,
3622 Controller->ControllerNumber,
3623 LogicalDriveNumber);
3624 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3625 DAC960_ComputeGenericDiskInfo(Controller);
3626 }
3627 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3628 {
3629 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3630 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3631 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3632 "No Longer Exists\n", Controller,
3633 LogicalDriveNumber,
3634 Controller->ControllerNumber,
3635 LogicalDriveNumber);
3636 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3637 DAC960_ComputeGenericDiskInfo(Controller);
3638 }
3639 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3640 OldEnquiry->StatusFlags.DeferredWriteError)
3641 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3642 (NewEnquiry->StatusFlags.DeferredWriteError
3643 ? "TRUE" : "FALSE"));
3644 if ((NewCriticalLogicalDriveCount > 0 ||
3645 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3646 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3647 NewEnquiry->OfflineLogicalDriveCount !=
3648 OldEnquiry->OfflineLogicalDriveCount) ||
3649 (NewEnquiry->DeadDriveCount > 0 ||
3650 NewEnquiry->DeadDriveCount !=
3651 OldEnquiry->DeadDriveCount) ||
3652 (NewEnquiry->EventLogSequenceNumber !=
3653 OldEnquiry->EventLogSequenceNumber) ||
3654 Controller->MonitoringTimerCount == 0 ||
50297cbf
MFP		 3655 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3656 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 3657 {
3658 Controller->V1.NeedLogicalDriveInformation = true;
3659 Controller->V1.NewEventLogSequenceNumber =
3660 NewEnquiry->EventLogSequenceNumber;
3661 Controller->V1.NeedErrorTableInformation = true;
3662 Controller->V1.NeedDeviceStateInformation = true;
3663 Controller->V1.StartDeviceStateScan = true;
3664 Controller->V1.NeedBackgroundInitializationStatus =
3665 Controller->V1.BackgroundInitializationStatusSupported;
3666 Controller->SecondaryMonitoringTime = jiffies;
3667 }
3668 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3669 NewEnquiry->RebuildFlag
3670 == DAC960_V1_BackgroundRebuildInProgress ||
3671 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3672 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3673 {
3674 Controller->V1.NeedRebuildProgress = true;
3675 Controller->V1.RebuildProgressFirst =
3676 (NewEnquiry->CriticalLogicalDriveCount <
3677 OldEnquiry->CriticalLogicalDriveCount);
3678 }
3679 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3680 switch (NewEnquiry->RebuildFlag)
3681 {
3682 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3683 DAC960_Progress("Consistency Check Completed Successfully\n",
3684 Controller);
3685 break;
3686 case DAC960_V1_StandbyRebuildInProgress:
3687 case DAC960_V1_BackgroundRebuildInProgress:
3688 break;
3689 case DAC960_V1_BackgroundCheckInProgress:
3690 Controller->V1.NeedConsistencyCheckProgress = true;
3691 break;
3692 case DAC960_V1_StandbyRebuildCompletedWithError:
3693 DAC960_Progress("Consistency Check Completed with Error\n",
3694 Controller);
3695 break;
3696 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3697 DAC960_Progress("Consistency Check Failed - "
3698 "Physical Device Failed\n", Controller);
3699 break;
3700 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3701 DAC960_Progress("Consistency Check Failed - "
3702 "Logical Drive Failed\n", Controller);
3703 break;
3704 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3705 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3706 Controller);
3707 break;
3708 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3709 DAC960_Progress("Consistency Check Successfully Terminated\n",
3710 Controller);
3711 break;
3712 }
3713 else if (NewEnquiry->RebuildFlag
3714 == DAC960_V1_BackgroundCheckInProgress)
3715 Controller->V1.NeedConsistencyCheckProgress = true;
3716 Controller->MonitoringAlertMode =
3717 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3718 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3719 NewEnquiry->DeadDriveCount > 0);
3720 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3721 {
3722 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3723 Controller->V1.RebuildFlagPending = true;
3724 }
3725 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3726 sizeof(DAC960_V1_Enquiry_T));
3727 }
3728 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3729 {
3730 static char
3731 *DAC960_EventMessages[] =
3732 { "killed because write recovery failed",
3733 "killed because of SCSI bus reset failure",
3734 "killed because of double check condition",
3735 "killed because it was removed",
3736 "killed because of gross error on SCSI chip",
3737 "killed because of bad tag returned from drive",
3738 "killed because of timeout on SCSI command",
3739 "killed because of reset SCSI command issued from system",
3740 "killed because busy or parity error count exceeded limit",
3741 "killed because of 'kill drive' command from system",
3742 "killed because of selection timeout",
3743 "killed due to SCSI phase sequence error",
3744 "killed due to unknown status" };
3745 DAC960_V1_EventLogEntry_T *EventLogEntry =
3746 Controller->V1.EventLogEntry;
3747 if (EventLogEntry->SequenceNumber ==
3748 Controller->V1.OldEventLogSequenceNumber)
3749 {
3750 unsigned char SenseKey = EventLogEntry->SenseKey;
3751 unsigned char AdditionalSenseCode =
3752 EventLogEntry->AdditionalSenseCode;
3753 unsigned char AdditionalSenseCodeQualifier =
3754 EventLogEntry->AdditionalSenseCodeQualifier;
3755 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3756 AdditionalSenseCode == 0x80 &&
3757 AdditionalSenseCodeQualifier <
945f390f 3758 ARRAY_SIZE(DAC960_EventMessages))
1da177e4
LT		 3759 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3760 EventLogEntry->Channel,
3761 EventLogEntry->TargetID,
3762 DAC960_EventMessages[
3763 AdditionalSenseCodeQualifier]);
3764 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3765 AdditionalSenseCode == 0x29)
3766 {
3767 if (Controller->MonitoringTimerCount > 0)
3768 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3769 [EventLogEntry->TargetID]++;
3770 }
3771 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3772 (SenseKey == DAC960_SenseKey_NotReady &&
3773 AdditionalSenseCode == 0x04 &&
3774 (AdditionalSenseCodeQualifier == 0x01 ||
3775 AdditionalSenseCodeQualifier == 0x02))))
3776 {
3777 DAC960_Critical("Physical Device %d:%d Error Log: "
3778 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3779 Controller,
3780 EventLogEntry->Channel,
3781 EventLogEntry->TargetID,
3782 SenseKey,
3783 AdditionalSenseCode,
3784 AdditionalSenseCodeQualifier);
3785 DAC960_Critical("Physical Device %d:%d Error Log: "
3786 "Information = %02X%02X%02X%02X "
3787 "%02X%02X%02X%02X\n",
3788 Controller,
3789 EventLogEntry->Channel,
3790 EventLogEntry->TargetID,
3791 EventLogEntry->Information[0],
3792 EventLogEntry->Information[1],
3793 EventLogEntry->Information[2],
3794 EventLogEntry->Information[3],
3795 EventLogEntry->CommandSpecificInformation[0],
3796 EventLogEntry->CommandSpecificInformation[1],
3797 EventLogEntry->CommandSpecificInformation[2],
3798 EventLogEntry->CommandSpecificInformation[3]);
3799 }
3800 }
3801 Controller->V1.OldEventLogSequenceNumber++;
3802 }
3803 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3804 {
3805 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3806 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3807 int Channel, TargetID;
3808 for (Channel = 0; Channel < Controller->Channels; Channel++)
3809 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3810 {
3811 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3812 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3813 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3814 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3815 if ((NewErrorEntry->ParityErrorCount !=
3816 OldErrorEntry->ParityErrorCount) ||
3817 (NewErrorEntry->SoftErrorCount !=
3818 OldErrorEntry->SoftErrorCount) ||
3819 (NewErrorEntry->HardErrorCount !=
3820 OldErrorEntry->HardErrorCount) ||
3821 (NewErrorEntry->MiscErrorCount !=
3822 OldErrorEntry->MiscErrorCount))
3823 DAC960_Critical("Physical Device %d:%d Errors: "
3824 "Parity = %d, Soft = %d, "
3825 "Hard = %d, Misc = %d\n",
3826 Controller, Channel, TargetID,
3827 NewErrorEntry->ParityErrorCount,
3828 NewErrorEntry->SoftErrorCount,
3829 NewErrorEntry->HardErrorCount,
3830 NewErrorEntry->MiscErrorCount);
3831 }
3832 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3833 sizeof(DAC960_V1_ErrorTable_T));
3834 }
3835 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3836 {
3837 DAC960_V1_DeviceState_T *OldDeviceState =
3838 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3839 [Controller->V1.DeviceStateTargetID];
3840 DAC960_V1_DeviceState_T *NewDeviceState =
3841 Controller->V1.NewDeviceState;
3842 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3843 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3844 Controller->V1.DeviceStateChannel,
3845 Controller->V1.DeviceStateTargetID,
3846 (NewDeviceState->DeviceState
3847 == DAC960_V1_Device_Dead
3848 ? "DEAD"
3849 : NewDeviceState->DeviceState
3850 == DAC960_V1_Device_WriteOnly
3851 ? "WRITE-ONLY"
3852 : NewDeviceState->DeviceState
3853 == DAC960_V1_Device_Online
3854 ? "ONLINE" : "STANDBY"));
3855 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3856 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3857 {
3858 Controller->V1.NeedDeviceInquiryInformation = true;
3859 Controller->V1.NeedDeviceSerialNumberInformation = true;
3860 Controller->V1.DeviceResetCount
3861 [Controller->V1.DeviceStateChannel]
3862 [Controller->V1.DeviceStateTargetID] = 0;
3863 }
3864 memcpy(OldDeviceState, NewDeviceState,
3865 sizeof(DAC960_V1_DeviceState_T));
3866 }
3867 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3868 {
3869 int LogicalDriveNumber;
3870 for (LogicalDriveNumber = 0;
3871 LogicalDriveNumber < Controller->LogicalDriveCount;
3872 LogicalDriveNumber++)
3873 {
3874 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3875 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3876 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3877 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3878 if (NewLogicalDriveInformation->LogicalDriveState !=
3879 OldLogicalDriveInformation->LogicalDriveState)
3880 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3881 "is now %s\n", Controller,
3882 LogicalDriveNumber,
3883 Controller->ControllerNumber,
3884 LogicalDriveNumber,
3885 (NewLogicalDriveInformation->LogicalDriveState
3886 == DAC960_V1_LogicalDrive_Online
3887 ? "ONLINE"
3888 : NewLogicalDriveInformation->LogicalDriveState
3889 == DAC960_V1_LogicalDrive_Critical
3890 ? "CRITICAL" : "OFFLINE"));
3891 if (NewLogicalDriveInformation->WriteBack !=
3892 OldLogicalDriveInformation->WriteBack)
3893 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3894 "is now %s\n", Controller,
3895 LogicalDriveNumber,
3896 Controller->ControllerNumber,
3897 LogicalDriveNumber,
3898 (NewLogicalDriveInformation->WriteBack
3899 ? "WRITE BACK" : "WRITE THRU"));
3900 }
3901 memcpy(&Controller->V1.LogicalDriveInformation,
3902 Controller->V1.NewLogicalDriveInformation,
3903 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3904 }
3905 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3906 {
3907 unsigned int LogicalDriveNumber =
3908 Controller->V1.RebuildProgress->LogicalDriveNumber;
3909 unsigned int LogicalDriveSize =
3910 Controller->V1.RebuildProgress->LogicalDriveSize;
3911 unsigned int BlocksCompleted =
3912 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3913 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3914 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3915 CommandStatus = DAC960_V1_RebuildSuccessful;
3916 switch (CommandStatus)
3917 {
3918 case DAC960_V1_NormalCompletion:
3919 Controller->EphemeralProgressMessage = true;
3920 DAC960_Progress("Rebuild in Progress: "
3921 "Logical Drive %d (/dev/rd/c%dd%d) "
3922 "%d%% completed\n",
3923 Controller, LogicalDriveNumber,
3924 Controller->ControllerNumber,
3925 LogicalDriveNumber,
3926 (100 * (BlocksCompleted >> 7))
3927 / (LogicalDriveSize >> 7));
3928 Controller->EphemeralProgressMessage = false;
3929 break;
3930 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3931 DAC960_Progress("Rebuild Failed due to "
3932 "Logical Drive Failure\n", Controller);
3933 break;
3934 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3935 DAC960_Progress("Rebuild Failed due to "
3936 "Bad Blocks on Other Drives\n", Controller);
3937 break;
3938 case DAC960_V1_RebuildFailed_NewDriveFailed:
3939 DAC960_Progress("Rebuild Failed due to "
3940 "Failure of Drive Being Rebuilt\n", Controller);
3941 break;
3942 case DAC960_V1_NoRebuildOrCheckInProgress:
3943 break;
3944 case DAC960_V1_RebuildSuccessful:
3945 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3946 break;
3947 case DAC960_V1_RebuildSuccessfullyTerminated:
3948 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3949 break;
3950 }
3951 Controller->V1.LastRebuildStatus = CommandStatus;
3952 if (CommandType != DAC960_MonitoringCommand &&
3953 Controller->V1.RebuildStatusPending)
3954 {
3955 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3956 Controller->V1.RebuildStatusPending = false;
3957 }
3958 else if (CommandType == DAC960_MonitoringCommand &&
3959 CommandStatus != DAC960_V1_NormalCompletion &&
3960 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3961 {
3962 Controller->V1.PendingRebuildStatus = CommandStatus;
3963 Controller->V1.RebuildStatusPending = true;
3964 }
3965 }
3966 else if (CommandOpcode == DAC960_V1_RebuildStat)
3967 {
3968 unsigned int LogicalDriveNumber =
3969 Controller->V1.RebuildProgress->LogicalDriveNumber;
3970 unsigned int LogicalDriveSize =
3971 Controller->V1.RebuildProgress->LogicalDriveSize;
3972 unsigned int BlocksCompleted =
3973 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3974 if (CommandStatus == DAC960_V1_NormalCompletion)
3975 {
3976 Controller->EphemeralProgressMessage = true;
3977 DAC960_Progress("Consistency Check in Progress: "
3978 "Logical Drive %d (/dev/rd/c%dd%d) "
3979 "%d%% completed\n",
3980 Controller, LogicalDriveNumber,
3981 Controller->ControllerNumber,
3982 LogicalDriveNumber,
3983 (100 * (BlocksCompleted >> 7))
3984 / (LogicalDriveSize >> 7));
3985 Controller->EphemeralProgressMessage = false;
3986 }
3987 }
3988 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3989 {
3990 unsigned int LogicalDriveNumber =
3991 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
3992 unsigned int LogicalDriveSize =
3993 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
3994 unsigned int BlocksCompleted =
3995 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
3996 switch (CommandStatus)
3997 {
3998 case DAC960_V1_NormalCompletion:
3999 switch (Controller->V1.BackgroundInitializationStatus->Status)
4000 {
4001 case DAC960_V1_BackgroundInitializationInvalid:
4002 break;
4003 case DAC960_V1_BackgroundInitializationStarted:
4004 DAC960_Progress("Background Initialization Started\n",
4005 Controller);
4006 break;
4007 case DAC960_V1_BackgroundInitializationInProgress:
4008 if (BlocksCompleted ==
4009 Controller->V1.LastBackgroundInitializationStatus.
4010 BlocksCompleted &&
4011 LogicalDriveNumber ==
4012 Controller->V1.LastBackgroundInitializationStatus.
4013 LogicalDriveNumber)
4014 break;
4015 Controller->EphemeralProgressMessage = true;
4016 DAC960_Progress("Background Initialization in Progress: "
4017 "Logical Drive %d (/dev/rd/c%dd%d) "
4018 "%d%% completed\n",
4019 Controller, LogicalDriveNumber,
4020 Controller->ControllerNumber,
4021 LogicalDriveNumber,
4022 (100 * (BlocksCompleted >> 7))
4023 / (LogicalDriveSize >> 7));
4024 Controller->EphemeralProgressMessage = false;
4025 break;
4026 case DAC960_V1_BackgroundInitializationSuspended:
4027 DAC960_Progress("Background Initialization Suspended\n",
4028 Controller);
4029 break;
4030 case DAC960_V1_BackgroundInitializationCancelled:
4031 DAC960_Progress("Background Initialization Cancelled\n",
4032 Controller);
4033 break;
4034 }
4035 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4036 Controller->V1.BackgroundInitializationStatus,
4037 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4038 break;
4039 case DAC960_V1_BackgroundInitSuccessful:
4040 if (Controller->V1.BackgroundInitializationStatus->Status ==
4041 DAC960_V1_BackgroundInitializationInProgress)
4042 DAC960_Progress("Background Initialization "
4043 "Completed Successfully\n", Controller);
4044 Controller->V1.BackgroundInitializationStatus->Status =
4045 DAC960_V1_BackgroundInitializationInvalid;
4046 break;
4047 case DAC960_V1_BackgroundInitAborted:
4048 if (Controller->V1.BackgroundInitializationStatus->Status ==
4049 DAC960_V1_BackgroundInitializationInProgress)
4050 DAC960_Progress("Background Initialization Aborted\n",
4051 Controller);
4052 Controller->V1.BackgroundInitializationStatus->Status =
4053 DAC960_V1_BackgroundInitializationInvalid;
4054 break;
4055 case DAC960_V1_NoBackgroundInitInProgress:
4056 break;
4057 }
4058 }
4059 else if (CommandOpcode == DAC960_V1_DCDB)
4060 {
4061 /*
4062 This is a bit ugly.
4063
4064 The InquiryStandardData and
4065 the InquiryUntitSerialNumber information
4066 retrieval operations BOTH use the DAC960_V1_DCDB
4067 commands. the test above can't distinguish between
4068 these two cases.
4069
4070 Instead, we rely on the order of code later in this
4071 function to ensure that DeviceInquiryInformation commands
4072 are submitted before DeviceSerialNumber commands.
4073 */
4074 if (Controller->V1.NeedDeviceInquiryInformation)
4075 {
4076 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4077 &Controller->V1.InquiryStandardData
4078 [Controller->V1.DeviceStateChannel]
4079 [Controller->V1.DeviceStateTargetID];
4080 if (CommandStatus != DAC960_V1_NormalCompletion)
4081 {
4082 memset(InquiryStandardData, 0,
4083 sizeof(DAC960_SCSI_Inquiry_T));
4084 InquiryStandardData->PeripheralDeviceType = 0x1F;
4085 }
4086 else
4087 memcpy(InquiryStandardData,
4088 Controller->V1.NewInquiryStandardData,
4089 sizeof(DAC960_SCSI_Inquiry_T));
4090 Controller->V1.NeedDeviceInquiryInformation = false;
4091 }
4092 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4093 {
4094 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4095 &Controller->V1.InquiryUnitSerialNumber
4096 [Controller->V1.DeviceStateChannel]
4097 [Controller->V1.DeviceStateTargetID];
4098 if (CommandStatus != DAC960_V1_NormalCompletion)
4099 {
4100 memset(InquiryUnitSerialNumber, 0,
4101 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4102 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4103 }
4104 else
4105 memcpy(InquiryUnitSerialNumber,
4106 Controller->V1.NewInquiryUnitSerialNumber,
4107 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4108 Controller->V1.NeedDeviceSerialNumberInformation = false;
4109 }
4110 }
4111 /*
4112 Begin submitting new monitoring commands.
4113 */
4114 if (Controller->V1.NewEventLogSequenceNumber
4115 - Controller->V1.OldEventLogSequenceNumber > 0)
4116 {
4117 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4118 DAC960_V1_PerformEventLogOperation;
4119 Command->V1.CommandMailbox.Type3E.OperationType =
4120 DAC960_V1_GetEventLogEntry;
4121 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4122 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4123 Controller->V1.OldEventLogSequenceNumber;
4124 Command->V1.CommandMailbox.Type3E.BusAddress =
4125 Controller->V1.EventLogEntryDMA;
4126 DAC960_QueueCommand(Command);
4127 return;
4128 }
4129 if (Controller->V1.NeedErrorTableInformation)
4130 {
4131 Controller->V1.NeedErrorTableInformation = false;
4132 Command->V1.CommandMailbox.Type3.CommandOpcode =
4133 DAC960_V1_GetErrorTable;
4134 Command->V1.CommandMailbox.Type3.BusAddress =
4135 Controller->V1.NewErrorTableDMA;
4136 DAC960_QueueCommand(Command);
4137 return;
4138 }
4139 if (Controller->V1.NeedRebuildProgress &&
4140 Controller->V1.RebuildProgressFirst)
4141 {
4142 Controller->V1.NeedRebuildProgress = false;
4143 Command->V1.CommandMailbox.Type3.CommandOpcode =
4144 DAC960_V1_GetRebuildProgress;
4145 Command->V1.CommandMailbox.Type3.BusAddress =
4146 Controller->V1.RebuildProgressDMA;
4147 DAC960_QueueCommand(Command);
4148 return;
4149 }
4150 if (Controller->V1.NeedDeviceStateInformation)
4151 {
4152 if (Controller->V1.NeedDeviceInquiryInformation)
4153 {
4154 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4155 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4156
4157 dma_addr_t NewInquiryStandardDataDMA =
4158 Controller->V1.NewInquiryStandardDataDMA;
4159
4160 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4161 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4162 DCDB->Channel = Controller->V1.DeviceStateChannel;
4163 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4164 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4165 DCDB->EarlyStatus = false;
4166 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4167 DCDB->NoAutomaticRequestSense = false;
4168 DCDB->DisconnectPermitted = true;
4169 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4170 DCDB->BusAddress = NewInquiryStandardDataDMA;
4171 DCDB->CDBLength = 6;
4172 DCDB->TransferLengthHigh4 = 0;
4173 DCDB->SenseLength = sizeof(DCDB->SenseData);
4174 DCDB->CDB[0] = 0x12; /* INQUIRY */
4175 DCDB->CDB[1] = 0; /* EVPD = 0 */
4176 DCDB->CDB[2] = 0; /* Page Code */
4177 DCDB->CDB[3] = 0; /* Reserved */
4178 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4179 DCDB->CDB[5] = 0; /* Control */
4180 DAC960_QueueCommand(Command);
4181 return;
4182 }
4183 if (Controller->V1.NeedDeviceSerialNumberInformation)
4184 {
4185 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4186 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4187 dma_addr_t NewInquiryUnitSerialNumberDMA =
4188 Controller->V1.NewInquiryUnitSerialNumberDMA;
4189
4190 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4191 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4192 DCDB->Channel = Controller->V1.DeviceStateChannel;
4193 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4194 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4195 DCDB->EarlyStatus = false;
4196 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4197 DCDB->NoAutomaticRequestSense = false;
4198 DCDB->DisconnectPermitted = true;
4199 DCDB->TransferLength =
4200 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4201 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4202 DCDB->CDBLength = 6;
4203 DCDB->TransferLengthHigh4 = 0;
4204 DCDB->SenseLength = sizeof(DCDB->SenseData);
4205 DCDB->CDB[0] = 0x12; /* INQUIRY */
4206 DCDB->CDB[1] = 1; /* EVPD = 1 */
4207 DCDB->CDB[2] = 0x80; /* Page Code */
4208 DCDB->CDB[3] = 0; /* Reserved */
4209 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4210 DCDB->CDB[5] = 0; /* Control */
4211 DAC960_QueueCommand(Command);
4212 return;
4213 }
4214 if (Controller->V1.StartDeviceStateScan)
4215 {
4216 Controller->V1.DeviceStateChannel = 0;
4217 Controller->V1.DeviceStateTargetID = 0;
4218 Controller->V1.StartDeviceStateScan = false;
4219 }
4220 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4221 {
4222 Controller->V1.DeviceStateChannel++;
4223 Controller->V1.DeviceStateTargetID = 0;
4224 }
4225 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4226 {
4227 Controller->V1.NewDeviceState->DeviceState =
4228 DAC960_V1_Device_Dead;
4229 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4230 DAC960_V1_GetDeviceState;
4231 Command->V1.CommandMailbox.Type3D.Channel =
4232 Controller->V1.DeviceStateChannel;
4233 Command->V1.CommandMailbox.Type3D.TargetID =
4234 Controller->V1.DeviceStateTargetID;
4235 Command->V1.CommandMailbox.Type3D.BusAddress =
4236 Controller->V1.NewDeviceStateDMA;
4237 DAC960_QueueCommand(Command);
4238 return;
4239 }
4240 Controller->V1.NeedDeviceStateInformation = false;
4241 }
4242 if (Controller->V1.NeedLogicalDriveInformation)
4243 {
4244 Controller->V1.NeedLogicalDriveInformation = false;
4245 Command->V1.CommandMailbox.Type3.CommandOpcode =
4246 DAC960_V1_GetLogicalDriveInformation;
4247 Command->V1.CommandMailbox.Type3.BusAddress =
4248 Controller->V1.NewLogicalDriveInformationDMA;
4249 DAC960_QueueCommand(Command);
4250 return;
4251 }
4252 if (Controller->V1.NeedRebuildProgress)
4253 {
4254 Controller->V1.NeedRebuildProgress = false;
4255 Command->V1.CommandMailbox.Type3.CommandOpcode =
4256 DAC960_V1_GetRebuildProgress;
4257 Command->V1.CommandMailbox.Type3.BusAddress =
4258 Controller->V1.RebuildProgressDMA;
4259 DAC960_QueueCommand(Command);
4260 return;
4261 }
4262 if (Controller->V1.NeedConsistencyCheckProgress)
4263 {
4264 Controller->V1.NeedConsistencyCheckProgress = false;
4265 Command->V1.CommandMailbox.Type3.CommandOpcode =
4266 DAC960_V1_RebuildStat;
4267 Command->V1.CommandMailbox.Type3.BusAddress =
4268 Controller->V1.RebuildProgressDMA;
4269 DAC960_QueueCommand(Command);
4270 return;
4271 }
4272 if (Controller->V1.NeedBackgroundInitializationStatus)
4273 {
4274 Controller->V1.NeedBackgroundInitializationStatus = false;
4275 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4276 DAC960_V1_BackgroundInitializationControl;
4277 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4278 Command->V1.CommandMailbox.Type3B.BusAddress =
4279 Controller->V1.BackgroundInitializationStatusDMA;
4280 DAC960_QueueCommand(Command);
4281 return;
4282 }
4283 Controller->MonitoringTimerCount++;
4284 Controller->MonitoringTimer.expires =
4285 jiffies + DAC960_MonitoringTimerInterval;
4286 add_timer(&Controller->MonitoringTimer);
4287 }
4288 if (CommandType == DAC960_ImmediateCommand)
4289 {
4290 complete(Command->Completion);
4291 Command->Completion = NULL;
4292 return;
4293 }
4294 if (CommandType == DAC960_QueuedCommand)
4295 {
4296 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4297 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4298 Command->V1.KernelCommand = NULL;
4299 if (CommandOpcode == DAC960_V1_DCDB)
4300 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4301 [KernelCommand->DCDB->TargetID] =
4302 false;
4303 DAC960_DeallocateCommand(Command);
4304 KernelCommand->CompletionFunction(KernelCommand);
4305 return;
4306 }
4307 /*
4308 Queue a Status Monitoring Command to the Controller using the just
4309 completed Command if one was deferred previously due to lack of a
4310 free Command when the Monitoring Timer Function was called.
4311 */
4312 if (Controller->MonitoringCommandDeferred)
4313 {
4314 Controller->MonitoringCommandDeferred = false;
4315 DAC960_V1_QueueMonitoringCommand(Command);
4316 return;
4317 }
4318 /*
4319 Deallocate the Command.
4320 */
4321 DAC960_DeallocateCommand(Command);
4322 /*
4323 Wake up any processes waiting on a free Command.
4324 */
4325 wake_up(&Controller->CommandWaitQueue);
4326}
4327
4328
4329/*
4330 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4331 when an error occurs on a Read or Write operation.
4332*/
4333
4334static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4335{
4336 DAC960_Controller_T *Controller = Command->Controller;
4337 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4338 "NOT READY", "MEDIUM ERROR",
4339 "HARDWARE ERROR", "ILLEGAL REQUEST",
4340 "UNIT ATTENTION", "DATA PROTECT",
4341 "BLANK CHECK", "VENDOR-SPECIFIC",
4342 "COPY ABORTED", "ABORTED COMMAND",
4343 "EQUAL", "VOLUME OVERFLOW",
4344 "MISCOMPARE", "RESERVED" };
4345 unsigned char *CommandName = "UNKNOWN";
4346 switch (Command->CommandType)
4347 {
4348 case DAC960_ReadCommand:
4349 case DAC960_ReadRetryCommand:
4350 CommandName = "READ";
4351 break;
4352 case DAC960_WriteCommand:
4353 case DAC960_WriteRetryCommand:
4354 CommandName = "WRITE";
4355 break;
4356 case DAC960_MonitoringCommand:
4357 case DAC960_ImmediateCommand:
4358 case DAC960_QueuedCommand:
4359 break;
4360 }
4361 DAC960_Error("Error Condition %s on %s:\n", Controller,
4362 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4363 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4364 Controller, Controller->ControllerNumber,
4365 Command->LogicalDriveNumber, Command->BlockNumber,
4366 Command->BlockNumber + Command->BlockCount - 1);
4367}
4368
4369
4370/*
4371 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4372 occurs.
4373*/
4374
4375static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4376 DAC960_V2_Event_T *Event)
4377{
4378 DAC960_SCSI_RequestSense_T *RequestSense =
4379 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4380 unsigned char MessageBuffer[DAC960_LineBufferSize];
4381 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4382 { /* Physical Device Events (0x0000 - 0x007F) */
4383 { 0x0001, "P Online" },
4384 { 0x0002, "P Standby" },
4385 { 0x0005, "P Automatic Rebuild Started" },
4386 { 0x0006, "P Manual Rebuild Started" },
4387 { 0x0007, "P Rebuild Completed" },
4388 { 0x0008, "P Rebuild Cancelled" },
4389 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4390 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4391 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4392 { 0x000C, "S Offline" },
4393 { 0x000D, "P Found" },
4394 { 0x000E, "P Removed" },
4395 { 0x000F, "P Unconfigured" },
4396 { 0x0010, "P Expand Capacity Started" },
4397 { 0x0011, "P Expand Capacity Completed" },
4398 { 0x0012, "P Expand Capacity Failed" },
4399 { 0x0013, "P Command Timed Out" },
4400 { 0x0014, "P Command Aborted" },
4401 { 0x0015, "P Command Retried" },
4402 { 0x0016, "P Parity Error" },
4403 { 0x0017, "P Soft Error" },
4404 { 0x0018, "P Miscellaneous Error" },
4405 { 0x0019, "P Reset" },
4406 { 0x001A, "P Active Spare Found" },
4407 { 0x001B, "P Warm Spare Found" },
4408 { 0x001C, "S Sense Data Received" },
4409 { 0x001D, "P Initialization Started" },
4410 { 0x001E, "P Initialization Completed" },
4411 { 0x001F, "P Initialization Failed" },
4412 { 0x0020, "P Initialization Cancelled" },
4413 { 0x0021, "P Failed because Write Recovery Failed" },
4414 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4415 { 0x0023, "P Failed because of Double Check Condition" },
4416 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4417 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4418 { 0x0026, "P Failed because of Bad Tag from Device" },
4419 { 0x0027, "P Failed because of Command Timeout" },
4420 { 0x0028, "P Failed because of System Reset" },
4421 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4422 { 0x002A, "P Failed because Host Set Device to Failed State" },
4423 { 0x002B, "P Failed because of Selection Timeout" },
4424 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4425 { 0x002D, "P Failed because Device Returned Unknown Status" },
4426 { 0x002E, "P Failed because Device Not Ready" },
4427 { 0x002F, "P Failed because Device Not Found at Startup" },
4428 { 0x0030, "P Failed because COD Write Operation Failed" },
4429 { 0x0031, "P Failed because BDT Write Operation Failed" },
4430 { 0x0039, "P Missing at Startup" },
4431 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4432 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4433 { 0x003D, "P Standby Rebuild Started" },
4434 /* Logical Device Events (0x0080 - 0x00FF) */
4435 { 0x0080, "M Consistency Check Started" },
4436 { 0x0081, "M Consistency Check Completed" },
4437 { 0x0082, "M Consistency Check Cancelled" },
4438 { 0x0083, "M Consistency Check Completed With Errors" },
4439 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4440 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4441 { 0x0086, "L Offline" },
4442 { 0x0087, "L Critical" },
4443 { 0x0088, "L Online" },
4444 { 0x0089, "M Automatic Rebuild Started" },
4445 { 0x008A, "M Manual Rebuild Started" },
4446 { 0x008B, "M Rebuild Completed" },
4447 { 0x008C, "M Rebuild Cancelled" },
4448 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4449 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4450 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4451 { 0x0090, "M Initialization Started" },
4452 { 0x0091, "M Initialization Completed" },
4453 { 0x0092, "M Initialization Cancelled" },
4454 { 0x0093, "M Initialization Failed" },
4455 { 0x0094, "L Found" },
4456 { 0x0095, "L Deleted" },
4457 { 0x0096, "M Expand Capacity Started" },
4458 { 0x0097, "M Expand Capacity Completed" },
4459 { 0x0098, "M Expand Capacity Failed" },
4460 { 0x0099, "L Bad Block Found" },
4461 { 0x009A, "L Size Changed" },
4462 { 0x009B, "L Type Changed" },
4463 { 0x009C, "L Bad Data Block Found" },
4464 { 0x009E, "L Read of Data Block in BDT" },
4465 { 0x009F, "L Write Back Data for Disk Block Lost" },
4466 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4467 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4468 { 0x00A2, "L Standby Rebuild Started" },
4469 /* Fault Management Events (0x0100 - 0x017F) */
4470 { 0x0140, "E Fan %d Failed" },
4471 { 0x0141, "E Fan %d OK" },
4472 { 0x0142, "E Fan %d Not Present" },
4473 { 0x0143, "E Power Supply %d Failed" },
4474 { 0x0144, "E Power Supply %d OK" },
4475 { 0x0145, "E Power Supply %d Not Present" },
4476 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4477 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4478 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4479 { 0x0149, "E Temperature Sensor %d Not Present" },
4480 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4481 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4482 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4483 /* Controller Events (0x0180 - 0x01FF) */
4484 { 0x0181, "C Cache Write Back Error" },
4485 { 0x0188, "C Battery Backup Unit Found" },
4486 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4487 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4488 { 0x0193, "C Installation Aborted" },
4489 { 0x0195, "C Battery Backup Unit Physically Removed" },
4490 { 0x0196, "C Memory Error During Warm Boot" },
4491 { 0x019E, "C Memory Soft ECC Error Corrected" },
4492 { 0x019F, "C Memory Hard ECC Error Corrected" },
4493 { 0x01A2, "C Battery Backup Unit Failed" },
4494 { 0x01AB, "C Mirror Race Recovery Failed" },
4495 { 0x01AC, "C Mirror Race on Critical Drive" },
4496 /* Controller Internal Processor Events */
4497 { 0x0380, "C Internal Controller Hung" },
4498 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4499 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4500 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4501 { 0, "" } };
4502 int EventListIndex = 0, EventCode;
4503 unsigned char EventType, *EventMessage;
4504 if (Event->EventCode == 0x1C &&
4505 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4506 (RequestSense->AdditionalSenseCode == 0x80 ||
4507 RequestSense->AdditionalSenseCode == 0x81))
4508 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4509 RequestSense->AdditionalSenseCodeQualifier;
4510 while (true)
4511 {
4512 EventCode = EventList[EventListIndex].EventCode;
4513 if (EventCode == Event->EventCode || EventCode == 0) break;
4514 EventListIndex++;
4515 }
4516 EventType = EventList[EventListIndex].EventMessage[0];
4517 EventMessage = &EventList[EventListIndex].EventMessage[2];
4518 if (EventCode == 0)
4519 {
4520 DAC960_Critical("Unknown Controller Event Code %04X\n",
4521 Controller, Event->EventCode);
4522 return;
4523 }
4524 switch (EventType)
4525 {
4526 case 'P':
4527 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4528 Event->Channel, Event->TargetID, EventMessage);
4529 break;
4530 case 'L':
4531 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4532 Event->LogicalUnit, Controller->ControllerNumber,
4533 Event->LogicalUnit, EventMessage);
4534 break;
4535 case 'M':
4536 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4537 Event->LogicalUnit, Controller->ControllerNumber,
4538 Event->LogicalUnit, EventMessage);
4539 break;
4540 case 'S':
4541 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4542 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4543 RequestSense->AdditionalSenseCode == 0x04 &&
4544 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4545 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4546 break;
4547 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4548 Event->Channel, Event->TargetID, EventMessage);
4549 DAC960_Critical("Physical Device %d:%d Request Sense: "
4550 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4551 Controller,
4552 Event->Channel,
4553 Event->TargetID,
4554 RequestSense->SenseKey,
4555 RequestSense->AdditionalSenseCode,
4556 RequestSense->AdditionalSenseCodeQualifier);
4557 DAC960_Critical("Physical Device %d:%d Request Sense: "
4558 "Information = %02X%02X%02X%02X "
4559 "%02X%02X%02X%02X\n",
4560 Controller,
4561 Event->Channel,
4562 Event->TargetID,
4563 RequestSense->Information[0],
4564 RequestSense->Information[1],
4565 RequestSense->Information[2],
4566 RequestSense->Information[3],
4567 RequestSense->CommandSpecificInformation[0],
4568 RequestSense->CommandSpecificInformation[1],
4569 RequestSense->CommandSpecificInformation[2],
4570 RequestSense->CommandSpecificInformation[3]);
4571 break;
4572 case 'E':
4573 if (Controller->SuppressEnclosureMessages) break;
4574 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4575 DAC960_Critical("Enclosure %d %s\n", Controller,
4576 Event->TargetID, MessageBuffer);
4577 break;
4578 case 'C':
4579 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4580 break;
4581 default:
4582 DAC960_Critical("Unknown Controller Event Code %04X\n",
4583 Controller, Event->EventCode);
4584 break;
4585 }
4586}
4587
4588
4589/*
4590 DAC960_V2_ReportProgress prints an appropriate progress message for
4591 Logical Device Long Operations.
4592*/
4593
4594static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4595 unsigned char *MessageString,
4596 unsigned int LogicalDeviceNumber,
4597 unsigned long BlocksCompleted,
4598 unsigned long LogicalDeviceSize)
4599{
4600 Controller->EphemeralProgressMessage = true;
4601 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4602 "%d%% completed\n", Controller,
4603 MessageString,
4604 LogicalDeviceNumber,
4605 Controller->ControllerNumber,
4606 LogicalDeviceNumber,
4607 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4608 Controller->EphemeralProgressMessage = false;
4609}
4610
4611
4612/*
4613 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4614 for DAC960 V2 Firmware Controllers.
4615*/
4616
4617static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4618{
4619 DAC960_Controller_T *Controller = Command->Controller;
4620 DAC960_CommandType_T CommandType = Command->CommandType;
4621 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4622 DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
4623 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4624
4625 if (CommandType == DAC960_ReadCommand ||
4626 CommandType == DAC960_WriteCommand)
4627 {
4628
4629#ifdef FORCE_RETRY_DEBUG
4630 CommandStatus = DAC960_V2_AbormalCompletion;
4631#endif
4632 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4633
4634 if (CommandStatus == DAC960_V2_NormalCompletion) {
4635
4636 if (!DAC960_ProcessCompletedRequest(Command, true))
4637 BUG();
4638
4639 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4640 {
4641 /*
4642 * break the command down into pieces and resubmit each
4643 * piece, hoping that some of them will succeed.
4644 */
4645 DAC960_queue_partial_rw(Command);
4646 return;
4647 }
4648 else
4649 {
4650 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4651 DAC960_V2_ReadWriteError(Command);
4652 /*
4653 Perform completion processing for all buffers in this I/O Request.
4654 */
4655 (void)DAC960_ProcessCompletedRequest(Command, false);
4656 }
4657 }
4658 else if (CommandType == DAC960_ReadRetryCommand ||
4659 CommandType == DAC960_WriteRetryCommand)
4660 {
87d156bf 4661 bool normal_completion;
1da177e4
LT		 4662
4663#ifdef FORCE_RETRY_FAILURE_DEBUG
4664 static int retry_count = 1;
4665#endif
4666 /*
4667 Perform completion processing for the portion that was
4668 retried, and submit the next portion, if any.
4669 */
4670 normal_completion = true;
4671 if (CommandStatus != DAC960_V2_NormalCompletion) {
4672 normal_completion = false;
4673 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4674 DAC960_V2_ReadWriteError(Command);
4675 }
4676
4677#ifdef FORCE_RETRY_FAILURE_DEBUG
4678 if (!(++retry_count % 10000)) {
4679 printk("V2 error retry failure test\n");
4680 normal_completion = false;
4681 DAC960_V2_ReadWriteError(Command);
4682 }
4683#endif
4684
4685 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4686 DAC960_queue_partial_rw(Command);
4687 return;
4688 }
4689 }
4690 else if (CommandType == DAC960_MonitoringCommand)
4691 {
4692 if (Controller->ShutdownMonitoringTimer)
4693 return;
4694 if (CommandOpcode == DAC960_V2_GetControllerInfo)
4695 {
4696 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4697 Controller->V2.NewControllerInformation;
4698 DAC960_V2_ControllerInfo_T *ControllerInfo =
4699 &Controller->V2.ControllerInformation;
4700 Controller->LogicalDriveCount =
4701 NewControllerInfo->LogicalDevicesPresent;
4702 Controller->V2.NeedLogicalDeviceInformation = true;
4703 Controller->V2.NeedPhysicalDeviceInformation = true;
4704 Controller->V2.StartLogicalDeviceInformationScan = true;
4705 Controller->V2.StartPhysicalDeviceInformationScan = true;
4706 Controller->MonitoringAlertMode =
4707 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4708 NewControllerInfo->LogicalDevicesOffline > 0 ||
4709 NewControllerInfo->PhysicalDisksCritical > 0 ||
4710 NewControllerInfo->PhysicalDisksOffline > 0);
4711 memcpy(ControllerInfo, NewControllerInfo,
4712 sizeof(DAC960_V2_ControllerInfo_T));
4713 }
4714 else if (CommandOpcode == DAC960_V2_GetEvent)
4715 {
4716 if (CommandStatus == DAC960_V2_NormalCompletion) {
4717 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4718 }
4719 Controller->V2.NextEventSequenceNumber++;
4720 }
4721 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4722 CommandStatus == DAC960_V2_NormalCompletion)
4723 {
4724 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4725 Controller->V2.NewPhysicalDeviceInformation;
4726 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4727 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4728 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4729 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4730 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4731 unsigned int DeviceIndex;
4732 while (PhysicalDeviceInfo != NULL &&
4733 (NewPhysicalDeviceInfo->Channel >
4734 PhysicalDeviceInfo->Channel ||
4735 (NewPhysicalDeviceInfo->Channel ==
4736 PhysicalDeviceInfo->Channel &&
4737 (NewPhysicalDeviceInfo->TargetID >
4738 PhysicalDeviceInfo->TargetID ||
4739 (NewPhysicalDeviceInfo->TargetID ==
4740 PhysicalDeviceInfo->TargetID &&
4741 NewPhysicalDeviceInfo->LogicalUnit >
4742 PhysicalDeviceInfo->LogicalUnit)))))
4743 {
4744 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4745 Controller,
4746 PhysicalDeviceInfo->Channel,
4747 PhysicalDeviceInfo->TargetID);
4748 Controller->V2.PhysicalDeviceInformation
4749 [PhysicalDeviceIndex] = NULL;
4750 Controller->V2.InquiryUnitSerialNumber
4751 [PhysicalDeviceIndex] = NULL;
4752 kfree(PhysicalDeviceInfo);
4753 kfree(InquiryUnitSerialNumber);
4754 for (DeviceIndex = PhysicalDeviceIndex;
4755 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4756 DeviceIndex++)
4757 {
4758 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4759 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4760 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4761 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4762 }
4763 Controller->V2.PhysicalDeviceInformation
4764 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4765 Controller->V2.InquiryUnitSerialNumber
4766 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4767 PhysicalDeviceInfo =
4768 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4769 InquiryUnitSerialNumber =
4770 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4771 }
4772 if (PhysicalDeviceInfo == NULL ||
4773 (NewPhysicalDeviceInfo->Channel !=
4774 PhysicalDeviceInfo->Channel) ||
4775 (NewPhysicalDeviceInfo->TargetID !=
4776 PhysicalDeviceInfo->TargetID) ||
4777 (NewPhysicalDeviceInfo->LogicalUnit !=
4778 PhysicalDeviceInfo->LogicalUnit))
4779 {
07fb75a5 4780 PhysicalDeviceInfo =
1da177e4
LT		 4781 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4782 InquiryUnitSerialNumber =
1da177e4
LT		 4783 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4784 GFP_ATOMIC);
07fb75a5
JJ		 4785 if (InquiryUnitSerialNumber == NULL ||
4786 PhysicalDeviceInfo == NULL)
1da177e4 4787 {
07fb75a5
JJ		 4788 kfree(InquiryUnitSerialNumber);
4789 InquiryUnitSerialNumber = NULL;
1da177e4
LT		 4790 kfree(PhysicalDeviceInfo);
4791 PhysicalDeviceInfo = NULL;
4792 }
4793 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4794 Controller,
4795 NewPhysicalDeviceInfo->Channel,
4796 NewPhysicalDeviceInfo->TargetID,
4797 (PhysicalDeviceInfo != NULL
4798 ? "" : " - Allocation Failed"));
4799 if (PhysicalDeviceInfo != NULL)
4800 {
4801 memset(PhysicalDeviceInfo, 0,
4802 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4803 PhysicalDeviceInfo->PhysicalDeviceState =
4804 DAC960_V2_Device_InvalidState;
4805 memset(InquiryUnitSerialNumber, 0,
4806 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4807 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4808 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4809 DeviceIndex > PhysicalDeviceIndex;
4810 DeviceIndex--)
4811 {
4812 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4813 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4814 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4815 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4816 }
4817 Controller->V2.PhysicalDeviceInformation
4818 [PhysicalDeviceIndex] =
4819 PhysicalDeviceInfo;
4820 Controller->V2.InquiryUnitSerialNumber
4821 [PhysicalDeviceIndex] =
4822 InquiryUnitSerialNumber;
4823 Controller->V2.NeedDeviceSerialNumberInformation = true;
4824 }
4825 }
4826 if (PhysicalDeviceInfo != NULL)
4827 {
4828 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4829 PhysicalDeviceInfo->PhysicalDeviceState)
4830 DAC960_Critical(
4831 "Physical Device %d:%d is now %s\n", Controller,
4832 NewPhysicalDeviceInfo->Channel,
4833 NewPhysicalDeviceInfo->TargetID,
4834 (NewPhysicalDeviceInfo->PhysicalDeviceState
4835 == DAC960_V2_Device_Online
4836 ? "ONLINE"
4837 : NewPhysicalDeviceInfo->PhysicalDeviceState
4838 == DAC960_V2_Device_Rebuild
4839 ? "REBUILD"
4840 : NewPhysicalDeviceInfo->PhysicalDeviceState
4841 == DAC960_V2_Device_Missing
4842 ? "MISSING"
4843 : NewPhysicalDeviceInfo->PhysicalDeviceState
4844 == DAC960_V2_Device_Critical
4845 ? "CRITICAL"
4846 : NewPhysicalDeviceInfo->PhysicalDeviceState
4847 == DAC960_V2_Device_Dead
4848 ? "DEAD"
4849 : NewPhysicalDeviceInfo->PhysicalDeviceState
4850 == DAC960_V2_Device_SuspectedDead
4851 ? "SUSPECTED-DEAD"
4852 : NewPhysicalDeviceInfo->PhysicalDeviceState
4853 == DAC960_V2_Device_CommandedOffline
4854 ? "COMMANDED-OFFLINE"
4855 : NewPhysicalDeviceInfo->PhysicalDeviceState
4856 == DAC960_V2_Device_Standby
4857 ? "STANDBY" : "UNKNOWN"));
4858 if ((NewPhysicalDeviceInfo->ParityErrors !=
4859 PhysicalDeviceInfo->ParityErrors) ||
4860 (NewPhysicalDeviceInfo->SoftErrors !=
4861 PhysicalDeviceInfo->SoftErrors) ||
4862 (NewPhysicalDeviceInfo->HardErrors !=
4863 PhysicalDeviceInfo->HardErrors) ||
4864 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4865 PhysicalDeviceInfo->MiscellaneousErrors) ||
4866 (NewPhysicalDeviceInfo->CommandTimeouts !=
4867 PhysicalDeviceInfo->CommandTimeouts) ||
4868 (NewPhysicalDeviceInfo->Retries !=
4869 PhysicalDeviceInfo->Retries) ||
4870 (NewPhysicalDeviceInfo->Aborts !=
4871 PhysicalDeviceInfo->Aborts) ||
4872 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4873 PhysicalDeviceInfo->PredictedFailuresDetected))
4874 {
4875 DAC960_Critical("Physical Device %d:%d Errors: "
4876 "Parity = %d, Soft = %d, "
4877 "Hard = %d, Misc = %d\n",
4878 Controller,
4879 NewPhysicalDeviceInfo->Channel,
4880 NewPhysicalDeviceInfo->TargetID,
4881 NewPhysicalDeviceInfo->ParityErrors,
4882 NewPhysicalDeviceInfo->SoftErrors,
4883 NewPhysicalDeviceInfo->HardErrors,
4884 NewPhysicalDeviceInfo->MiscellaneousErrors);
4885 DAC960_Critical("Physical Device %d:%d Errors: "
4886 "Timeouts = %d, Retries = %d, "
4887 "Aborts = %d, Predicted = %d\n",
4888 Controller,
4889 NewPhysicalDeviceInfo->Channel,
4890 NewPhysicalDeviceInfo->TargetID,
4891 NewPhysicalDeviceInfo->CommandTimeouts,
4892 NewPhysicalDeviceInfo->Retries,
4893 NewPhysicalDeviceInfo->Aborts,
4894 NewPhysicalDeviceInfo
4895 ->PredictedFailuresDetected);
4896 }
4897 if ((PhysicalDeviceInfo->PhysicalDeviceState
4898 == DAC960_V2_Device_Dead ||
4899 PhysicalDeviceInfo->PhysicalDeviceState
4900 == DAC960_V2_Device_InvalidState) &&
4901 NewPhysicalDeviceInfo->PhysicalDeviceState
4902 != DAC960_V2_Device_Dead)
4903 Controller->V2.NeedDeviceSerialNumberInformation = true;
4904 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4905 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4906 }
4907 NewPhysicalDeviceInfo->LogicalUnit++;
4908 Controller->V2.PhysicalDeviceIndex++;
4909 }
4910 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4911 {
4912 unsigned int DeviceIndex;
4913 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4914 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4915 DeviceIndex++)
4916 {
4917 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4918 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4919 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4920 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4921 if (PhysicalDeviceInfo == NULL) break;
4922 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4923 Controller,
4924 PhysicalDeviceInfo->Channel,
4925 PhysicalDeviceInfo->TargetID);
4926 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4927 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4928 kfree(PhysicalDeviceInfo);
4929 kfree(InquiryUnitSerialNumber);
4930 }
4931 Controller->V2.NeedPhysicalDeviceInformation = false;
4932 }
4933 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4934 CommandStatus == DAC960_V2_NormalCompletion)
4935 {
4936 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4937 Controller->V2.NewLogicalDeviceInformation;
4938 unsigned short LogicalDeviceNumber =
4939 NewLogicalDeviceInfo->LogicalDeviceNumber;
4940 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4941 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4942 if (LogicalDeviceInfo == NULL)
4943 {
4944 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4945 PhysicalDevice.Controller = 0;
4946 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4947 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4948 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4949 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4950 PhysicalDevice;
0a361e31
AD		 4951 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4952 GFP_ATOMIC);
1da177e4
LT		 4953 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4954 LogicalDeviceInfo;
4955 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4956 "Now Exists%s\n", Controller,
4957 LogicalDeviceNumber,
4958 Controller->ControllerNumber,
4959 LogicalDeviceNumber,
4960 (LogicalDeviceInfo != NULL
4961 ? "" : " - Allocation Failed"));
4962 if (LogicalDeviceInfo != NULL)
4963 {
4964 memset(LogicalDeviceInfo, 0,
4965 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4966 DAC960_ComputeGenericDiskInfo(Controller);
4967 }
4968 }
4969 if (LogicalDeviceInfo != NULL)
4970 {
4971 unsigned long LogicalDeviceSize =
4972 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4973 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4974 LogicalDeviceInfo->LogicalDeviceState)
4975 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4976 "is now %s\n", Controller,
4977 LogicalDeviceNumber,
4978 Controller->ControllerNumber,
4979 LogicalDeviceNumber,
4980 (NewLogicalDeviceInfo->LogicalDeviceState
4981 == DAC960_V2_LogicalDevice_Online
4982 ? "ONLINE"
4983 : NewLogicalDeviceInfo->LogicalDeviceState
4984 == DAC960_V2_LogicalDevice_Critical
4985 ? "CRITICAL" : "OFFLINE"));
4986 if ((NewLogicalDeviceInfo->SoftErrors !=
4987 LogicalDeviceInfo->SoftErrors) ||
4988 (NewLogicalDeviceInfo->CommandsFailed !=
4989 LogicalDeviceInfo->CommandsFailed) ||
4990 (NewLogicalDeviceInfo->DeferredWriteErrors !=
4991 LogicalDeviceInfo->DeferredWriteErrors))
4992 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
4993 "Soft = %d, Failed = %d, Deferred Write = %d\n",
4994 Controller, LogicalDeviceNumber,
4995 Controller->ControllerNumber,
4996 LogicalDeviceNumber,
4997 NewLogicalDeviceInfo->SoftErrors,
4998 NewLogicalDeviceInfo->CommandsFailed,
4999 NewLogicalDeviceInfo->DeferredWriteErrors);
5000 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5001 DAC960_V2_ReportProgress(Controller,
5002 "Consistency Check",
5003 LogicalDeviceNumber,
5004 NewLogicalDeviceInfo
5005 ->ConsistencyCheckBlockNumber,
5006 LogicalDeviceSize);
5007 else if (NewLogicalDeviceInfo->RebuildInProgress)
5008 DAC960_V2_ReportProgress(Controller,
5009 "Rebuild",
5010 LogicalDeviceNumber,
5011 NewLogicalDeviceInfo
5012 ->RebuildBlockNumber,
5013 LogicalDeviceSize);
5014 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5015 DAC960_V2_ReportProgress(Controller,
5016 "Background Initialization",
5017 LogicalDeviceNumber,
5018 NewLogicalDeviceInfo
5019 ->BackgroundInitializationBlockNumber,
5020 LogicalDeviceSize);
5021 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5022 DAC960_V2_ReportProgress(Controller,
5023 "Foreground Initialization",
5024 LogicalDeviceNumber,
5025 NewLogicalDeviceInfo
5026 ->ForegroundInitializationBlockNumber,
5027 LogicalDeviceSize);
5028 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5029 DAC960_V2_ReportProgress(Controller,
5030 "Data Migration",
5031 LogicalDeviceNumber,
5032 NewLogicalDeviceInfo
5033 ->DataMigrationBlockNumber,
5034 LogicalDeviceSize);
5035 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5036 DAC960_V2_ReportProgress(Controller,
5037 "Patrol Operation",
5038 LogicalDeviceNumber,
5039 NewLogicalDeviceInfo
5040 ->PatrolOperationBlockNumber,
5041 LogicalDeviceSize);
5042 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5043 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5044 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5045 "Background Initialization %s\n",
5046 Controller,
5047 LogicalDeviceNumber,
5048 Controller->ControllerNumber,
5049 LogicalDeviceNumber,
5050 (NewLogicalDeviceInfo->LogicalDeviceControl
5051 .LogicalDeviceInitialized
5052 ? "Completed" : "Failed"));
5053 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5054 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5055 }
5056 Controller->V2.LogicalDriveFoundDuringScan
5057 [LogicalDeviceNumber] = true;
5058 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5059 }
5060 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5061 {
5062 int LogicalDriveNumber;
5063 for (LogicalDriveNumber = 0;
5064 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5065 LogicalDriveNumber++)
5066 {
5067 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5068 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5069 if (LogicalDeviceInfo == NULL ||
5070 Controller->V2.LogicalDriveFoundDuringScan
5071 [LogicalDriveNumber])
5072 continue;
5073 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5074 "No Longer Exists\n", Controller,
5075 LogicalDriveNumber,
5076 Controller->ControllerNumber,
5077 LogicalDriveNumber);
5078 Controller->V2.LogicalDeviceInformation
5079 [LogicalDriveNumber] = NULL;
5080 kfree(LogicalDeviceInfo);
5081 Controller->LogicalDriveInitiallyAccessible
5082 [LogicalDriveNumber] = false;
5083 DAC960_ComputeGenericDiskInfo(Controller);
5084 }
5085 Controller->V2.NeedLogicalDeviceInformation = false;
5086 }
5087 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5088 {
5089 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5090 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5091
5092 if (CommandStatus != DAC960_V2_NormalCompletion) {
5093 memset(InquiryUnitSerialNumber,
5094 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5095 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5096 } else
5097 memcpy(InquiryUnitSerialNumber,
5098 Controller->V2.NewInquiryUnitSerialNumber,
5099 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5100
5101 Controller->V2.NeedDeviceSerialNumberInformation = false;
5102 }
5103
5104 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5105 - Controller->V2.NextEventSequenceNumber > 0)
5106 {
5107 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5108 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5109 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5110 Controller->V2.NextEventSequenceNumber >> 16;
5111 CommandMailbox->GetEvent.ControllerNumber = 0;
5112 CommandMailbox->GetEvent.IOCTL_Opcode =
5113 DAC960_V2_GetEvent;
5114 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5115 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5116 CommandMailbox->GetEvent.DataTransferMemoryAddress
5117 .ScatterGatherSegments[0]
5118 .SegmentDataPointer =
5119 Controller->V2.EventDMA;
5120 CommandMailbox->GetEvent.DataTransferMemoryAddress
5121 .ScatterGatherSegments[0]
5122 .SegmentByteCount =
5123 CommandMailbox->GetEvent.DataTransferSize;
5124 DAC960_QueueCommand(Command);
5125 return;
5126 }
5127 if (Controller->V2.NeedPhysicalDeviceInformation)
5128 {
5129 if (Controller->V2.NeedDeviceSerialNumberInformation)
5130 {
5131 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5132 Controller->V2.NewInquiryUnitSerialNumber;
5133 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5134
5135 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5136 Controller->V2.NewPhysicalDeviceInformation->Channel,
5137 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5138 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5139
5140
5141 DAC960_QueueCommand(Command);
5142 return;
5143 }
5144 if (Controller->V2.StartPhysicalDeviceInformationScan)
5145 {
5146 Controller->V2.PhysicalDeviceIndex = 0;
5147 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5148 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5149 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5150 Controller->V2.StartPhysicalDeviceInformationScan = false;
5151 }
5152 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5153 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5154 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5155 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5156 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5157 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5158 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5159 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5160 Controller->V2.NewPhysicalDeviceInformation->Channel;
5161 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5162 DAC960_V2_GetPhysicalDeviceInfoValid;
5163 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5164 .ScatterGatherSegments[0]
5165 .SegmentDataPointer =
5166 Controller->V2.NewPhysicalDeviceInformationDMA;
5167 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5168 .ScatterGatherSegments[0]
5169 .SegmentByteCount =
5170 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5171 DAC960_QueueCommand(Command);
5172 return;
5173 }
5174 if (Controller->V2.NeedLogicalDeviceInformation)
5175 {
5176 if (Controller->V2.StartLogicalDeviceInformationScan)
5177 {
5178 int LogicalDriveNumber;
5179 for (LogicalDriveNumber = 0;
5180 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5181 LogicalDriveNumber++)
5182 Controller->V2.LogicalDriveFoundDuringScan
5183 [LogicalDriveNumber] = false;
5184 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5185 Controller->V2.StartLogicalDeviceInformationScan = false;
5186 }
5187 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5188 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5189 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5190 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5191 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5192 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5193 DAC960_V2_GetLogicalDeviceInfoValid;
5194 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5195 .ScatterGatherSegments[0]
5196 .SegmentDataPointer =
5197 Controller->V2.NewLogicalDeviceInformationDMA;
5198 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5199 .ScatterGatherSegments[0]
5200 .SegmentByteCount =
5201 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5202 DAC960_QueueCommand(Command);
5203 return;
5204 }
5205 Controller->MonitoringTimerCount++;
5206 Controller->MonitoringTimer.expires =
5207 jiffies + DAC960_HealthStatusMonitoringInterval;
5208 add_timer(&Controller->MonitoringTimer);
5209 }
5210 if (CommandType == DAC960_ImmediateCommand)
5211 {
5212 complete(Command->Completion);
5213 Command->Completion = NULL;
5214 return;
5215 }
5216 if (CommandType == DAC960_QueuedCommand)
5217 {
5218 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5219 KernelCommand->CommandStatus = CommandStatus;
5220 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5221 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5222 Command->V2.KernelCommand = NULL;
5223 DAC960_DeallocateCommand(Command);
5224 KernelCommand->CompletionFunction(KernelCommand);
5225 return;
5226 }
5227 /*
5228 Queue a Status Monitoring Command to the Controller using the just
5229 completed Command if one was deferred previously due to lack of a
5230 free Command when the Monitoring Timer Function was called.
5231 */
5232 if (Controller->MonitoringCommandDeferred)
5233 {
5234 Controller->MonitoringCommandDeferred = false;
5235 DAC960_V2_QueueMonitoringCommand(Command);
5236 return;
5237 }
5238 /*
5239 Deallocate the Command.
5240 */
5241 DAC960_DeallocateCommand(Command);
5242 /*
5243 Wake up any processes waiting on a free Command.
5244 */
5245 wake_up(&Controller->CommandWaitQueue);
5246}
5247
5b76ffd5
CH		 5248/*
5249 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5250 Controllers.
5251*/
5252
5253static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
7d12e780 5254 void *DeviceIdentifier)
5b76ffd5 5255{
c7bec5ab 5256 DAC960_Controller_T *Controller = DeviceIdentifier;
5b76ffd5
CH		 5257 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5258 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5259 unsigned long flags;
5260
5261 spin_lock_irqsave(&Controller->queue_lock, flags);
5262 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5263 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5264 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5265 {
5266 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5267 NextStatusMailbox->Fields.CommandIdentifier;
5268 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5269 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5270 Command->V2.RequestSenseLength =
5271 NextStatusMailbox->Fields.RequestSenseLength;
5272 Command->V2.DataTransferResidue =
5273 NextStatusMailbox->Fields.DataTransferResidue;
5274 NextStatusMailbox->Words[0] = 0;
5275 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5276 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5277 DAC960_V2_ProcessCompletedCommand(Command);
5278 }
5279 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5280 /*
5281 Attempt to remove additional I/O Requests from the Controller's
5282 I/O Request Queue and queue them to the Controller.
5283 */
5284 DAC960_ProcessRequest(Controller);
5285 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5286 return IRQ_HANDLED;
5287}
1da177e4
LT		 5288
5289/*
5290 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5291 Controllers.
5292*/
5293
5294static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
7d12e780 5295 void *DeviceIdentifier)
1da177e4 5296{
c7bec5ab 5297 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5298 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5299 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5300 unsigned long flags;
5301
5302 spin_lock_irqsave(&Controller->queue_lock, flags);
5303 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5304 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5305 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5306 {
5307 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5308 NextStatusMailbox->Fields.CommandIdentifier;
5309 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5310 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5311 Command->V2.RequestSenseLength =
5312 NextStatusMailbox->Fields.RequestSenseLength;
5313 Command->V2.DataTransferResidue =
5314 NextStatusMailbox->Fields.DataTransferResidue;
5315 NextStatusMailbox->Words[0] = 0;
5316 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5317 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5318 DAC960_V2_ProcessCompletedCommand(Command);
5319 }
5320 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5321 /*
5322 Attempt to remove additional I/O Requests from the Controller's
5323 I/O Request Queue and queue them to the Controller.
5324 */
5325 DAC960_ProcessRequest(Controller);
5326 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5327 return IRQ_HANDLED;
5328}
5329
5330
5331/*
5332 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5333 Controllers.
5334*/
5335
5336static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
7d12e780 5337 void *DeviceIdentifier)
1da177e4 5338{
c7bec5ab 5339 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5340 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5341 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5342 unsigned long flags;
5343
5344 spin_lock_irqsave(&Controller->queue_lock, flags);
5345 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5346 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5347 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5348 {
5349 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5350 NextStatusMailbox->Fields.CommandIdentifier;
5351 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5352 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5353 Command->V2.RequestSenseLength =
5354 NextStatusMailbox->Fields.RequestSenseLength;
5355 Command->V2.DataTransferResidue =
5356 NextStatusMailbox->Fields.DataTransferResidue;
5357 NextStatusMailbox->Words[0] = 0;
5358 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5359 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5360 DAC960_V2_ProcessCompletedCommand(Command);
5361 }
5362 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5363 /*
5364 Attempt to remove additional I/O Requests from the Controller's
5365 I/O Request Queue and queue them to the Controller.
5366 */
5367 DAC960_ProcessRequest(Controller);
5368 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5369 return IRQ_HANDLED;
5370}
5371
5372
5373/*
5374 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5375 Controllers.
5376*/
5377
5378static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
7d12e780 5379 void *DeviceIdentifier)
1da177e4 5380{
c7bec5ab 5381 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5382 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5383 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5384 unsigned long flags;
5385
5386 spin_lock_irqsave(&Controller->queue_lock, flags);
5387 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5388 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5389 while (NextStatusMailbox->Fields.Valid)
5390 {
5391 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5392 NextStatusMailbox->Fields.CommandIdentifier;
5393 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5394 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5395 NextStatusMailbox->Word = 0;
5396 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5397 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5398 DAC960_V1_ProcessCompletedCommand(Command);
5399 }
5400 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5401 /*
5402 Attempt to remove additional I/O Requests from the Controller's
5403 I/O Request Queue and queue them to the Controller.
5404 */
5405 DAC960_ProcessRequest(Controller);
5406 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5407 return IRQ_HANDLED;
5408}
5409
5410
5411/*
5412 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5413 Controllers.
5414*/
5415
5416static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
7d12e780 5417 void *DeviceIdentifier)
1da177e4 5418{
c7bec5ab 5419 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5420 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5421 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5422 unsigned long flags;
5423
5424 spin_lock_irqsave(&Controller->queue_lock, flags);
5425 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5426 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5427 while (NextStatusMailbox->Fields.Valid)
5428 {
5429 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5430 NextStatusMailbox->Fields.CommandIdentifier;
5431 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5432 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5433 NextStatusMailbox->Word = 0;
5434 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5435 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5436 DAC960_V1_ProcessCompletedCommand(Command);
5437 }
5438 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5439 /*
5440 Attempt to remove additional I/O Requests from the Controller's
5441 I/O Request Queue and queue them to the Controller.
5442 */
5443 DAC960_ProcessRequest(Controller);
5444 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5445 return IRQ_HANDLED;
5446}
5447
5448
5449/*
5450 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5451 Controllers.
5452*/
5453
5454static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
7d12e780 5455 void *DeviceIdentifier)
1da177e4 5456{
c7bec5ab 5457 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5458 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5459 unsigned long flags;
5460
5461 spin_lock_irqsave(&Controller->queue_lock, flags);
5462 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5463 {
5464 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5465 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5466 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5467 Command->V1.CommandStatus =
5468 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5469 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5470 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5471 DAC960_V1_ProcessCompletedCommand(Command);
5472 }
5473 /*
5474 Attempt to remove additional I/O Requests from the Controller's
5475 I/O Request Queue and queue them to the Controller.
5476 */
5477 DAC960_ProcessRequest(Controller);
5478 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5479 return IRQ_HANDLED;
5480}
5481
5482
5483/*
5484 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5485 Controllers.
5486
5487 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5488 on the data having been placed into DAC960_Controller_T, rather than
5489 an arbitrary buffer.
5490*/
5491
5492static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
7d12e780 5493 void *DeviceIdentifier)
1da177e4 5494{
c7bec5ab 5495 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5496 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5497 unsigned long flags;
5498
5499 spin_lock_irqsave(&Controller->queue_lock, flags);
5500 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5501 {
5502 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5503 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5504 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5505 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5506 DAC960_V1_CommandOpcode_T CommandOpcode =
5507 CommandMailbox->Common.CommandOpcode;
5508 Command->V1.CommandStatus =
5509 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5510 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5511 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5512 switch (CommandOpcode)
5513 {
5514 case DAC960_V1_Enquiry_Old:
5515 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5516 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5517 break;
5518 case DAC960_V1_GetDeviceState_Old:
5519 Command->V1.CommandMailbox.Common.CommandOpcode =
5520 DAC960_V1_GetDeviceState;
5521 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5522 break;
5523 case DAC960_V1_Read_Old:
5524 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5525 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5526 break;
5527 case DAC960_V1_Write_Old:
5528 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5529 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5530 break;
5531 case DAC960_V1_ReadWithScatterGather_Old:
5532 Command->V1.CommandMailbox.Common.CommandOpcode =
5533 DAC960_V1_ReadWithScatterGather;
5534 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5535 break;
5536 case DAC960_V1_WriteWithScatterGather_Old:
5537 Command->V1.CommandMailbox.Common.CommandOpcode =
5538 DAC960_V1_WriteWithScatterGather;
5539 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5540 break;
5541 default:
5542 break;
5543 }
5544 DAC960_V1_ProcessCompletedCommand(Command);
5545 }
5546 /*
5547 Attempt to remove additional I/O Requests from the Controller's
5548 I/O Request Queue and queue them to the Controller.
5549 */
5550 DAC960_ProcessRequest(Controller);
5551 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5552 return IRQ_HANDLED;
5553}
5554
5555
5556/*
5557 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5558 Firmware Controllers.
5559*/
5560
5561static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5562{
5563 DAC960_Controller_T *Controller = Command->Controller;
5564 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5565 DAC960_V1_ClearCommand(Command);
5566 Command->CommandType = DAC960_MonitoringCommand;
5567 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5568 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5569 DAC960_QueueCommand(Command);
5570}
5571
5572
5573/*
5574 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5575 Firmware Controllers.
5576*/
5577
5578static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5579{
5580 DAC960_Controller_T *Controller = Command->Controller;
5581 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5582 DAC960_V2_ClearCommand(Command);
5583 Command->CommandType = DAC960_MonitoringCommand;
5584 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5585 CommandMailbox->ControllerInfo.CommandControlBits
5586 .DataTransferControllerToHost = true;
5587 CommandMailbox->ControllerInfo.CommandControlBits
5588 .NoAutoRequestSense = true;
5589 CommandMailbox->ControllerInfo.DataTransferSize =
5590 sizeof(DAC960_V2_ControllerInfo_T);
5591 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5592 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5593 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5594 .ScatterGatherSegments[0]
5595 .SegmentDataPointer =
5596 Controller->V2.NewControllerInformationDMA;
5597 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5598 .ScatterGatherSegments[0]
5599 .SegmentByteCount =
5600 CommandMailbox->ControllerInfo.DataTransferSize;
5601 DAC960_QueueCommand(Command);
5602}
5603
5604
5605/*
5606 DAC960_MonitoringTimerFunction is the timer function for monitoring
5607 the status of DAC960 Controllers.
5608*/
5609
5610static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
5611{
5612 DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
5613 DAC960_Command_T *Command;
5614 unsigned long flags;
5615
5616 if (Controller->FirmwareType == DAC960_V1_Controller)
5617 {
5618 spin_lock_irqsave(&Controller->queue_lock, flags);
5619 /*
5620 Queue a Status Monitoring Command to Controller.
5621 */
5622 Command = DAC960_AllocateCommand(Controller);
5623 if (Command != NULL)
5624 DAC960_V1_QueueMonitoringCommand(Command);
5625 else Controller->MonitoringCommandDeferred = true;
5626 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5627 }
5628 else
5629 {
5630 DAC960_V2_ControllerInfo_T *ControllerInfo =
5631 &Controller->V2.ControllerInformation;
5632 unsigned int StatusChangeCounter =
5633 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
87d156bf 5634 bool ForceMonitoringCommand = false;
50297cbf
MFP		 5635 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5636 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 5637 {
5638 int LogicalDriveNumber;
5639 for (LogicalDriveNumber = 0;
5640 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5641 LogicalDriveNumber++)
5642 {
5643 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5644 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5645 if (LogicalDeviceInfo == NULL) continue;
5646 if (!LogicalDeviceInfo->LogicalDeviceControl
5647 .LogicalDeviceInitialized)
5648 {
5649 ForceMonitoringCommand = true;
5650 break;
5651 }
5652 }
5653 Controller->SecondaryMonitoringTime = jiffies;
5654 }
5655 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5656 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5657 == Controller->V2.NextEventSequenceNumber &&
5658 (ControllerInfo->BackgroundInitializationsActive +
5659 ControllerInfo->LogicalDeviceInitializationsActive +
5660 ControllerInfo->PhysicalDeviceInitializationsActive +
5661 ControllerInfo->ConsistencyChecksActive +
5662 ControllerInfo->RebuildsActive +
5663 ControllerInfo->OnlineExpansionsActive == 0 ||
50297cbf
MFP		 5664 time_before(jiffies, Controller->PrimaryMonitoringTime
5665 + DAC960_MonitoringTimerInterval)) &&
1da177e4
LT		 5666 !ForceMonitoringCommand)
5667 {
5668 Controller->MonitoringTimer.expires =
5669 jiffies + DAC960_HealthStatusMonitoringInterval;
5670 add_timer(&Controller->MonitoringTimer);
5671 return;
5672 }
5673 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5674 Controller->PrimaryMonitoringTime = jiffies;
5675
5676 spin_lock_irqsave(&Controller->queue_lock, flags);
5677 /*
5678 Queue a Status Monitoring Command to Controller.
5679 */
5680 Command = DAC960_AllocateCommand(Controller);
5681 if (Command != NULL)
5682 DAC960_V2_QueueMonitoringCommand(Command);
5683 else Controller->MonitoringCommandDeferred = true;
5684 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5685 /*
5686 Wake up any processes waiting on a Health Status Buffer change.
5687 */
5688 wake_up(&Controller->HealthStatusWaitQueue);
5689 }
5690}
5691
5692/*
5693 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5694 additional bytes in the Combined Status Buffer and grows the buffer if
5695 necessary. It returns true if there is enough room and false otherwise.
5696*/
5697
87d156bf 5698static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
1da177e4
LT		 5699 unsigned int ByteCount)
5700{
5701 unsigned char *NewStatusBuffer;
5702 if (Controller->InitialStatusLength + 1 +
5703 Controller->CurrentStatusLength + ByteCount + 1 <=
5704 Controller->CombinedStatusBufferLength)
5705 return true;
5706 if (Controller->CombinedStatusBufferLength == 0)
5707 {
5708 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5709 while (NewStatusBufferLength < ByteCount)
5710 NewStatusBufferLength *= 2;
0a361e31
AD		 5711 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5712 GFP_ATOMIC);
1da177e4
LT		 5713 if (Controller->CombinedStatusBuffer == NULL) return false;
5714 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5715 return true;
5716 }
0a361e31
AD		 5717 NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5718 GFP_ATOMIC);
1da177e4
LT		 5719 if (NewStatusBuffer == NULL)
5720 {
5721 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5722 Controller);
5723 return false;
5724 }
5725 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5726 Controller->CombinedStatusBufferLength);
5727 kfree(Controller->CombinedStatusBuffer);
5728 Controller->CombinedStatusBuffer = NewStatusBuffer;
5729 Controller->CombinedStatusBufferLength *= 2;
5730 Controller->CurrentStatusBuffer =
5731 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5732 return true;
5733}
5734
5735
5736/*
5737 DAC960_Message prints Driver Messages.
5738*/
5739
5740static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5741 unsigned char *Format,
5742 DAC960_Controller_T *Controller,
5743 ...)
5744{
5745 static unsigned char Buffer[DAC960_LineBufferSize];
87d156bf 5746 static bool BeginningOfLine = true;
1da177e4
LT		 5747 va_list Arguments;
5748 int Length = 0;
5749 va_start(Arguments, Controller);
5750 Length = vsprintf(Buffer, Format, Arguments);
5751 va_end(Arguments);
5752 if (Controller == NULL)
5753 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5754 DAC960_ControllerCount, Buffer);
5755 else if (MessageLevel == DAC960_AnnounceLevel ||
5756 MessageLevel == DAC960_InfoLevel)
5757 {
5758 if (!Controller->ControllerInitialized)
5759 {
5760 if (DAC960_CheckStatusBuffer(Controller, Length))
5761 {
5762 strcpy(&Controller->CombinedStatusBuffer
5763 [Controller->InitialStatusLength],
5764 Buffer);
5765 Controller->InitialStatusLength += Length;
5766 Controller->CurrentStatusBuffer =
5767 &Controller->CombinedStatusBuffer
5768 [Controller->InitialStatusLength + 1];
5769 }
5770 if (MessageLevel == DAC960_AnnounceLevel)
5771 {
5772 static int AnnouncementLines = 0;
5773 if (++AnnouncementLines <= 2)
5774 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5775 Buffer);
5776 }
5777 else
5778 {
5779 if (BeginningOfLine)
5780 {
5781 if (Buffer[0] != '\n' || Length > 1)
5782 printk("%sDAC960#%d: %s",
5783 DAC960_MessageLevelMap[MessageLevel],
5784 Controller->ControllerNumber, Buffer);
5785 }
5786 else printk("%s", Buffer);
5787 }
5788 }
5789 else if (DAC960_CheckStatusBuffer(Controller, Length))
5790 {
5791 strcpy(&Controller->CurrentStatusBuffer[
5792 Controller->CurrentStatusLength], Buffer);
5793 Controller->CurrentStatusLength += Length;
5794 }
5795 }
5796 else if (MessageLevel == DAC960_ProgressLevel)
5797 {
5798 strcpy(Controller->ProgressBuffer, Buffer);
5799 Controller->ProgressBufferLength = Length;
5800 if (Controller->EphemeralProgressMessage)
5801 {
50297cbf
MFP		 5802 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5803 + DAC960_ProgressReportingInterval))
1da177e4
LT		 5804 {
5805 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5806 Controller->ControllerNumber, Buffer);
5807 Controller->LastProgressReportTime = jiffies;
5808 }
5809 }
5810 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5811 Controller->ControllerNumber, Buffer);
5812 }
5813 else if (MessageLevel == DAC960_UserCriticalLevel)
5814 {
5815 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5816 Buffer);
5817 Controller->UserStatusLength += Length;
5818 if (Buffer[0] != '\n' || Length > 1)
5819 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5820 Controller->ControllerNumber, Buffer);
5821 }
5822 else
5823 {
5824 if (BeginningOfLine)
5825 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5826 Controller->ControllerNumber, Buffer);
5827 else printk("%s", Buffer);
5828 }
5829 BeginningOfLine = (Buffer[Length-1] == '\n');
5830}
5831
5832
5833/*
5834 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5835 Channel:TargetID specification from a User Command string. It updates
5836 Channel and TargetID and returns true on success and false on failure.
5837*/
5838
87d156bf 5839static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
1da177e4
LT		 5840 char *UserCommandString,
5841 unsigned char *Channel,
5842 unsigned char *TargetID)
5843{
5844 char *NewUserCommandString = UserCommandString;
5845 unsigned long XChannel, XTargetID;
5846 while (*UserCommandString == ' ') UserCommandString++;
5847 if (UserCommandString == NewUserCommandString)
5848 return false;
5849 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5850 if (NewUserCommandString == UserCommandString ||
5851 *NewUserCommandString != ':' ||
5852 XChannel >= Controller->Channels)
5853 return false;
5854 UserCommandString = ++NewUserCommandString;
5855 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5856 if (NewUserCommandString == UserCommandString ||
5857 *NewUserCommandString != '\0' ||
5858 XTargetID >= Controller->Targets)
5859 return false;
5860 *Channel = XChannel;
5861 *TargetID = XTargetID;
5862 return true;
5863}
5864
5865
5866/*
5867 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5868 specification from a User Command string. It updates LogicalDriveNumber and
5869 returns true on success and false on failure.
5870*/
5871
87d156bf 5872static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
1da177e4
LT		 5873 char *UserCommandString,
5874 unsigned char *LogicalDriveNumber)
5875{
5876 char *NewUserCommandString = UserCommandString;
5877 unsigned long XLogicalDriveNumber;
5878 while (*UserCommandString == ' ') UserCommandString++;
5879 if (UserCommandString == NewUserCommandString)
5880 return false;
5881 XLogicalDriveNumber =
5882 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5883 if (NewUserCommandString == UserCommandString ||
5884 *NewUserCommandString != '\0' ||
5885 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5886 return false;
5887 *LogicalDriveNumber = XLogicalDriveNumber;
5888 return true;
5889}
5890
5891
5892/*
5893 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5894 DAC960 V1 Firmware Controllers.
5895*/
5896
5897static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5898 DAC960_Command_T *Command,
5899 unsigned char Channel,
5900 unsigned char TargetID,
5901 DAC960_V1_PhysicalDeviceState_T
5902 DeviceState,
5903 const unsigned char *DeviceStateString)
5904{
5905 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5906 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5907 CommandMailbox->Type3D.Channel = Channel;
5908 CommandMailbox->Type3D.TargetID = TargetID;
5909 CommandMailbox->Type3D.DeviceState = DeviceState;
5910 CommandMailbox->Type3D.Modifier = 0;
5911 DAC960_ExecuteCommand(Command);
5912 switch (Command->V1.CommandStatus)
5913 {
5914 case DAC960_V1_NormalCompletion:
5915 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5916 DeviceStateString, Channel, TargetID);
5917 break;
5918 case DAC960_V1_UnableToStartDevice:
5919 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5920 "Unable to Start Device\n", Controller,
5921 DeviceStateString, Channel, TargetID);
5922 break;
5923 case DAC960_V1_NoDeviceAtAddress:
5924 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5925 "No Device at Address\n", Controller,
5926 DeviceStateString, Channel, TargetID);
5927 break;
5928 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5929 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5930 "Invalid Channel or Target or Modifier\n",
5931 Controller, DeviceStateString, Channel, TargetID);
5932 break;
5933 case DAC960_V1_ChannelBusy:
5934 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5935 "Channel Busy\n", Controller,
5936 DeviceStateString, Channel, TargetID);
5937 break;
5938 default:
5939 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5940 "Unexpected Status %04X\n", Controller,
5941 DeviceStateString, Channel, TargetID,
5942 Command->V1.CommandStatus);
5943 break;
5944 }
5945}
5946
5947
5948/*
5949 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5950 Controllers.
5951*/
5952
87d156bf 5953static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 5954 unsigned char *UserCommand)
5955{
5956 DAC960_Command_T *Command;
5957 DAC960_V1_CommandMailbox_T *CommandMailbox;
5958 unsigned long flags;
5959 unsigned char Channel, TargetID, LogicalDriveNumber;
5960
5961 spin_lock_irqsave(&Controller->queue_lock, flags);
5962 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5963 DAC960_WaitForCommand(Controller);
5964 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5965 Controller->UserStatusLength = 0;
5966 DAC960_V1_ClearCommand(Command);
5967 Command->CommandType = DAC960_ImmediateCommand;
5968 CommandMailbox = &Command->V1.CommandMailbox;
5969 if (strcmp(UserCommand, "flush-cache") == 0)
5970 {
5971 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5972 DAC960_ExecuteCommand(Command);
5973 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5974 }
5975 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5976 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5977 &Channel, &TargetID))
5978 {
5979 DAC960_V1_DeviceState_T *DeviceState =
5980 &Controller->V1.DeviceState[Channel][TargetID];
5981 if (DeviceState->Present &&
5982 DeviceState->DeviceType == DAC960_V1_DiskType &&
5983 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5984 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5985 DAC960_V1_Device_Dead, "Kill");
5986 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5987 Controller, Channel, TargetID);
5988 }
5989 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
5990 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
5991 &Channel, &TargetID))
5992 {
5993 DAC960_V1_DeviceState_T *DeviceState =
5994 &Controller->V1.DeviceState[Channel][TargetID];
5995 if (DeviceState->Present &&
5996 DeviceState->DeviceType == DAC960_V1_DiskType &&
5997 DeviceState->DeviceState == DAC960_V1_Device_Dead)
5998 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5999 DAC960_V1_Device_Online, "Make Online");
6000 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6001 Controller, Channel, TargetID);
6002
6003 }
6004 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6005 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6006 &Channel, &TargetID))
6007 {
6008 DAC960_V1_DeviceState_T *DeviceState =
6009 &Controller->V1.DeviceState[Channel][TargetID];
6010 if (DeviceState->Present &&
6011 DeviceState->DeviceType == DAC960_V1_DiskType &&
6012 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6013 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6014 DAC960_V1_Device_Standby, "Make Standby");
6015 else DAC960_UserCritical("Make Standby of Physical "
6016 "Device %d:%d Illegal\n",
6017 Controller, Channel, TargetID);
6018 }
6019 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6020 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6021 &Channel, &TargetID))
6022 {
6023 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6024 CommandMailbox->Type3D.Channel = Channel;
6025 CommandMailbox->Type3D.TargetID = TargetID;
6026 DAC960_ExecuteCommand(Command);
6027 switch (Command->V1.CommandStatus)
6028 {
6029 case DAC960_V1_NormalCompletion:
6030 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6031 Controller, Channel, TargetID);
6032 break;
6033 case DAC960_V1_AttemptToRebuildOnlineDrive:
6034 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6035 "Attempt to Rebuild Online or "
6036 "Unresponsive Drive\n",
6037 Controller, Channel, TargetID);
6038 break;
6039 case DAC960_V1_NewDiskFailedDuringRebuild:
6040 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6041 "New Disk Failed During Rebuild\n",
6042 Controller, Channel, TargetID);
6043 break;
6044 case DAC960_V1_InvalidDeviceAddress:
6045 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6046 "Invalid Device Address\n",
6047 Controller, Channel, TargetID);
6048 break;
6049 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6050 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6051 "Rebuild or Consistency Check Already "
6052 "in Progress\n", Controller, Channel, TargetID);
6053 break;
6054 default:
6055 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6056 "Unexpected Status %04X\n", Controller,
6057 Channel, TargetID, Command->V1.CommandStatus);
6058 break;
6059 }
6060 }
6061 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6062 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6063 &LogicalDriveNumber))
6064 {
6065 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6066 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6067 CommandMailbox->Type3C.AutoRestore = true;
6068 DAC960_ExecuteCommand(Command);
6069 switch (Command->V1.CommandStatus)
6070 {
6071 case DAC960_V1_NormalCompletion:
6072 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6073 "(/dev/rd/c%dd%d) Initiated\n",
6074 Controller, LogicalDriveNumber,
6075 Controller->ControllerNumber,
6076 LogicalDriveNumber);
6077 break;
6078 case DAC960_V1_DependentDiskIsDead:
6079 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6080 "(/dev/rd/c%dd%d) Failed - "
6081 "Dependent Physical Device is DEAD\n",
6082 Controller, LogicalDriveNumber,
6083 Controller->ControllerNumber,
6084 LogicalDriveNumber);
6085 break;
6086 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6087 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6088 "(/dev/rd/c%dd%d) Failed - "
6089 "Invalid or Nonredundant Logical Drive\n",
6090 Controller, LogicalDriveNumber,
6091 Controller->ControllerNumber,
6092 LogicalDriveNumber);
6093 break;
6094 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6095 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6096 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6097 "Consistency Check Already in Progress\n",
6098 Controller, LogicalDriveNumber,
6099 Controller->ControllerNumber,
6100 LogicalDriveNumber);
6101 break;
6102 default:
6103 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6104 "(/dev/rd/c%dd%d) Failed - "
6105 "Unexpected Status %04X\n",
6106 Controller, LogicalDriveNumber,
6107 Controller->ControllerNumber,
6108 LogicalDriveNumber, Command->V1.CommandStatus);
6109 break;
6110 }
6111 }
6112 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6113 strcmp(UserCommand, "cancel-consistency-check") == 0)
6114 {
6115 /*
6116 the OldRebuildRateConstant is never actually used
6117 once its value is retrieved from the controller.
6118 */
6119 unsigned char *OldRebuildRateConstant;
6120 dma_addr_t OldRebuildRateConstantDMA;
6121
6122 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6123 sizeof(char), &OldRebuildRateConstantDMA);
6124 if (OldRebuildRateConstant == NULL) {
6125 DAC960_UserCritical("Cancellation of Rebuild or "
6126 "Consistency Check Failed - "
6127 "Out of Memory",
6128 Controller);
6129 goto failure;
6130 }
6131 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6132 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6133 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6134 DAC960_ExecuteCommand(Command);
6135 switch (Command->V1.CommandStatus)
6136 {
6137 case DAC960_V1_NormalCompletion:
6138 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6139 Controller);
6140 break;
6141 default:
6142 DAC960_UserCritical("Cancellation of Rebuild or "
6143 "Consistency Check Failed - "
6144 "Unexpected Status %04X\n",
6145 Controller, Command->V1.CommandStatus);
6146 break;
6147 }
6148failure:
6149 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6150 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6151 }
6152 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6153 Controller, UserCommand);
6154
6155 spin_lock_irqsave(&Controller->queue_lock, flags);
6156 DAC960_DeallocateCommand(Command);
6157 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6158 return true;
6159}
6160
6161
6162/*
6163 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6164 TargetID into a Logical Device. It returns true on success and false
6165 on failure.
6166*/
6167
87d156bf 6168static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
1da177e4
LT		 6169 unsigned char Channel,
6170 unsigned char TargetID,
6171 unsigned short
6172 *LogicalDeviceNumber)
6173{
6174 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6175 DAC960_Controller_T *Controller = Command->Controller;
6176
6177 CommandMailbox = &Command->V2.CommandMailbox;
6178 memcpy(&SavedCommandMailbox, CommandMailbox,
6179 sizeof(DAC960_V2_CommandMailbox_T));
6180
6181 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6182 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6183 .DataTransferControllerToHost = true;
6184 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6185 .NoAutoRequestSense = true;
6186 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6187 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6188 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6189 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6190 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6191 DAC960_V2_TranslatePhysicalToLogicalDevice;
6192 CommandMailbox->Common.DataTransferMemoryAddress
6193 .ScatterGatherSegments[0]
6194 .SegmentDataPointer =
6195 Controller->V2.PhysicalToLogicalDeviceDMA;
6196 CommandMailbox->Common.DataTransferMemoryAddress
6197 .ScatterGatherSegments[0]
6198 .SegmentByteCount =
6199 CommandMailbox->Common.DataTransferSize;
6200
6201 DAC960_ExecuteCommand(Command);
6202 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6203
6204 memcpy(CommandMailbox, &SavedCommandMailbox,
6205 sizeof(DAC960_V2_CommandMailbox_T));
6206 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6207}
6208
6209
6210/*
6211 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6212 Controllers.
6213*/
6214
87d156bf 6215static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 6216 unsigned char *UserCommand)
6217{
6218 DAC960_Command_T *Command;
6219 DAC960_V2_CommandMailbox_T *CommandMailbox;
6220 unsigned long flags;
6221 unsigned char Channel, TargetID, LogicalDriveNumber;
6222 unsigned short LogicalDeviceNumber;
6223
6224 spin_lock_irqsave(&Controller->queue_lock, flags);
6225 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6226 DAC960_WaitForCommand(Controller);
6227 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6228 Controller->UserStatusLength = 0;
6229 DAC960_V2_ClearCommand(Command);
6230 Command->CommandType = DAC960_ImmediateCommand;
6231 CommandMailbox = &Command->V2.CommandMailbox;
6232 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6233 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6234 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6235 if (strcmp(UserCommand, "flush-cache") == 0)
6236 {
6237 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6238 CommandMailbox->DeviceOperation.OperationDevice =
6239 DAC960_V2_RAID_Controller;
6240 DAC960_ExecuteCommand(Command);
6241 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6242 }
6243 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6244 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6245 &Channel, &TargetID) &&
6246 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6247 &LogicalDeviceNumber))
6248 {
6249 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6250 LogicalDeviceNumber;
6251 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6252 DAC960_V2_SetDeviceState;
6253 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6254 DAC960_V2_Device_Dead;
6255 DAC960_ExecuteCommand(Command);
6256 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6257 Controller, Channel, TargetID,
6258 (Command->V2.CommandStatus
6259 == DAC960_V2_NormalCompletion
6260 ? "Succeeded" : "Failed"));
6261 }
6262 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6263 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6264 &Channel, &TargetID) &&
6265 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6266 &LogicalDeviceNumber))
6267 {
6268 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6269 LogicalDeviceNumber;
6270 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6271 DAC960_V2_SetDeviceState;
6272 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6273 DAC960_V2_Device_Online;
6274 DAC960_ExecuteCommand(Command);
6275 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6276 Controller, Channel, TargetID,
6277 (Command->V2.CommandStatus
6278 == DAC960_V2_NormalCompletion
6279 ? "Succeeded" : "Failed"));
6280 }
6281 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6282 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6283 &Channel, &TargetID) &&
6284 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6285 &LogicalDeviceNumber))
6286 {
6287 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6288 LogicalDeviceNumber;
6289 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6290 DAC960_V2_SetDeviceState;
6291 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6292 DAC960_V2_Device_Standby;
6293 DAC960_ExecuteCommand(Command);
6294 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6295 Controller, Channel, TargetID,
6296 (Command->V2.CommandStatus
6297 == DAC960_V2_NormalCompletion
6298 ? "Succeeded" : "Failed"));
6299 }
6300 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6301 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6302 &Channel, &TargetID) &&
6303 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6304 &LogicalDeviceNumber))
6305 {
6306 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6307 LogicalDeviceNumber;
6308 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6309 DAC960_V2_RebuildDeviceStart;
6310 DAC960_ExecuteCommand(Command);
6311 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6312 Controller, Channel, TargetID,
6313 (Command->V2.CommandStatus
6314 == DAC960_V2_NormalCompletion
6315 ? "Initiated" : "Not Initiated"));
6316 }
6317 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6318 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6319 &Channel, &TargetID) &&
6320 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6321 &LogicalDeviceNumber))
6322 {
6323 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6324 LogicalDeviceNumber;
6325 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6326 DAC960_V2_RebuildDeviceStop;
6327 DAC960_ExecuteCommand(Command);
6328 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6329 Controller, Channel, TargetID,
6330 (Command->V2.CommandStatus
6331 == DAC960_V2_NormalCompletion
6332 ? "Cancelled" : "Not Cancelled"));
6333 }
6334 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6335 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6336 &LogicalDriveNumber))
6337 {
6338 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6339 LogicalDriveNumber;
6340 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6341 DAC960_V2_ConsistencyCheckStart;
6342 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6343 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6344 DAC960_ExecuteCommand(Command);
6345 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6346 "(/dev/rd/c%dd%d) %s\n",
6347 Controller, LogicalDriveNumber,
6348 Controller->ControllerNumber,
6349 LogicalDriveNumber,
6350 (Command->V2.CommandStatus
6351 == DAC960_V2_NormalCompletion
6352 ? "Initiated" : "Not Initiated"));
6353 }
6354 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6355 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6356 &LogicalDriveNumber))
6357 {
6358 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6359 LogicalDriveNumber;
6360 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6361 DAC960_V2_ConsistencyCheckStop;
6362 DAC960_ExecuteCommand(Command);
6363 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6364 "(/dev/rd/c%dd%d) %s\n",
6365 Controller, LogicalDriveNumber,
6366 Controller->ControllerNumber,
6367 LogicalDriveNumber,
6368 (Command->V2.CommandStatus
6369 == DAC960_V2_NormalCompletion
6370 ? "Cancelled" : "Not Cancelled"));
6371 }
6372 else if (strcmp(UserCommand, "perform-discovery") == 0)
6373 {
6374 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6375 DAC960_ExecuteCommand(Command);
6376 DAC960_UserCritical("Discovery %s\n", Controller,
6377 (Command->V2.CommandStatus
6378 == DAC960_V2_NormalCompletion
6379 ? "Initiated" : "Not Initiated"));
6380 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6381 {
6382 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6383 CommandMailbox->ControllerInfo.CommandControlBits
6384 .DataTransferControllerToHost = true;
6385 CommandMailbox->ControllerInfo.CommandControlBits
6386 .NoAutoRequestSense = true;
6387 CommandMailbox->ControllerInfo.DataTransferSize =
6388 sizeof(DAC960_V2_ControllerInfo_T);
6389 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6390 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6391 DAC960_V2_GetControllerInfo;
6392 /*
6393 * How does this NOT race with the queued Monitoring
6394 * usage of this structure?
6395 */
6396 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6397 .ScatterGatherSegments[0]
6398 .SegmentDataPointer =
6399 Controller->V2.NewControllerInformationDMA;
6400 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6401 .ScatterGatherSegments[0]
6402 .SegmentByteCount =
6403 CommandMailbox->ControllerInfo.DataTransferSize;
6404 DAC960_ExecuteCommand(Command);
6405 while (Controller->V2.NewControllerInformation->PhysicalScanActive)
6406 {
6407 DAC960_ExecuteCommand(Command);
6408 sleep_on_timeout(&Controller->CommandWaitQueue, HZ);
6409 }
6410 DAC960_UserCritical("Discovery Completed\n", Controller);
6411 }
6412 }
6413 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6414 Controller->SuppressEnclosureMessages = true;
6415 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6416 Controller, UserCommand);
6417
6418 spin_lock_irqsave(&Controller->queue_lock, flags);
6419 DAC960_DeallocateCommand(Command);
6420 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6421 return true;
6422}
6423
6424
6425/*
6426 DAC960_ProcReadStatus implements reading /proc/rd/status.
6427*/
6428
6429static int DAC960_ProcReadStatus(char *Page, char **Start, off_t Offset,
6430 int Count, int *EOF, void *Data)
6431{
6432 unsigned char *StatusMessage = "OK\n";
6433 int ControllerNumber, BytesAvailable;
6434 for (ControllerNumber = 0;
6435 ControllerNumber < DAC960_ControllerCount;
6436 ControllerNumber++)
6437 {
6438 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6439 if (Controller == NULL) continue;
6440 if (Controller->MonitoringAlertMode)
6441 {
6442 StatusMessage = "ALERT\n";
6443 break;
6444 }
6445 }
6446 BytesAvailable = strlen(StatusMessage) - Offset;
6447 if (Count >= BytesAvailable)
6448 {
6449 Count = BytesAvailable;
6450 *EOF = true;
6451 }
6452 if (Count <= 0) return 0;
6453 *Start = Page;
6454 memcpy(Page, &StatusMessage[Offset], Count);
6455 return Count;
6456}
6457
6458
6459/*
6460 DAC960_ProcReadInitialStatus implements reading /proc/rd/cN/initial_status.
6461*/
6462
6463static int DAC960_ProcReadInitialStatus(char *Page, char **Start, off_t Offset,
6464 int Count, int *EOF, void *Data)
6465{
6466 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6467 int BytesAvailable = Controller->InitialStatusLength - Offset;
6468 if (Count >= BytesAvailable)
6469 {
6470 Count = BytesAvailable;
6471 *EOF = true;
6472 }
6473 if (Count <= 0) return 0;
6474 *Start = Page;
6475 memcpy(Page, &Controller->CombinedStatusBuffer[Offset], Count);
6476 return Count;
6477}
6478
6479
6480/*
6481 DAC960_ProcReadCurrentStatus implements reading /proc/rd/cN/current_status.
6482*/
6483
6484static int DAC960_ProcReadCurrentStatus(char *Page, char **Start, off_t Offset,
6485 int Count, int *EOF, void *Data)
6486{
6487 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6488 unsigned char *StatusMessage =
6489 "No Rebuild or Consistency Check in Progress\n";
6490 int ProgressMessageLength = strlen(StatusMessage);
6491 int BytesAvailable;
6492 if (jiffies != Controller->LastCurrentStatusTime)
6493 {
6494 Controller->CurrentStatusLength = 0;
6495 DAC960_AnnounceDriver(Controller);
6496 DAC960_ReportControllerConfiguration(Controller);
6497 DAC960_ReportDeviceConfiguration(Controller);
6498 if (Controller->ProgressBufferLength > 0)
6499 ProgressMessageLength = Controller->ProgressBufferLength;
6500 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6501 {
6502 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6503 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6504 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6505 if (Controller->ProgressBufferLength > 0)
6506 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6507 Controller->ProgressBuffer);
6508 else
6509 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6510 StatusMessage);
6511 Controller->CurrentStatusLength += ProgressMessageLength;
6512 }
6513 Controller->LastCurrentStatusTime = jiffies;
6514 }
6515 BytesAvailable = Controller->CurrentStatusLength - Offset;
6516 if (Count >= BytesAvailable)
6517 {
6518 Count = BytesAvailable;
6519 *EOF = true;
6520 }
6521 if (Count <= 0) return 0;
6522 *Start = Page;
6523 memcpy(Page, &Controller->CurrentStatusBuffer[Offset], Count);
6524 return Count;
6525}
6526
6527
6528/*
6529 DAC960_ProcReadUserCommand implements reading /proc/rd/cN/user_command.
6530*/
6531
6532static int DAC960_ProcReadUserCommand(char *Page, char **Start, off_t Offset,
6533 int Count, int *EOF, void *Data)
6534{
6535 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6536 int BytesAvailable = Controller->UserStatusLength - Offset;
6537 if (Count >= BytesAvailable)
6538 {
6539 Count = BytesAvailable;
6540 *EOF = true;
6541 }
6542 if (Count <= 0) return 0;
6543 *Start = Page;
6544 memcpy(Page, &Controller->UserStatusBuffer[Offset], Count);
6545 return Count;
6546}
6547
6548
6549/*
6550 DAC960_ProcWriteUserCommand implements writing /proc/rd/cN/user_command.
6551*/
6552
6553static int DAC960_ProcWriteUserCommand(struct file *file,
6554 const char __user *Buffer,
6555 unsigned long Count, void *Data)
6556{
6557 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6558 unsigned char CommandBuffer[80];
6559 int Length;
6560 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6561 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6562 CommandBuffer[Count] = '\0';
6563 Length = strlen(CommandBuffer);
6564 if (CommandBuffer[Length-1] == '\n')
6565 CommandBuffer[--Length] = '\0';
6566 if (Controller->FirmwareType == DAC960_V1_Controller)
6567 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6568 ? Count : -EBUSY);
6569 else
6570 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6571 ? Count : -EBUSY);
6572}
6573
6574
6575/*
6576 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6577 DAC960 Driver.
6578*/
6579
6580static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6581{
6582 struct proc_dir_entry *StatusProcEntry;
6583 struct proc_dir_entry *ControllerProcEntry;
6584 struct proc_dir_entry *UserCommandProcEntry;
6585
6586 if (DAC960_ProcDirectoryEntry == NULL) {
6587 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6588 StatusProcEntry = create_proc_read_entry("status", 0,
6589 DAC960_ProcDirectoryEntry,
6590 DAC960_ProcReadStatus, NULL);
6591 }
6592
6593 sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
6594 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6595 DAC960_ProcDirectoryEntry);
6596 create_proc_read_entry("initial_status", 0, ControllerProcEntry,
6597 DAC960_ProcReadInitialStatus, Controller);
6598 create_proc_read_entry("current_status", 0, ControllerProcEntry,
6599 DAC960_ProcReadCurrentStatus, Controller);
6600 UserCommandProcEntry =
6601 create_proc_read_entry("user_command", S_IWUSR | S_IRUSR,
6602 ControllerProcEntry, DAC960_ProcReadUserCommand,
6603 Controller);
6604 UserCommandProcEntry->write_proc = DAC960_ProcWriteUserCommand;
6605 Controller->ControllerProcEntry = ControllerProcEntry;
6606}
6607
6608
6609/*
6610 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6611 DAC960 Driver.
6612*/
6613
6614static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6615{
6616 if (Controller->ControllerProcEntry == NULL)
6617 return;
6618 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6619 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6620 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6621 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6622 Controller->ControllerProcEntry = NULL;
6623}
6624
6625#ifdef DAC960_GAM_MINOR
6626
6627/*
6628 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6629*/
6630
6631static int DAC960_gam_ioctl(struct inode *inode, struct file *file,
6632 unsigned int Request, unsigned long Argument)
6633{
6634 int ErrorCode = 0;
6635 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
6636 switch (Request)
6637 {
6638 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
6639 return DAC960_ControllerCount;
6640 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6641 {
6642 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6643 (DAC960_ControllerInfo_T __user *) Argument;
6644 DAC960_ControllerInfo_T ControllerInfo;
6645 DAC960_Controller_T *Controller;
6646 int ControllerNumber;
6647 if (UserSpaceControllerInfo == NULL) return -EINVAL;
6648 ErrorCode = get_user(ControllerNumber,
6649 &UserSpaceControllerInfo->ControllerNumber);
6650 if (ErrorCode != 0) return ErrorCode;
6651 if (ControllerNumber < 0 ||
6652 ControllerNumber > DAC960_ControllerCount - 1)
6653 return -ENXIO;
6654 Controller = DAC960_Controllers[ControllerNumber];
6655 if (Controller == NULL) return -ENXIO;
6656 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6657 ControllerInfo.ControllerNumber = ControllerNumber;
6658 ControllerInfo.FirmwareType = Controller->FirmwareType;
6659 ControllerInfo.Channels = Controller->Channels;
6660 ControllerInfo.Targets = Controller->Targets;
6661 ControllerInfo.PCI_Bus = Controller->Bus;
6662 ControllerInfo.PCI_Device = Controller->Device;
6663 ControllerInfo.PCI_Function = Controller->Function;
6664 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6665 ControllerInfo.PCI_Address = Controller->PCI_Address;
6666 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6667 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6668 return (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6669 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6670 }
6671 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6672 {
6673 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6674 (DAC960_V1_UserCommand_T __user *) Argument;
6675 DAC960_V1_UserCommand_T UserCommand;
6676 DAC960_Controller_T *Controller;
6677 DAC960_Command_T *Command = NULL;
6678 DAC960_V1_CommandOpcode_T CommandOpcode;
6679 DAC960_V1_CommandStatus_T CommandStatus;
6680 DAC960_V1_DCDB_T DCDB;
6681 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6682 dma_addr_t DCDB_IOBUFDMA;
6683 unsigned long flags;
6684 int ControllerNumber, DataTransferLength;
6685 unsigned char *DataTransferBuffer = NULL;
6686 dma_addr_t DataTransferBufferDMA;
6687 if (UserSpaceUserCommand == NULL) return -EINVAL;
6688 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6689 sizeof(DAC960_V1_UserCommand_T))) {
6690 ErrorCode = -EFAULT;
6691 goto Failure1a;
6692 }
6693 ControllerNumber = UserCommand.ControllerNumber;
6694 if (ControllerNumber < 0 ||
6695 ControllerNumber > DAC960_ControllerCount - 1)
6696 return -ENXIO;
6697 Controller = DAC960_Controllers[ControllerNumber];
6698 if (Controller == NULL) return -ENXIO;
6699 if (Controller->FirmwareType != DAC960_V1_Controller) return -EINVAL;
6700 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6701 DataTransferLength = UserCommand.DataTransferLength;
6702 if (CommandOpcode & 0x80) return -EINVAL;
6703 if (CommandOpcode == DAC960_V1_DCDB)
6704 {
6705 if (copy_from_user(&DCDB, UserCommand.DCDB,
6706 sizeof(DAC960_V1_DCDB_T))) {
6707 ErrorCode = -EFAULT;
6708 goto Failure1a;
6709 }
6710 if (DCDB.Channel >= DAC960_V1_MaxChannels) return -EINVAL;
6711 if (!((DataTransferLength == 0 &&
6712 DCDB.Direction
6713 == DAC960_V1_DCDB_NoDataTransfer) ||
6714 (DataTransferLength > 0 &&
6715 DCDB.Direction
6716 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6717 (DataTransferLength < 0 &&
6718 DCDB.Direction
6719 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6720 return -EINVAL;
6721 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6722 != abs(DataTransferLength))
6723 return -EINVAL;
6724 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6725 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6726 if (DCDB_IOBUF == NULL)
6727 return -ENOMEM;
6728 }
6729 if (DataTransferLength > 0)
6730 {
6731 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6732 DataTransferLength, &DataTransferBufferDMA);
6733 if (DataTransferBuffer == NULL) {
6734 ErrorCode = -ENOMEM;
6735 goto Failure1;
6736 }
6737 memset(DataTransferBuffer, 0, DataTransferLength);
6738 }
6739 else if (DataTransferLength < 0)
6740 {
6741 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6742 -DataTransferLength, &DataTransferBufferDMA);
6743 if (DataTransferBuffer == NULL) {
6744 ErrorCode = -ENOMEM;
6745 goto Failure1;
6746 }
6747 if (copy_from_user(DataTransferBuffer,
6748 UserCommand.DataTransferBuffer,
6749 -DataTransferLength)) {
6750 ErrorCode = -EFAULT;
6751 goto Failure1;
6752 }
6753 }
6754 if (CommandOpcode == DAC960_V1_DCDB)
6755 {
6756 spin_lock_irqsave(&Controller->queue_lock, flags);
6757 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6758 DAC960_WaitForCommand(Controller);
6759 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6760 [DCDB.TargetID])
6761 {
6762 spin_unlock_irq(&Controller->queue_lock);
6763 __wait_event(Controller->CommandWaitQueue,
6764 !Controller->V1.DirectCommandActive
6765 [DCDB.Channel][DCDB.TargetID]);
6766 spin_lock_irq(&Controller->queue_lock);
6767 }
6768 Controller->V1.DirectCommandActive[DCDB.Channel]
6769 [DCDB.TargetID] = true;
6770 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6771 DAC960_V1_ClearCommand(Command);
6772 Command->CommandType = DAC960_ImmediateCommand;
6773 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6774 sizeof(DAC960_V1_CommandMailbox_T));
6775 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6776 DCDB.BusAddress = DataTransferBufferDMA;
6777 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6778 }
6779 else
6780 {
6781 spin_lock_irqsave(&Controller->queue_lock, flags);
6782 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6783 DAC960_WaitForCommand(Controller);
6784 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6785 DAC960_V1_ClearCommand(Command);
6786 Command->CommandType = DAC960_ImmediateCommand;
6787 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6788 sizeof(DAC960_V1_CommandMailbox_T));
6789 if (DataTransferBuffer != NULL)
6790 Command->V1.CommandMailbox.Type3.BusAddress =
6791 DataTransferBufferDMA;
6792 }
6793 DAC960_ExecuteCommand(Command);
6794 CommandStatus = Command->V1.CommandStatus;
6795 spin_lock_irqsave(&Controller->queue_lock, flags);
6796 DAC960_DeallocateCommand(Command);
6797 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6798 if (DataTransferLength > 0)
6799 {
6800 if (copy_to_user(UserCommand.DataTransferBuffer,
6801 DataTransferBuffer, DataTransferLength)) {
6802 ErrorCode = -EFAULT;
6803 goto Failure1;
6804 }
6805 }
6806 if (CommandOpcode == DAC960_V1_DCDB)
6807 {
6808 /*
6809 I don't believe Target or Channel in the DCDB_IOBUF
6810 should be any different from the contents of DCDB.
6811 */
6812 Controller->V1.DirectCommandActive[DCDB.Channel]
6813 [DCDB.TargetID] = false;
6814 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6815 sizeof(DAC960_V1_DCDB_T))) {
6816 ErrorCode = -EFAULT;
6817 goto Failure1;
6818 }
6819 }
6820 ErrorCode = CommandStatus;
6821 Failure1:
6822 if (DataTransferBuffer != NULL)
6823 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6824 DataTransferBuffer, DataTransferBufferDMA);
6825 if (DCDB_IOBUF != NULL)
6826 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6827 DCDB_IOBUF, DCDB_IOBUFDMA);
6828 Failure1a:
6829 return ErrorCode;
6830 }
6831 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6832 {
6833 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6834 (DAC960_V2_UserCommand_T __user *) Argument;
6835 DAC960_V2_UserCommand_T UserCommand;
6836 DAC960_Controller_T *Controller;
6837 DAC960_Command_T *Command = NULL;
6838 DAC960_V2_CommandMailbox_T *CommandMailbox;
6839 DAC960_V2_CommandStatus_T CommandStatus;
6840 unsigned long flags;
6841 int ControllerNumber, DataTransferLength;
6842 int DataTransferResidue, RequestSenseLength;
6843 unsigned char *DataTransferBuffer = NULL;
6844 dma_addr_t DataTransferBufferDMA;
6845 unsigned char *RequestSenseBuffer = NULL;
6846 dma_addr_t RequestSenseBufferDMA;
6847 if (UserSpaceUserCommand == NULL) return -EINVAL;
6848 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6849 sizeof(DAC960_V2_UserCommand_T))) {
6850 ErrorCode = -EFAULT;
6851 goto Failure2a;
6852 }
6853 ControllerNumber = UserCommand.ControllerNumber;
6854 if (ControllerNumber < 0 ||
6855 ControllerNumber > DAC960_ControllerCount - 1)
6856 return -ENXIO;
6857 Controller = DAC960_Controllers[ControllerNumber];
6858 if (Controller == NULL) return -ENXIO;
6859 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
6860 DataTransferLength = UserCommand.DataTransferLength;
6861 if (DataTransferLength > 0)
6862 {
6863 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6864 DataTransferLength, &DataTransferBufferDMA);
6865 if (DataTransferBuffer == NULL) return -ENOMEM;
6866 memset(DataTransferBuffer, 0, DataTransferLength);
6867 }
6868 else if (DataTransferLength < 0)
6869 {
6870 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6871 -DataTransferLength, &DataTransferBufferDMA);
6872 if (DataTransferBuffer == NULL) return -ENOMEM;
6873 if (copy_from_user(DataTransferBuffer,
6874 UserCommand.DataTransferBuffer,
6875 -DataTransferLength)) {
6876 ErrorCode = -EFAULT;
6877 goto Failure2;
6878 }
6879 }
6880 RequestSenseLength = UserCommand.RequestSenseLength;
6881 if (RequestSenseLength > 0)
6882 {
6883 RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice,
6884 RequestSenseLength, &RequestSenseBufferDMA);
6885 if (RequestSenseBuffer == NULL)
6886 {
6887 ErrorCode = -ENOMEM;
6888 goto Failure2;
6889 }
6890 memset(RequestSenseBuffer, 0, RequestSenseLength);
6891 }
6892 spin_lock_irqsave(&Controller->queue_lock, flags);
6893 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6894 DAC960_WaitForCommand(Controller);
6895 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6896 DAC960_V2_ClearCommand(Command);
6897 Command->CommandType = DAC960_ImmediateCommand;
6898 CommandMailbox = &Command->V2.CommandMailbox;
6899 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6900 sizeof(DAC960_V2_CommandMailbox_T));
6901 CommandMailbox->Common.CommandControlBits
6902 .AdditionalScatterGatherListMemory = false;
6903 CommandMailbox->Common.CommandControlBits
6904 .NoAutoRequestSense = true;
6905 CommandMailbox->Common.DataTransferSize = 0;
6906 CommandMailbox->Common.DataTransferPageNumber = 0;
6907 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6908 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6909 if (DataTransferLength != 0)
6910 {
6911 if (DataTransferLength > 0)
6912 {
6913 CommandMailbox->Common.CommandControlBits
6914 .DataTransferControllerToHost = true;
6915 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6916 }
6917 else
6918 {
6919 CommandMailbox->Common.CommandControlBits
6920 .DataTransferControllerToHost = false;
6921 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6922 }
6923 CommandMailbox->Common.DataTransferMemoryAddress
6924 .ScatterGatherSegments[0]
6925 .SegmentDataPointer = DataTransferBufferDMA;
6926 CommandMailbox->Common.DataTransferMemoryAddress
6927 .ScatterGatherSegments[0]
6928 .SegmentByteCount =
6929 CommandMailbox->Common.DataTransferSize;
6930 }
6931 if (RequestSenseLength > 0)
6932 {
6933 CommandMailbox->Common.CommandControlBits
6934 .NoAutoRequestSense = false;
6935 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6936 CommandMailbox->Common.RequestSenseBusAddress =
6937 RequestSenseBufferDMA;
6938 }
6939 DAC960_ExecuteCommand(Command);
6940 CommandStatus = Command->V2.CommandStatus;
6941 RequestSenseLength = Command->V2.RequestSenseLength;
6942 DataTransferResidue = Command->V2.DataTransferResidue;
6943 spin_lock_irqsave(&Controller->queue_lock, flags);
6944 DAC960_DeallocateCommand(Command);
6945 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6946 if (RequestSenseLength > UserCommand.RequestSenseLength)
6947 RequestSenseLength = UserCommand.RequestSenseLength;
6948 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6949 &DataTransferResidue,
6950 sizeof(DataTransferResidue))) {
6951 ErrorCode = -EFAULT;
6952 goto Failure2;
6953 }
6954 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6955 &RequestSenseLength, sizeof(RequestSenseLength))) {
6956 ErrorCode = -EFAULT;
6957 goto Failure2;
6958 }
6959 if (DataTransferLength > 0)
6960 {
6961 if (copy_to_user(UserCommand.DataTransferBuffer,
6962 DataTransferBuffer, DataTransferLength)) {
6963 ErrorCode = -EFAULT;
6964 goto Failure2;
6965 }
6966 }
6967 if (RequestSenseLength > 0)
6968 {
6969 if (copy_to_user(UserCommand.RequestSenseBuffer,
6970 RequestSenseBuffer, RequestSenseLength)) {
6971 ErrorCode = -EFAULT;
6972 goto Failure2;
6973 }
6974 }
6975 ErrorCode = CommandStatus;
6976 Failure2:
6977 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6978 DataTransferBuffer, DataTransferBufferDMA);
6979 if (RequestSenseBuffer != NULL)
6980 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
6981 RequestSenseBuffer, RequestSenseBufferDMA);
6982 Failure2a:
6983 return ErrorCode;
6984 }
6985 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
6986 {
6987 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
6988 (DAC960_V2_GetHealthStatus_T __user *) Argument;
6989 DAC960_V2_GetHealthStatus_T GetHealthStatus;
6990 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
6991 DAC960_Controller_T *Controller;
6992 int ControllerNumber;
6993 if (UserSpaceGetHealthStatus == NULL) return -EINVAL;
6994 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
6995 sizeof(DAC960_V2_GetHealthStatus_T)))
6996 return -EFAULT;
6997 ControllerNumber = GetHealthStatus.ControllerNumber;
6998 if (ControllerNumber < 0 ||
6999 ControllerNumber > DAC960_ControllerCount - 1)
7000 return -ENXIO;
7001 Controller = DAC960_Controllers[ControllerNumber];
7002 if (Controller == NULL) return -ENXIO;
7003 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
7004 if (copy_from_user(&HealthStatusBuffer,
7005 GetHealthStatus.HealthStatusBuffer,
7006 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7007 return -EFAULT;
7008 while (Controller->V2.HealthStatusBuffer->StatusChangeCounter
7009 == HealthStatusBuffer.StatusChangeCounter &&
7010 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7011 == HealthStatusBuffer.NextEventSequenceNumber)
7012 {
7013 interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue,
7014 DAC960_MonitoringTimerInterval);
7015 if (signal_pending(current)) return -EINTR;
7016 }
7017 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7018 Controller->V2.HealthStatusBuffer,
7019 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7020 return -EFAULT;
7021 return 0;
7022 }
7023 }
7024 return -EINVAL;
7025}
7026
7027static struct file_operations DAC960_gam_fops = {
7028 .owner = THIS_MODULE,
7029 .ioctl = DAC960_gam_ioctl
7030};
7031
7032static struct miscdevice DAC960_gam_dev = {
7033 DAC960_GAM_MINOR,
7034 "dac960_gam",
7035 &DAC960_gam_fops
7036};
7037
7038static int DAC960_gam_init(void)
7039{
7040 int ret;
7041
7042 ret = misc_register(&DAC960_gam_dev);
7043 if (ret)
7044 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7045 return ret;
7046}
7047
7048static void DAC960_gam_cleanup(void)
7049{
7050 misc_deregister(&DAC960_gam_dev);
7051}
7052
7053#endif /* DAC960_GAM_MINOR */
7054
5b76ffd5
CH		 7055static struct DAC960_privdata DAC960_GEM_privdata = {
7056 .HardwareType = DAC960_GEM_Controller,
7057 .FirmwareType = DAC960_V2_Controller,
7058 .InterruptHandler = DAC960_GEM_InterruptHandler,
7059 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7060};
7061
7062
1da177e4
LT		 7063static struct DAC960_privdata DAC960_BA_privdata = {
7064 .HardwareType = DAC960_BA_Controller,
7065 .FirmwareType = DAC960_V2_Controller,
7066 .InterruptHandler = DAC960_BA_InterruptHandler,
7067 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7068};
7069
7070static struct DAC960_privdata DAC960_LP_privdata = {
7071 .HardwareType = DAC960_LP_Controller,
7072 .FirmwareType = DAC960_LP_Controller,
7073 .InterruptHandler = DAC960_LP_InterruptHandler,
7074 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7075};
7076
7077static struct DAC960_privdata DAC960_LA_privdata = {
7078 .HardwareType = DAC960_LA_Controller,
7079 .FirmwareType = DAC960_V1_Controller,
7080 .InterruptHandler = DAC960_LA_InterruptHandler,
7081 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7082};
7083
7084static struct DAC960_privdata DAC960_PG_privdata = {
7085 .HardwareType = DAC960_PG_Controller,
7086 .FirmwareType = DAC960_V1_Controller,
7087 .InterruptHandler = DAC960_PG_InterruptHandler,
7088 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7089};
7090
7091static struct DAC960_privdata DAC960_PD_privdata = {
7092 .HardwareType = DAC960_PD_Controller,
7093 .FirmwareType = DAC960_V1_Controller,
7094 .InterruptHandler = DAC960_PD_InterruptHandler,
7095 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7096};
7097
7098static struct DAC960_privdata DAC960_P_privdata = {
7099 .HardwareType = DAC960_P_Controller,
7100 .FirmwareType = DAC960_V1_Controller,
7101 .InterruptHandler = DAC960_P_InterruptHandler,
7102 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7103};
7104
7105static struct pci_device_id DAC960_id_table[] = {
5b76ffd5
CH		 7106 {
7107 .vendor = PCI_VENDOR_ID_MYLEX,
7108 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
fddafd3d 7109 .subvendor = PCI_VENDOR_ID_MYLEX,
5b76ffd5
CH		 7110 .subdevice = PCI_ANY_ID,
7111 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7112 },
1da177e4
LT		 7113 {
7114 .vendor = PCI_VENDOR_ID_MYLEX,
7115 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7116 .subvendor = PCI_ANY_ID,
7117 .subdevice = PCI_ANY_ID,
7118 .driver_data = (unsigned long) &DAC960_BA_privdata,
7119 },
7120 {
7121 .vendor = PCI_VENDOR_ID_MYLEX,
7122 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7123 .subvendor = PCI_ANY_ID,
7124 .subdevice = PCI_ANY_ID,
7125 .driver_data = (unsigned long) &DAC960_LP_privdata,
7126 },
7127 {
7128 .vendor = PCI_VENDOR_ID_DEC,
7129 .device = PCI_DEVICE_ID_DEC_21285,
7130 .subvendor = PCI_VENDOR_ID_MYLEX,
7131 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7132 .driver_data = (unsigned long) &DAC960_LA_privdata,
7133 },
7134 {
7135 .vendor = PCI_VENDOR_ID_MYLEX,
7136 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7137 .subvendor = PCI_ANY_ID,
7138 .subdevice = PCI_ANY_ID,
7139 .driver_data = (unsigned long) &DAC960_PG_privdata,
7140 },
7141 {
7142 .vendor = PCI_VENDOR_ID_MYLEX,
7143 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7144 .subvendor = PCI_ANY_ID,
7145 .subdevice = PCI_ANY_ID,
7146 .driver_data = (unsigned long) &DAC960_PD_privdata,
7147 },
7148 {
7149 .vendor = PCI_VENDOR_ID_MYLEX,
7150 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7151 .subvendor = PCI_ANY_ID,
7152 .subdevice = PCI_ANY_ID,
7153 .driver_data = (unsigned long) &DAC960_P_privdata,
7154 },
7155 {0, },
7156};
7157
7158MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7159
7160static struct pci_driver DAC960_pci_driver = {
7161 .name = "DAC960",
7162 .id_table = DAC960_id_table,
7163 .probe = DAC960_Probe,
7164 .remove = DAC960_Remove,
7165};
7166
7167static int DAC960_init_module(void)
7168{
7169 int ret;
7170
9bfab8ce 7171 ret = pci_register_driver(&DAC960_pci_driver);
1da177e4
LT		 7172#ifdef DAC960_GAM_MINOR
7173 if (!ret)
7174 DAC960_gam_init();
7175#endif
7176 return ret;
7177}
7178
7179static void DAC960_cleanup_module(void)
7180{
7181 int i;
7182
7183#ifdef DAC960_GAM_MINOR
7184 DAC960_gam_cleanup();
7185#endif
7186
7187 for (i = 0; i < DAC960_ControllerCount; i++) {
7188 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7189 if (Controller == NULL)
7190 continue;
7191 DAC960_FinalizeController(Controller);
7192 }
7193 if (DAC960_ProcDirectoryEntry != NULL) {
7194 remove_proc_entry("rd/status", NULL);
7195 remove_proc_entry("rd", NULL);
7196 }
7197 DAC960_ControllerCount = 0;
7198 pci_unregister_driver(&DAC960_pci_driver);
7199}
7200
7201module_init(DAC960_init_module);
7202module_exit(DAC960_cleanup_module);
7203
7204MODULE_LICENSE("GPL");
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