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[net-next-2.6.git] / drivers / block / DAC960.c
CommitLineData
1da177e4
LT		 1/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
5b76ffd5 6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
1da177e4
LT		 7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
868047fc
MW		 20#define DAC960_DriverVersion "2.5.49"
21#define DAC960_DriverDate "21 Aug 2007"
1da177e4
LT		 22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/bio.h>
29#include <linux/completion.h>
30#include <linux/delay.h>
31#include <linux/genhd.h>
32#include <linux/hdreg.h>
33#include <linux/blkpg.h>
3558c9b3 34#include <linux/dma-mapping.h>
1da177e4
LT		 35#include <linux/interrupt.h>
36#include <linux/ioport.h>
37#include <linux/mm.h>
38#include <linux/slab.h>
39#include <linux/proc_fs.h>
40#include <linux/reboot.h>
41#include <linux/spinlock.h>
42#include <linux/timer.h>
43#include <linux/pci.h>
44#include <linux/init.h>
50297cbf 45#include <linux/jiffies.h>
62287fbb 46#include <linux/random.h>
11763609 47#include <linux/scatterlist.h>
1da177e4
LT		 48#include <asm/io.h>
49#include <asm/uaccess.h>
50#include "DAC960.h"
51
52#define DAC960_GAM_MINOR 252
53
54
55static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
56static int DAC960_ControllerCount;
57static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
58
59static long disk_size(DAC960_Controller_T *p, int drive_nr)
60{
61 if (p->FirmwareType == DAC960_V1_Controller) {
62 if (drive_nr >= p->LogicalDriveCount)
63 return 0;
64 return p->V1.LogicalDriveInformation[drive_nr].
65 LogicalDriveSize;
66 } else {
67 DAC960_V2_LogicalDeviceInfo_T *i =
68 p->V2.LogicalDeviceInformation[drive_nr];
69 if (i == NULL)
70 return 0;
71 return i->ConfigurableDeviceSize;
72 }
73}
74
75static int DAC960_open(struct inode *inode, struct file *file)
76{
77 struct gendisk *disk = inode->i_bdev->bd_disk;
78 DAC960_Controller_T *p = disk->queue->queuedata;
79 int drive_nr = (long)disk->private_data;
80
81 if (p->FirmwareType == DAC960_V1_Controller) {
82 if (p->V1.LogicalDriveInformation[drive_nr].
83 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
84 return -ENXIO;
85 } else {
86 DAC960_V2_LogicalDeviceInfo_T *i =
87 p->V2.LogicalDeviceInformation[drive_nr];
88 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
89 return -ENXIO;
90 }
91
92 check_disk_change(inode->i_bdev);
93
94 if (!get_capacity(p->disks[drive_nr]))
95 return -ENXIO;
96 return 0;
97}
98
a885c8c4 99static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1da177e4 100{
a885c8c4 101 struct gendisk *disk = bdev->bd_disk;
1da177e4
LT		 102 DAC960_Controller_T *p = disk->queue->queuedata;
103 int drive_nr = (long)disk->private_data;
1da177e4
LT		 104
105 if (p->FirmwareType == DAC960_V1_Controller) {
a885c8c4
CH		 106 geo->heads = p->V1.GeometryTranslationHeads;
107 geo->sectors = p->V1.GeometryTranslationSectors;
108 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
109 LogicalDriveSize / (geo->heads * geo->sectors);
1da177e4
LT		 110 } else {
111 DAC960_V2_LogicalDeviceInfo_T *i =
112 p->V2.LogicalDeviceInformation[drive_nr];
113 switch (i->DriveGeometry) {
114 case DAC960_V2_Geometry_128_32:
a885c8c4
CH		 115 geo->heads = 128;
116 geo->sectors = 32;
1da177e4
LT		 117 break;
118 case DAC960_V2_Geometry_255_63:
a885c8c4
CH		 119 geo->heads = 255;
120 geo->sectors = 63;
1da177e4
LT		 121 break;
122 default:
123 DAC960_Error("Illegal Logical Device Geometry %d\n",
124 p, i->DriveGeometry);
125 return -EINVAL;
126 }
127
a885c8c4
CH		 128 geo->cylinders = i->ConfigurableDeviceSize /
129 (geo->heads * geo->sectors);
1da177e4
LT		 130 }
131
a885c8c4 132 return 0;
1da177e4
LT		 133}
134
135static int DAC960_media_changed(struct gendisk *disk)
136{
137 DAC960_Controller_T *p = disk->queue->queuedata;
138 int drive_nr = (long)disk->private_data;
139
140 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
141 return 1;
142 return 0;
143}
144
145static int DAC960_revalidate_disk(struct gendisk *disk)
146{
147 DAC960_Controller_T *p = disk->queue->queuedata;
148 int unit = (long)disk->private_data;
149
150 set_capacity(disk, disk_size(p, unit));
151 return 0;
152}
153
154static struct block_device_operations DAC960_BlockDeviceOperations = {
155 .owner = THIS_MODULE,
156 .open = DAC960_open,
a885c8c4 157 .getgeo = DAC960_getgeo,
1da177e4
LT		 158 .media_changed = DAC960_media_changed,
159 .revalidate_disk = DAC960_revalidate_disk,
160};
161
162
163/*
164 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
165 Copyright Notice, and Electronic Mail Address.
166*/
167
168static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
169{
170 DAC960_Announce("***** DAC960 RAID Driver Version "
171 DAC960_DriverVersion " of "
172 DAC960_DriverDate " *****\n", Controller);
173 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
174 "<lnz@dandelion.com>\n", Controller);
175}
176
177
178/*
179 DAC960_Failure prints a standardized error message, and then returns false.
180*/
181
87d156bf 182static bool DAC960_Failure(DAC960_Controller_T *Controller,
1da177e4
LT		 183 unsigned char *ErrorMessage)
184{
185 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
186 Controller);
187 if (Controller->IO_Address == 0)
188 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
189 "PCI Address 0x%X\n", Controller,
190 Controller->Bus, Controller->Device,
191 Controller->Function, Controller->PCI_Address);
192 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
193 "0x%X PCI Address 0x%X\n", Controller,
194 Controller->Bus, Controller->Device,
195 Controller->Function, Controller->IO_Address,
196 Controller->PCI_Address);
197 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
198 return false;
199}
200
201/*
202 init_dma_loaf() and slice_dma_loaf() are helper functions for
203 aggregating the dma-mapped memory for a well-known collection of
204 data structures that are of different lengths.
205
206 These routines don't guarantee any alignment. The caller must
207 include any space needed for alignment in the sizes of the structures
208 that are passed in.
209 */
210
87d156bf 211static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
1da177e4
LT		 212 size_t len)
213{
214 void *cpu_addr;
215 dma_addr_t dma_handle;
216
217 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
218 if (cpu_addr == NULL)
219 return false;
220
221 loaf->cpu_free = loaf->cpu_base = cpu_addr;
222 loaf->dma_free =loaf->dma_base = dma_handle;
223 loaf->length = len;
224 memset(cpu_addr, 0, len);
225 return true;
226}
227
228static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
229 dma_addr_t *dma_handle)
230{
231 void *cpu_end = loaf->cpu_free + len;
232 void *cpu_addr = loaf->cpu_free;
233
089fe1b2 234 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
1da177e4
LT		 235 *dma_handle = loaf->dma_free;
236 loaf->cpu_free = cpu_end;
237 loaf->dma_free += len;
238 return cpu_addr;
239}
240
241static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
242{
243 if (loaf_handle->cpu_base != NULL)
244 pci_free_consistent(dev, loaf_handle->length,
245 loaf_handle->cpu_base, loaf_handle->dma_base);
246}
247
248
249/*
250 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
251 data structures for Controller. It returns true on success and false on
252 failure.
253*/
254
87d156bf 255static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
1da177e4
LT		 256{
257 int CommandAllocationLength, CommandAllocationGroupSize;
258 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
259 void *AllocationPointer = NULL;
260 void *ScatterGatherCPU = NULL;
261 dma_addr_t ScatterGatherDMA;
262 struct pci_pool *ScatterGatherPool;
263 void *RequestSenseCPU = NULL;
264 dma_addr_t RequestSenseDMA;
265 struct pci_pool *RequestSensePool = NULL;
266
267 if (Controller->FirmwareType == DAC960_V1_Controller)
268 {
269 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
270 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
271 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
272 Controller->PCIDevice,
273 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
274 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
275 if (ScatterGatherPool == NULL)
276 return DAC960_Failure(Controller,
277 "AUXILIARY STRUCTURE CREATION (SG)");
278 Controller->ScatterGatherPool = ScatterGatherPool;
279 }
280 else
281 {
282 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
283 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
284 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
285 Controller->PCIDevice,
286 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
287 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
288 if (ScatterGatherPool == NULL)
289 return DAC960_Failure(Controller,
290 "AUXILIARY STRUCTURE CREATION (SG)");
291 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
292 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
293 sizeof(int), 0);
294 if (RequestSensePool == NULL) {
295 pci_pool_destroy(ScatterGatherPool);
296 return DAC960_Failure(Controller,
297 "AUXILIARY STRUCTURE CREATION (SG)");
298 }
299 Controller->ScatterGatherPool = ScatterGatherPool;
300 Controller->V2.RequestSensePool = RequestSensePool;
301 }
302 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
303 Controller->FreeCommands = NULL;
304 for (CommandIdentifier = 1;
305 CommandIdentifier <= Controller->DriverQueueDepth;
306 CommandIdentifier++)
307 {
308 DAC960_Command_T *Command;
309 if (--CommandsRemaining <= 0)
310 {
311 CommandsRemaining =
312 Controller->DriverQueueDepth - CommandIdentifier + 1;
313 if (CommandsRemaining > CommandAllocationGroupSize)
314 CommandsRemaining = CommandAllocationGroupSize;
315 CommandGroupByteCount =
316 CommandsRemaining * CommandAllocationLength;
06ff37ff 317 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
1da177e4
LT		 318 if (AllocationPointer == NULL)
319 return DAC960_Failure(Controller,
320 "AUXILIARY STRUCTURE CREATION");
1da177e4
LT		 321 }
322 Command = (DAC960_Command_T *) AllocationPointer;
323 AllocationPointer += CommandAllocationLength;
324 Command->CommandIdentifier = CommandIdentifier;
325 Command->Controller = Controller;
326 Command->Next = Controller->FreeCommands;
327 Controller->FreeCommands = Command;
328 Controller->Commands[CommandIdentifier-1] = Command;
54e6ecb2 329 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
1da177e4
LT		 330 &ScatterGatherDMA);
331 if (ScatterGatherCPU == NULL)
332 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
333
334 if (RequestSensePool != NULL) {
54e6ecb2 335 RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
1da177e4
LT		 336 &RequestSenseDMA);
337 if (RequestSenseCPU == NULL) {
338 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
339 ScatterGatherDMA);
340 return DAC960_Failure(Controller,
341 "AUXILIARY STRUCTURE CREATION");
342 }
343 }
344 if (Controller->FirmwareType == DAC960_V1_Controller) {
345 Command->cmd_sglist = Command->V1.ScatterList;
346 Command->V1.ScatterGatherList =
347 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
348 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
45711f1a 349 sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
1da177e4
LT		 350 } else {
351 Command->cmd_sglist = Command->V2.ScatterList;
352 Command->V2.ScatterGatherList =
353 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
354 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
355 Command->V2.RequestSense =
356 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
357 Command->V2.RequestSenseDMA = RequestSenseDMA;
45711f1a 358 sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
1da177e4
LT		 359 }
360 }
361 return true;
362}
363
364
365/*
366 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
367 structures for Controller.
368*/
369
370static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
371{
372 int i;
373 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
374 struct pci_pool *RequestSensePool = NULL;
375 void *ScatterGatherCPU;
376 dma_addr_t ScatterGatherDMA;
377 void *RequestSenseCPU;
378 dma_addr_t RequestSenseDMA;
379 DAC960_Command_T *CommandGroup = NULL;
380
381
382 if (Controller->FirmwareType == DAC960_V2_Controller)
383 RequestSensePool = Controller->V2.RequestSensePool;
384
385 Controller->FreeCommands = NULL;
386 for (i = 0; i < Controller->DriverQueueDepth; i++)
387 {
388 DAC960_Command_T *Command = Controller->Commands[i];
389
390 if (Command == NULL)
391 continue;
392
393 if (Controller->FirmwareType == DAC960_V1_Controller) {
394 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
395 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
396 RequestSenseCPU = NULL;
397 RequestSenseDMA = (dma_addr_t)0;
398 } else {
399 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
400 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
401 RequestSenseCPU = (void *)Command->V2.RequestSense;
402 RequestSenseDMA = Command->V2.RequestSenseDMA;
403 }
404 if (ScatterGatherCPU != NULL)
405 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
406 if (RequestSenseCPU != NULL)
407 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
408
409 if ((Command->CommandIdentifier
410 % Controller->CommandAllocationGroupSize) == 1) {
411 /*
412 * We can't free the group of commands until all of the
413 * request sense and scatter gather dma structures are free.
414 * Remember the beginning of the group, but don't free it
415 * until we've reached the beginning of the next group.
416 */
6044ec88
JJ		 417 kfree(CommandGroup);
418 CommandGroup = Command;
1da177e4
LT		 419 }
420 Controller->Commands[i] = NULL;
421 }
6044ec88 422 kfree(CommandGroup);
1da177e4
LT		 423
424 if (Controller->CombinedStatusBuffer != NULL)
425 {
426 kfree(Controller->CombinedStatusBuffer);
427 Controller->CombinedStatusBuffer = NULL;
428 Controller->CurrentStatusBuffer = NULL;
429 }
430
431 if (ScatterGatherPool != NULL)
432 pci_pool_destroy(ScatterGatherPool);
6044ec88
JJ		 433 if (Controller->FirmwareType == DAC960_V1_Controller)
434 return;
1da177e4
LT		 435
436 if (RequestSensePool != NULL)
437 pci_pool_destroy(RequestSensePool);
438
6044ec88 439 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
1da177e4
LT		 440 kfree(Controller->V2.LogicalDeviceInformation[i]);
441 Controller->V2.LogicalDeviceInformation[i] = NULL;
6044ec88 442 }
1da177e4
LT		 443
444 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
445 {
6044ec88
JJ		 446 kfree(Controller->V2.PhysicalDeviceInformation[i]);
447 Controller->V2.PhysicalDeviceInformation[i] = NULL;
448 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
449 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
1da177e4
LT		 450 }
451}
452
453
454/*
455 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
456 Firmware Controllers.
457*/
458
459static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
460{
461 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
462 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
463 Command->V1.CommandStatus = 0;
464}
465
466
467/*
468 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
469 Firmware Controllers.
470*/
471
472static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
473{
474 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
475 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
476 Command->V2.CommandStatus = 0;
477}
478
479
480/*
481 DAC960_AllocateCommand allocates a Command structure from Controller's
482 free list. During driver initialization, a special initialization command
483 has been placed on the free list to guarantee that command allocation can
484 never fail.
485*/
486
487static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
488 *Controller)
489{
490 DAC960_Command_T *Command = Controller->FreeCommands;
491 if (Command == NULL) return NULL;
492 Controller->FreeCommands = Command->Next;
493 Command->Next = NULL;
494 return Command;
495}
496
497
498/*
499 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
500 free list.
501*/
502
503static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
504{
505 DAC960_Controller_T *Controller = Command->Controller;
506
507 Command->Request = NULL;
508 Command->Next = Controller->FreeCommands;
509 Controller->FreeCommands = Command;
510}
511
512
513/*
514 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
515*/
516
517static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
518{
519 spin_unlock_irq(&Controller->queue_lock);
520 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
521 spin_lock_irq(&Controller->queue_lock);
522}
523
5b76ffd5
CH		 524/*
525 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
526*/
527
528static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
529{
530 DAC960_Controller_T *Controller = Command->Controller;
531 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
532 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
533 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
534 Controller->V2.NextCommandMailbox;
535
536 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
537 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
538
539 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
540 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
541 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
542
543 Controller->V2.PreviousCommandMailbox2 =
544 Controller->V2.PreviousCommandMailbox1;
545 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
546
547 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
548 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
549
550 Controller->V2.NextCommandMailbox = NextCommandMailbox;
551}
1da177e4
LT		 552
553/*
554 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
555*/
556
557static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
558{
559 DAC960_Controller_T *Controller = Command->Controller;
560 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
561 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
562 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
563 Controller->V2.NextCommandMailbox;
564 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
565 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
566 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
567 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
568 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
569 Controller->V2.PreviousCommandMailbox2 =
570 Controller->V2.PreviousCommandMailbox1;
571 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
572 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
573 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
574 Controller->V2.NextCommandMailbox = NextCommandMailbox;
575}
576
577
578/*
579 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
580*/
581
582static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
583{
584 DAC960_Controller_T *Controller = Command->Controller;
585 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
586 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
587 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
588 Controller->V2.NextCommandMailbox;
589 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
590 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
591 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
592 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
593 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
594 Controller->V2.PreviousCommandMailbox2 =
595 Controller->V2.PreviousCommandMailbox1;
596 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
597 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
598 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
599 Controller->V2.NextCommandMailbox = NextCommandMailbox;
600}
601
602
603/*
604 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
605 Controllers with Dual Mode Firmware.
606*/
607
608static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
609{
610 DAC960_Controller_T *Controller = Command->Controller;
611 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
612 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
613 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
614 Controller->V1.NextCommandMailbox;
615 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
616 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
617 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
618 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
619 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
620 Controller->V1.PreviousCommandMailbox2 =
621 Controller->V1.PreviousCommandMailbox1;
622 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
623 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
624 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
625 Controller->V1.NextCommandMailbox = NextCommandMailbox;
626}
627
628
629/*
630 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
631 Controllers with Single Mode Firmware.
632*/
633
634static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
635{
636 DAC960_Controller_T *Controller = Command->Controller;
637 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
638 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
639 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
640 Controller->V1.NextCommandMailbox;
641 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
642 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
643 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
644 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
645 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
646 Controller->V1.PreviousCommandMailbox2 =
647 Controller->V1.PreviousCommandMailbox1;
648 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
649 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
650 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
651 Controller->V1.NextCommandMailbox = NextCommandMailbox;
652}
653
654
655/*
656 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
657 Controllers with Dual Mode Firmware.
658*/
659
660static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
661{
662 DAC960_Controller_T *Controller = Command->Controller;
663 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
664 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
665 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
666 Controller->V1.NextCommandMailbox;
667 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
668 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
669 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
670 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
671 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
672 Controller->V1.PreviousCommandMailbox2 =
673 Controller->V1.PreviousCommandMailbox1;
674 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
675 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
676 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
677 Controller->V1.NextCommandMailbox = NextCommandMailbox;
678}
679
680
681/*
682 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
683 Controllers with Single Mode Firmware.
684*/
685
686static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
687{
688 DAC960_Controller_T *Controller = Command->Controller;
689 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
690 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
691 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
692 Controller->V1.NextCommandMailbox;
693 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
694 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
695 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
696 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
697 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
698 Controller->V1.PreviousCommandMailbox2 =
699 Controller->V1.PreviousCommandMailbox1;
700 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
701 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
702 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
703 Controller->V1.NextCommandMailbox = NextCommandMailbox;
704}
705
706
707/*
708 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
709*/
710
711static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
712{
713 DAC960_Controller_T *Controller = Command->Controller;
714 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
715 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
716 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
717 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
718 udelay(1);
719 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
720 DAC960_PD_NewCommand(ControllerBaseAddress);
721}
722
723
724/*
725 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
726*/
727
728static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
729{
730 DAC960_Controller_T *Controller = Command->Controller;
731 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
732 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
733 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
734 switch (CommandMailbox->Common.CommandOpcode)
735 {
736 case DAC960_V1_Enquiry:
737 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
738 break;
739 case DAC960_V1_GetDeviceState:
740 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
741 break;
742 case DAC960_V1_Read:
743 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
744 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
745 break;
746 case DAC960_V1_Write:
747 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
748 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
749 break;
750 case DAC960_V1_ReadWithScatterGather:
751 CommandMailbox->Common.CommandOpcode =
752 DAC960_V1_ReadWithScatterGather_Old;
753 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
754 break;
755 case DAC960_V1_WriteWithScatterGather:
756 CommandMailbox->Common.CommandOpcode =
757 DAC960_V1_WriteWithScatterGather_Old;
758 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
759 break;
760 default:
761 break;
762 }
763 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
764 udelay(1);
765 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
766 DAC960_PD_NewCommand(ControllerBaseAddress);
767}
768
769
770/*
771 DAC960_ExecuteCommand executes Command and waits for completion.
772*/
773
774static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
775{
776 DAC960_Controller_T *Controller = Command->Controller;
6e9a4738 777 DECLARE_COMPLETION_ONSTACK(Completion);
1da177e4
LT		 778 unsigned long flags;
779 Command->Completion = &Completion;
780
781 spin_lock_irqsave(&Controller->queue_lock, flags);
782 DAC960_QueueCommand(Command);
783 spin_unlock_irqrestore(&Controller->queue_lock, flags);
784
785 if (in_interrupt())
786 return;
787 wait_for_completion(&Completion);
788}
789
790
791/*
792 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
793 Command and waits for completion. It returns true on success and false
794 on failure.
795*/
796
87d156bf 797static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
1da177e4
LT		 798 DAC960_V1_CommandOpcode_T CommandOpcode,
799 dma_addr_t DataDMA)
800{
801 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
802 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
803 DAC960_V1_CommandStatus_T CommandStatus;
804 DAC960_V1_ClearCommand(Command);
805 Command->CommandType = DAC960_ImmediateCommand;
806 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
807 CommandMailbox->Type3.BusAddress = DataDMA;
808 DAC960_ExecuteCommand(Command);
809 CommandStatus = Command->V1.CommandStatus;
810 DAC960_DeallocateCommand(Command);
811 return (CommandStatus == DAC960_V1_NormalCompletion);
812}
813
814
815/*
816 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
817 Command and waits for completion. It returns true on success and false
818 on failure.
819*/
820
87d156bf 821static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
1da177e4
LT		 822 DAC960_V1_CommandOpcode_T CommandOpcode,
823 unsigned char CommandOpcode2,
824 dma_addr_t DataDMA)
825{
826 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
827 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
828 DAC960_V1_CommandStatus_T CommandStatus;
829 DAC960_V1_ClearCommand(Command);
830 Command->CommandType = DAC960_ImmediateCommand;
831 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
832 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
833 CommandMailbox->Type3B.BusAddress = DataDMA;
834 DAC960_ExecuteCommand(Command);
835 CommandStatus = Command->V1.CommandStatus;
836 DAC960_DeallocateCommand(Command);
837 return (CommandStatus == DAC960_V1_NormalCompletion);
838}
839
840
841/*
842 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
843 Command and waits for completion. It returns true on success and false
844 on failure.
845*/
846
87d156bf 847static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
1da177e4
LT		 848 DAC960_V1_CommandOpcode_T CommandOpcode,
849 unsigned char Channel,
850 unsigned char TargetID,
851 dma_addr_t DataDMA)
852{
853 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
854 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
855 DAC960_V1_CommandStatus_T CommandStatus;
856 DAC960_V1_ClearCommand(Command);
857 Command->CommandType = DAC960_ImmediateCommand;
858 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
859 CommandMailbox->Type3D.Channel = Channel;
860 CommandMailbox->Type3D.TargetID = TargetID;
861 CommandMailbox->Type3D.BusAddress = DataDMA;
862 DAC960_ExecuteCommand(Command);
863 CommandStatus = Command->V1.CommandStatus;
864 DAC960_DeallocateCommand(Command);
865 return (CommandStatus == DAC960_V1_NormalCompletion);
866}
867
868
869/*
870 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
871 Reading IOCTL Command and waits for completion. It returns true on success
872 and false on failure.
873
874 Return data in The controller's HealthStatusBuffer, which is dma-able memory
875*/
876
87d156bf 877static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 878{
879 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
880 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
881 DAC960_V2_CommandStatus_T CommandStatus;
882 DAC960_V2_ClearCommand(Command);
883 Command->CommandType = DAC960_ImmediateCommand;
884 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
885 CommandMailbox->Common.CommandControlBits
886 .DataTransferControllerToHost = true;
887 CommandMailbox->Common.CommandControlBits
888 .NoAutoRequestSense = true;
889 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
890 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
891 CommandMailbox->Common.DataTransferMemoryAddress
892 .ScatterGatherSegments[0]
893 .SegmentDataPointer =
894 Controller->V2.HealthStatusBufferDMA;
895 CommandMailbox->Common.DataTransferMemoryAddress
896 .ScatterGatherSegments[0]
897 .SegmentByteCount =
898 CommandMailbox->Common.DataTransferSize;
899 DAC960_ExecuteCommand(Command);
900 CommandStatus = Command->V2.CommandStatus;
901 DAC960_DeallocateCommand(Command);
902 return (CommandStatus == DAC960_V2_NormalCompletion);
903}
904
905
906/*
907 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
908 Information Reading IOCTL Command and waits for completion. It returns
909 true on success and false on failure.
910
911 Data is returned in the controller's V2.NewControllerInformation dma-able
912 memory buffer.
913*/
914
87d156bf 915static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 916{
917 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
918 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
919 DAC960_V2_CommandStatus_T CommandStatus;
920 DAC960_V2_ClearCommand(Command);
921 Command->CommandType = DAC960_ImmediateCommand;
922 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
923 CommandMailbox->ControllerInfo.CommandControlBits
924 .DataTransferControllerToHost = true;
925 CommandMailbox->ControllerInfo.CommandControlBits
926 .NoAutoRequestSense = true;
927 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
928 CommandMailbox->ControllerInfo.ControllerNumber = 0;
929 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
930 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
931 .ScatterGatherSegments[0]
932 .SegmentDataPointer =
933 Controller->V2.NewControllerInformationDMA;
934 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
935 .ScatterGatherSegments[0]
936 .SegmentByteCount =
937 CommandMailbox->ControllerInfo.DataTransferSize;
938 DAC960_ExecuteCommand(Command);
939 CommandStatus = Command->V2.CommandStatus;
940 DAC960_DeallocateCommand(Command);
941 return (CommandStatus == DAC960_V2_NormalCompletion);
942}
943
944
945/*
946 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
947 Device Information Reading IOCTL Command and waits for completion. It
948 returns true on success and false on failure.
949
950 Data is returned in the controller's V2.NewLogicalDeviceInformation
951*/
952
87d156bf 953static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 954 unsigned short LogicalDeviceNumber)
955{
956 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
957 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
958 DAC960_V2_CommandStatus_T CommandStatus;
959
960 DAC960_V2_ClearCommand(Command);
961 Command->CommandType = DAC960_ImmediateCommand;
962 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
963 DAC960_V2_IOCTL;
964 CommandMailbox->LogicalDeviceInfo.CommandControlBits
965 .DataTransferControllerToHost = true;
966 CommandMailbox->LogicalDeviceInfo.CommandControlBits
967 .NoAutoRequestSense = true;
968 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
969 sizeof(DAC960_V2_LogicalDeviceInfo_T);
970 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
971 LogicalDeviceNumber;
972 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
973 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
974 .ScatterGatherSegments[0]
975 .SegmentDataPointer =
976 Controller->V2.NewLogicalDeviceInformationDMA;
977 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
978 .ScatterGatherSegments[0]
979 .SegmentByteCount =
980 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
981 DAC960_ExecuteCommand(Command);
982 CommandStatus = Command->V2.CommandStatus;
983 DAC960_DeallocateCommand(Command);
984 return (CommandStatus == DAC960_V2_NormalCompletion);
985}
986
987
988/*
989 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
990 Physical Device Information" IOCTL Command and waits for completion. It
991 returns true on success and false on failure.
992
993 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
994 this function is called for a given controller. This will return data
995 for the "first" device on that controller. The returned data includes a
996 Channel, TargetID, LogicalUnit that can be passed in to this routine to
997 get data for the NEXT device on that controller.
998
999 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1000 memory buffer.
1001
1002*/
1003
87d156bf 1004static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 1005 unsigned char Channel,
1006 unsigned char TargetID,
1007 unsigned char LogicalUnit)
1008{
1009 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1010 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1011 DAC960_V2_CommandStatus_T CommandStatus;
1012
1013 DAC960_V2_ClearCommand(Command);
1014 Command->CommandType = DAC960_ImmediateCommand;
1015 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1016 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1017 .DataTransferControllerToHost = true;
1018 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1019 .NoAutoRequestSense = true;
1020 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1021 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1022 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1023 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1024 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1025 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1026 DAC960_V2_GetPhysicalDeviceInfoValid;
1027 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1028 .ScatterGatherSegments[0]
1029 .SegmentDataPointer =
1030 Controller->V2.NewPhysicalDeviceInformationDMA;
1031 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1032 .ScatterGatherSegments[0]
1033 .SegmentByteCount =
1034 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1035 DAC960_ExecuteCommand(Command);
1036 CommandStatus = Command->V2.CommandStatus;
1037 DAC960_DeallocateCommand(Command);
1038 return (CommandStatus == DAC960_V2_NormalCompletion);
1039}
1040
1041
1042static void DAC960_V2_ConstructNewUnitSerialNumber(
1043 DAC960_Controller_T *Controller,
1044 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1045 int LogicalUnit)
1046{
1047 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1048 CommandMailbox->SCSI_10.CommandControlBits
1049 .DataTransferControllerToHost = true;
1050 CommandMailbox->SCSI_10.CommandControlBits
1051 .NoAutoRequestSense = true;
1052 CommandMailbox->SCSI_10.DataTransferSize =
1053 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1054 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1055 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1056 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1057 CommandMailbox->SCSI_10.CDBLength = 6;
1058 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1059 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1060 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1061 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1062 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1063 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1064 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1065 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1066 .ScatterGatherSegments[0]
1067 .SegmentDataPointer =
1068 Controller->V2.NewInquiryUnitSerialNumberDMA;
1069 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1070 .ScatterGatherSegments[0]
1071 .SegmentByteCount =
1072 CommandMailbox->SCSI_10.DataTransferSize;
1073}
1074
1075
1076/*
1077 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1078 Inquiry command to a SCSI device identified by Channel number,
1079 Target id, Logical Unit Number. This function Waits for completion
1080 of the command.
1081
1082 The return data includes Unit Serial Number information for the
1083 specified device.
1084
1085 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1086 memory buffer.
1087*/
1088
87d156bf 1089static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1da177e4
LT		 1090 int Channel, int TargetID, int LogicalUnit)
1091{
1092 DAC960_Command_T *Command;
1093 DAC960_V2_CommandMailbox_T *CommandMailbox;
1094 DAC960_V2_CommandStatus_T CommandStatus;
1095
1096 Command = DAC960_AllocateCommand(Controller);
1097 CommandMailbox = &Command->V2.CommandMailbox;
1098 DAC960_V2_ClearCommand(Command);
1099 Command->CommandType = DAC960_ImmediateCommand;
1100
1101 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1102 Channel, TargetID, LogicalUnit);
1103
1104 DAC960_ExecuteCommand(Command);
1105 CommandStatus = Command->V2.CommandStatus;
1106 DAC960_DeallocateCommand(Command);
1107 return (CommandStatus == DAC960_V2_NormalCompletion);
1108}
1109
1110
1111/*
1112 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1113 Operation IOCTL Command and waits for completion. It returns true on
1114 success and false on failure.
1115*/
1116
87d156bf 1117static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1da177e4
LT		 1118 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1119 DAC960_V2_OperationDevice_T
1120 OperationDevice)
1121{
1122 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1123 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1124 DAC960_V2_CommandStatus_T CommandStatus;
1125 DAC960_V2_ClearCommand(Command);
1126 Command->CommandType = DAC960_ImmediateCommand;
1127 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1128 CommandMailbox->DeviceOperation.CommandControlBits
1129 .DataTransferControllerToHost = true;
1130 CommandMailbox->DeviceOperation.CommandControlBits
1131 .NoAutoRequestSense = true;
1132 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1133 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1134 DAC960_ExecuteCommand(Command);
1135 CommandStatus = Command->V2.CommandStatus;
1136 DAC960_DeallocateCommand(Command);
1137 return (CommandStatus == DAC960_V2_NormalCompletion);
1138}
1139
1140
1141/*
1142 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1143 for DAC960 V1 Firmware Controllers.
1144
1145 PD and P controller types have no memory mailbox, but still need the
1146 other dma mapped memory.
1147*/
1148
87d156bf 1149static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1150 *Controller)
1151{
1152 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1153 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1154 struct pci_dev *PCI_Device = Controller->PCIDevice;
1155 struct dma_loaf *DmaPages = &Controller->DmaPages;
1156 size_t DmaPagesSize;
1157 size_t CommandMailboxesSize;
1158 size_t StatusMailboxesSize;
1159
1160 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1161 dma_addr_t CommandMailboxesMemoryDMA;
1162
1163 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1164 dma_addr_t StatusMailboxesMemoryDMA;
1165
1166 DAC960_V1_CommandMailbox_T CommandMailbox;
1167 DAC960_V1_CommandStatus_T CommandStatus;
1168 int TimeoutCounter;
1169 int i;
1170
1171
868047fc 1172 if (pci_set_dma_mask(Controller->PCIDevice, DMA_32BIT_MASK))
1da177e4 1173 return DAC960_Failure(Controller, "DMA mask out of range");
868047fc 1174 Controller->BounceBufferLimit = DMA_32BIT_MASK;
1da177e4
LT		 1175
1176 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1177 CommandMailboxesSize = 0;
1178 StatusMailboxesSize = 0;
1179 } else {
1180 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1181 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1182 }
1183 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1184 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1185 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1186 sizeof(DAC960_V1_RebuildProgress_T) +
1187 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1188 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1189 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1190 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1191
1192 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1193 return false;
1194
1195
1196 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1197 goto skip_mailboxes;
1198
1199 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1200 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1201
1202 /* These are the base addresses for the command memory mailbox array */
1203 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1204 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1205
1206 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1207 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1208 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1209 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1210 Controller->V1.PreviousCommandMailbox2 =
1211 Controller->V1.LastCommandMailbox - 1;
1212
1213 /* These are the base addresses for the status memory mailbox array */
1214 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1215 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1216
1217 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1218 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1219 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1220 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1221 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1222
1223skip_mailboxes:
1224 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1225 sizeof(DAC960_V1_DCDB_T),
1226 &Controller->V1.MonitoringDCDB_DMA);
1227
1228 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1229 sizeof(DAC960_V1_Enquiry_T),
1230 &Controller->V1.NewEnquiryDMA);
1231
1232 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1233 sizeof(DAC960_V1_ErrorTable_T),
1234 &Controller->V1.NewErrorTableDMA);
1235
1236 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1237 sizeof(DAC960_V1_EventLogEntry_T),
1238 &Controller->V1.EventLogEntryDMA);
1239
1240 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1241 sizeof(DAC960_V1_RebuildProgress_T),
1242 &Controller->V1.RebuildProgressDMA);
1243
1244 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1245 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1246 &Controller->V1.NewLogicalDriveInformationDMA);
1247
1248 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1249 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1250 &Controller->V1.BackgroundInitializationStatusDMA);
1251
1252 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1253 sizeof(DAC960_V1_DeviceState_T),
1254 &Controller->V1.NewDeviceStateDMA);
1255
1256 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1257 sizeof(DAC960_SCSI_Inquiry_T),
1258 &Controller->V1.NewInquiryStandardDataDMA);
1259
1260 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1261 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1262 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1263
1264 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1265 return true;
1266
1267 /* Enable the Memory Mailbox Interface. */
1268 Controller->V1.DualModeMemoryMailboxInterface = true;
1269 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1270 CommandMailbox.TypeX.CommandIdentifier = 0;
1271 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1272 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1273 Controller->V1.FirstCommandMailboxDMA;
1274 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1275 Controller->V1.FirstStatusMailboxDMA;
1276#define TIMEOUT_COUNT 1000000
1277
1278 for (i = 0; i < 2; i++)
1279 switch (Controller->HardwareType)
1280 {
1281 case DAC960_LA_Controller:
1282 TimeoutCounter = TIMEOUT_COUNT;
1283 while (--TimeoutCounter >= 0)
1284 {
1285 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1286 break;
1287 udelay(10);
1288 }
1289 if (TimeoutCounter < 0) return false;
1290 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1291 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1292 TimeoutCounter = TIMEOUT_COUNT;
1293 while (--TimeoutCounter >= 0)
1294 {
1295 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1296 ControllerBaseAddress))
1297 break;
1298 udelay(10);
1299 }
1300 if (TimeoutCounter < 0) return false;
1301 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1302 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1303 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1304 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1305 Controller->V1.DualModeMemoryMailboxInterface = false;
1306 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1307 break;
1308 case DAC960_PG_Controller:
1309 TimeoutCounter = TIMEOUT_COUNT;
1310 while (--TimeoutCounter >= 0)
1311 {
1312 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1313 break;
1314 udelay(10);
1315 }
1316 if (TimeoutCounter < 0) return false;
1317 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1318 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1319
1320 TimeoutCounter = TIMEOUT_COUNT;
1321 while (--TimeoutCounter >= 0)
1322 {
1323 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1324 ControllerBaseAddress))
1325 break;
1326 udelay(10);
1327 }
1328 if (TimeoutCounter < 0) return false;
1329 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1330 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1331 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1332 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1333 Controller->V1.DualModeMemoryMailboxInterface = false;
1334 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1335 break;
1336 default:
1337 DAC960_Failure(Controller, "Unknown Controller Type\n");
1338 break;
1339 }
1340 return false;
1341}
1342
1343
1344/*
1345 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1346 for DAC960 V2 Firmware Controllers.
1347
1348 Aggregate the space needed for the controller's memory mailbox and
1349 the other data structures that will be targets of dma transfers with
1350 the controller. Allocate a dma-mapped region of memory to hold these
1351 structures. Then, save CPU pointers and dma_addr_t values to reference
1352 the structures that are contained in that region.
1353*/
1354
87d156bf 1355static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1356 *Controller)
1357{
1358 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1359 struct pci_dev *PCI_Device = Controller->PCIDevice;
1360 struct dma_loaf *DmaPages = &Controller->DmaPages;
1361 size_t DmaPagesSize;
1362 size_t CommandMailboxesSize;
1363 size_t StatusMailboxesSize;
1364
1365 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1366 dma_addr_t CommandMailboxesMemoryDMA;
1367
1368 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1369 dma_addr_t StatusMailboxesMemoryDMA;
1370
1371 DAC960_V2_CommandMailbox_T *CommandMailbox;
1372 dma_addr_t CommandMailboxDMA;
1373 DAC960_V2_CommandStatus_T CommandStatus;
1374
868047fc
MW		 1375 if (!pci_set_dma_mask(Controller->PCIDevice, DMA_64BIT_MASK))
1376 Controller->BounceBufferLimit = DMA_64BIT_MASK;
1377 else if (!pci_set_dma_mask(Controller->PCIDevice, DMA_32BIT_MASK))
1378 Controller->BounceBufferLimit = DMA_32BIT_MASK;
1379 else
1380 return DAC960_Failure(Controller, "DMA mask out of range");
1da177e4
LT		 1381
1382 /* This is a temporary dma mapping, used only in the scope of this function */
0a361e31 1383 CommandMailbox = pci_alloc_consistent(PCI_Device,
1da177e4
LT		 1384 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1385 if (CommandMailbox == NULL)
1386 return false;
1387
1388 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1389 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1390 DmaPagesSize =
1391 CommandMailboxesSize + StatusMailboxesSize +
1392 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1393 sizeof(DAC960_V2_ControllerInfo_T) +
1394 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1395 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1396 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1397 sizeof(DAC960_V2_Event_T) +
1398 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1399
1400 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1401 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1402 CommandMailbox, CommandMailboxDMA);
1403 return false;
1404 }
1405
1406 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1407 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1408
1409 /* These are the base addresses for the command memory mailbox array */
1410 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1411 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1412
1413 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1414 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1415 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1416 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1417 Controller->V2.PreviousCommandMailbox2 =
1418 Controller->V2.LastCommandMailbox - 1;
1419
1420 /* These are the base addresses for the status memory mailbox array */
1421 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1422 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1423
1424 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1425 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1426 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1427 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1428 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1429
1430 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1431 sizeof(DAC960_V2_HealthStatusBuffer_T),
1432 &Controller->V2.HealthStatusBufferDMA);
1433
1434 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1435 sizeof(DAC960_V2_ControllerInfo_T),
1436 &Controller->V2.NewControllerInformationDMA);
1437
1438 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1439 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1440 &Controller->V2.NewLogicalDeviceInformationDMA);
1441
1442 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1443 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1444 &Controller->V2.NewPhysicalDeviceInformationDMA);
1445
1446 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1447 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1448 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1449
1450 Controller->V2.Event = slice_dma_loaf(DmaPages,
1451 sizeof(DAC960_V2_Event_T),
1452 &Controller->V2.EventDMA);
1453
1454 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1455 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1456 &Controller->V2.PhysicalToLogicalDeviceDMA);
1457
1458 /*
1459 Enable the Memory Mailbox Interface.
1460
1461 I don't know why we can't just use one of the memory mailboxes
1462 we just allocated to do this, instead of using this temporary one.
1463 Try this change later.
1464 */
1465 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1466 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1467 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1468 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1469 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1470 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1471 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1472 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1473 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1474 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1475 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1476 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1477 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1478 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1479 Controller->V2.HealthStatusBufferDMA;
1480 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1481 Controller->V2.FirstCommandMailboxDMA;
1482 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1483 Controller->V2.FirstStatusMailboxDMA;
1484 switch (Controller->HardwareType)
1485 {
5b76ffd5
CH		 1486 case DAC960_GEM_Controller:
1487 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1488 udelay(1);
1489 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1490 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1491 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1492 udelay(1);
1493 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1494 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1495 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1496 break;
1da177e4
LT		 1497 case DAC960_BA_Controller:
1498 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1499 udelay(1);
1500 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1501 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1502 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1503 udelay(1);
1504 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1505 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1506 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1507 break;
1508 case DAC960_LP_Controller:
1509 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1510 udelay(1);
1511 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1512 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1513 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1514 udelay(1);
1515 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1516 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1517 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1518 break;
1519 default:
1520 DAC960_Failure(Controller, "Unknown Controller Type\n");
1521 CommandStatus = DAC960_V2_AbormalCompletion;
1522 break;
1523 }
1524 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1525 CommandMailbox, CommandMailboxDMA);
1526 return (CommandStatus == DAC960_V2_NormalCompletion);
1527}
1528
1529
1530/*
1531 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1532 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1533*/
1534
87d156bf 1535static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1536 *Controller)
1537{
1538 DAC960_V1_Enquiry2_T *Enquiry2;
1539 dma_addr_t Enquiry2DMA;
1540 DAC960_V1_Config2_T *Config2;
1541 dma_addr_t Config2DMA;
1542 int LogicalDriveNumber, Channel, TargetID;
1543 struct dma_loaf local_dma;
1544
1545 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1546 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1547 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1548
1549 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1550 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1551
1552 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1553 Controller->V1.NewEnquiryDMA)) {
1554 free_dma_loaf(Controller->PCIDevice, &local_dma);
1555 return DAC960_Failure(Controller, "ENQUIRY");
1556 }
1557 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1558 sizeof(DAC960_V1_Enquiry_T));
1559
1560 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1561 free_dma_loaf(Controller->PCIDevice, &local_dma);
1562 return DAC960_Failure(Controller, "ENQUIRY2");
1563 }
1564
1565 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1566 free_dma_loaf(Controller->PCIDevice, &local_dma);
1567 return DAC960_Failure(Controller, "READ CONFIG2");
1568 }
1569
1570 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1571 Controller->V1.NewLogicalDriveInformationDMA)) {
1572 free_dma_loaf(Controller->PCIDevice, &local_dma);
1573 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1574 }
1575 memcpy(&Controller->V1.LogicalDriveInformation,
1576 Controller->V1.NewLogicalDriveInformation,
1577 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1578
1579 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1580 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1581 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1582 Channel, TargetID,
1583 Controller->V1.NewDeviceStateDMA)) {
1584 free_dma_loaf(Controller->PCIDevice, &local_dma);
1585 return DAC960_Failure(Controller, "GET DEVICE STATE");
1586 }
1587 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1588 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1589 }
1590 /*
1591 Initialize the Controller Model Name and Full Model Name fields.
1592 */
1593 switch (Enquiry2->HardwareID.SubModel)
1594 {
1595 case DAC960_V1_P_PD_PU:
1596 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1597 strcpy(Controller->ModelName, "DAC960PU");
1598 else strcpy(Controller->ModelName, "DAC960PD");
1599 break;
1600 case DAC960_V1_PL:
1601 strcpy(Controller->ModelName, "DAC960PL");
1602 break;
1603 case DAC960_V1_PG:
1604 strcpy(Controller->ModelName, "DAC960PG");
1605 break;
1606 case DAC960_V1_PJ:
1607 strcpy(Controller->ModelName, "DAC960PJ");
1608 break;
1609 case DAC960_V1_PR:
1610 strcpy(Controller->ModelName, "DAC960PR");
1611 break;
1612 case DAC960_V1_PT:
1613 strcpy(Controller->ModelName, "DAC960PT");
1614 break;
1615 case DAC960_V1_PTL0:
1616 strcpy(Controller->ModelName, "DAC960PTL0");
1617 break;
1618 case DAC960_V1_PRL:
1619 strcpy(Controller->ModelName, "DAC960PRL");
1620 break;
1621 case DAC960_V1_PTL1:
1622 strcpy(Controller->ModelName, "DAC960PTL1");
1623 break;
1624 case DAC960_V1_1164P:
1625 strcpy(Controller->ModelName, "DAC1164P");
1626 break;
1627 default:
1628 free_dma_loaf(Controller->PCIDevice, &local_dma);
1629 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1630 }
1631 strcpy(Controller->FullModelName, "Mylex ");
1632 strcat(Controller->FullModelName, Controller->ModelName);
1633 /*
1634 Initialize the Controller Firmware Version field and verify that it
1635 is a supported firmware version. The supported firmware versions are:
1636
1637 DAC1164P 5.06 and above
1638 DAC960PTL/PRL/PJ/PG 4.06 and above
1639 DAC960PU/PD/PL 3.51 and above
1640 DAC960PU/PD/PL/P 2.73 and above
1641 */
1642#if defined(CONFIG_ALPHA)
1643 /*
1644 DEC Alpha machines were often equipped with DAC960 cards that were
1645 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1646 the last custom FW revision to be released by DEC for these older
1647 controllers, appears to work quite well with this driver.
1648
1649 Cards tested successfully were several versions each of the PD and
1650 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1651 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1652 back of the board, of:
1653
1654 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1655 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1656 */
1657# define FIRMWARE_27X "2.70"
1658#else
1659# define FIRMWARE_27X "2.73"
1660#endif
1661
1662 if (Enquiry2->FirmwareID.MajorVersion == 0)
1663 {
1664 Enquiry2->FirmwareID.MajorVersion =
1665 Controller->V1.Enquiry.MajorFirmwareVersion;
1666 Enquiry2->FirmwareID.MinorVersion =
1667 Controller->V1.Enquiry.MinorFirmwareVersion;
1668 Enquiry2->FirmwareID.FirmwareType = '0';
1669 Enquiry2->FirmwareID.TurnID = 0;
1670 }
1671 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1672 Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1673 Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1674 if (!((Controller->FirmwareVersion[0] == '5' &&
1675 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1676 (Controller->FirmwareVersion[0] == '4' &&
1677 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1678 (Controller->FirmwareVersion[0] == '3' &&
1679 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1680 (Controller->FirmwareVersion[0] == '2' &&
1681 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1682 {
1683 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1684 DAC960_Error("Firmware Version = '%s'\n", Controller,
1685 Controller->FirmwareVersion);
1686 free_dma_loaf(Controller->PCIDevice, &local_dma);
1687 return false;
1688 }
1689 /*
1690 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1691 Enclosure Management Enabled fields.
1692 */
1693 Controller->Channels = Enquiry2->ActualChannels;
1694 Controller->Targets = Enquiry2->MaxTargets;
1695 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1696 Controller->V1.SAFTE_EnclosureManagementEnabled =
1697 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1698 /*
1699 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1700 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1701 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1702 less than the Controller Queue Depth to allow for an automatic drive
1703 rebuild operation.
1704 */
1705 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1706 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1707 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1708 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1709 Controller->LogicalDriveCount =
1710 Controller->V1.Enquiry.NumberOfLogicalDrives;
1711 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1712 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1713 Controller->DriverScatterGatherLimit =
1714 Controller->ControllerScatterGatherLimit;
1715 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1716 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1717 /*
1718 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1719 */
1720 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1721 >> (10 - DAC960_BlockSizeBits);
1722 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1723 >> (10 - DAC960_BlockSizeBits);
1724 switch (Config2->DriveGeometry)
1725 {
1726 case DAC960_V1_Geometry_128_32:
1727 Controller->V1.GeometryTranslationHeads = 128;
1728 Controller->V1.GeometryTranslationSectors = 32;
1729 break;
1730 case DAC960_V1_Geometry_255_63:
1731 Controller->V1.GeometryTranslationHeads = 255;
1732 Controller->V1.GeometryTranslationSectors = 63;
1733 break;
1734 default:
1735 free_dma_loaf(Controller->PCIDevice, &local_dma);
1736 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1737 }
1738 /*
1739 Initialize the Background Initialization Status.
1740 */
1741 if ((Controller->FirmwareVersion[0] == '4' &&
1742 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1743 (Controller->FirmwareVersion[0] == '5' &&
1744 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1745 {
1746 Controller->V1.BackgroundInitializationStatusSupported = true;
1747 DAC960_V1_ExecuteType3B(Controller,
1748 DAC960_V1_BackgroundInitializationControl, 0x20,
1749 Controller->
1750 V1.BackgroundInitializationStatusDMA);
1751 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1752 Controller->V1.BackgroundInitializationStatus,
1753 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1754 }
1755 /*
1756 Initialize the Logical Drive Initially Accessible flag.
1757 */
1758 for (LogicalDriveNumber = 0;
1759 LogicalDriveNumber < Controller->LogicalDriveCount;
1760 LogicalDriveNumber++)
1761 if (Controller->V1.LogicalDriveInformation
1762 [LogicalDriveNumber].LogicalDriveState !=
1763 DAC960_V1_LogicalDrive_Offline)
1764 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1765 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1766 free_dma_loaf(Controller->PCIDevice, &local_dma);
1767 return true;
1768}
1769
1770
1771/*
1772 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1773 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1774*/
1775
87d156bf 1776static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1777 *Controller)
1778{
1779 DAC960_V2_ControllerInfo_T *ControllerInfo =
1780 &Controller->V2.ControllerInformation;
1781 unsigned short LogicalDeviceNumber = 0;
1782 int ModelNameLength;
1783
1784 /* Get data into dma-able area, then copy into permanant location */
1785 if (!DAC960_V2_NewControllerInfo(Controller))
1786 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1787 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1788 sizeof(DAC960_V2_ControllerInfo_T));
1789
1790
1791 if (!DAC960_V2_GeneralInfo(Controller))
1792 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1793
1794 /*
1795 Initialize the Controller Model Name and Full Model Name fields.
1796 */
1797 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1798 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1799 ModelNameLength = sizeof(Controller->ModelName)-1;
1800 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1801 ModelNameLength);
1802 ModelNameLength--;
1803 while (Controller->ModelName[ModelNameLength] == ' ' ||
1804 Controller->ModelName[ModelNameLength] == '\0')
1805 ModelNameLength--;
1806 Controller->ModelName[++ModelNameLength] = '\0';
1807 strcpy(Controller->FullModelName, "Mylex ");
1808 strcat(Controller->FullModelName, Controller->ModelName);
1809 /*
1810 Initialize the Controller Firmware Version field.
1811 */
1812 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1813 ControllerInfo->FirmwareMajorVersion,
1814 ControllerInfo->FirmwareMinorVersion,
1815 ControllerInfo->FirmwareTurnNumber);
1816 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1817 ControllerInfo->FirmwareMinorVersion == 0 &&
1818 ControllerInfo->FirmwareTurnNumber < 1)
1819 {
1820 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1821 Controller, Controller->FirmwareVersion);
1822 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1823 Controller);
1824 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1825 Controller);
1826 }
1827 /*
1828 Initialize the Controller Channels, Targets, and Memory Size.
1829 */
1830 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1831 Controller->Targets =
1832 ControllerInfo->MaximumTargetsPerChannel
1833 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1834 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1835 /*
1836 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1837 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1838 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1839 less than the Controller Queue Depth to allow for an automatic drive
1840 rebuild operation.
1841 */
1842 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1843 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1844 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1845 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1846 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1847 Controller->MaxBlocksPerCommand =
1848 ControllerInfo->MaximumDataTransferSizeInBlocks;
1849 Controller->ControllerScatterGatherLimit =
1850 ControllerInfo->MaximumScatterGatherEntries;
1851 Controller->DriverScatterGatherLimit =
1852 Controller->ControllerScatterGatherLimit;
1853 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1854 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1855 /*
1856 Initialize the Logical Device Information.
1857 */
1858 while (true)
1859 {
1860 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1861 Controller->V2.NewLogicalDeviceInformation;
1862 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1863 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1864
1865 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1866 break;
1867 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1868 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1869 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1870 Controller, LogicalDeviceNumber);
1871 break;
1872 }
1873 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1874 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1875 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1876 LogicalDeviceNumber++;
1877 continue;
1878 }
1879 PhysicalDevice.Controller = 0;
1880 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1881 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1882 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1883 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1884 PhysicalDevice;
1885 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1886 DAC960_V2_LogicalDevice_Offline)
1887 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
0a361e31
AD		 1888 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1889 GFP_ATOMIC);
1da177e4
LT		 1890 if (LogicalDeviceInfo == NULL)
1891 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1892 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1893 LogicalDeviceInfo;
1894 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1895 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1896 LogicalDeviceNumber++;
1897 }
1898 return true;
1899}
1900
1901
1902/*
1903 DAC960_ReportControllerConfiguration reports the Configuration Information
1904 for Controller.
1905*/
1906
87d156bf 1907static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1908 *Controller)
1909{
1910 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1911 Controller, Controller->ModelName);
1912 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1913 Controller, Controller->FirmwareVersion,
1914 Controller->Channels, Controller->MemorySize);
1915 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1916 Controller, Controller->Bus,
1917 Controller->Device, Controller->Function);
1918 if (Controller->IO_Address == 0)
1919 DAC960_Info("Unassigned\n", Controller);
1920 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1921 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1922 Controller, Controller->PCI_Address,
1923 (unsigned long) Controller->BaseAddress,
1924 Controller->IRQ_Channel);
1925 DAC960_Info(" Controller Queue Depth: %d, "
1926 "Maximum Blocks per Command: %d\n",
1927 Controller, Controller->ControllerQueueDepth,
1928 Controller->MaxBlocksPerCommand);
1929 DAC960_Info(" Driver Queue Depth: %d, "
1930 "Scatter/Gather Limit: %d of %d Segments\n",
1931 Controller, Controller->DriverQueueDepth,
1932 Controller->DriverScatterGatherLimit,
1933 Controller->ControllerScatterGatherLimit);
1934 if (Controller->FirmwareType == DAC960_V1_Controller)
1935 {
1936 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1937 "BIOS Geometry: %d/%d\n", Controller,
1938 Controller->V1.StripeSize,
1939 Controller->V1.SegmentSize,
1940 Controller->V1.GeometryTranslationHeads,
1941 Controller->V1.GeometryTranslationSectors);
1942 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1943 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1944 }
1945 return true;
1946}
1947
1948
1949/*
1950 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1951 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1952 Inquiry Unit Serial Number information for each device connected to
1953 Controller.
1954*/
1955
87d156bf 1956static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 1957 *Controller)
1958{
1959 struct dma_loaf local_dma;
1960
1961 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1962 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1963
1964 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1965 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1966
1967 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1968 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1969
1970 struct completion Completions[DAC960_V1_MaxChannels];
1971 unsigned long flags;
1972 int Channel, TargetID;
1973
1974 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1975 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1976 sizeof(DAC960_SCSI_Inquiry_T) +
1977 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1978 return DAC960_Failure(Controller,
1979 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1980
1981 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1982 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1983 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1984 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1985 sizeof(DAC960_SCSI_Inquiry_T),
1986 SCSI_Inquiry_dma + Channel);
1987 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1988 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1989 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1990 }
1991
1992 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1993 {
1994 /*
1995 * For each channel, submit a probe for a device on that channel.
1996 * The timeout interval for a device that is present is 10 seconds.
1997 * With this approach, the timeout periods can elapse in parallel
1998 * on each channel.
1999 */
2000 for (Channel = 0; Channel < Controller->Channels; Channel++)
2001 {
2002 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2003 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2004 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2005 DAC960_Command_T *Command = Controller->Commands[Channel];
2006 struct completion *Completion = &Completions[Channel];
2007
2008 init_completion(Completion);
2009 DAC960_V1_ClearCommand(Command);
2010 Command->CommandType = DAC960_ImmediateCommand;
2011 Command->Completion = Completion;
2012 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2013 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2014 DCDB->Channel = Channel;
2015 DCDB->TargetID = TargetID;
2016 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2017 DCDB->EarlyStatus = false;
2018 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2019 DCDB->NoAutomaticRequestSense = false;
2020 DCDB->DisconnectPermitted = true;
2021 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2022 DCDB->BusAddress = NewInquiryStandardDataDMA;
2023 DCDB->CDBLength = 6;
2024 DCDB->TransferLengthHigh4 = 0;
2025 DCDB->SenseLength = sizeof(DCDB->SenseData);
2026 DCDB->CDB[0] = 0x12; /* INQUIRY */
2027 DCDB->CDB[1] = 0; /* EVPD = 0 */
2028 DCDB->CDB[2] = 0; /* Page Code */
2029 DCDB->CDB[3] = 0; /* Reserved */
2030 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2031 DCDB->CDB[5] = 0; /* Control */
2032
2033 spin_lock_irqsave(&Controller->queue_lock, flags);
2034 DAC960_QueueCommand(Command);
2035 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2036 }
2037 /*
2038 * Wait for the problems submitted in the previous loop
2039 * to complete. On the probes that are successful,
2040 * get the serial number of the device that was found.
2041 */
2042 for (Channel = 0; Channel < Controller->Channels; Channel++)
2043 {
2044 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2045 &Controller->V1.InquiryStandardData[Channel][TargetID];
2046 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2047 dma_addr_t NewInquiryUnitSerialNumberDMA =
2048 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2049 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2050 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2051 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2052 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2053 DAC960_Command_T *Command = Controller->Commands[Channel];
2054 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2055 struct completion *Completion = &Completions[Channel];
2056
2057 wait_for_completion(Completion);
2058
2059 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2060 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2061 InquiryStandardData->PeripheralDeviceType = 0x1F;
2062 continue;
2063 } else
2064 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2065
2066 /* Preserve Channel and TargetID values from the previous loop */
2067 Command->Completion = Completion;
2068 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2069 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2070 DCDB->SenseLength = sizeof(DCDB->SenseData);
2071 DCDB->CDB[0] = 0x12; /* INQUIRY */
2072 DCDB->CDB[1] = 1; /* EVPD = 1 */
2073 DCDB->CDB[2] = 0x80; /* Page Code */
2074 DCDB->CDB[3] = 0; /* Reserved */
2075 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2076 DCDB->CDB[5] = 0; /* Control */
2077
2078 spin_lock_irqsave(&Controller->queue_lock, flags);
2079 DAC960_QueueCommand(Command);
2080 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2081 wait_for_completion(Completion);
2082
2083 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2084 memset(InquiryUnitSerialNumber, 0,
2085 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2086 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2087 } else
2088 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2089 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2090 }
2091 }
2092 free_dma_loaf(Controller->PCIDevice, &local_dma);
2093 return true;
2094}
2095
2096
2097/*
2098 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2099 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2100 Information and SCSI Inquiry Unit Serial Number information for each
2101 device connected to Controller.
2102*/
2103
87d156bf 2104static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2105 *Controller)
2106{
2107 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2108 unsigned short PhysicalDeviceIndex = 0;
2109
2110 while (true)
2111 {
2112 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2113 Controller->V2.NewPhysicalDeviceInformation;
2114 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2115 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2116 Controller->V2.NewInquiryUnitSerialNumber;
2117 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2118
2119 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2120 break;
2121
0a361e31
AD		 2122 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2123 GFP_ATOMIC);
1da177e4
LT		 2124 if (PhysicalDeviceInfo == NULL)
2125 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2126 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2127 PhysicalDeviceInfo;
2128 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2129 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2130
0a361e31
AD		 2131 InquiryUnitSerialNumber = kmalloc(
2132 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
1da177e4
LT		 2133 if (InquiryUnitSerialNumber == NULL) {
2134 kfree(PhysicalDeviceInfo);
2135 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2136 }
2137 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2138 InquiryUnitSerialNumber;
2139
2140 Channel = NewPhysicalDeviceInfo->Channel;
2141 TargetID = NewPhysicalDeviceInfo->TargetID;
2142 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2143
2144 /*
2145 Some devices do NOT have Unit Serial Numbers.
2146 This command fails for them. But, we still want to
2147 remember those devices are there. Construct a
2148 UnitSerialNumber structure for the failure case.
2149 */
2150 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2151 memset(InquiryUnitSerialNumber, 0,
2152 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2153 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2154 } else
2155 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2156 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2157
2158 PhysicalDeviceIndex++;
2159 LogicalUnit++;
2160 }
2161 return true;
2162}
2163
2164
2165/*
2166 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2167 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2168 Unit Serial Number structures.
2169*/
2170
2171static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2172 *InquiryStandardData,
2173 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2174 *InquiryUnitSerialNumber,
2175 unsigned char *Vendor,
2176 unsigned char *Model,
2177 unsigned char *Revision,
2178 unsigned char *SerialNumber)
2179{
2180 int SerialNumberLength, i;
2181 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2182 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2183 {
2184 unsigned char VendorCharacter =
2185 InquiryStandardData->VendorIdentification[i];
2186 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2187 ? VendorCharacter : ' ');
2188 }
2189 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2190 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2191 {
2192 unsigned char ModelCharacter =
2193 InquiryStandardData->ProductIdentification[i];
2194 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2195 ? ModelCharacter : ' ');
2196 }
2197 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2198 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2199 {
2200 unsigned char RevisionCharacter =
2201 InquiryStandardData->ProductRevisionLevel[i];
2202 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2203 ? RevisionCharacter : ' ');
2204 }
2205 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2206 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2207 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2208 if (SerialNumberLength >
2209 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2210 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2211 for (i = 0; i < SerialNumberLength; i++)
2212 {
2213 unsigned char SerialNumberCharacter =
2214 InquiryUnitSerialNumber->ProductSerialNumber[i];
2215 SerialNumber[i] =
2216 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2217 ? SerialNumberCharacter : ' ');
2218 }
2219 SerialNumber[SerialNumberLength] = '\0';
2220}
2221
2222
2223/*
2224 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2225 Information for DAC960 V1 Firmware Controllers.
2226*/
2227
87d156bf 2228static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2229 *Controller)
2230{
2231 int LogicalDriveNumber, Channel, TargetID;
2232 DAC960_Info(" Physical Devices:\n", Controller);
2233 for (Channel = 0; Channel < Controller->Channels; Channel++)
2234 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2235 {
2236 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2237 &Controller->V1.InquiryStandardData[Channel][TargetID];
2238 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2239 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2240 DAC960_V1_DeviceState_T *DeviceState =
2241 &Controller->V1.DeviceState[Channel][TargetID];
2242 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2243 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2244 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2245 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2246 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2247 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2248 ->ProductSerialNumber)];
2249 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2250 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2251 Vendor, Model, Revision, SerialNumber);
2252 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2253 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2254 Vendor, Model, Revision);
2255 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2256 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2257 if (DeviceState->Present &&
2258 DeviceState->DeviceType == DAC960_V1_DiskType)
2259 {
2260 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2261 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2262 Controller,
2263 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2264 ? "Dead"
2265 : DeviceState->DeviceState
2266 == DAC960_V1_Device_WriteOnly
2267 ? "Write-Only"
2268 : DeviceState->DeviceState
2269 == DAC960_V1_Device_Online
2270 ? "Online" : "Standby"),
2271 DeviceState->DiskSize,
2272 Controller->V1.DeviceResetCount[Channel][TargetID]);
2273 else
2274 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2275 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2276 ? "Dead"
2277 : DeviceState->DeviceState
2278 == DAC960_V1_Device_WriteOnly
2279 ? "Write-Only"
2280 : DeviceState->DeviceState
2281 == DAC960_V1_Device_Online
2282 ? "Online" : "Standby"),
2283 DeviceState->DiskSize);
2284 }
2285 if (ErrorEntry->ParityErrorCount > 0 ||
2286 ErrorEntry->SoftErrorCount > 0 ||
2287 ErrorEntry->HardErrorCount > 0 ||
2288 ErrorEntry->MiscErrorCount > 0)
2289 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2290 "Hard: %d, Misc: %d\n", Controller,
2291 ErrorEntry->ParityErrorCount,
2292 ErrorEntry->SoftErrorCount,
2293 ErrorEntry->HardErrorCount,
2294 ErrorEntry->MiscErrorCount);
2295 }
2296 DAC960_Info(" Logical Drives:\n", Controller);
2297 for (LogicalDriveNumber = 0;
2298 LogicalDriveNumber < Controller->LogicalDriveCount;
2299 LogicalDriveNumber++)
2300 {
2301 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2302 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2303 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2304 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2305 LogicalDriveInformation->RAIDLevel,
2306 (LogicalDriveInformation->LogicalDriveState
2307 == DAC960_V1_LogicalDrive_Online
2308 ? "Online"
2309 : LogicalDriveInformation->LogicalDriveState
2310 == DAC960_V1_LogicalDrive_Critical
2311 ? "Critical" : "Offline"),
2312 LogicalDriveInformation->LogicalDriveSize,
2313 (LogicalDriveInformation->WriteBack
2314 ? "Write Back" : "Write Thru"));
2315 }
2316 return true;
2317}
2318
2319
2320/*
2321 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2322 Information for DAC960 V2 Firmware Controllers.
2323*/
2324
87d156bf 2325static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2326 *Controller)
2327{
2328 int PhysicalDeviceIndex, LogicalDriveNumber;
2329 DAC960_Info(" Physical Devices:\n", Controller);
2330 for (PhysicalDeviceIndex = 0;
2331 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2332 PhysicalDeviceIndex++)
2333 {
2334 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2335 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2336 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2337 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2338 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2339 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2340 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2341 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2342 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2343 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2344 if (PhysicalDeviceInfo == NULL) break;
2345 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2346 Vendor, Model, Revision, SerialNumber);
2347 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2348 Controller,
2349 PhysicalDeviceInfo->Channel,
2350 PhysicalDeviceInfo->TargetID,
2351 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2352 Vendor, Model, Revision);
2353 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2354 DAC960_Info(" %sAsynchronous\n", Controller,
2355 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2356 ? "Wide " :""));
2357 else
2358 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2359 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2360 ? "Wide " :""),
2361 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2362 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2363 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2364 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2365 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2366 DAC960_V2_Device_Unconfigured)
2367 continue;
2368 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2369 (PhysicalDeviceInfo->PhysicalDeviceState
2370 == DAC960_V2_Device_Online
2371 ? "Online"
2372 : PhysicalDeviceInfo->PhysicalDeviceState
2373 == DAC960_V2_Device_Rebuild
2374 ? "Rebuild"
2375 : PhysicalDeviceInfo->PhysicalDeviceState
2376 == DAC960_V2_Device_Missing
2377 ? "Missing"
2378 : PhysicalDeviceInfo->PhysicalDeviceState
2379 == DAC960_V2_Device_Critical
2380 ? "Critical"
2381 : PhysicalDeviceInfo->PhysicalDeviceState
2382 == DAC960_V2_Device_Dead
2383 ? "Dead"
2384 : PhysicalDeviceInfo->PhysicalDeviceState
2385 == DAC960_V2_Device_SuspectedDead
2386 ? "Suspected-Dead"
2387 : PhysicalDeviceInfo->PhysicalDeviceState
2388 == DAC960_V2_Device_CommandedOffline
2389 ? "Commanded-Offline"
2390 : PhysicalDeviceInfo->PhysicalDeviceState
2391 == DAC960_V2_Device_Standby
2392 ? "Standby" : "Unknown"),
2393 PhysicalDeviceInfo->ConfigurableDeviceSize);
2394 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2395 PhysicalDeviceInfo->SoftErrors == 0 &&
2396 PhysicalDeviceInfo->HardErrors == 0 &&
2397 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2398 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2399 PhysicalDeviceInfo->Retries == 0 &&
2400 PhysicalDeviceInfo->Aborts == 0 &&
2401 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2402 continue;
2403 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2404 "Hard: %d, Misc: %d\n", Controller,
2405 PhysicalDeviceInfo->ParityErrors,
2406 PhysicalDeviceInfo->SoftErrors,
2407 PhysicalDeviceInfo->HardErrors,
2408 PhysicalDeviceInfo->MiscellaneousErrors);
2409 DAC960_Info(" Timeouts: %d, Retries: %d, "
2410 "Aborts: %d, Predicted: %d\n", Controller,
2411 PhysicalDeviceInfo->CommandTimeouts,
2412 PhysicalDeviceInfo->Retries,
2413 PhysicalDeviceInfo->Aborts,
2414 PhysicalDeviceInfo->PredictedFailuresDetected);
2415 }
2416 DAC960_Info(" Logical Drives:\n", Controller);
2417 for (LogicalDriveNumber = 0;
2418 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2419 LogicalDriveNumber++)
2420 {
2421 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2422 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2423 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2424 "Read Cache Enabled",
2425 "Read Ahead Enabled",
2426 "Intelligent Read Ahead Enabled",
2427 "-", "-", "-", "-" };
2428 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2429 "Logical Device Read Only",
2430 "Write Cache Enabled",
2431 "Intelligent Write Cache Enabled",
2432 "-", "-", "-", "-" };
2433 unsigned char *GeometryTranslation;
2434 if (LogicalDeviceInfo == NULL) continue;
2435 switch (LogicalDeviceInfo->DriveGeometry)
2436 {
2437 case DAC960_V2_Geometry_128_32:
2438 GeometryTranslation = "128/32";
2439 break;
2440 case DAC960_V2_Geometry_255_63:
2441 GeometryTranslation = "255/63";
2442 break;
2443 default:
2444 GeometryTranslation = "Invalid";
2445 DAC960_Error("Illegal Logical Device Geometry %d\n",
2446 Controller, LogicalDeviceInfo->DriveGeometry);
2447 break;
2448 }
2449 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2450 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2451 LogicalDeviceInfo->RAIDLevel,
2452 (LogicalDeviceInfo->LogicalDeviceState
2453 == DAC960_V2_LogicalDevice_Online
2454 ? "Online"
2455 : LogicalDeviceInfo->LogicalDeviceState
2456 == DAC960_V2_LogicalDevice_Critical
2457 ? "Critical" : "Offline"),
2458 LogicalDeviceInfo->ConfigurableDeviceSize);
2459 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2460 Controller,
2461 (LogicalDeviceInfo->LogicalDeviceControl
2462 .LogicalDeviceInitialized
2463 ? "Initialized" : "Uninitialized"),
2464 GeometryTranslation);
2465 if (LogicalDeviceInfo->StripeSize == 0)
2466 {
2467 if (LogicalDeviceInfo->CacheLineSize == 0)
2468 DAC960_Info(" Stripe Size: N/A, "
2469 "Segment Size: N/A\n", Controller);
2470 else
2471 DAC960_Info(" Stripe Size: N/A, "
2472 "Segment Size: %dKB\n", Controller,
2473 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2474 }
2475 else
2476 {
2477 if (LogicalDeviceInfo->CacheLineSize == 0)
2478 DAC960_Info(" Stripe Size: %dKB, "
2479 "Segment Size: N/A\n", Controller,
2480 1 << (LogicalDeviceInfo->StripeSize - 2));
2481 else
2482 DAC960_Info(" Stripe Size: %dKB, "
2483 "Segment Size: %dKB\n", Controller,
2484 1 << (LogicalDeviceInfo->StripeSize - 2),
2485 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2486 }
2487 DAC960_Info(" %s, %s\n", Controller,
2488 ReadCacheStatus[
2489 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2490 WriteCacheStatus[
2491 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2492 if (LogicalDeviceInfo->SoftErrors > 0 ||
2493 LogicalDeviceInfo->CommandsFailed > 0 ||
2494 LogicalDeviceInfo->DeferredWriteErrors)
2495 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2496 "Deferred Write: %d\n", Controller,
2497 LogicalDeviceInfo->SoftErrors,
2498 LogicalDeviceInfo->CommandsFailed,
2499 LogicalDeviceInfo->DeferredWriteErrors);
2500
2501 }
2502 return true;
2503}
2504
2505/*
2506 DAC960_RegisterBlockDevice registers the Block Device structures
2507 associated with Controller.
2508*/
2509
87d156bf 2510static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
1da177e4
LT		 2511{
2512 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2513 int n;
2514
2515 /*
2516 Register the Block Device Major Number for this DAC960 Controller.
2517 */
2518 if (register_blkdev(MajorNumber, "dac960") < 0)
2519 return false;
2520
2521 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2522 struct gendisk *disk = Controller->disks[n];
2523 struct request_queue *RequestQueue;
2524
2525 /* for now, let all request queues share controller's lock */
2526 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2527 if (!RequestQueue) {
2528 printk("DAC960: failure to allocate request queue\n");
2529 continue;
2530 }
2531 Controller->RequestQueue[n] = RequestQueue;
2532 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2533 RequestQueue->queuedata = Controller;
2534 blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2535 blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2536 blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2537 disk->queue = RequestQueue;
2538 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
1da177e4
LT		 2539 disk->major = MajorNumber;
2540 disk->first_minor = n << DAC960_MaxPartitionsBits;
2541 disk->fops = &DAC960_BlockDeviceOperations;
2542 }
2543 /*
2544 Indicate the Block Device Registration completed successfully,
2545 */
2546 return true;
2547}
2548
2549
2550/*
2551 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2552 associated with Controller.
2553*/
2554
2555static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2556{
2557 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2558 int disk;
2559
2560 /* does order matter when deleting gendisk and cleanup in request queue? */
2561 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2562 del_gendisk(Controller->disks[disk]);
2563 blk_cleanup_queue(Controller->RequestQueue[disk]);
2564 Controller->RequestQueue[disk] = NULL;
2565 }
2566
2567 /*
2568 Unregister the Block Device Major Number for this DAC960 Controller.
2569 */
2570 unregister_blkdev(MajorNumber, "dac960");
2571}
2572
2573/*
2574 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2575 Information Partition Sector Counts and Block Sizes.
2576*/
2577
2578static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2579{
2580 int disk;
2581 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2582 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2583}
2584
2585/*
2586 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2587 the Error Status Register when the driver performs the BIOS handshaking.
2588 It returns true for fatal errors and false otherwise.
2589*/
2590
87d156bf 2591static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
1da177e4
LT		 2592 unsigned char ErrorStatus,
2593 unsigned char Parameter0,
2594 unsigned char Parameter1)
2595{
2596 switch (ErrorStatus)
2597 {
2598 case 0x00:
2599 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2600 Controller, Parameter1, Parameter0);
2601 break;
2602 case 0x08:
2603 if (Controller->DriveSpinUpMessageDisplayed) break;
2604 DAC960_Notice("Spinning Up Drives\n", Controller);
2605 Controller->DriveSpinUpMessageDisplayed = true;
2606 break;
2607 case 0x30:
2608 DAC960_Notice("Configuration Checksum Error\n", Controller);
2609 break;
2610 case 0x60:
2611 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2612 break;
2613 case 0x70:
2614 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2615 break;
2616 case 0x90:
2617 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2618 Controller, Parameter1, Parameter0);
2619 break;
2620 case 0xA0:
2621 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2622 break;
2623 case 0xB0:
2624 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2625 break;
2626 case 0xD0:
2627 DAC960_Notice("New Controller Configuration Found\n", Controller);
2628 break;
2629 case 0xF0:
2630 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2631 return true;
2632 default:
2633 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2634 Controller, ErrorStatus);
2635 return true;
2636 }
2637 return false;
2638}
2639
2640
2641/*
2642 * DAC960_DetectCleanup releases the resources that were allocated
2643 * during DAC960_DetectController(). DAC960_DetectController can
2644 * has several internal failure points, so not ALL resources may
2645 * have been allocated. It's important to free only
2646 * resources that HAVE been allocated. The code below always
2647 * tests that the resource has been allocated before attempting to
2648 * free it.
2649 */
2650static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2651{
2652 int i;
2653
2654 /* Free the memory mailbox, status, and related structures */
2655 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2656 if (Controller->MemoryMappedAddress) {
2657 switch(Controller->HardwareType)
2658 {
5b76ffd5
CH		 2659 case DAC960_GEM_Controller:
2660 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2661 break;
1da177e4
LT		 2662 case DAC960_BA_Controller:
2663 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2664 break;
2665 case DAC960_LP_Controller:
2666 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2667 break;
2668 case DAC960_LA_Controller:
2669 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2670 break;
2671 case DAC960_PG_Controller:
2672 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2673 break;
2674 case DAC960_PD_Controller:
2675 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2676 break;
2677 case DAC960_P_Controller:
2678 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2679 break;
2680 }
2681 iounmap(Controller->MemoryMappedAddress);
2682 }
2683 if (Controller->IRQ_Channel)
2684 free_irq(Controller->IRQ_Channel, Controller);
2685 if (Controller->IO_Address)
2686 release_region(Controller->IO_Address, 0x80);
2687 pci_disable_device(Controller->PCIDevice);
2688 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2689 put_disk(Controller->disks[i]);
2690 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2691 kfree(Controller);
2692}
2693
2694
2695/*
2696 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2697 PCI RAID Controllers by interrogating the PCI Configuration Space for
2698 Controller Type.
2699*/
2700
2701static DAC960_Controller_T *
2702DAC960_DetectController(struct pci_dev *PCI_Device,
2703 const struct pci_device_id *entry)
2704{
2705 struct DAC960_privdata *privdata =
2706 (struct DAC960_privdata *)entry->driver_data;
7d12e780 2707 irq_handler_t InterruptHandler = privdata->InterruptHandler;
1da177e4
LT		 2708 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2709 DAC960_Controller_T *Controller = NULL;
2710 unsigned char DeviceFunction = PCI_Device->devfn;
2711 unsigned char ErrorStatus, Parameter0, Parameter1;
2712 unsigned int IRQ_Channel;
2713 void __iomem *BaseAddress;
2714 int i;
2715
06ff37ff 2716 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
1da177e4
LT		 2717 if (Controller == NULL) {
2718 DAC960_Error("Unable to allocate Controller structure for "
2719 "Controller at\n", NULL);
2720 return NULL;
2721 }
1da177e4
LT		 2722 Controller->ControllerNumber = DAC960_ControllerCount;
2723 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2724 Controller->Bus = PCI_Device->bus->number;
2725 Controller->FirmwareType = privdata->FirmwareType;
2726 Controller->HardwareType = privdata->HardwareType;
2727 Controller->Device = DeviceFunction >> 3;
2728 Controller->Function = DeviceFunction & 0x7;
2729 Controller->PCIDevice = PCI_Device;
2730 strcpy(Controller->FullModelName, "DAC960");
2731
2732 if (pci_enable_device(PCI_Device))
2733 goto Failure;
2734
2735 switch (Controller->HardwareType)
2736 {
5b76ffd5
CH		 2737 case DAC960_GEM_Controller:
2738 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2739 break;
1da177e4
LT		 2740 case DAC960_BA_Controller:
2741 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2742 break;
2743 case DAC960_LP_Controller:
2744 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2745 break;
2746 case DAC960_LA_Controller:
2747 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2748 break;
2749 case DAC960_PG_Controller:
2750 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2751 break;
2752 case DAC960_PD_Controller:
2753 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2754 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2755 break;
2756 case DAC960_P_Controller:
2757 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2758 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2759 break;
2760 }
2761
2762 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2763 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2764 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2765 if (!Controller->disks[i])
2766 goto Failure;
2767 Controller->disks[i]->private_data = (void *)((long)i);
2768 }
2769 init_waitqueue_head(&Controller->CommandWaitQueue);
2770 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2771 spin_lock_init(&Controller->queue_lock);
2772 DAC960_AnnounceDriver(Controller);
2773 /*
2774 Map the Controller Register Window.
2775 */
2776 if (MemoryWindowSize < PAGE_SIZE)
2777 MemoryWindowSize = PAGE_SIZE;
2778 Controller->MemoryMappedAddress =
2779 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2780 Controller->BaseAddress =
2781 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2782 if (Controller->MemoryMappedAddress == NULL)
2783 {
2784 DAC960_Error("Unable to map Controller Register Window for "
2785 "Controller at\n", Controller);
2786 goto Failure;
2787 }
2788 BaseAddress = Controller->BaseAddress;
2789 switch (Controller->HardwareType)
2790 {
5b76ffd5
CH		 2791 case DAC960_GEM_Controller:
2792 DAC960_GEM_DisableInterrupts(BaseAddress);
2793 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2794 udelay(1000);
2795 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2796 {
2797 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2798 &Parameter0, &Parameter1) &&
2799 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2800 Parameter0, Parameter1))
2801 goto Failure;
2802 udelay(10);
2803 }
2804 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2805 {
2806 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2807 "for Controller at\n", Controller);
2808 goto Failure;
2809 }
2810 DAC960_GEM_EnableInterrupts(BaseAddress);
2811 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2812 Controller->ReadControllerConfiguration =
2813 DAC960_V2_ReadControllerConfiguration;
2814 Controller->ReadDeviceConfiguration =
2815 DAC960_V2_ReadDeviceConfiguration;
2816 Controller->ReportDeviceConfiguration =
2817 DAC960_V2_ReportDeviceConfiguration;
2818 Controller->QueueReadWriteCommand =
2819 DAC960_V2_QueueReadWriteCommand;
2820 break;
1da177e4
LT		 2821 case DAC960_BA_Controller:
2822 DAC960_BA_DisableInterrupts(BaseAddress);
2823 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2824 udelay(1000);
2825 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2826 {
2827 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2828 &Parameter0, &Parameter1) &&
2829 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2830 Parameter0, Parameter1))
2831 goto Failure;
2832 udelay(10);
2833 }
2834 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2835 {
2836 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2837 "for Controller at\n", Controller);
2838 goto Failure;
2839 }
2840 DAC960_BA_EnableInterrupts(BaseAddress);
2841 Controller->QueueCommand = DAC960_BA_QueueCommand;
2842 Controller->ReadControllerConfiguration =
2843 DAC960_V2_ReadControllerConfiguration;
2844 Controller->ReadDeviceConfiguration =
2845 DAC960_V2_ReadDeviceConfiguration;
2846 Controller->ReportDeviceConfiguration =
2847 DAC960_V2_ReportDeviceConfiguration;
2848 Controller->QueueReadWriteCommand =
2849 DAC960_V2_QueueReadWriteCommand;
2850 break;
2851 case DAC960_LP_Controller:
2852 DAC960_LP_DisableInterrupts(BaseAddress);
2853 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2854 udelay(1000);
2855 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2856 {
2857 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2858 &Parameter0, &Parameter1) &&
2859 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2860 Parameter0, Parameter1))
2861 goto Failure;
2862 udelay(10);
2863 }
2864 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2865 {
2866 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2867 "for Controller at\n", Controller);
2868 goto Failure;
2869 }
2870 DAC960_LP_EnableInterrupts(BaseAddress);
2871 Controller->QueueCommand = DAC960_LP_QueueCommand;
2872 Controller->ReadControllerConfiguration =
2873 DAC960_V2_ReadControllerConfiguration;
2874 Controller->ReadDeviceConfiguration =
2875 DAC960_V2_ReadDeviceConfiguration;
2876 Controller->ReportDeviceConfiguration =
2877 DAC960_V2_ReportDeviceConfiguration;
2878 Controller->QueueReadWriteCommand =
2879 DAC960_V2_QueueReadWriteCommand;
2880 break;
2881 case DAC960_LA_Controller:
2882 DAC960_LA_DisableInterrupts(BaseAddress);
2883 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2884 udelay(1000);
2885 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2886 {
2887 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2888 &Parameter0, &Parameter1) &&
2889 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2890 Parameter0, Parameter1))
2891 goto Failure;
2892 udelay(10);
2893 }
2894 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2895 {
2896 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2897 "for Controller at\n", Controller);
2898 goto Failure;
2899 }
2900 DAC960_LA_EnableInterrupts(BaseAddress);
2901 if (Controller->V1.DualModeMemoryMailboxInterface)
2902 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2903 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2904 Controller->ReadControllerConfiguration =
2905 DAC960_V1_ReadControllerConfiguration;
2906 Controller->ReadDeviceConfiguration =
2907 DAC960_V1_ReadDeviceConfiguration;
2908 Controller->ReportDeviceConfiguration =
2909 DAC960_V1_ReportDeviceConfiguration;
2910 Controller->QueueReadWriteCommand =
2911 DAC960_V1_QueueReadWriteCommand;
2912 break;
2913 case DAC960_PG_Controller:
2914 DAC960_PG_DisableInterrupts(BaseAddress);
2915 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2916 udelay(1000);
2917 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2918 {
2919 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2920 &Parameter0, &Parameter1) &&
2921 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2922 Parameter0, Parameter1))
2923 goto Failure;
2924 udelay(10);
2925 }
2926 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2927 {
2928 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2929 "for Controller at\n", Controller);
2930 goto Failure;
2931 }
2932 DAC960_PG_EnableInterrupts(BaseAddress);
2933 if (Controller->V1.DualModeMemoryMailboxInterface)
2934 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2935 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2936 Controller->ReadControllerConfiguration =
2937 DAC960_V1_ReadControllerConfiguration;
2938 Controller->ReadDeviceConfiguration =
2939 DAC960_V1_ReadDeviceConfiguration;
2940 Controller->ReportDeviceConfiguration =
2941 DAC960_V1_ReportDeviceConfiguration;
2942 Controller->QueueReadWriteCommand =
2943 DAC960_V1_QueueReadWriteCommand;
2944 break;
2945 case DAC960_PD_Controller:
2946 if (!request_region(Controller->IO_Address, 0x80,
2947 Controller->FullModelName)) {
2948 DAC960_Error("IO port 0x%d busy for Controller at\n",
2949 Controller, Controller->IO_Address);
2950 goto Failure;
2951 }
2952 DAC960_PD_DisableInterrupts(BaseAddress);
2953 DAC960_PD_AcknowledgeStatus(BaseAddress);
2954 udelay(1000);
2955 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2956 {
2957 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2958 &Parameter0, &Parameter1) &&
2959 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2960 Parameter0, Parameter1))
2961 goto Failure;
2962 udelay(10);
2963 }
2964 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2965 {
2966 DAC960_Error("Unable to allocate DMA mapped memory "
2967 "for Controller at\n", Controller);
2968 goto Failure;
2969 }
2970 DAC960_PD_EnableInterrupts(BaseAddress);
2971 Controller->QueueCommand = DAC960_PD_QueueCommand;
2972 Controller->ReadControllerConfiguration =
2973 DAC960_V1_ReadControllerConfiguration;
2974 Controller->ReadDeviceConfiguration =
2975 DAC960_V1_ReadDeviceConfiguration;
2976 Controller->ReportDeviceConfiguration =
2977 DAC960_V1_ReportDeviceConfiguration;
2978 Controller->QueueReadWriteCommand =
2979 DAC960_V1_QueueReadWriteCommand;
2980 break;
2981 case DAC960_P_Controller:
2982 if (!request_region(Controller->IO_Address, 0x80,
2983 Controller->FullModelName)){
2984 DAC960_Error("IO port 0x%d busy for Controller at\n",
2985 Controller, Controller->IO_Address);
2986 goto Failure;
2987 }
2988 DAC960_PD_DisableInterrupts(BaseAddress);
2989 DAC960_PD_AcknowledgeStatus(BaseAddress);
2990 udelay(1000);
2991 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2992 {
2993 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2994 &Parameter0, &Parameter1) &&
2995 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2996 Parameter0, Parameter1))
2997 goto Failure;
2998 udelay(10);
2999 }
3000 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3001 {
3002 DAC960_Error("Unable to allocate DMA mapped memory"
3003 "for Controller at\n", Controller);
3004 goto Failure;
3005 }
3006 DAC960_PD_EnableInterrupts(BaseAddress);
3007 Controller->QueueCommand = DAC960_P_QueueCommand;
3008 Controller->ReadControllerConfiguration =
3009 DAC960_V1_ReadControllerConfiguration;
3010 Controller->ReadDeviceConfiguration =
3011 DAC960_V1_ReadDeviceConfiguration;
3012 Controller->ReportDeviceConfiguration =
3013 DAC960_V1_ReportDeviceConfiguration;
3014 Controller->QueueReadWriteCommand =
3015 DAC960_V1_QueueReadWriteCommand;
3016 break;
3017 }
3018 /*
3019 Acquire shared access to the IRQ Channel.
3020 */
3021 IRQ_Channel = PCI_Device->irq;
69ab3912 3022 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
1da177e4
LT		 3023 Controller->FullModelName, Controller) < 0)
3024 {
3025 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3026 Controller, Controller->IRQ_Channel);
3027 goto Failure;
3028 }
3029 Controller->IRQ_Channel = IRQ_Channel;
3030 Controller->InitialCommand.CommandIdentifier = 1;
3031 Controller->InitialCommand.Controller = Controller;
3032 Controller->Commands[0] = &Controller->InitialCommand;
3033 Controller->FreeCommands = &Controller->InitialCommand;
3034 return Controller;
3035
3036Failure:
3037 if (Controller->IO_Address == 0)
3038 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3039 "PCI Address 0x%X\n", Controller,
3040 Controller->Bus, Controller->Device,
3041 Controller->Function, Controller->PCI_Address);
3042 else
3043 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3044 "0x%X PCI Address 0x%X\n", Controller,
3045 Controller->Bus, Controller->Device,
3046 Controller->Function, Controller->IO_Address,
3047 Controller->PCI_Address);
3048 DAC960_DetectCleanup(Controller);
3049 DAC960_ControllerCount--;
3050 return NULL;
3051}
3052
3053/*
3054 DAC960_InitializeController initializes Controller.
3055*/
3056
87d156bf 3057static bool
1da177e4
LT		 3058DAC960_InitializeController(DAC960_Controller_T *Controller)
3059{
3060 if (DAC960_ReadControllerConfiguration(Controller) &&
3061 DAC960_ReportControllerConfiguration(Controller) &&
3062 DAC960_CreateAuxiliaryStructures(Controller) &&
3063 DAC960_ReadDeviceConfiguration(Controller) &&
3064 DAC960_ReportDeviceConfiguration(Controller) &&
3065 DAC960_RegisterBlockDevice(Controller))
3066 {
3067 /*
3068 Initialize the Monitoring Timer.
3069 */
3070 init_timer(&Controller->MonitoringTimer);
3071 Controller->MonitoringTimer.expires =
3072 jiffies + DAC960_MonitoringTimerInterval;
3073 Controller->MonitoringTimer.data = (unsigned long) Controller;
3074 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3075 add_timer(&Controller->MonitoringTimer);
3076 Controller->ControllerInitialized = true;
3077 return true;
3078 }
3079 return false;
3080}
3081
3082
3083/*
3084 DAC960_FinalizeController finalizes Controller.
3085*/
3086
3087static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3088{
3089 if (Controller->ControllerInitialized)
3090 {
3091 unsigned long flags;
3092
3093 /*
3094 * Acquiring and releasing lock here eliminates
3095 * a very low probability race.
3096 *
3097 * The code below allocates controller command structures
3098 * from the free list without holding the controller lock.
3099 * This is safe assuming there is no other activity on
3100 * the controller at the time.
3101 *
3102 * But, there might be a monitoring command still
3103 * in progress. Setting the Shutdown flag while holding
3104 * the lock ensures that there is no monitoring command
3105 * in the interrupt handler currently, and any monitoring
3106 * commands that complete from this time on will NOT return
3107 * their command structure to the free list.
3108 */
3109
3110 spin_lock_irqsave(&Controller->queue_lock, flags);
3111 Controller->ShutdownMonitoringTimer = 1;
3112 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3113
3114 del_timer_sync(&Controller->MonitoringTimer);
3115 if (Controller->FirmwareType == DAC960_V1_Controller)
3116 {
3117 DAC960_Notice("Flushing Cache...", Controller);
3118 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3119 DAC960_Notice("done\n", Controller);
3120
3121 if (Controller->HardwareType == DAC960_PD_Controller)
3122 release_region(Controller->IO_Address, 0x80);
3123 }
3124 else
3125 {
3126 DAC960_Notice("Flushing Cache...", Controller);
3127 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3128 DAC960_V2_RAID_Controller);
3129 DAC960_Notice("done\n", Controller);
3130 }
3131 }
3132 DAC960_UnregisterBlockDevice(Controller);
3133 DAC960_DestroyAuxiliaryStructures(Controller);
3134 DAC960_DestroyProcEntries(Controller);
3135 DAC960_DetectCleanup(Controller);
3136}
3137
3138
3139/*
3140 DAC960_Probe verifies controller's existence and
3141 initializes the DAC960 Driver for that controller.
3142*/
3143
3144static int
3145DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3146{
3147 int disk;
3148 DAC960_Controller_T *Controller;
3149
3150 if (DAC960_ControllerCount == DAC960_MaxControllers)
3151 {
3152 DAC960_Error("More than %d DAC960 Controllers detected - "
3153 "ignoring from Controller at\n",
3154 NULL, DAC960_MaxControllers);
3155 return -ENODEV;
3156 }
3157
3158 Controller = DAC960_DetectController(dev, entry);
3159 if (!Controller)
3160 return -ENODEV;
3161
3162 if (!DAC960_InitializeController(Controller)) {
3163 DAC960_FinalizeController(Controller);
3164 return -ENODEV;
3165 }
3166
3167 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3168 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3169 add_disk(Controller->disks[disk]);
3170 }
3171 DAC960_CreateProcEntries(Controller);
3172 return 0;
3173}
3174
3175
3176/*
3177 DAC960_Finalize finalizes the DAC960 Driver.
3178*/
3179
3180static void DAC960_Remove(struct pci_dev *PCI_Device)
3181{
3182 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3183 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3184 if (Controller != NULL)
3185 DAC960_FinalizeController(Controller);
3186}
3187
3188
3189/*
3190 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3191 DAC960 V1 Firmware Controllers.
3192*/
3193
3194static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3195{
3196 DAC960_Controller_T *Controller = Command->Controller;
3197 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3198 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3199 Command->V1.ScatterGatherList;
3200 struct scatterlist *ScatterList = Command->V1.ScatterList;
3201
3202 DAC960_V1_ClearCommand(Command);
3203
3204 if (Command->SegmentCount == 1)
3205 {
3206 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3207 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3208 else
3209 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3210
3211 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3212 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3213 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3214 CommandMailbox->Type5.BusAddress =
3215 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3216 }
3217 else
3218 {
3219 int i;
3220
3221 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3222 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3223 else
3224 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3225
3226 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3227 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3228 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3229 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3230
3231 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3232
3233 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3234 ScatterGatherList->SegmentDataPointer =
3235 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3236 ScatterGatherList->SegmentByteCount =
3237 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3238 }
3239 }
3240 DAC960_QueueCommand(Command);
3241}
3242
3243
3244/*
3245 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3246 DAC960 V2 Firmware Controllers.
3247*/
3248
3249static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3250{
3251 DAC960_Controller_T *Controller = Command->Controller;
3252 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3253 struct scatterlist *ScatterList = Command->V2.ScatterList;
3254
3255 DAC960_V2_ClearCommand(Command);
3256
3257 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3258 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3259 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3260 CommandMailbox->SCSI_10.DataTransferSize =
3261 Command->BlockCount << DAC960_BlockSizeBits;
3262 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3263 CommandMailbox->SCSI_10.PhysicalDevice =
3264 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3265 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3266 CommandMailbox->SCSI_10.CDBLength = 10;
3267 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3268 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3269 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3270 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3271 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3272 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3273 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3274 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3275
3276 if (Command->SegmentCount == 1)
3277 {
3278 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3279 .ScatterGatherSegments[0]
3280 .SegmentDataPointer =
3281 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3282 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3283 .ScatterGatherSegments[0]
3284 .SegmentByteCount =
3285 CommandMailbox->SCSI_10.DataTransferSize;
3286 }
3287 else
3288 {
3289 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3290 int i;
3291
3292 if (Command->SegmentCount > 2)
3293 {
3294 ScatterGatherList = Command->V2.ScatterGatherList;
3295 CommandMailbox->SCSI_10.CommandControlBits
3296 .AdditionalScatterGatherListMemory = true;
3297 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3298 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3299 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3300 .ExtendedScatterGather.ScatterGatherList0Address =
3301 Command->V2.ScatterGatherListDMA;
3302 }
3303 else
3304 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3305 .ScatterGatherSegments;
3306
3307 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3308 ScatterGatherList->SegmentDataPointer =
3309 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3310 ScatterGatherList->SegmentByteCount =
3311 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3312 }
3313 }
3314 DAC960_QueueCommand(Command);
3315}
3316
3317
3318static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3319{
3320 struct request *Request;
3321 DAC960_Command_T *Command;
3322
3323 while(1) {
3324 Request = elv_next_request(req_q);
3325 if (!Request)
3326 return 1;
3327
3328 Command = DAC960_AllocateCommand(Controller);
3329 if (Command == NULL)
3330 return 0;
3331
3332 if (rq_data_dir(Request) == READ) {
3333 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3334 Command->CommandType = DAC960_ReadCommand;
3335 } else {
3336 Command->DmaDirection = PCI_DMA_TODEVICE;
3337 Command->CommandType = DAC960_WriteCommand;
3338 }
c00895ab 3339 Command->Completion = Request->end_io_data;
1da177e4
LT		 3340 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3341 Command->BlockNumber = Request->sector;
3342 Command->BlockCount = Request->nr_sectors;
3343 Command->Request = Request;
3344 blkdev_dequeue_request(Request);
3345 Command->SegmentCount = blk_rq_map_sg(req_q,
3346 Command->Request, Command->cmd_sglist);
3347 /* pci_map_sg MAY change the value of SegCount */
3348 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3349 Command->SegmentCount, Command->DmaDirection);
3350
3351 DAC960_QueueReadWriteCommand(Command);
3352 }
3353}
3354
3355/*
3356 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3357 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3358 this function should wait for a Command to become available if necessary.
3359 This function returns true if an I/O Request was queued and false otherwise.
3360*/
3361static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3362{
3363 int i;
3364
3365 if (!controller->ControllerInitialized)
3366 return;
3367
3368 /* Do this better later! */
3369 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3370 struct request_queue *req_q = controller->RequestQueue[i];
3371
3372 if (req_q == NULL)
3373 continue;
3374
3375 if (!DAC960_process_queue(controller, req_q)) {
3376 controller->req_q_index = i;
3377 return;
3378 }
3379 }
3380
3381 if (controller->req_q_index == 0)
3382 return;
3383
3384 for (i = 0; i < controller->req_q_index; i++) {
3385 struct request_queue *req_q = controller->RequestQueue[i];
3386
3387 if (req_q == NULL)
3388 continue;
3389
3390 if (!DAC960_process_queue(controller, req_q)) {
3391 controller->req_q_index = i;
3392 return;
3393 }
3394 }
3395}
3396
3397
3398/*
3399 DAC960_queue_partial_rw extracts one bio from the request already
3400 associated with argument command, and construct a new command block to retry I/O
3401 only on that bio. Queue that command to the controller.
3402
3403 This function re-uses a previously-allocated Command,
3404 there is no failure mode from trying to allocate a command.
3405*/
3406
3407static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3408{
3409 DAC960_Controller_T *Controller = Command->Controller;
3410 struct request *Request = Command->Request;
3411 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3412
3413 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3414 Command->CommandType = DAC960_ReadRetryCommand;
3415 else
3416 Command->CommandType = DAC960_WriteRetryCommand;
3417
3418 /*
3419 * We could be more efficient with these mapping requests
3420 * and map only the portions that we need. But since this
3421 * code should almost never be called, just go with a
3422 * simple coding.
3423 */
3424 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3425
3426 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3427 /*
3428 * Resubmitting the request sector at a time is really tedious.
3429 * But, this should almost never happen. So, we're willing to pay
3430 * this price so that in the end, as much of the transfer is completed
3431 * successfully as possible.
3432 */
3433 Command->SegmentCount = 1;
3434 Command->BlockNumber = Request->sector;
3435 Command->BlockCount = 1;
3436 DAC960_QueueReadWriteCommand(Command);
3437 return;
3438}
3439
3440/*
3441 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3442*/
3443
3444static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3445{
3446 DAC960_ProcessRequest(RequestQueue->queuedata);
3447}
3448
3449/*
3450 DAC960_ProcessCompletedBuffer performs completion processing for an
3451 individual Buffer.
3452*/
3453
87d156bf
RK		 3454static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3455 bool SuccessfulIO)
1da177e4
LT		 3456{
3457 struct request *Request = Command->Request;
3458 int UpToDate;
3459
3460 UpToDate = 0;
3461 if (SuccessfulIO)
3462 UpToDate = 1;
3463
3464 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3465 Command->SegmentCount, Command->DmaDirection);
3466
3467 if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) {
62287fbb 3468 add_disk_randomness(Request->rq_disk);
8ffdc655 3469 end_that_request_last(Request, UpToDate);
1da177e4
LT		 3470
3471 if (Command->Completion) {
3472 complete(Command->Completion);
3473 Command->Completion = NULL;
3474 }
3475 return true;
3476 }
3477 return false;
3478}
3479
3480/*
3481 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3482 when an error occurs on a Read or Write operation.
3483*/
3484
3485static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3486{
3487 DAC960_Controller_T *Controller = Command->Controller;
3488 unsigned char *CommandName = "UNKNOWN";
3489 switch (Command->CommandType)
3490 {
3491 case DAC960_ReadCommand:
3492 case DAC960_ReadRetryCommand:
3493 CommandName = "READ";
3494 break;
3495 case DAC960_WriteCommand:
3496 case DAC960_WriteRetryCommand:
3497 CommandName = "WRITE";
3498 break;
3499 case DAC960_MonitoringCommand:
3500 case DAC960_ImmediateCommand:
3501 case DAC960_QueuedCommand:
3502 break;
3503 }
3504 switch (Command->V1.CommandStatus)
3505 {
3506 case DAC960_V1_IrrecoverableDataError:
3507 DAC960_Error("Irrecoverable Data Error on %s:\n",
3508 Controller, CommandName);
3509 break;
3510 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3511 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3512 Controller, CommandName);
3513 break;
3514 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3515 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3516 "on %s:\n", Controller, CommandName);
3517 break;
3518 case DAC960_V1_BadDataEncountered:
3519 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3520 break;
3521 default:
3522 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3523 Controller, Command->V1.CommandStatus, CommandName);
3524 break;
3525 }
3526 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3527 Controller, Controller->ControllerNumber,
3528 Command->LogicalDriveNumber, Command->BlockNumber,
3529 Command->BlockNumber + Command->BlockCount - 1);
3530}
3531
3532
3533/*
3534 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3535 for DAC960 V1 Firmware Controllers.
3536*/
3537
3538static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3539{
3540 DAC960_Controller_T *Controller = Command->Controller;
3541 DAC960_CommandType_T CommandType = Command->CommandType;
3542 DAC960_V1_CommandOpcode_T CommandOpcode =
3543 Command->V1.CommandMailbox.Common.CommandOpcode;
3544 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3545
3546 if (CommandType == DAC960_ReadCommand ||
3547 CommandType == DAC960_WriteCommand)
3548 {
3549
3550#ifdef FORCE_RETRY_DEBUG
3551 CommandStatus = DAC960_V1_IrrecoverableDataError;
3552#endif
3553
3554 if (CommandStatus == DAC960_V1_NormalCompletion) {
3555
3556 if (!DAC960_ProcessCompletedRequest(Command, true))
3557 BUG();
3558
3559 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3560 CommandStatus == DAC960_V1_BadDataEncountered)
3561 {
3562 /*
3563 * break the command down into pieces and resubmit each
3564 * piece, hoping that some of them will succeed.
3565 */
3566 DAC960_queue_partial_rw(Command);
3567 return;
3568 }
3569 else
3570 {
3571 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3572 DAC960_V1_ReadWriteError(Command);
3573
3574 if (!DAC960_ProcessCompletedRequest(Command, false))
3575 BUG();
3576 }
3577 }
3578 else if (CommandType == DAC960_ReadRetryCommand ||
3579 CommandType == DAC960_WriteRetryCommand)
3580 {
87d156bf 3581 bool normal_completion;
1da177e4
LT		 3582#ifdef FORCE_RETRY_FAILURE_DEBUG
3583 static int retry_count = 1;
3584#endif
3585 /*
3586 Perform completion processing for the portion that was
3587 retried, and submit the next portion, if any.
3588 */
3589 normal_completion = true;
3590 if (CommandStatus != DAC960_V1_NormalCompletion) {
3591 normal_completion = false;
3592 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3593 DAC960_V1_ReadWriteError(Command);
3594 }
3595
3596#ifdef FORCE_RETRY_FAILURE_DEBUG
3597 if (!(++retry_count % 10000)) {
3598 printk("V1 error retry failure test\n");
3599 normal_completion = false;
3600 DAC960_V1_ReadWriteError(Command);
3601 }
3602#endif
3603
3604 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3605 DAC960_queue_partial_rw(Command);
3606 return;
3607 }
3608 }
3609
3610 else if (CommandType == DAC960_MonitoringCommand)
3611 {
3612 if (Controller->ShutdownMonitoringTimer)
3613 return;
3614 if (CommandOpcode == DAC960_V1_Enquiry)
3615 {
3616 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3617 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3618 unsigned int OldCriticalLogicalDriveCount =
3619 OldEnquiry->CriticalLogicalDriveCount;
3620 unsigned int NewCriticalLogicalDriveCount =
3621 NewEnquiry->CriticalLogicalDriveCount;
3622 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3623 {
3624 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3625 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3626 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3627 "Now Exists\n", Controller,
3628 LogicalDriveNumber,
3629 Controller->ControllerNumber,
3630 LogicalDriveNumber);
3631 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3632 DAC960_ComputeGenericDiskInfo(Controller);
3633 }
3634 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3635 {
3636 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3637 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3638 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3639 "No Longer Exists\n", Controller,
3640 LogicalDriveNumber,
3641 Controller->ControllerNumber,
3642 LogicalDriveNumber);
3643 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3644 DAC960_ComputeGenericDiskInfo(Controller);
3645 }
3646 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3647 OldEnquiry->StatusFlags.DeferredWriteError)
3648 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3649 (NewEnquiry->StatusFlags.DeferredWriteError
3650 ? "TRUE" : "FALSE"));
3651 if ((NewCriticalLogicalDriveCount > 0 ||
3652 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3653 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3654 NewEnquiry->OfflineLogicalDriveCount !=
3655 OldEnquiry->OfflineLogicalDriveCount) ||
3656 (NewEnquiry->DeadDriveCount > 0 ||
3657 NewEnquiry->DeadDriveCount !=
3658 OldEnquiry->DeadDriveCount) ||
3659 (NewEnquiry->EventLogSequenceNumber !=
3660 OldEnquiry->EventLogSequenceNumber) ||
3661 Controller->MonitoringTimerCount == 0 ||
50297cbf
MFP		 3662 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3663 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 3664 {
3665 Controller->V1.NeedLogicalDriveInformation = true;
3666 Controller->V1.NewEventLogSequenceNumber =
3667 NewEnquiry->EventLogSequenceNumber;
3668 Controller->V1.NeedErrorTableInformation = true;
3669 Controller->V1.NeedDeviceStateInformation = true;
3670 Controller->V1.StartDeviceStateScan = true;
3671 Controller->V1.NeedBackgroundInitializationStatus =
3672 Controller->V1.BackgroundInitializationStatusSupported;
3673 Controller->SecondaryMonitoringTime = jiffies;
3674 }
3675 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3676 NewEnquiry->RebuildFlag
3677 == DAC960_V1_BackgroundRebuildInProgress ||
3678 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3679 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3680 {
3681 Controller->V1.NeedRebuildProgress = true;
3682 Controller->V1.RebuildProgressFirst =
3683 (NewEnquiry->CriticalLogicalDriveCount <
3684 OldEnquiry->CriticalLogicalDriveCount);
3685 }
3686 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3687 switch (NewEnquiry->RebuildFlag)
3688 {
3689 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3690 DAC960_Progress("Consistency Check Completed Successfully\n",
3691 Controller);
3692 break;
3693 case DAC960_V1_StandbyRebuildInProgress:
3694 case DAC960_V1_BackgroundRebuildInProgress:
3695 break;
3696 case DAC960_V1_BackgroundCheckInProgress:
3697 Controller->V1.NeedConsistencyCheckProgress = true;
3698 break;
3699 case DAC960_V1_StandbyRebuildCompletedWithError:
3700 DAC960_Progress("Consistency Check Completed with Error\n",
3701 Controller);
3702 break;
3703 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3704 DAC960_Progress("Consistency Check Failed - "
3705 "Physical Device Failed\n", Controller);
3706 break;
3707 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3708 DAC960_Progress("Consistency Check Failed - "
3709 "Logical Drive Failed\n", Controller);
3710 break;
3711 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3712 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3713 Controller);
3714 break;
3715 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3716 DAC960_Progress("Consistency Check Successfully Terminated\n",
3717 Controller);
3718 break;
3719 }
3720 else if (NewEnquiry->RebuildFlag
3721 == DAC960_V1_BackgroundCheckInProgress)
3722 Controller->V1.NeedConsistencyCheckProgress = true;
3723 Controller->MonitoringAlertMode =
3724 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3725 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3726 NewEnquiry->DeadDriveCount > 0);
3727 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3728 {
3729 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3730 Controller->V1.RebuildFlagPending = true;
3731 }
3732 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3733 sizeof(DAC960_V1_Enquiry_T));
3734 }
3735 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3736 {
3737 static char
3738 *DAC960_EventMessages[] =
3739 { "killed because write recovery failed",
3740 "killed because of SCSI bus reset failure",
3741 "killed because of double check condition",
3742 "killed because it was removed",
3743 "killed because of gross error on SCSI chip",
3744 "killed because of bad tag returned from drive",
3745 "killed because of timeout on SCSI command",
3746 "killed because of reset SCSI command issued from system",
3747 "killed because busy or parity error count exceeded limit",
3748 "killed because of 'kill drive' command from system",
3749 "killed because of selection timeout",
3750 "killed due to SCSI phase sequence error",
3751 "killed due to unknown status" };
3752 DAC960_V1_EventLogEntry_T *EventLogEntry =
3753 Controller->V1.EventLogEntry;
3754 if (EventLogEntry->SequenceNumber ==
3755 Controller->V1.OldEventLogSequenceNumber)
3756 {
3757 unsigned char SenseKey = EventLogEntry->SenseKey;
3758 unsigned char AdditionalSenseCode =
3759 EventLogEntry->AdditionalSenseCode;
3760 unsigned char AdditionalSenseCodeQualifier =
3761 EventLogEntry->AdditionalSenseCodeQualifier;
3762 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3763 AdditionalSenseCode == 0x80 &&
3764 AdditionalSenseCodeQualifier <
945f390f 3765 ARRAY_SIZE(DAC960_EventMessages))
1da177e4
LT		 3766 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3767 EventLogEntry->Channel,
3768 EventLogEntry->TargetID,
3769 DAC960_EventMessages[
3770 AdditionalSenseCodeQualifier]);
3771 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3772 AdditionalSenseCode == 0x29)
3773 {
3774 if (Controller->MonitoringTimerCount > 0)
3775 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3776 [EventLogEntry->TargetID]++;
3777 }
3778 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3779 (SenseKey == DAC960_SenseKey_NotReady &&
3780 AdditionalSenseCode == 0x04 &&
3781 (AdditionalSenseCodeQualifier == 0x01 ||
3782 AdditionalSenseCodeQualifier == 0x02))))
3783 {
3784 DAC960_Critical("Physical Device %d:%d Error Log: "
3785 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3786 Controller,
3787 EventLogEntry->Channel,
3788 EventLogEntry->TargetID,
3789 SenseKey,
3790 AdditionalSenseCode,
3791 AdditionalSenseCodeQualifier);
3792 DAC960_Critical("Physical Device %d:%d Error Log: "
3793 "Information = %02X%02X%02X%02X "
3794 "%02X%02X%02X%02X\n",
3795 Controller,
3796 EventLogEntry->Channel,
3797 EventLogEntry->TargetID,
3798 EventLogEntry->Information[0],
3799 EventLogEntry->Information[1],
3800 EventLogEntry->Information[2],
3801 EventLogEntry->Information[3],
3802 EventLogEntry->CommandSpecificInformation[0],
3803 EventLogEntry->CommandSpecificInformation[1],
3804 EventLogEntry->CommandSpecificInformation[2],
3805 EventLogEntry->CommandSpecificInformation[3]);
3806 }
3807 }
3808 Controller->V1.OldEventLogSequenceNumber++;
3809 }
3810 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3811 {
3812 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3813 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3814 int Channel, TargetID;
3815 for (Channel = 0; Channel < Controller->Channels; Channel++)
3816 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3817 {
3818 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3819 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3820 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3821 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3822 if ((NewErrorEntry->ParityErrorCount !=
3823 OldErrorEntry->ParityErrorCount) ||
3824 (NewErrorEntry->SoftErrorCount !=
3825 OldErrorEntry->SoftErrorCount) ||
3826 (NewErrorEntry->HardErrorCount !=
3827 OldErrorEntry->HardErrorCount) ||
3828 (NewErrorEntry->MiscErrorCount !=
3829 OldErrorEntry->MiscErrorCount))
3830 DAC960_Critical("Physical Device %d:%d Errors: "
3831 "Parity = %d, Soft = %d, "
3832 "Hard = %d, Misc = %d\n",
3833 Controller, Channel, TargetID,
3834 NewErrorEntry->ParityErrorCount,
3835 NewErrorEntry->SoftErrorCount,
3836 NewErrorEntry->HardErrorCount,
3837 NewErrorEntry->MiscErrorCount);
3838 }
3839 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3840 sizeof(DAC960_V1_ErrorTable_T));
3841 }
3842 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3843 {
3844 DAC960_V1_DeviceState_T *OldDeviceState =
3845 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3846 [Controller->V1.DeviceStateTargetID];
3847 DAC960_V1_DeviceState_T *NewDeviceState =
3848 Controller->V1.NewDeviceState;
3849 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3850 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3851 Controller->V1.DeviceStateChannel,
3852 Controller->V1.DeviceStateTargetID,
3853 (NewDeviceState->DeviceState
3854 == DAC960_V1_Device_Dead
3855 ? "DEAD"
3856 : NewDeviceState->DeviceState
3857 == DAC960_V1_Device_WriteOnly
3858 ? "WRITE-ONLY"
3859 : NewDeviceState->DeviceState
3860 == DAC960_V1_Device_Online
3861 ? "ONLINE" : "STANDBY"));
3862 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3863 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3864 {
3865 Controller->V1.NeedDeviceInquiryInformation = true;
3866 Controller->V1.NeedDeviceSerialNumberInformation = true;
3867 Controller->V1.DeviceResetCount
3868 [Controller->V1.DeviceStateChannel]
3869 [Controller->V1.DeviceStateTargetID] = 0;
3870 }
3871 memcpy(OldDeviceState, NewDeviceState,
3872 sizeof(DAC960_V1_DeviceState_T));
3873 }
3874 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3875 {
3876 int LogicalDriveNumber;
3877 for (LogicalDriveNumber = 0;
3878 LogicalDriveNumber < Controller->LogicalDriveCount;
3879 LogicalDriveNumber++)
3880 {
3881 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3882 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3883 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3884 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3885 if (NewLogicalDriveInformation->LogicalDriveState !=
3886 OldLogicalDriveInformation->LogicalDriveState)
3887 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3888 "is now %s\n", Controller,
3889 LogicalDriveNumber,
3890 Controller->ControllerNumber,
3891 LogicalDriveNumber,
3892 (NewLogicalDriveInformation->LogicalDriveState
3893 == DAC960_V1_LogicalDrive_Online
3894 ? "ONLINE"
3895 : NewLogicalDriveInformation->LogicalDriveState
3896 == DAC960_V1_LogicalDrive_Critical
3897 ? "CRITICAL" : "OFFLINE"));
3898 if (NewLogicalDriveInformation->WriteBack !=
3899 OldLogicalDriveInformation->WriteBack)
3900 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3901 "is now %s\n", Controller,
3902 LogicalDriveNumber,
3903 Controller->ControllerNumber,
3904 LogicalDriveNumber,
3905 (NewLogicalDriveInformation->WriteBack
3906 ? "WRITE BACK" : "WRITE THRU"));
3907 }
3908 memcpy(&Controller->V1.LogicalDriveInformation,
3909 Controller->V1.NewLogicalDriveInformation,
3910 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3911 }
3912 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3913 {
3914 unsigned int LogicalDriveNumber =
3915 Controller->V1.RebuildProgress->LogicalDriveNumber;
3916 unsigned int LogicalDriveSize =
3917 Controller->V1.RebuildProgress->LogicalDriveSize;
3918 unsigned int BlocksCompleted =
3919 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3920 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3921 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3922 CommandStatus = DAC960_V1_RebuildSuccessful;
3923 switch (CommandStatus)
3924 {
3925 case DAC960_V1_NormalCompletion:
3926 Controller->EphemeralProgressMessage = true;
3927 DAC960_Progress("Rebuild in Progress: "
3928 "Logical Drive %d (/dev/rd/c%dd%d) "
3929 "%d%% completed\n",
3930 Controller, LogicalDriveNumber,
3931 Controller->ControllerNumber,
3932 LogicalDriveNumber,
3933 (100 * (BlocksCompleted >> 7))
3934 / (LogicalDriveSize >> 7));
3935 Controller->EphemeralProgressMessage = false;
3936 break;
3937 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3938 DAC960_Progress("Rebuild Failed due to "
3939 "Logical Drive Failure\n", Controller);
3940 break;
3941 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3942 DAC960_Progress("Rebuild Failed due to "
3943 "Bad Blocks on Other Drives\n", Controller);
3944 break;
3945 case DAC960_V1_RebuildFailed_NewDriveFailed:
3946 DAC960_Progress("Rebuild Failed due to "
3947 "Failure of Drive Being Rebuilt\n", Controller);
3948 break;
3949 case DAC960_V1_NoRebuildOrCheckInProgress:
3950 break;
3951 case DAC960_V1_RebuildSuccessful:
3952 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3953 break;
3954 case DAC960_V1_RebuildSuccessfullyTerminated:
3955 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3956 break;
3957 }
3958 Controller->V1.LastRebuildStatus = CommandStatus;
3959 if (CommandType != DAC960_MonitoringCommand &&
3960 Controller->V1.RebuildStatusPending)
3961 {
3962 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3963 Controller->V1.RebuildStatusPending = false;
3964 }
3965 else if (CommandType == DAC960_MonitoringCommand &&
3966 CommandStatus != DAC960_V1_NormalCompletion &&
3967 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3968 {
3969 Controller->V1.PendingRebuildStatus = CommandStatus;
3970 Controller->V1.RebuildStatusPending = true;
3971 }
3972 }
3973 else if (CommandOpcode == DAC960_V1_RebuildStat)
3974 {
3975 unsigned int LogicalDriveNumber =
3976 Controller->V1.RebuildProgress->LogicalDriveNumber;
3977 unsigned int LogicalDriveSize =
3978 Controller->V1.RebuildProgress->LogicalDriveSize;
3979 unsigned int BlocksCompleted =
3980 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3981 if (CommandStatus == DAC960_V1_NormalCompletion)
3982 {
3983 Controller->EphemeralProgressMessage = true;
3984 DAC960_Progress("Consistency Check in Progress: "
3985 "Logical Drive %d (/dev/rd/c%dd%d) "
3986 "%d%% completed\n",
3987 Controller, LogicalDriveNumber,
3988 Controller->ControllerNumber,
3989 LogicalDriveNumber,
3990 (100 * (BlocksCompleted >> 7))
3991 / (LogicalDriveSize >> 7));
3992 Controller->EphemeralProgressMessage = false;
3993 }
3994 }
3995 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3996 {
3997 unsigned int LogicalDriveNumber =
3998 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
3999 unsigned int LogicalDriveSize =
4000 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
4001 unsigned int BlocksCompleted =
4002 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
4003 switch (CommandStatus)
4004 {
4005 case DAC960_V1_NormalCompletion:
4006 switch (Controller->V1.BackgroundInitializationStatus->Status)
4007 {
4008 case DAC960_V1_BackgroundInitializationInvalid:
4009 break;
4010 case DAC960_V1_BackgroundInitializationStarted:
4011 DAC960_Progress("Background Initialization Started\n",
4012 Controller);
4013 break;
4014 case DAC960_V1_BackgroundInitializationInProgress:
4015 if (BlocksCompleted ==
4016 Controller->V1.LastBackgroundInitializationStatus.
4017 BlocksCompleted &&
4018 LogicalDriveNumber ==
4019 Controller->V1.LastBackgroundInitializationStatus.
4020 LogicalDriveNumber)
4021 break;
4022 Controller->EphemeralProgressMessage = true;
4023 DAC960_Progress("Background Initialization in Progress: "
4024 "Logical Drive %d (/dev/rd/c%dd%d) "
4025 "%d%% completed\n",
4026 Controller, LogicalDriveNumber,
4027 Controller->ControllerNumber,
4028 LogicalDriveNumber,
4029 (100 * (BlocksCompleted >> 7))
4030 / (LogicalDriveSize >> 7));
4031 Controller->EphemeralProgressMessage = false;
4032 break;
4033 case DAC960_V1_BackgroundInitializationSuspended:
4034 DAC960_Progress("Background Initialization Suspended\n",
4035 Controller);
4036 break;
4037 case DAC960_V1_BackgroundInitializationCancelled:
4038 DAC960_Progress("Background Initialization Cancelled\n",
4039 Controller);
4040 break;
4041 }
4042 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4043 Controller->V1.BackgroundInitializationStatus,
4044 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4045 break;
4046 case DAC960_V1_BackgroundInitSuccessful:
4047 if (Controller->V1.BackgroundInitializationStatus->Status ==
4048 DAC960_V1_BackgroundInitializationInProgress)
4049 DAC960_Progress("Background Initialization "
4050 "Completed Successfully\n", Controller);
4051 Controller->V1.BackgroundInitializationStatus->Status =
4052 DAC960_V1_BackgroundInitializationInvalid;
4053 break;
4054 case DAC960_V1_BackgroundInitAborted:
4055 if (Controller->V1.BackgroundInitializationStatus->Status ==
4056 DAC960_V1_BackgroundInitializationInProgress)
4057 DAC960_Progress("Background Initialization Aborted\n",
4058 Controller);
4059 Controller->V1.BackgroundInitializationStatus->Status =
4060 DAC960_V1_BackgroundInitializationInvalid;
4061 break;
4062 case DAC960_V1_NoBackgroundInitInProgress:
4063 break;
4064 }
4065 }
4066 else if (CommandOpcode == DAC960_V1_DCDB)
4067 {
4068 /*
4069 This is a bit ugly.
4070
4071 The InquiryStandardData and
4072 the InquiryUntitSerialNumber information
4073 retrieval operations BOTH use the DAC960_V1_DCDB
4074 commands. the test above can't distinguish between
4075 these two cases.
4076
4077 Instead, we rely on the order of code later in this
4078 function to ensure that DeviceInquiryInformation commands
4079 are submitted before DeviceSerialNumber commands.
4080 */
4081 if (Controller->V1.NeedDeviceInquiryInformation)
4082 {
4083 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4084 &Controller->V1.InquiryStandardData
4085 [Controller->V1.DeviceStateChannel]
4086 [Controller->V1.DeviceStateTargetID];
4087 if (CommandStatus != DAC960_V1_NormalCompletion)
4088 {
4089 memset(InquiryStandardData, 0,
4090 sizeof(DAC960_SCSI_Inquiry_T));
4091 InquiryStandardData->PeripheralDeviceType = 0x1F;
4092 }
4093 else
4094 memcpy(InquiryStandardData,
4095 Controller->V1.NewInquiryStandardData,
4096 sizeof(DAC960_SCSI_Inquiry_T));
4097 Controller->V1.NeedDeviceInquiryInformation = false;
4098 }
4099 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4100 {
4101 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4102 &Controller->V1.InquiryUnitSerialNumber
4103 [Controller->V1.DeviceStateChannel]
4104 [Controller->V1.DeviceStateTargetID];
4105 if (CommandStatus != DAC960_V1_NormalCompletion)
4106 {
4107 memset(InquiryUnitSerialNumber, 0,
4108 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4109 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4110 }
4111 else
4112 memcpy(InquiryUnitSerialNumber,
4113 Controller->V1.NewInquiryUnitSerialNumber,
4114 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4115 Controller->V1.NeedDeviceSerialNumberInformation = false;
4116 }
4117 }
4118 /*
4119 Begin submitting new monitoring commands.
4120 */
4121 if (Controller->V1.NewEventLogSequenceNumber
4122 - Controller->V1.OldEventLogSequenceNumber > 0)
4123 {
4124 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4125 DAC960_V1_PerformEventLogOperation;
4126 Command->V1.CommandMailbox.Type3E.OperationType =
4127 DAC960_V1_GetEventLogEntry;
4128 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4129 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4130 Controller->V1.OldEventLogSequenceNumber;
4131 Command->V1.CommandMailbox.Type3E.BusAddress =
4132 Controller->V1.EventLogEntryDMA;
4133 DAC960_QueueCommand(Command);
4134 return;
4135 }
4136 if (Controller->V1.NeedErrorTableInformation)
4137 {
4138 Controller->V1.NeedErrorTableInformation = false;
4139 Command->V1.CommandMailbox.Type3.CommandOpcode =
4140 DAC960_V1_GetErrorTable;
4141 Command->V1.CommandMailbox.Type3.BusAddress =
4142 Controller->V1.NewErrorTableDMA;
4143 DAC960_QueueCommand(Command);
4144 return;
4145 }
4146 if (Controller->V1.NeedRebuildProgress &&
4147 Controller->V1.RebuildProgressFirst)
4148 {
4149 Controller->V1.NeedRebuildProgress = false;
4150 Command->V1.CommandMailbox.Type3.CommandOpcode =
4151 DAC960_V1_GetRebuildProgress;
4152 Command->V1.CommandMailbox.Type3.BusAddress =
4153 Controller->V1.RebuildProgressDMA;
4154 DAC960_QueueCommand(Command);
4155 return;
4156 }
4157 if (Controller->V1.NeedDeviceStateInformation)
4158 {
4159 if (Controller->V1.NeedDeviceInquiryInformation)
4160 {
4161 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4162 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4163
4164 dma_addr_t NewInquiryStandardDataDMA =
4165 Controller->V1.NewInquiryStandardDataDMA;
4166
4167 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4168 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4169 DCDB->Channel = Controller->V1.DeviceStateChannel;
4170 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4171 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4172 DCDB->EarlyStatus = false;
4173 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4174 DCDB->NoAutomaticRequestSense = false;
4175 DCDB->DisconnectPermitted = true;
4176 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4177 DCDB->BusAddress = NewInquiryStandardDataDMA;
4178 DCDB->CDBLength = 6;
4179 DCDB->TransferLengthHigh4 = 0;
4180 DCDB->SenseLength = sizeof(DCDB->SenseData);
4181 DCDB->CDB[0] = 0x12; /* INQUIRY */
4182 DCDB->CDB[1] = 0; /* EVPD = 0 */
4183 DCDB->CDB[2] = 0; /* Page Code */
4184 DCDB->CDB[3] = 0; /* Reserved */
4185 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4186 DCDB->CDB[5] = 0; /* Control */
4187 DAC960_QueueCommand(Command);
4188 return;
4189 }
4190 if (Controller->V1.NeedDeviceSerialNumberInformation)
4191 {
4192 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4193 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4194 dma_addr_t NewInquiryUnitSerialNumberDMA =
4195 Controller->V1.NewInquiryUnitSerialNumberDMA;
4196
4197 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4198 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4199 DCDB->Channel = Controller->V1.DeviceStateChannel;
4200 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4201 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4202 DCDB->EarlyStatus = false;
4203 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4204 DCDB->NoAutomaticRequestSense = false;
4205 DCDB->DisconnectPermitted = true;
4206 DCDB->TransferLength =
4207 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4208 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4209 DCDB->CDBLength = 6;
4210 DCDB->TransferLengthHigh4 = 0;
4211 DCDB->SenseLength = sizeof(DCDB->SenseData);
4212 DCDB->CDB[0] = 0x12; /* INQUIRY */
4213 DCDB->CDB[1] = 1; /* EVPD = 1 */
4214 DCDB->CDB[2] = 0x80; /* Page Code */
4215 DCDB->CDB[3] = 0; /* Reserved */
4216 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4217 DCDB->CDB[5] = 0; /* Control */
4218 DAC960_QueueCommand(Command);
4219 return;
4220 }
4221 if (Controller->V1.StartDeviceStateScan)
4222 {
4223 Controller->V1.DeviceStateChannel = 0;
4224 Controller->V1.DeviceStateTargetID = 0;
4225 Controller->V1.StartDeviceStateScan = false;
4226 }
4227 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4228 {
4229 Controller->V1.DeviceStateChannel++;
4230 Controller->V1.DeviceStateTargetID = 0;
4231 }
4232 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4233 {
4234 Controller->V1.NewDeviceState->DeviceState =
4235 DAC960_V1_Device_Dead;
4236 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4237 DAC960_V1_GetDeviceState;
4238 Command->V1.CommandMailbox.Type3D.Channel =
4239 Controller->V1.DeviceStateChannel;
4240 Command->V1.CommandMailbox.Type3D.TargetID =
4241 Controller->V1.DeviceStateTargetID;
4242 Command->V1.CommandMailbox.Type3D.BusAddress =
4243 Controller->V1.NewDeviceStateDMA;
4244 DAC960_QueueCommand(Command);
4245 return;
4246 }
4247 Controller->V1.NeedDeviceStateInformation = false;
4248 }
4249 if (Controller->V1.NeedLogicalDriveInformation)
4250 {
4251 Controller->V1.NeedLogicalDriveInformation = false;
4252 Command->V1.CommandMailbox.Type3.CommandOpcode =
4253 DAC960_V1_GetLogicalDriveInformation;
4254 Command->V1.CommandMailbox.Type3.BusAddress =
4255 Controller->V1.NewLogicalDriveInformationDMA;
4256 DAC960_QueueCommand(Command);
4257 return;
4258 }
4259 if (Controller->V1.NeedRebuildProgress)
4260 {
4261 Controller->V1.NeedRebuildProgress = false;
4262 Command->V1.CommandMailbox.Type3.CommandOpcode =
4263 DAC960_V1_GetRebuildProgress;
4264 Command->V1.CommandMailbox.Type3.BusAddress =
4265 Controller->V1.RebuildProgressDMA;
4266 DAC960_QueueCommand(Command);
4267 return;
4268 }
4269 if (Controller->V1.NeedConsistencyCheckProgress)
4270 {
4271 Controller->V1.NeedConsistencyCheckProgress = false;
4272 Command->V1.CommandMailbox.Type3.CommandOpcode =
4273 DAC960_V1_RebuildStat;
4274 Command->V1.CommandMailbox.Type3.BusAddress =
4275 Controller->V1.RebuildProgressDMA;
4276 DAC960_QueueCommand(Command);
4277 return;
4278 }
4279 if (Controller->V1.NeedBackgroundInitializationStatus)
4280 {
4281 Controller->V1.NeedBackgroundInitializationStatus = false;
4282 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4283 DAC960_V1_BackgroundInitializationControl;
4284 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4285 Command->V1.CommandMailbox.Type3B.BusAddress =
4286 Controller->V1.BackgroundInitializationStatusDMA;
4287 DAC960_QueueCommand(Command);
4288 return;
4289 }
4290 Controller->MonitoringTimerCount++;
4291 Controller->MonitoringTimer.expires =
4292 jiffies + DAC960_MonitoringTimerInterval;
4293 add_timer(&Controller->MonitoringTimer);
4294 }
4295 if (CommandType == DAC960_ImmediateCommand)
4296 {
4297 complete(Command->Completion);
4298 Command->Completion = NULL;
4299 return;
4300 }
4301 if (CommandType == DAC960_QueuedCommand)
4302 {
4303 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4304 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4305 Command->V1.KernelCommand = NULL;
4306 if (CommandOpcode == DAC960_V1_DCDB)
4307 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4308 [KernelCommand->DCDB->TargetID] =
4309 false;
4310 DAC960_DeallocateCommand(Command);
4311 KernelCommand->CompletionFunction(KernelCommand);
4312 return;
4313 }
4314 /*
4315 Queue a Status Monitoring Command to the Controller using the just
4316 completed Command if one was deferred previously due to lack of a
4317 free Command when the Monitoring Timer Function was called.
4318 */
4319 if (Controller->MonitoringCommandDeferred)
4320 {
4321 Controller->MonitoringCommandDeferred = false;
4322 DAC960_V1_QueueMonitoringCommand(Command);
4323 return;
4324 }
4325 /*
4326 Deallocate the Command.
4327 */
4328 DAC960_DeallocateCommand(Command);
4329 /*
4330 Wake up any processes waiting on a free Command.
4331 */
4332 wake_up(&Controller->CommandWaitQueue);
4333}
4334
4335
4336/*
4337 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4338 when an error occurs on a Read or Write operation.
4339*/
4340
4341static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4342{
4343 DAC960_Controller_T *Controller = Command->Controller;
4344 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4345 "NOT READY", "MEDIUM ERROR",
4346 "HARDWARE ERROR", "ILLEGAL REQUEST",
4347 "UNIT ATTENTION", "DATA PROTECT",
4348 "BLANK CHECK", "VENDOR-SPECIFIC",
4349 "COPY ABORTED", "ABORTED COMMAND",
4350 "EQUAL", "VOLUME OVERFLOW",
4351 "MISCOMPARE", "RESERVED" };
4352 unsigned char *CommandName = "UNKNOWN";
4353 switch (Command->CommandType)
4354 {
4355 case DAC960_ReadCommand:
4356 case DAC960_ReadRetryCommand:
4357 CommandName = "READ";
4358 break;
4359 case DAC960_WriteCommand:
4360 case DAC960_WriteRetryCommand:
4361 CommandName = "WRITE";
4362 break;
4363 case DAC960_MonitoringCommand:
4364 case DAC960_ImmediateCommand:
4365 case DAC960_QueuedCommand:
4366 break;
4367 }
4368 DAC960_Error("Error Condition %s on %s:\n", Controller,
4369 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4370 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4371 Controller, Controller->ControllerNumber,
4372 Command->LogicalDriveNumber, Command->BlockNumber,
4373 Command->BlockNumber + Command->BlockCount - 1);
4374}
4375
4376
4377/*
4378 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4379 occurs.
4380*/
4381
4382static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4383 DAC960_V2_Event_T *Event)
4384{
4385 DAC960_SCSI_RequestSense_T *RequestSense =
4386 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4387 unsigned char MessageBuffer[DAC960_LineBufferSize];
4388 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4389 { /* Physical Device Events (0x0000 - 0x007F) */
4390 { 0x0001, "P Online" },
4391 { 0x0002, "P Standby" },
4392 { 0x0005, "P Automatic Rebuild Started" },
4393 { 0x0006, "P Manual Rebuild Started" },
4394 { 0x0007, "P Rebuild Completed" },
4395 { 0x0008, "P Rebuild Cancelled" },
4396 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4397 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4398 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4399 { 0x000C, "S Offline" },
4400 { 0x000D, "P Found" },
4401 { 0x000E, "P Removed" },
4402 { 0x000F, "P Unconfigured" },
4403 { 0x0010, "P Expand Capacity Started" },
4404 { 0x0011, "P Expand Capacity Completed" },
4405 { 0x0012, "P Expand Capacity Failed" },
4406 { 0x0013, "P Command Timed Out" },
4407 { 0x0014, "P Command Aborted" },
4408 { 0x0015, "P Command Retried" },
4409 { 0x0016, "P Parity Error" },
4410 { 0x0017, "P Soft Error" },
4411 { 0x0018, "P Miscellaneous Error" },
4412 { 0x0019, "P Reset" },
4413 { 0x001A, "P Active Spare Found" },
4414 { 0x001B, "P Warm Spare Found" },
4415 { 0x001C, "S Sense Data Received" },
4416 { 0x001D, "P Initialization Started" },
4417 { 0x001E, "P Initialization Completed" },
4418 { 0x001F, "P Initialization Failed" },
4419 { 0x0020, "P Initialization Cancelled" },
4420 { 0x0021, "P Failed because Write Recovery Failed" },
4421 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4422 { 0x0023, "P Failed because of Double Check Condition" },
4423 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4424 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4425 { 0x0026, "P Failed because of Bad Tag from Device" },
4426 { 0x0027, "P Failed because of Command Timeout" },
4427 { 0x0028, "P Failed because of System Reset" },
4428 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4429 { 0x002A, "P Failed because Host Set Device to Failed State" },
4430 { 0x002B, "P Failed because of Selection Timeout" },
4431 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4432 { 0x002D, "P Failed because Device Returned Unknown Status" },
4433 { 0x002E, "P Failed because Device Not Ready" },
4434 { 0x002F, "P Failed because Device Not Found at Startup" },
4435 { 0x0030, "P Failed because COD Write Operation Failed" },
4436 { 0x0031, "P Failed because BDT Write Operation Failed" },
4437 { 0x0039, "P Missing at Startup" },
4438 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4439 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4440 { 0x003D, "P Standby Rebuild Started" },
4441 /* Logical Device Events (0x0080 - 0x00FF) */
4442 { 0x0080, "M Consistency Check Started" },
4443 { 0x0081, "M Consistency Check Completed" },
4444 { 0x0082, "M Consistency Check Cancelled" },
4445 { 0x0083, "M Consistency Check Completed With Errors" },
4446 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4447 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4448 { 0x0086, "L Offline" },
4449 { 0x0087, "L Critical" },
4450 { 0x0088, "L Online" },
4451 { 0x0089, "M Automatic Rebuild Started" },
4452 { 0x008A, "M Manual Rebuild Started" },
4453 { 0x008B, "M Rebuild Completed" },
4454 { 0x008C, "M Rebuild Cancelled" },
4455 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4456 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4457 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4458 { 0x0090, "M Initialization Started" },
4459 { 0x0091, "M Initialization Completed" },
4460 { 0x0092, "M Initialization Cancelled" },
4461 { 0x0093, "M Initialization Failed" },
4462 { 0x0094, "L Found" },
4463 { 0x0095, "L Deleted" },
4464 { 0x0096, "M Expand Capacity Started" },
4465 { 0x0097, "M Expand Capacity Completed" },
4466 { 0x0098, "M Expand Capacity Failed" },
4467 { 0x0099, "L Bad Block Found" },
4468 { 0x009A, "L Size Changed" },
4469 { 0x009B, "L Type Changed" },
4470 { 0x009C, "L Bad Data Block Found" },
4471 { 0x009E, "L Read of Data Block in BDT" },
4472 { 0x009F, "L Write Back Data for Disk Block Lost" },
4473 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4474 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4475 { 0x00A2, "L Standby Rebuild Started" },
4476 /* Fault Management Events (0x0100 - 0x017F) */
4477 { 0x0140, "E Fan %d Failed" },
4478 { 0x0141, "E Fan %d OK" },
4479 { 0x0142, "E Fan %d Not Present" },
4480 { 0x0143, "E Power Supply %d Failed" },
4481 { 0x0144, "E Power Supply %d OK" },
4482 { 0x0145, "E Power Supply %d Not Present" },
4483 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4484 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4485 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4486 { 0x0149, "E Temperature Sensor %d Not Present" },
4487 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4488 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4489 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4490 /* Controller Events (0x0180 - 0x01FF) */
4491 { 0x0181, "C Cache Write Back Error" },
4492 { 0x0188, "C Battery Backup Unit Found" },
4493 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4494 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4495 { 0x0193, "C Installation Aborted" },
4496 { 0x0195, "C Battery Backup Unit Physically Removed" },
4497 { 0x0196, "C Memory Error During Warm Boot" },
4498 { 0x019E, "C Memory Soft ECC Error Corrected" },
4499 { 0x019F, "C Memory Hard ECC Error Corrected" },
4500 { 0x01A2, "C Battery Backup Unit Failed" },
4501 { 0x01AB, "C Mirror Race Recovery Failed" },
4502 { 0x01AC, "C Mirror Race on Critical Drive" },
4503 /* Controller Internal Processor Events */
4504 { 0x0380, "C Internal Controller Hung" },
4505 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4506 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4507 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4508 { 0, "" } };
4509 int EventListIndex = 0, EventCode;
4510 unsigned char EventType, *EventMessage;
4511 if (Event->EventCode == 0x1C &&
4512 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4513 (RequestSense->AdditionalSenseCode == 0x80 ||
4514 RequestSense->AdditionalSenseCode == 0x81))
4515 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4516 RequestSense->AdditionalSenseCodeQualifier;
4517 while (true)
4518 {
4519 EventCode = EventList[EventListIndex].EventCode;
4520 if (EventCode == Event->EventCode || EventCode == 0) break;
4521 EventListIndex++;
4522 }
4523 EventType = EventList[EventListIndex].EventMessage[0];
4524 EventMessage = &EventList[EventListIndex].EventMessage[2];
4525 if (EventCode == 0)
4526 {
4527 DAC960_Critical("Unknown Controller Event Code %04X\n",
4528 Controller, Event->EventCode);
4529 return;
4530 }
4531 switch (EventType)
4532 {
4533 case 'P':
4534 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4535 Event->Channel, Event->TargetID, EventMessage);
4536 break;
4537 case 'L':
4538 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4539 Event->LogicalUnit, Controller->ControllerNumber,
4540 Event->LogicalUnit, EventMessage);
4541 break;
4542 case 'M':
4543 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4544 Event->LogicalUnit, Controller->ControllerNumber,
4545 Event->LogicalUnit, EventMessage);
4546 break;
4547 case 'S':
4548 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4549 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4550 RequestSense->AdditionalSenseCode == 0x04 &&
4551 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4552 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4553 break;
4554 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4555 Event->Channel, Event->TargetID, EventMessage);
4556 DAC960_Critical("Physical Device %d:%d Request Sense: "
4557 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4558 Controller,
4559 Event->Channel,
4560 Event->TargetID,
4561 RequestSense->SenseKey,
4562 RequestSense->AdditionalSenseCode,
4563 RequestSense->AdditionalSenseCodeQualifier);
4564 DAC960_Critical("Physical Device %d:%d Request Sense: "
4565 "Information = %02X%02X%02X%02X "
4566 "%02X%02X%02X%02X\n",
4567 Controller,
4568 Event->Channel,
4569 Event->TargetID,
4570 RequestSense->Information[0],
4571 RequestSense->Information[1],
4572 RequestSense->Information[2],
4573 RequestSense->Information[3],
4574 RequestSense->CommandSpecificInformation[0],
4575 RequestSense->CommandSpecificInformation[1],
4576 RequestSense->CommandSpecificInformation[2],
4577 RequestSense->CommandSpecificInformation[3]);
4578 break;
4579 case 'E':
4580 if (Controller->SuppressEnclosureMessages) break;
4581 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4582 DAC960_Critical("Enclosure %d %s\n", Controller,
4583 Event->TargetID, MessageBuffer);
4584 break;
4585 case 'C':
4586 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4587 break;
4588 default:
4589 DAC960_Critical("Unknown Controller Event Code %04X\n",
4590 Controller, Event->EventCode);
4591 break;
4592 }
4593}
4594
4595
4596/*
4597 DAC960_V2_ReportProgress prints an appropriate progress message for
4598 Logical Device Long Operations.
4599*/
4600
4601static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4602 unsigned char *MessageString,
4603 unsigned int LogicalDeviceNumber,
4604 unsigned long BlocksCompleted,
4605 unsigned long LogicalDeviceSize)
4606{
4607 Controller->EphemeralProgressMessage = true;
4608 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4609 "%d%% completed\n", Controller,
4610 MessageString,
4611 LogicalDeviceNumber,
4612 Controller->ControllerNumber,
4613 LogicalDeviceNumber,
4614 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4615 Controller->EphemeralProgressMessage = false;
4616}
4617
4618
4619/*
4620 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4621 for DAC960 V2 Firmware Controllers.
4622*/
4623
4624static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4625{
4626 DAC960_Controller_T *Controller = Command->Controller;
4627 DAC960_CommandType_T CommandType = Command->CommandType;
4628 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4629 DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
4630 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4631
4632 if (CommandType == DAC960_ReadCommand ||
4633 CommandType == DAC960_WriteCommand)
4634 {
4635
4636#ifdef FORCE_RETRY_DEBUG
4637 CommandStatus = DAC960_V2_AbormalCompletion;
4638#endif
4639 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4640
4641 if (CommandStatus == DAC960_V2_NormalCompletion) {
4642
4643 if (!DAC960_ProcessCompletedRequest(Command, true))
4644 BUG();
4645
4646 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4647 {
4648 /*
4649 * break the command down into pieces and resubmit each
4650 * piece, hoping that some of them will succeed.
4651 */
4652 DAC960_queue_partial_rw(Command);
4653 return;
4654 }
4655 else
4656 {
4657 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4658 DAC960_V2_ReadWriteError(Command);
4659 /*
4660 Perform completion processing for all buffers in this I/O Request.
4661 */
4662 (void)DAC960_ProcessCompletedRequest(Command, false);
4663 }
4664 }
4665 else if (CommandType == DAC960_ReadRetryCommand ||
4666 CommandType == DAC960_WriteRetryCommand)
4667 {
87d156bf 4668 bool normal_completion;
1da177e4
LT		 4669
4670#ifdef FORCE_RETRY_FAILURE_DEBUG
4671 static int retry_count = 1;
4672#endif
4673 /*
4674 Perform completion processing for the portion that was
4675 retried, and submit the next portion, if any.
4676 */
4677 normal_completion = true;
4678 if (CommandStatus != DAC960_V2_NormalCompletion) {
4679 normal_completion = false;
4680 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4681 DAC960_V2_ReadWriteError(Command);
4682 }
4683
4684#ifdef FORCE_RETRY_FAILURE_DEBUG
4685 if (!(++retry_count % 10000)) {
4686 printk("V2 error retry failure test\n");
4687 normal_completion = false;
4688 DAC960_V2_ReadWriteError(Command);
4689 }
4690#endif
4691
4692 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4693 DAC960_queue_partial_rw(Command);
4694 return;
4695 }
4696 }
4697 else if (CommandType == DAC960_MonitoringCommand)
4698 {
4699 if (Controller->ShutdownMonitoringTimer)
4700 return;
4701 if (CommandOpcode == DAC960_V2_GetControllerInfo)
4702 {
4703 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4704 Controller->V2.NewControllerInformation;
4705 DAC960_V2_ControllerInfo_T *ControllerInfo =
4706 &Controller->V2.ControllerInformation;
4707 Controller->LogicalDriveCount =
4708 NewControllerInfo->LogicalDevicesPresent;
4709 Controller->V2.NeedLogicalDeviceInformation = true;
4710 Controller->V2.NeedPhysicalDeviceInformation = true;
4711 Controller->V2.StartLogicalDeviceInformationScan = true;
4712 Controller->V2.StartPhysicalDeviceInformationScan = true;
4713 Controller->MonitoringAlertMode =
4714 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4715 NewControllerInfo->LogicalDevicesOffline > 0 ||
4716 NewControllerInfo->PhysicalDisksCritical > 0 ||
4717 NewControllerInfo->PhysicalDisksOffline > 0);
4718 memcpy(ControllerInfo, NewControllerInfo,
4719 sizeof(DAC960_V2_ControllerInfo_T));
4720 }
4721 else if (CommandOpcode == DAC960_V2_GetEvent)
4722 {
4723 if (CommandStatus == DAC960_V2_NormalCompletion) {
4724 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4725 }
4726 Controller->V2.NextEventSequenceNumber++;
4727 }
4728 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4729 CommandStatus == DAC960_V2_NormalCompletion)
4730 {
4731 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4732 Controller->V2.NewPhysicalDeviceInformation;
4733 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4734 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4735 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4736 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4737 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4738 unsigned int DeviceIndex;
4739 while (PhysicalDeviceInfo != NULL &&
4740 (NewPhysicalDeviceInfo->Channel >
4741 PhysicalDeviceInfo->Channel ||
4742 (NewPhysicalDeviceInfo->Channel ==
4743 PhysicalDeviceInfo->Channel &&
4744 (NewPhysicalDeviceInfo->TargetID >
4745 PhysicalDeviceInfo->TargetID ||
4746 (NewPhysicalDeviceInfo->TargetID ==
4747 PhysicalDeviceInfo->TargetID &&
4748 NewPhysicalDeviceInfo->LogicalUnit >
4749 PhysicalDeviceInfo->LogicalUnit)))))
4750 {
4751 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4752 Controller,
4753 PhysicalDeviceInfo->Channel,
4754 PhysicalDeviceInfo->TargetID);
4755 Controller->V2.PhysicalDeviceInformation
4756 [PhysicalDeviceIndex] = NULL;
4757 Controller->V2.InquiryUnitSerialNumber
4758 [PhysicalDeviceIndex] = NULL;
4759 kfree(PhysicalDeviceInfo);
4760 kfree(InquiryUnitSerialNumber);
4761 for (DeviceIndex = PhysicalDeviceIndex;
4762 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4763 DeviceIndex++)
4764 {
4765 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4766 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4767 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4768 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4769 }
4770 Controller->V2.PhysicalDeviceInformation
4771 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4772 Controller->V2.InquiryUnitSerialNumber
4773 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4774 PhysicalDeviceInfo =
4775 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4776 InquiryUnitSerialNumber =
4777 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4778 }
4779 if (PhysicalDeviceInfo == NULL ||
4780 (NewPhysicalDeviceInfo->Channel !=
4781 PhysicalDeviceInfo->Channel) ||
4782 (NewPhysicalDeviceInfo->TargetID !=
4783 PhysicalDeviceInfo->TargetID) ||
4784 (NewPhysicalDeviceInfo->LogicalUnit !=
4785 PhysicalDeviceInfo->LogicalUnit))
4786 {
07fb75a5 4787 PhysicalDeviceInfo =
1da177e4
LT		 4788 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4789 InquiryUnitSerialNumber =
1da177e4
LT		 4790 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4791 GFP_ATOMIC);
07fb75a5
JJ		 4792 if (InquiryUnitSerialNumber == NULL ||
4793 PhysicalDeviceInfo == NULL)
1da177e4 4794 {
07fb75a5
JJ		 4795 kfree(InquiryUnitSerialNumber);
4796 InquiryUnitSerialNumber = NULL;
1da177e4
LT		 4797 kfree(PhysicalDeviceInfo);
4798 PhysicalDeviceInfo = NULL;
4799 }
4800 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4801 Controller,
4802 NewPhysicalDeviceInfo->Channel,
4803 NewPhysicalDeviceInfo->TargetID,
4804 (PhysicalDeviceInfo != NULL
4805 ? "" : " - Allocation Failed"));
4806 if (PhysicalDeviceInfo != NULL)
4807 {
4808 memset(PhysicalDeviceInfo, 0,
4809 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4810 PhysicalDeviceInfo->PhysicalDeviceState =
4811 DAC960_V2_Device_InvalidState;
4812 memset(InquiryUnitSerialNumber, 0,
4813 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4814 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4815 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4816 DeviceIndex > PhysicalDeviceIndex;
4817 DeviceIndex--)
4818 {
4819 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4820 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4821 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4822 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4823 }
4824 Controller->V2.PhysicalDeviceInformation
4825 [PhysicalDeviceIndex] =
4826 PhysicalDeviceInfo;
4827 Controller->V2.InquiryUnitSerialNumber
4828 [PhysicalDeviceIndex] =
4829 InquiryUnitSerialNumber;
4830 Controller->V2.NeedDeviceSerialNumberInformation = true;
4831 }
4832 }
4833 if (PhysicalDeviceInfo != NULL)
4834 {
4835 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4836 PhysicalDeviceInfo->PhysicalDeviceState)
4837 DAC960_Critical(
4838 "Physical Device %d:%d is now %s\n", Controller,
4839 NewPhysicalDeviceInfo->Channel,
4840 NewPhysicalDeviceInfo->TargetID,
4841 (NewPhysicalDeviceInfo->PhysicalDeviceState
4842 == DAC960_V2_Device_Online
4843 ? "ONLINE"
4844 : NewPhysicalDeviceInfo->PhysicalDeviceState
4845 == DAC960_V2_Device_Rebuild
4846 ? "REBUILD"
4847 : NewPhysicalDeviceInfo->PhysicalDeviceState
4848 == DAC960_V2_Device_Missing
4849 ? "MISSING"
4850 : NewPhysicalDeviceInfo->PhysicalDeviceState
4851 == DAC960_V2_Device_Critical
4852 ? "CRITICAL"
4853 : NewPhysicalDeviceInfo->PhysicalDeviceState
4854 == DAC960_V2_Device_Dead
4855 ? "DEAD"
4856 : NewPhysicalDeviceInfo->PhysicalDeviceState
4857 == DAC960_V2_Device_SuspectedDead
4858 ? "SUSPECTED-DEAD"
4859 : NewPhysicalDeviceInfo->PhysicalDeviceState
4860 == DAC960_V2_Device_CommandedOffline
4861 ? "COMMANDED-OFFLINE"
4862 : NewPhysicalDeviceInfo->PhysicalDeviceState
4863 == DAC960_V2_Device_Standby
4864 ? "STANDBY" : "UNKNOWN"));
4865 if ((NewPhysicalDeviceInfo->ParityErrors !=
4866 PhysicalDeviceInfo->ParityErrors) ||
4867 (NewPhysicalDeviceInfo->SoftErrors !=
4868 PhysicalDeviceInfo->SoftErrors) ||
4869 (NewPhysicalDeviceInfo->HardErrors !=
4870 PhysicalDeviceInfo->HardErrors) ||
4871 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4872 PhysicalDeviceInfo->MiscellaneousErrors) ||
4873 (NewPhysicalDeviceInfo->CommandTimeouts !=
4874 PhysicalDeviceInfo->CommandTimeouts) ||
4875 (NewPhysicalDeviceInfo->Retries !=
4876 PhysicalDeviceInfo->Retries) ||
4877 (NewPhysicalDeviceInfo->Aborts !=
4878 PhysicalDeviceInfo->Aborts) ||
4879 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4880 PhysicalDeviceInfo->PredictedFailuresDetected))
4881 {
4882 DAC960_Critical("Physical Device %d:%d Errors: "
4883 "Parity = %d, Soft = %d, "
4884 "Hard = %d, Misc = %d\n",
4885 Controller,
4886 NewPhysicalDeviceInfo->Channel,
4887 NewPhysicalDeviceInfo->TargetID,
4888 NewPhysicalDeviceInfo->ParityErrors,
4889 NewPhysicalDeviceInfo->SoftErrors,
4890 NewPhysicalDeviceInfo->HardErrors,
4891 NewPhysicalDeviceInfo->MiscellaneousErrors);
4892 DAC960_Critical("Physical Device %d:%d Errors: "
4893 "Timeouts = %d, Retries = %d, "
4894 "Aborts = %d, Predicted = %d\n",
4895 Controller,
4896 NewPhysicalDeviceInfo->Channel,
4897 NewPhysicalDeviceInfo->TargetID,
4898 NewPhysicalDeviceInfo->CommandTimeouts,
4899 NewPhysicalDeviceInfo->Retries,
4900 NewPhysicalDeviceInfo->Aborts,
4901 NewPhysicalDeviceInfo
4902 ->PredictedFailuresDetected);
4903 }
4904 if ((PhysicalDeviceInfo->PhysicalDeviceState
4905 == DAC960_V2_Device_Dead ||
4906 PhysicalDeviceInfo->PhysicalDeviceState
4907 == DAC960_V2_Device_InvalidState) &&
4908 NewPhysicalDeviceInfo->PhysicalDeviceState
4909 != DAC960_V2_Device_Dead)
4910 Controller->V2.NeedDeviceSerialNumberInformation = true;
4911 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4912 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4913 }
4914 NewPhysicalDeviceInfo->LogicalUnit++;
4915 Controller->V2.PhysicalDeviceIndex++;
4916 }
4917 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4918 {
4919 unsigned int DeviceIndex;
4920 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4921 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4922 DeviceIndex++)
4923 {
4924 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4925 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4926 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4927 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4928 if (PhysicalDeviceInfo == NULL) break;
4929 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4930 Controller,
4931 PhysicalDeviceInfo->Channel,
4932 PhysicalDeviceInfo->TargetID);
4933 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4934 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4935 kfree(PhysicalDeviceInfo);
4936 kfree(InquiryUnitSerialNumber);
4937 }
4938 Controller->V2.NeedPhysicalDeviceInformation = false;
4939 }
4940 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4941 CommandStatus == DAC960_V2_NormalCompletion)
4942 {
4943 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4944 Controller->V2.NewLogicalDeviceInformation;
4945 unsigned short LogicalDeviceNumber =
4946 NewLogicalDeviceInfo->LogicalDeviceNumber;
4947 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4948 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4949 if (LogicalDeviceInfo == NULL)
4950 {
4951 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4952 PhysicalDevice.Controller = 0;
4953 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4954 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4955 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4956 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4957 PhysicalDevice;
0a361e31
AD		 4958 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4959 GFP_ATOMIC);
1da177e4
LT		 4960 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4961 LogicalDeviceInfo;
4962 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4963 "Now Exists%s\n", Controller,
4964 LogicalDeviceNumber,
4965 Controller->ControllerNumber,
4966 LogicalDeviceNumber,
4967 (LogicalDeviceInfo != NULL
4968 ? "" : " - Allocation Failed"));
4969 if (LogicalDeviceInfo != NULL)
4970 {
4971 memset(LogicalDeviceInfo, 0,
4972 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4973 DAC960_ComputeGenericDiskInfo(Controller);
4974 }
4975 }
4976 if (LogicalDeviceInfo != NULL)
4977 {
4978 unsigned long LogicalDeviceSize =
4979 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4980 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4981 LogicalDeviceInfo->LogicalDeviceState)
4982 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4983 "is now %s\n", Controller,
4984 LogicalDeviceNumber,
4985 Controller->ControllerNumber,
4986 LogicalDeviceNumber,
4987 (NewLogicalDeviceInfo->LogicalDeviceState
4988 == DAC960_V2_LogicalDevice_Online
4989 ? "ONLINE"
4990 : NewLogicalDeviceInfo->LogicalDeviceState
4991 == DAC960_V2_LogicalDevice_Critical
4992 ? "CRITICAL" : "OFFLINE"));
4993 if ((NewLogicalDeviceInfo->SoftErrors !=
4994 LogicalDeviceInfo->SoftErrors) ||
4995 (NewLogicalDeviceInfo->CommandsFailed !=
4996 LogicalDeviceInfo->CommandsFailed) ||
4997 (NewLogicalDeviceInfo->DeferredWriteErrors !=
4998 LogicalDeviceInfo->DeferredWriteErrors))
4999 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
5000 "Soft = %d, Failed = %d, Deferred Write = %d\n",
5001 Controller, LogicalDeviceNumber,
5002 Controller->ControllerNumber,
5003 LogicalDeviceNumber,
5004 NewLogicalDeviceInfo->SoftErrors,
5005 NewLogicalDeviceInfo->CommandsFailed,
5006 NewLogicalDeviceInfo->DeferredWriteErrors);
5007 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5008 DAC960_V2_ReportProgress(Controller,
5009 "Consistency Check",
5010 LogicalDeviceNumber,
5011 NewLogicalDeviceInfo
5012 ->ConsistencyCheckBlockNumber,
5013 LogicalDeviceSize);
5014 else if (NewLogicalDeviceInfo->RebuildInProgress)
5015 DAC960_V2_ReportProgress(Controller,
5016 "Rebuild",
5017 LogicalDeviceNumber,
5018 NewLogicalDeviceInfo
5019 ->RebuildBlockNumber,
5020 LogicalDeviceSize);
5021 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5022 DAC960_V2_ReportProgress(Controller,
5023 "Background Initialization",
5024 LogicalDeviceNumber,
5025 NewLogicalDeviceInfo
5026 ->BackgroundInitializationBlockNumber,
5027 LogicalDeviceSize);
5028 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5029 DAC960_V2_ReportProgress(Controller,
5030 "Foreground Initialization",
5031 LogicalDeviceNumber,
5032 NewLogicalDeviceInfo
5033 ->ForegroundInitializationBlockNumber,
5034 LogicalDeviceSize);
5035 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5036 DAC960_V2_ReportProgress(Controller,
5037 "Data Migration",
5038 LogicalDeviceNumber,
5039 NewLogicalDeviceInfo
5040 ->DataMigrationBlockNumber,
5041 LogicalDeviceSize);
5042 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5043 DAC960_V2_ReportProgress(Controller,
5044 "Patrol Operation",
5045 LogicalDeviceNumber,
5046 NewLogicalDeviceInfo
5047 ->PatrolOperationBlockNumber,
5048 LogicalDeviceSize);
5049 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5050 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5051 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5052 "Background Initialization %s\n",
5053 Controller,
5054 LogicalDeviceNumber,
5055 Controller->ControllerNumber,
5056 LogicalDeviceNumber,
5057 (NewLogicalDeviceInfo->LogicalDeviceControl
5058 .LogicalDeviceInitialized
5059 ? "Completed" : "Failed"));
5060 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5061 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5062 }
5063 Controller->V2.LogicalDriveFoundDuringScan
5064 [LogicalDeviceNumber] = true;
5065 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5066 }
5067 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5068 {
5069 int LogicalDriveNumber;
5070 for (LogicalDriveNumber = 0;
5071 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5072 LogicalDriveNumber++)
5073 {
5074 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5075 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5076 if (LogicalDeviceInfo == NULL ||
5077 Controller->V2.LogicalDriveFoundDuringScan
5078 [LogicalDriveNumber])
5079 continue;
5080 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5081 "No Longer Exists\n", Controller,
5082 LogicalDriveNumber,
5083 Controller->ControllerNumber,
5084 LogicalDriveNumber);
5085 Controller->V2.LogicalDeviceInformation
5086 [LogicalDriveNumber] = NULL;
5087 kfree(LogicalDeviceInfo);
5088 Controller->LogicalDriveInitiallyAccessible
5089 [LogicalDriveNumber] = false;
5090 DAC960_ComputeGenericDiskInfo(Controller);
5091 }
5092 Controller->V2.NeedLogicalDeviceInformation = false;
5093 }
5094 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5095 {
5096 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5097 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5098
5099 if (CommandStatus != DAC960_V2_NormalCompletion) {
5100 memset(InquiryUnitSerialNumber,
5101 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5102 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5103 } else
5104 memcpy(InquiryUnitSerialNumber,
5105 Controller->V2.NewInquiryUnitSerialNumber,
5106 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5107
5108 Controller->V2.NeedDeviceSerialNumberInformation = false;
5109 }
5110
5111 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5112 - Controller->V2.NextEventSequenceNumber > 0)
5113 {
5114 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5115 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5116 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5117 Controller->V2.NextEventSequenceNumber >> 16;
5118 CommandMailbox->GetEvent.ControllerNumber = 0;
5119 CommandMailbox->GetEvent.IOCTL_Opcode =
5120 DAC960_V2_GetEvent;
5121 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5122 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5123 CommandMailbox->GetEvent.DataTransferMemoryAddress
5124 .ScatterGatherSegments[0]
5125 .SegmentDataPointer =
5126 Controller->V2.EventDMA;
5127 CommandMailbox->GetEvent.DataTransferMemoryAddress
5128 .ScatterGatherSegments[0]
5129 .SegmentByteCount =
5130 CommandMailbox->GetEvent.DataTransferSize;
5131 DAC960_QueueCommand(Command);
5132 return;
5133 }
5134 if (Controller->V2.NeedPhysicalDeviceInformation)
5135 {
5136 if (Controller->V2.NeedDeviceSerialNumberInformation)
5137 {
5138 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5139 Controller->V2.NewInquiryUnitSerialNumber;
5140 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5141
5142 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5143 Controller->V2.NewPhysicalDeviceInformation->Channel,
5144 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5145 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5146
5147
5148 DAC960_QueueCommand(Command);
5149 return;
5150 }
5151 if (Controller->V2.StartPhysicalDeviceInformationScan)
5152 {
5153 Controller->V2.PhysicalDeviceIndex = 0;
5154 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5155 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5156 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5157 Controller->V2.StartPhysicalDeviceInformationScan = false;
5158 }
5159 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5160 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5161 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5162 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5163 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5164 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5165 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5166 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5167 Controller->V2.NewPhysicalDeviceInformation->Channel;
5168 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5169 DAC960_V2_GetPhysicalDeviceInfoValid;
5170 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5171 .ScatterGatherSegments[0]
5172 .SegmentDataPointer =
5173 Controller->V2.NewPhysicalDeviceInformationDMA;
5174 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5175 .ScatterGatherSegments[0]
5176 .SegmentByteCount =
5177 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5178 DAC960_QueueCommand(Command);
5179 return;
5180 }
5181 if (Controller->V2.NeedLogicalDeviceInformation)
5182 {
5183 if (Controller->V2.StartLogicalDeviceInformationScan)
5184 {
5185 int LogicalDriveNumber;
5186 for (LogicalDriveNumber = 0;
5187 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5188 LogicalDriveNumber++)
5189 Controller->V2.LogicalDriveFoundDuringScan
5190 [LogicalDriveNumber] = false;
5191 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5192 Controller->V2.StartLogicalDeviceInformationScan = false;
5193 }
5194 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5195 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5196 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5197 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5198 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5199 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5200 DAC960_V2_GetLogicalDeviceInfoValid;
5201 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5202 .ScatterGatherSegments[0]
5203 .SegmentDataPointer =
5204 Controller->V2.NewLogicalDeviceInformationDMA;
5205 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5206 .ScatterGatherSegments[0]
5207 .SegmentByteCount =
5208 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5209 DAC960_QueueCommand(Command);
5210 return;
5211 }
5212 Controller->MonitoringTimerCount++;
5213 Controller->MonitoringTimer.expires =
5214 jiffies + DAC960_HealthStatusMonitoringInterval;
5215 add_timer(&Controller->MonitoringTimer);
5216 }
5217 if (CommandType == DAC960_ImmediateCommand)
5218 {
5219 complete(Command->Completion);
5220 Command->Completion = NULL;
5221 return;
5222 }
5223 if (CommandType == DAC960_QueuedCommand)
5224 {
5225 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5226 KernelCommand->CommandStatus = CommandStatus;
5227 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5228 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5229 Command->V2.KernelCommand = NULL;
5230 DAC960_DeallocateCommand(Command);
5231 KernelCommand->CompletionFunction(KernelCommand);
5232 return;
5233 }
5234 /*
5235 Queue a Status Monitoring Command to the Controller using the just
5236 completed Command if one was deferred previously due to lack of a
5237 free Command when the Monitoring Timer Function was called.
5238 */
5239 if (Controller->MonitoringCommandDeferred)
5240 {
5241 Controller->MonitoringCommandDeferred = false;
5242 DAC960_V2_QueueMonitoringCommand(Command);
5243 return;
5244 }
5245 /*
5246 Deallocate the Command.
5247 */
5248 DAC960_DeallocateCommand(Command);
5249 /*
5250 Wake up any processes waiting on a free Command.
5251 */
5252 wake_up(&Controller->CommandWaitQueue);
5253}
5254
5b76ffd5
CH		 5255/*
5256 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5257 Controllers.
5258*/
5259
5260static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
7d12e780 5261 void *DeviceIdentifier)
5b76ffd5 5262{
c7bec5ab 5263 DAC960_Controller_T *Controller = DeviceIdentifier;
5b76ffd5
CH		 5264 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5265 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5266 unsigned long flags;
5267
5268 spin_lock_irqsave(&Controller->queue_lock, flags);
5269 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5270 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5271 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5272 {
5273 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5274 NextStatusMailbox->Fields.CommandIdentifier;
5275 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5276 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5277 Command->V2.RequestSenseLength =
5278 NextStatusMailbox->Fields.RequestSenseLength;
5279 Command->V2.DataTransferResidue =
5280 NextStatusMailbox->Fields.DataTransferResidue;
5281 NextStatusMailbox->Words[0] = 0;
5282 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5283 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5284 DAC960_V2_ProcessCompletedCommand(Command);
5285 }
5286 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5287 /*
5288 Attempt to remove additional I/O Requests from the Controller's
5289 I/O Request Queue and queue them to the Controller.
5290 */
5291 DAC960_ProcessRequest(Controller);
5292 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5293 return IRQ_HANDLED;
5294}
1da177e4
LT		 5295
5296/*
5297 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5298 Controllers.
5299*/
5300
5301static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
7d12e780 5302 void *DeviceIdentifier)
1da177e4 5303{
c7bec5ab 5304 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5305 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5306 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5307 unsigned long flags;
5308
5309 spin_lock_irqsave(&Controller->queue_lock, flags);
5310 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5311 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5312 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5313 {
5314 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5315 NextStatusMailbox->Fields.CommandIdentifier;
5316 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5317 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5318 Command->V2.RequestSenseLength =
5319 NextStatusMailbox->Fields.RequestSenseLength;
5320 Command->V2.DataTransferResidue =
5321 NextStatusMailbox->Fields.DataTransferResidue;
5322 NextStatusMailbox->Words[0] = 0;
5323 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5324 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5325 DAC960_V2_ProcessCompletedCommand(Command);
5326 }
5327 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5328 /*
5329 Attempt to remove additional I/O Requests from the Controller's
5330 I/O Request Queue and queue them to the Controller.
5331 */
5332 DAC960_ProcessRequest(Controller);
5333 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5334 return IRQ_HANDLED;
5335}
5336
5337
5338/*
5339 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5340 Controllers.
5341*/
5342
5343static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
7d12e780 5344 void *DeviceIdentifier)
1da177e4 5345{
c7bec5ab 5346 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5347 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5348 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5349 unsigned long flags;
5350
5351 spin_lock_irqsave(&Controller->queue_lock, flags);
5352 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5353 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5354 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5355 {
5356 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5357 NextStatusMailbox->Fields.CommandIdentifier;
5358 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5359 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5360 Command->V2.RequestSenseLength =
5361 NextStatusMailbox->Fields.RequestSenseLength;
5362 Command->V2.DataTransferResidue =
5363 NextStatusMailbox->Fields.DataTransferResidue;
5364 NextStatusMailbox->Words[0] = 0;
5365 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5366 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5367 DAC960_V2_ProcessCompletedCommand(Command);
5368 }
5369 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5370 /*
5371 Attempt to remove additional I/O Requests from the Controller's
5372 I/O Request Queue and queue them to the Controller.
5373 */
5374 DAC960_ProcessRequest(Controller);
5375 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5376 return IRQ_HANDLED;
5377}
5378
5379
5380/*
5381 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5382 Controllers.
5383*/
5384
5385static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
7d12e780 5386 void *DeviceIdentifier)
1da177e4 5387{
c7bec5ab 5388 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5389 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5390 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5391 unsigned long flags;
5392
5393 spin_lock_irqsave(&Controller->queue_lock, flags);
5394 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5395 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5396 while (NextStatusMailbox->Fields.Valid)
5397 {
5398 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5399 NextStatusMailbox->Fields.CommandIdentifier;
5400 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5401 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5402 NextStatusMailbox->Word = 0;
5403 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5404 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5405 DAC960_V1_ProcessCompletedCommand(Command);
5406 }
5407 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5408 /*
5409 Attempt to remove additional I/O Requests from the Controller's
5410 I/O Request Queue and queue them to the Controller.
5411 */
5412 DAC960_ProcessRequest(Controller);
5413 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5414 return IRQ_HANDLED;
5415}
5416
5417
5418/*
5419 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5420 Controllers.
5421*/
5422
5423static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
7d12e780 5424 void *DeviceIdentifier)
1da177e4 5425{
c7bec5ab 5426 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5427 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5428 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5429 unsigned long flags;
5430
5431 spin_lock_irqsave(&Controller->queue_lock, flags);
5432 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5433 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5434 while (NextStatusMailbox->Fields.Valid)
5435 {
5436 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5437 NextStatusMailbox->Fields.CommandIdentifier;
5438 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5439 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5440 NextStatusMailbox->Word = 0;
5441 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5442 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5443 DAC960_V1_ProcessCompletedCommand(Command);
5444 }
5445 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5446 /*
5447 Attempt to remove additional I/O Requests from the Controller's
5448 I/O Request Queue and queue them to the Controller.
5449 */
5450 DAC960_ProcessRequest(Controller);
5451 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5452 return IRQ_HANDLED;
5453}
5454
5455
5456/*
5457 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5458 Controllers.
5459*/
5460
5461static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
7d12e780 5462 void *DeviceIdentifier)
1da177e4 5463{
c7bec5ab 5464 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5465 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5466 unsigned long flags;
5467
5468 spin_lock_irqsave(&Controller->queue_lock, flags);
5469 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5470 {
5471 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5472 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5473 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5474 Command->V1.CommandStatus =
5475 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5476 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5477 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5478 DAC960_V1_ProcessCompletedCommand(Command);
5479 }
5480 /*
5481 Attempt to remove additional I/O Requests from the Controller's
5482 I/O Request Queue and queue them to the Controller.
5483 */
5484 DAC960_ProcessRequest(Controller);
5485 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5486 return IRQ_HANDLED;
5487}
5488
5489
5490/*
5491 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5492 Controllers.
5493
5494 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5495 on the data having been placed into DAC960_Controller_T, rather than
5496 an arbitrary buffer.
5497*/
5498
5499static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
7d12e780 5500 void *DeviceIdentifier)
1da177e4 5501{
c7bec5ab 5502 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5503 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5504 unsigned long flags;
5505
5506 spin_lock_irqsave(&Controller->queue_lock, flags);
5507 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5508 {
5509 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5510 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5511 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5512 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5513 DAC960_V1_CommandOpcode_T CommandOpcode =
5514 CommandMailbox->Common.CommandOpcode;
5515 Command->V1.CommandStatus =
5516 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5517 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5518 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5519 switch (CommandOpcode)
5520 {
5521 case DAC960_V1_Enquiry_Old:
5522 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5523 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5524 break;
5525 case DAC960_V1_GetDeviceState_Old:
5526 Command->V1.CommandMailbox.Common.CommandOpcode =
5527 DAC960_V1_GetDeviceState;
5528 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5529 break;
5530 case DAC960_V1_Read_Old:
5531 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5532 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5533 break;
5534 case DAC960_V1_Write_Old:
5535 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5536 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5537 break;
5538 case DAC960_V1_ReadWithScatterGather_Old:
5539 Command->V1.CommandMailbox.Common.CommandOpcode =
5540 DAC960_V1_ReadWithScatterGather;
5541 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5542 break;
5543 case DAC960_V1_WriteWithScatterGather_Old:
5544 Command->V1.CommandMailbox.Common.CommandOpcode =
5545 DAC960_V1_WriteWithScatterGather;
5546 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5547 break;
5548 default:
5549 break;
5550 }
5551 DAC960_V1_ProcessCompletedCommand(Command);
5552 }
5553 /*
5554 Attempt to remove additional I/O Requests from the Controller's
5555 I/O Request Queue and queue them to the Controller.
5556 */
5557 DAC960_ProcessRequest(Controller);
5558 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5559 return IRQ_HANDLED;
5560}
5561
5562
5563/*
5564 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5565 Firmware Controllers.
5566*/
5567
5568static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5569{
5570 DAC960_Controller_T *Controller = Command->Controller;
5571 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5572 DAC960_V1_ClearCommand(Command);
5573 Command->CommandType = DAC960_MonitoringCommand;
5574 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5575 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5576 DAC960_QueueCommand(Command);
5577}
5578
5579
5580/*
5581 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5582 Firmware Controllers.
5583*/
5584
5585static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5586{
5587 DAC960_Controller_T *Controller = Command->Controller;
5588 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5589 DAC960_V2_ClearCommand(Command);
5590 Command->CommandType = DAC960_MonitoringCommand;
5591 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5592 CommandMailbox->ControllerInfo.CommandControlBits
5593 .DataTransferControllerToHost = true;
5594 CommandMailbox->ControllerInfo.CommandControlBits
5595 .NoAutoRequestSense = true;
5596 CommandMailbox->ControllerInfo.DataTransferSize =
5597 sizeof(DAC960_V2_ControllerInfo_T);
5598 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5599 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5600 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5601 .ScatterGatherSegments[0]
5602 .SegmentDataPointer =
5603 Controller->V2.NewControllerInformationDMA;
5604 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5605 .ScatterGatherSegments[0]
5606 .SegmentByteCount =
5607 CommandMailbox->ControllerInfo.DataTransferSize;
5608 DAC960_QueueCommand(Command);
5609}
5610
5611
5612/*
5613 DAC960_MonitoringTimerFunction is the timer function for monitoring
5614 the status of DAC960 Controllers.
5615*/
5616
5617static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
5618{
5619 DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
5620 DAC960_Command_T *Command;
5621 unsigned long flags;
5622
5623 if (Controller->FirmwareType == DAC960_V1_Controller)
5624 {
5625 spin_lock_irqsave(&Controller->queue_lock, flags);
5626 /*
5627 Queue a Status Monitoring Command to Controller.
5628 */
5629 Command = DAC960_AllocateCommand(Controller);
5630 if (Command != NULL)
5631 DAC960_V1_QueueMonitoringCommand(Command);
5632 else Controller->MonitoringCommandDeferred = true;
5633 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5634 }
5635 else
5636 {
5637 DAC960_V2_ControllerInfo_T *ControllerInfo =
5638 &Controller->V2.ControllerInformation;
5639 unsigned int StatusChangeCounter =
5640 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
87d156bf 5641 bool ForceMonitoringCommand = false;
50297cbf
MFP		 5642 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5643 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 5644 {
5645 int LogicalDriveNumber;
5646 for (LogicalDriveNumber = 0;
5647 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5648 LogicalDriveNumber++)
5649 {
5650 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5651 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5652 if (LogicalDeviceInfo == NULL) continue;
5653 if (!LogicalDeviceInfo->LogicalDeviceControl
5654 .LogicalDeviceInitialized)
5655 {
5656 ForceMonitoringCommand = true;
5657 break;
5658 }
5659 }
5660 Controller->SecondaryMonitoringTime = jiffies;
5661 }
5662 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5663 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5664 == Controller->V2.NextEventSequenceNumber &&
5665 (ControllerInfo->BackgroundInitializationsActive +
5666 ControllerInfo->LogicalDeviceInitializationsActive +
5667 ControllerInfo->PhysicalDeviceInitializationsActive +
5668 ControllerInfo->ConsistencyChecksActive +
5669 ControllerInfo->RebuildsActive +
5670 ControllerInfo->OnlineExpansionsActive == 0 ||
50297cbf
MFP		 5671 time_before(jiffies, Controller->PrimaryMonitoringTime
5672 + DAC960_MonitoringTimerInterval)) &&
1da177e4
LT		 5673 !ForceMonitoringCommand)
5674 {
5675 Controller->MonitoringTimer.expires =
5676 jiffies + DAC960_HealthStatusMonitoringInterval;
5677 add_timer(&Controller->MonitoringTimer);
5678 return;
5679 }
5680 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5681 Controller->PrimaryMonitoringTime = jiffies;
5682
5683 spin_lock_irqsave(&Controller->queue_lock, flags);
5684 /*
5685 Queue a Status Monitoring Command to Controller.
5686 */
5687 Command = DAC960_AllocateCommand(Controller);
5688 if (Command != NULL)
5689 DAC960_V2_QueueMonitoringCommand(Command);
5690 else Controller->MonitoringCommandDeferred = true;
5691 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5692 /*
5693 Wake up any processes waiting on a Health Status Buffer change.
5694 */
5695 wake_up(&Controller->HealthStatusWaitQueue);
5696 }
5697}
5698
5699/*
5700 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5701 additional bytes in the Combined Status Buffer and grows the buffer if
5702 necessary. It returns true if there is enough room and false otherwise.
5703*/
5704
87d156bf 5705static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
1da177e4
LT		 5706 unsigned int ByteCount)
5707{
5708 unsigned char *NewStatusBuffer;
5709 if (Controller->InitialStatusLength + 1 +
5710 Controller->CurrentStatusLength + ByteCount + 1 <=
5711 Controller->CombinedStatusBufferLength)
5712 return true;
5713 if (Controller->CombinedStatusBufferLength == 0)
5714 {
5715 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5716 while (NewStatusBufferLength < ByteCount)
5717 NewStatusBufferLength *= 2;
0a361e31
AD		 5718 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5719 GFP_ATOMIC);
1da177e4
LT		 5720 if (Controller->CombinedStatusBuffer == NULL) return false;
5721 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5722 return true;
5723 }
0a361e31
AD		 5724 NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5725 GFP_ATOMIC);
1da177e4
LT		 5726 if (NewStatusBuffer == NULL)
5727 {
5728 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5729 Controller);
5730 return false;
5731 }
5732 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5733 Controller->CombinedStatusBufferLength);
5734 kfree(Controller->CombinedStatusBuffer);
5735 Controller->CombinedStatusBuffer = NewStatusBuffer;
5736 Controller->CombinedStatusBufferLength *= 2;
5737 Controller->CurrentStatusBuffer =
5738 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5739 return true;
5740}
5741
5742
5743/*
5744 DAC960_Message prints Driver Messages.
5745*/
5746
5747static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5748 unsigned char *Format,
5749 DAC960_Controller_T *Controller,
5750 ...)
5751{
5752 static unsigned char Buffer[DAC960_LineBufferSize];
87d156bf 5753 static bool BeginningOfLine = true;
1da177e4
LT		 5754 va_list Arguments;
5755 int Length = 0;
5756 va_start(Arguments, Controller);
5757 Length = vsprintf(Buffer, Format, Arguments);
5758 va_end(Arguments);
5759 if (Controller == NULL)
5760 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5761 DAC960_ControllerCount, Buffer);
5762 else if (MessageLevel == DAC960_AnnounceLevel ||
5763 MessageLevel == DAC960_InfoLevel)
5764 {
5765 if (!Controller->ControllerInitialized)
5766 {
5767 if (DAC960_CheckStatusBuffer(Controller, Length))
5768 {
5769 strcpy(&Controller->CombinedStatusBuffer
5770 [Controller->InitialStatusLength],
5771 Buffer);
5772 Controller->InitialStatusLength += Length;
5773 Controller->CurrentStatusBuffer =
5774 &Controller->CombinedStatusBuffer
5775 [Controller->InitialStatusLength + 1];
5776 }
5777 if (MessageLevel == DAC960_AnnounceLevel)
5778 {
5779 static int AnnouncementLines = 0;
5780 if (++AnnouncementLines <= 2)
5781 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5782 Buffer);
5783 }
5784 else
5785 {
5786 if (BeginningOfLine)
5787 {
5788 if (Buffer[0] != '\n' || Length > 1)
5789 printk("%sDAC960#%d: %s",
5790 DAC960_MessageLevelMap[MessageLevel],
5791 Controller->ControllerNumber, Buffer);
5792 }
5793 else printk("%s", Buffer);
5794 }
5795 }
5796 else if (DAC960_CheckStatusBuffer(Controller, Length))
5797 {
5798 strcpy(&Controller->CurrentStatusBuffer[
5799 Controller->CurrentStatusLength], Buffer);
5800 Controller->CurrentStatusLength += Length;
5801 }
5802 }
5803 else if (MessageLevel == DAC960_ProgressLevel)
5804 {
5805 strcpy(Controller->ProgressBuffer, Buffer);
5806 Controller->ProgressBufferLength = Length;
5807 if (Controller->EphemeralProgressMessage)
5808 {
50297cbf
MFP		 5809 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5810 + DAC960_ProgressReportingInterval))
1da177e4
LT		 5811 {
5812 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5813 Controller->ControllerNumber, Buffer);
5814 Controller->LastProgressReportTime = jiffies;
5815 }
5816 }
5817 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5818 Controller->ControllerNumber, Buffer);
5819 }
5820 else if (MessageLevel == DAC960_UserCriticalLevel)
5821 {
5822 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5823 Buffer);
5824 Controller->UserStatusLength += Length;
5825 if (Buffer[0] != '\n' || Length > 1)
5826 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5827 Controller->ControllerNumber, Buffer);
5828 }
5829 else
5830 {
5831 if (BeginningOfLine)
5832 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5833 Controller->ControllerNumber, Buffer);
5834 else printk("%s", Buffer);
5835 }
5836 BeginningOfLine = (Buffer[Length-1] == '\n');
5837}
5838
5839
5840/*
5841 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5842 Channel:TargetID specification from a User Command string. It updates
5843 Channel and TargetID and returns true on success and false on failure.
5844*/
5845
87d156bf 5846static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
1da177e4
LT		 5847 char *UserCommandString,
5848 unsigned char *Channel,
5849 unsigned char *TargetID)
5850{
5851 char *NewUserCommandString = UserCommandString;
5852 unsigned long XChannel, XTargetID;
5853 while (*UserCommandString == ' ') UserCommandString++;
5854 if (UserCommandString == NewUserCommandString)
5855 return false;
5856 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5857 if (NewUserCommandString == UserCommandString ||
5858 *NewUserCommandString != ':' ||
5859 XChannel >= Controller->Channels)
5860 return false;
5861 UserCommandString = ++NewUserCommandString;
5862 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5863 if (NewUserCommandString == UserCommandString ||
5864 *NewUserCommandString != '\0' ||
5865 XTargetID >= Controller->Targets)
5866 return false;
5867 *Channel = XChannel;
5868 *TargetID = XTargetID;
5869 return true;
5870}
5871
5872
5873/*
5874 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5875 specification from a User Command string. It updates LogicalDriveNumber and
5876 returns true on success and false on failure.
5877*/
5878
87d156bf 5879static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
1da177e4
LT		 5880 char *UserCommandString,
5881 unsigned char *LogicalDriveNumber)
5882{
5883 char *NewUserCommandString = UserCommandString;
5884 unsigned long XLogicalDriveNumber;
5885 while (*UserCommandString == ' ') UserCommandString++;
5886 if (UserCommandString == NewUserCommandString)
5887 return false;
5888 XLogicalDriveNumber =
5889 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5890 if (NewUserCommandString == UserCommandString ||
5891 *NewUserCommandString != '\0' ||
5892 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5893 return false;
5894 *LogicalDriveNumber = XLogicalDriveNumber;
5895 return true;
5896}
5897
5898
5899/*
5900 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5901 DAC960 V1 Firmware Controllers.
5902*/
5903
5904static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5905 DAC960_Command_T *Command,
5906 unsigned char Channel,
5907 unsigned char TargetID,
5908 DAC960_V1_PhysicalDeviceState_T
5909 DeviceState,
5910 const unsigned char *DeviceStateString)
5911{
5912 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5913 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5914 CommandMailbox->Type3D.Channel = Channel;
5915 CommandMailbox->Type3D.TargetID = TargetID;
5916 CommandMailbox->Type3D.DeviceState = DeviceState;
5917 CommandMailbox->Type3D.Modifier = 0;
5918 DAC960_ExecuteCommand(Command);
5919 switch (Command->V1.CommandStatus)
5920 {
5921 case DAC960_V1_NormalCompletion:
5922 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5923 DeviceStateString, Channel, TargetID);
5924 break;
5925 case DAC960_V1_UnableToStartDevice:
5926 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5927 "Unable to Start Device\n", Controller,
5928 DeviceStateString, Channel, TargetID);
5929 break;
5930 case DAC960_V1_NoDeviceAtAddress:
5931 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5932 "No Device at Address\n", Controller,
5933 DeviceStateString, Channel, TargetID);
5934 break;
5935 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5936 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5937 "Invalid Channel or Target or Modifier\n",
5938 Controller, DeviceStateString, Channel, TargetID);
5939 break;
5940 case DAC960_V1_ChannelBusy:
5941 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5942 "Channel Busy\n", Controller,
5943 DeviceStateString, Channel, TargetID);
5944 break;
5945 default:
5946 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5947 "Unexpected Status %04X\n", Controller,
5948 DeviceStateString, Channel, TargetID,
5949 Command->V1.CommandStatus);
5950 break;
5951 }
5952}
5953
5954
5955/*
5956 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5957 Controllers.
5958*/
5959
87d156bf 5960static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 5961 unsigned char *UserCommand)
5962{
5963 DAC960_Command_T *Command;
5964 DAC960_V1_CommandMailbox_T *CommandMailbox;
5965 unsigned long flags;
5966 unsigned char Channel, TargetID, LogicalDriveNumber;
5967
5968 spin_lock_irqsave(&Controller->queue_lock, flags);
5969 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5970 DAC960_WaitForCommand(Controller);
5971 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5972 Controller->UserStatusLength = 0;
5973 DAC960_V1_ClearCommand(Command);
5974 Command->CommandType = DAC960_ImmediateCommand;
5975 CommandMailbox = &Command->V1.CommandMailbox;
5976 if (strcmp(UserCommand, "flush-cache") == 0)
5977 {
5978 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5979 DAC960_ExecuteCommand(Command);
5980 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5981 }
5982 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5983 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5984 &Channel, &TargetID))
5985 {
5986 DAC960_V1_DeviceState_T *DeviceState =
5987 &Controller->V1.DeviceState[Channel][TargetID];
5988 if (DeviceState->Present &&
5989 DeviceState->DeviceType == DAC960_V1_DiskType &&
5990 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5991 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5992 DAC960_V1_Device_Dead, "Kill");
5993 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5994 Controller, Channel, TargetID);
5995 }
5996 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
5997 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
5998 &Channel, &TargetID))
5999 {
6000 DAC960_V1_DeviceState_T *DeviceState =
6001 &Controller->V1.DeviceState[Channel][TargetID];
6002 if (DeviceState->Present &&
6003 DeviceState->DeviceType == DAC960_V1_DiskType &&
6004 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6005 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6006 DAC960_V1_Device_Online, "Make Online");
6007 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6008 Controller, Channel, TargetID);
6009
6010 }
6011 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6012 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6013 &Channel, &TargetID))
6014 {
6015 DAC960_V1_DeviceState_T *DeviceState =
6016 &Controller->V1.DeviceState[Channel][TargetID];
6017 if (DeviceState->Present &&
6018 DeviceState->DeviceType == DAC960_V1_DiskType &&
6019 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6020 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6021 DAC960_V1_Device_Standby, "Make Standby");
6022 else DAC960_UserCritical("Make Standby of Physical "
6023 "Device %d:%d Illegal\n",
6024 Controller, Channel, TargetID);
6025 }
6026 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6027 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6028 &Channel, &TargetID))
6029 {
6030 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6031 CommandMailbox->Type3D.Channel = Channel;
6032 CommandMailbox->Type3D.TargetID = TargetID;
6033 DAC960_ExecuteCommand(Command);
6034 switch (Command->V1.CommandStatus)
6035 {
6036 case DAC960_V1_NormalCompletion:
6037 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6038 Controller, Channel, TargetID);
6039 break;
6040 case DAC960_V1_AttemptToRebuildOnlineDrive:
6041 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6042 "Attempt to Rebuild Online or "
6043 "Unresponsive Drive\n",
6044 Controller, Channel, TargetID);
6045 break;
6046 case DAC960_V1_NewDiskFailedDuringRebuild:
6047 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6048 "New Disk Failed During Rebuild\n",
6049 Controller, Channel, TargetID);
6050 break;
6051 case DAC960_V1_InvalidDeviceAddress:
6052 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6053 "Invalid Device Address\n",
6054 Controller, Channel, TargetID);
6055 break;
6056 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6057 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6058 "Rebuild or Consistency Check Already "
6059 "in Progress\n", Controller, Channel, TargetID);
6060 break;
6061 default:
6062 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6063 "Unexpected Status %04X\n", Controller,
6064 Channel, TargetID, Command->V1.CommandStatus);
6065 break;
6066 }
6067 }
6068 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6069 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6070 &LogicalDriveNumber))
6071 {
6072 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6073 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6074 CommandMailbox->Type3C.AutoRestore = true;
6075 DAC960_ExecuteCommand(Command);
6076 switch (Command->V1.CommandStatus)
6077 {
6078 case DAC960_V1_NormalCompletion:
6079 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6080 "(/dev/rd/c%dd%d) Initiated\n",
6081 Controller, LogicalDriveNumber,
6082 Controller->ControllerNumber,
6083 LogicalDriveNumber);
6084 break;
6085 case DAC960_V1_DependentDiskIsDead:
6086 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6087 "(/dev/rd/c%dd%d) Failed - "
6088 "Dependent Physical Device is DEAD\n",
6089 Controller, LogicalDriveNumber,
6090 Controller->ControllerNumber,
6091 LogicalDriveNumber);
6092 break;
6093 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6094 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6095 "(/dev/rd/c%dd%d) Failed - "
6096 "Invalid or Nonredundant Logical Drive\n",
6097 Controller, LogicalDriveNumber,
6098 Controller->ControllerNumber,
6099 LogicalDriveNumber);
6100 break;
6101 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6102 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6103 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6104 "Consistency Check Already in Progress\n",
6105 Controller, LogicalDriveNumber,
6106 Controller->ControllerNumber,
6107 LogicalDriveNumber);
6108 break;
6109 default:
6110 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6111 "(/dev/rd/c%dd%d) Failed - "
6112 "Unexpected Status %04X\n",
6113 Controller, LogicalDriveNumber,
6114 Controller->ControllerNumber,
6115 LogicalDriveNumber, Command->V1.CommandStatus);
6116 break;
6117 }
6118 }
6119 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6120 strcmp(UserCommand, "cancel-consistency-check") == 0)
6121 {
6122 /*
6123 the OldRebuildRateConstant is never actually used
6124 once its value is retrieved from the controller.
6125 */
6126 unsigned char *OldRebuildRateConstant;
6127 dma_addr_t OldRebuildRateConstantDMA;
6128
6129 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6130 sizeof(char), &OldRebuildRateConstantDMA);
6131 if (OldRebuildRateConstant == NULL) {
6132 DAC960_UserCritical("Cancellation of Rebuild or "
6133 "Consistency Check Failed - "
6134 "Out of Memory",
6135 Controller);
6136 goto failure;
6137 }
6138 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6139 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6140 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6141 DAC960_ExecuteCommand(Command);
6142 switch (Command->V1.CommandStatus)
6143 {
6144 case DAC960_V1_NormalCompletion:
6145 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6146 Controller);
6147 break;
6148 default:
6149 DAC960_UserCritical("Cancellation of Rebuild or "
6150 "Consistency Check Failed - "
6151 "Unexpected Status %04X\n",
6152 Controller, Command->V1.CommandStatus);
6153 break;
6154 }
6155failure:
6156 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6157 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6158 }
6159 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6160 Controller, UserCommand);
6161
6162 spin_lock_irqsave(&Controller->queue_lock, flags);
6163 DAC960_DeallocateCommand(Command);
6164 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6165 return true;
6166}
6167
6168
6169/*
6170 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6171 TargetID into a Logical Device. It returns true on success and false
6172 on failure.
6173*/
6174
87d156bf 6175static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
1da177e4
LT		 6176 unsigned char Channel,
6177 unsigned char TargetID,
6178 unsigned short
6179 *LogicalDeviceNumber)
6180{
6181 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6182 DAC960_Controller_T *Controller = Command->Controller;
6183
6184 CommandMailbox = &Command->V2.CommandMailbox;
6185 memcpy(&SavedCommandMailbox, CommandMailbox,
6186 sizeof(DAC960_V2_CommandMailbox_T));
6187
6188 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6189 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6190 .DataTransferControllerToHost = true;
6191 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6192 .NoAutoRequestSense = true;
6193 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6194 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6195 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6196 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6197 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6198 DAC960_V2_TranslatePhysicalToLogicalDevice;
6199 CommandMailbox->Common.DataTransferMemoryAddress
6200 .ScatterGatherSegments[0]
6201 .SegmentDataPointer =
6202 Controller->V2.PhysicalToLogicalDeviceDMA;
6203 CommandMailbox->Common.DataTransferMemoryAddress
6204 .ScatterGatherSegments[0]
6205 .SegmentByteCount =
6206 CommandMailbox->Common.DataTransferSize;
6207
6208 DAC960_ExecuteCommand(Command);
6209 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6210
6211 memcpy(CommandMailbox, &SavedCommandMailbox,
6212 sizeof(DAC960_V2_CommandMailbox_T));
6213 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6214}
6215
6216
6217/*
6218 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6219 Controllers.
6220*/
6221
87d156bf 6222static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 6223 unsigned char *UserCommand)
6224{
6225 DAC960_Command_T *Command;
6226 DAC960_V2_CommandMailbox_T *CommandMailbox;
6227 unsigned long flags;
6228 unsigned char Channel, TargetID, LogicalDriveNumber;
6229 unsigned short LogicalDeviceNumber;
6230
6231 spin_lock_irqsave(&Controller->queue_lock, flags);
6232 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6233 DAC960_WaitForCommand(Controller);
6234 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6235 Controller->UserStatusLength = 0;
6236 DAC960_V2_ClearCommand(Command);
6237 Command->CommandType = DAC960_ImmediateCommand;
6238 CommandMailbox = &Command->V2.CommandMailbox;
6239 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6240 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6241 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6242 if (strcmp(UserCommand, "flush-cache") == 0)
6243 {
6244 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6245 CommandMailbox->DeviceOperation.OperationDevice =
6246 DAC960_V2_RAID_Controller;
6247 DAC960_ExecuteCommand(Command);
6248 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6249 }
6250 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6251 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6252 &Channel, &TargetID) &&
6253 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6254 &LogicalDeviceNumber))
6255 {
6256 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6257 LogicalDeviceNumber;
6258 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6259 DAC960_V2_SetDeviceState;
6260 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6261 DAC960_V2_Device_Dead;
6262 DAC960_ExecuteCommand(Command);
6263 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6264 Controller, Channel, TargetID,
6265 (Command->V2.CommandStatus
6266 == DAC960_V2_NormalCompletion
6267 ? "Succeeded" : "Failed"));
6268 }
6269 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6270 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6271 &Channel, &TargetID) &&
6272 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6273 &LogicalDeviceNumber))
6274 {
6275 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6276 LogicalDeviceNumber;
6277 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6278 DAC960_V2_SetDeviceState;
6279 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6280 DAC960_V2_Device_Online;
6281 DAC960_ExecuteCommand(Command);
6282 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6283 Controller, Channel, TargetID,
6284 (Command->V2.CommandStatus
6285 == DAC960_V2_NormalCompletion
6286 ? "Succeeded" : "Failed"));
6287 }
6288 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6289 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6290 &Channel, &TargetID) &&
6291 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6292 &LogicalDeviceNumber))
6293 {
6294 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6295 LogicalDeviceNumber;
6296 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6297 DAC960_V2_SetDeviceState;
6298 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6299 DAC960_V2_Device_Standby;
6300 DAC960_ExecuteCommand(Command);
6301 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6302 Controller, Channel, TargetID,
6303 (Command->V2.CommandStatus
6304 == DAC960_V2_NormalCompletion
6305 ? "Succeeded" : "Failed"));
6306 }
6307 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6308 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6309 &Channel, &TargetID) &&
6310 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6311 &LogicalDeviceNumber))
6312 {
6313 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6314 LogicalDeviceNumber;
6315 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6316 DAC960_V2_RebuildDeviceStart;
6317 DAC960_ExecuteCommand(Command);
6318 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6319 Controller, Channel, TargetID,
6320 (Command->V2.CommandStatus
6321 == DAC960_V2_NormalCompletion
6322 ? "Initiated" : "Not Initiated"));
6323 }
6324 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6325 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6326 &Channel, &TargetID) &&
6327 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6328 &LogicalDeviceNumber))
6329 {
6330 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6331 LogicalDeviceNumber;
6332 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6333 DAC960_V2_RebuildDeviceStop;
6334 DAC960_ExecuteCommand(Command);
6335 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6336 Controller, Channel, TargetID,
6337 (Command->V2.CommandStatus
6338 == DAC960_V2_NormalCompletion
6339 ? "Cancelled" : "Not Cancelled"));
6340 }
6341 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6342 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6343 &LogicalDriveNumber))
6344 {
6345 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6346 LogicalDriveNumber;
6347 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6348 DAC960_V2_ConsistencyCheckStart;
6349 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6350 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6351 DAC960_ExecuteCommand(Command);
6352 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6353 "(/dev/rd/c%dd%d) %s\n",
6354 Controller, LogicalDriveNumber,
6355 Controller->ControllerNumber,
6356 LogicalDriveNumber,
6357 (Command->V2.CommandStatus
6358 == DAC960_V2_NormalCompletion
6359 ? "Initiated" : "Not Initiated"));
6360 }
6361 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6362 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6363 &LogicalDriveNumber))
6364 {
6365 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6366 LogicalDriveNumber;
6367 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6368 DAC960_V2_ConsistencyCheckStop;
6369 DAC960_ExecuteCommand(Command);
6370 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6371 "(/dev/rd/c%dd%d) %s\n",
6372 Controller, LogicalDriveNumber,
6373 Controller->ControllerNumber,
6374 LogicalDriveNumber,
6375 (Command->V2.CommandStatus
6376 == DAC960_V2_NormalCompletion
6377 ? "Cancelled" : "Not Cancelled"));
6378 }
6379 else if (strcmp(UserCommand, "perform-discovery") == 0)
6380 {
6381 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6382 DAC960_ExecuteCommand(Command);
6383 DAC960_UserCritical("Discovery %s\n", Controller,
6384 (Command->V2.CommandStatus
6385 == DAC960_V2_NormalCompletion
6386 ? "Initiated" : "Not Initiated"));
6387 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6388 {
6389 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6390 CommandMailbox->ControllerInfo.CommandControlBits
6391 .DataTransferControllerToHost = true;
6392 CommandMailbox->ControllerInfo.CommandControlBits
6393 .NoAutoRequestSense = true;
6394 CommandMailbox->ControllerInfo.DataTransferSize =
6395 sizeof(DAC960_V2_ControllerInfo_T);
6396 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6397 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6398 DAC960_V2_GetControllerInfo;
6399 /*
6400 * How does this NOT race with the queued Monitoring
6401 * usage of this structure?
6402 */
6403 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6404 .ScatterGatherSegments[0]
6405 .SegmentDataPointer =
6406 Controller->V2.NewControllerInformationDMA;
6407 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6408 .ScatterGatherSegments[0]
6409 .SegmentByteCount =
6410 CommandMailbox->ControllerInfo.DataTransferSize;
6411 DAC960_ExecuteCommand(Command);
6412 while (Controller->V2.NewControllerInformation->PhysicalScanActive)
6413 {
6414 DAC960_ExecuteCommand(Command);
6415 sleep_on_timeout(&Controller->CommandWaitQueue, HZ);
6416 }
6417 DAC960_UserCritical("Discovery Completed\n", Controller);
6418 }
6419 }
6420 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6421 Controller->SuppressEnclosureMessages = true;
6422 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6423 Controller, UserCommand);
6424
6425 spin_lock_irqsave(&Controller->queue_lock, flags);
6426 DAC960_DeallocateCommand(Command);
6427 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6428 return true;
6429}
6430
6431
6432/*
6433 DAC960_ProcReadStatus implements reading /proc/rd/status.
6434*/
6435
6436static int DAC960_ProcReadStatus(char *Page, char **Start, off_t Offset,
6437 int Count, int *EOF, void *Data)
6438{
6439 unsigned char *StatusMessage = "OK\n";
6440 int ControllerNumber, BytesAvailable;
6441 for (ControllerNumber = 0;
6442 ControllerNumber < DAC960_ControllerCount;
6443 ControllerNumber++)
6444 {
6445 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6446 if (Controller == NULL) continue;
6447 if (Controller->MonitoringAlertMode)
6448 {
6449 StatusMessage = "ALERT\n";
6450 break;
6451 }
6452 }
6453 BytesAvailable = strlen(StatusMessage) - Offset;
6454 if (Count >= BytesAvailable)
6455 {
6456 Count = BytesAvailable;
6457 *EOF = true;
6458 }
6459 if (Count <= 0) return 0;
6460 *Start = Page;
6461 memcpy(Page, &StatusMessage[Offset], Count);
6462 return Count;
6463}
6464
6465
6466/*
6467 DAC960_ProcReadInitialStatus implements reading /proc/rd/cN/initial_status.
6468*/
6469
6470static int DAC960_ProcReadInitialStatus(char *Page, char **Start, off_t Offset,
6471 int Count, int *EOF, void *Data)
6472{
6473 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6474 int BytesAvailable = Controller->InitialStatusLength - Offset;
6475 if (Count >= BytesAvailable)
6476 {
6477 Count = BytesAvailable;
6478 *EOF = true;
6479 }
6480 if (Count <= 0) return 0;
6481 *Start = Page;
6482 memcpy(Page, &Controller->CombinedStatusBuffer[Offset], Count);
6483 return Count;
6484}
6485
6486
6487/*
6488 DAC960_ProcReadCurrentStatus implements reading /proc/rd/cN/current_status.
6489*/
6490
6491static int DAC960_ProcReadCurrentStatus(char *Page, char **Start, off_t Offset,
6492 int Count, int *EOF, void *Data)
6493{
6494 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6495 unsigned char *StatusMessage =
6496 "No Rebuild or Consistency Check in Progress\n";
6497 int ProgressMessageLength = strlen(StatusMessage);
6498 int BytesAvailable;
6499 if (jiffies != Controller->LastCurrentStatusTime)
6500 {
6501 Controller->CurrentStatusLength = 0;
6502 DAC960_AnnounceDriver(Controller);
6503 DAC960_ReportControllerConfiguration(Controller);
6504 DAC960_ReportDeviceConfiguration(Controller);
6505 if (Controller->ProgressBufferLength > 0)
6506 ProgressMessageLength = Controller->ProgressBufferLength;
6507 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6508 {
6509 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6510 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6511 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6512 if (Controller->ProgressBufferLength > 0)
6513 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6514 Controller->ProgressBuffer);
6515 else
6516 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6517 StatusMessage);
6518 Controller->CurrentStatusLength += ProgressMessageLength;
6519 }
6520 Controller->LastCurrentStatusTime = jiffies;
6521 }
6522 BytesAvailable = Controller->CurrentStatusLength - Offset;
6523 if (Count >= BytesAvailable)
6524 {
6525 Count = BytesAvailable;
6526 *EOF = true;
6527 }
6528 if (Count <= 0) return 0;
6529 *Start = Page;
6530 memcpy(Page, &Controller->CurrentStatusBuffer[Offset], Count);
6531 return Count;
6532}
6533
6534
6535/*
6536 DAC960_ProcReadUserCommand implements reading /proc/rd/cN/user_command.
6537*/
6538
6539static int DAC960_ProcReadUserCommand(char *Page, char **Start, off_t Offset,
6540 int Count, int *EOF, void *Data)
6541{
6542 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6543 int BytesAvailable = Controller->UserStatusLength - Offset;
6544 if (Count >= BytesAvailable)
6545 {
6546 Count = BytesAvailable;
6547 *EOF = true;
6548 }
6549 if (Count <= 0) return 0;
6550 *Start = Page;
6551 memcpy(Page, &Controller->UserStatusBuffer[Offset], Count);
6552 return Count;
6553}
6554
6555
6556/*
6557 DAC960_ProcWriteUserCommand implements writing /proc/rd/cN/user_command.
6558*/
6559
6560static int DAC960_ProcWriteUserCommand(struct file *file,
6561 const char __user *Buffer,
6562 unsigned long Count, void *Data)
6563{
6564 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6565 unsigned char CommandBuffer[80];
6566 int Length;
6567 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6568 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6569 CommandBuffer[Count] = '\0';
6570 Length = strlen(CommandBuffer);
6571 if (CommandBuffer[Length-1] == '\n')
6572 CommandBuffer[--Length] = '\0';
6573 if (Controller->FirmwareType == DAC960_V1_Controller)
6574 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6575 ? Count : -EBUSY);
6576 else
6577 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6578 ? Count : -EBUSY);
6579}
6580
6581
6582/*
6583 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6584 DAC960 Driver.
6585*/
6586
6587static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6588{
6589 struct proc_dir_entry *StatusProcEntry;
6590 struct proc_dir_entry *ControllerProcEntry;
6591 struct proc_dir_entry *UserCommandProcEntry;
6592
6593 if (DAC960_ProcDirectoryEntry == NULL) {
6594 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6595 StatusProcEntry = create_proc_read_entry("status", 0,
6596 DAC960_ProcDirectoryEntry,
6597 DAC960_ProcReadStatus, NULL);
6598 }
6599
6600 sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
6601 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6602 DAC960_ProcDirectoryEntry);
6603 create_proc_read_entry("initial_status", 0, ControllerProcEntry,
6604 DAC960_ProcReadInitialStatus, Controller);
6605 create_proc_read_entry("current_status", 0, ControllerProcEntry,
6606 DAC960_ProcReadCurrentStatus, Controller);
6607 UserCommandProcEntry =
6608 create_proc_read_entry("user_command", S_IWUSR | S_IRUSR,
6609 ControllerProcEntry, DAC960_ProcReadUserCommand,
6610 Controller);
6611 UserCommandProcEntry->write_proc = DAC960_ProcWriteUserCommand;
6612 Controller->ControllerProcEntry = ControllerProcEntry;
6613}
6614
6615
6616/*
6617 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6618 DAC960 Driver.
6619*/
6620
6621static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6622{
6623 if (Controller->ControllerProcEntry == NULL)
6624 return;
6625 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6626 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6627 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6628 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6629 Controller->ControllerProcEntry = NULL;
6630}
6631
6632#ifdef DAC960_GAM_MINOR
6633
6634/*
6635 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6636*/
6637
6638static int DAC960_gam_ioctl(struct inode *inode, struct file *file,
6639 unsigned int Request, unsigned long Argument)
6640{
6641 int ErrorCode = 0;
6642 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
6643 switch (Request)
6644 {
6645 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
6646 return DAC960_ControllerCount;
6647 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6648 {
6649 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6650 (DAC960_ControllerInfo_T __user *) Argument;
6651 DAC960_ControllerInfo_T ControllerInfo;
6652 DAC960_Controller_T *Controller;
6653 int ControllerNumber;
6654 if (UserSpaceControllerInfo == NULL) return -EINVAL;
6655 ErrorCode = get_user(ControllerNumber,
6656 &UserSpaceControllerInfo->ControllerNumber);
6657 if (ErrorCode != 0) return ErrorCode;
6658 if (ControllerNumber < 0 ||
6659 ControllerNumber > DAC960_ControllerCount - 1)
6660 return -ENXIO;
6661 Controller = DAC960_Controllers[ControllerNumber];
6662 if (Controller == NULL) return -ENXIO;
6663 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6664 ControllerInfo.ControllerNumber = ControllerNumber;
6665 ControllerInfo.FirmwareType = Controller->FirmwareType;
6666 ControllerInfo.Channels = Controller->Channels;
6667 ControllerInfo.Targets = Controller->Targets;
6668 ControllerInfo.PCI_Bus = Controller->Bus;
6669 ControllerInfo.PCI_Device = Controller->Device;
6670 ControllerInfo.PCI_Function = Controller->Function;
6671 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6672 ControllerInfo.PCI_Address = Controller->PCI_Address;
6673 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6674 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6675 return (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6676 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6677 }
6678 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6679 {
6680 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6681 (DAC960_V1_UserCommand_T __user *) Argument;
6682 DAC960_V1_UserCommand_T UserCommand;
6683 DAC960_Controller_T *Controller;
6684 DAC960_Command_T *Command = NULL;
6685 DAC960_V1_CommandOpcode_T CommandOpcode;
6686 DAC960_V1_CommandStatus_T CommandStatus;
6687 DAC960_V1_DCDB_T DCDB;
6688 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6689 dma_addr_t DCDB_IOBUFDMA;
6690 unsigned long flags;
6691 int ControllerNumber, DataTransferLength;
6692 unsigned char *DataTransferBuffer = NULL;
6693 dma_addr_t DataTransferBufferDMA;
6694 if (UserSpaceUserCommand == NULL) return -EINVAL;
6695 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6696 sizeof(DAC960_V1_UserCommand_T))) {
6697 ErrorCode = -EFAULT;
6698 goto Failure1a;
6699 }
6700 ControllerNumber = UserCommand.ControllerNumber;
6701 if (ControllerNumber < 0 ||
6702 ControllerNumber > DAC960_ControllerCount - 1)
6703 return -ENXIO;
6704 Controller = DAC960_Controllers[ControllerNumber];
6705 if (Controller == NULL) return -ENXIO;
6706 if (Controller->FirmwareType != DAC960_V1_Controller) return -EINVAL;
6707 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6708 DataTransferLength = UserCommand.DataTransferLength;
6709 if (CommandOpcode & 0x80) return -EINVAL;
6710 if (CommandOpcode == DAC960_V1_DCDB)
6711 {
6712 if (copy_from_user(&DCDB, UserCommand.DCDB,
6713 sizeof(DAC960_V1_DCDB_T))) {
6714 ErrorCode = -EFAULT;
6715 goto Failure1a;
6716 }
6717 if (DCDB.Channel >= DAC960_V1_MaxChannels) return -EINVAL;
6718 if (!((DataTransferLength == 0 &&
6719 DCDB.Direction
6720 == DAC960_V1_DCDB_NoDataTransfer) ||
6721 (DataTransferLength > 0 &&
6722 DCDB.Direction
6723 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6724 (DataTransferLength < 0 &&
6725 DCDB.Direction
6726 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6727 return -EINVAL;
6728 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6729 != abs(DataTransferLength))
6730 return -EINVAL;
6731 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6732 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6733 if (DCDB_IOBUF == NULL)
6734 return -ENOMEM;
6735 }
6736 if (DataTransferLength > 0)
6737 {
6738 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6739 DataTransferLength, &DataTransferBufferDMA);
6740 if (DataTransferBuffer == NULL) {
6741 ErrorCode = -ENOMEM;
6742 goto Failure1;
6743 }
6744 memset(DataTransferBuffer, 0, DataTransferLength);
6745 }
6746 else if (DataTransferLength < 0)
6747 {
6748 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6749 -DataTransferLength, &DataTransferBufferDMA);
6750 if (DataTransferBuffer == NULL) {
6751 ErrorCode = -ENOMEM;
6752 goto Failure1;
6753 }
6754 if (copy_from_user(DataTransferBuffer,
6755 UserCommand.DataTransferBuffer,
6756 -DataTransferLength)) {
6757 ErrorCode = -EFAULT;
6758 goto Failure1;
6759 }
6760 }
6761 if (CommandOpcode == DAC960_V1_DCDB)
6762 {
6763 spin_lock_irqsave(&Controller->queue_lock, flags);
6764 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6765 DAC960_WaitForCommand(Controller);
6766 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6767 [DCDB.TargetID])
6768 {
6769 spin_unlock_irq(&Controller->queue_lock);
6770 __wait_event(Controller->CommandWaitQueue,
6771 !Controller->V1.DirectCommandActive
6772 [DCDB.Channel][DCDB.TargetID]);
6773 spin_lock_irq(&Controller->queue_lock);
6774 }
6775 Controller->V1.DirectCommandActive[DCDB.Channel]
6776 [DCDB.TargetID] = true;
6777 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6778 DAC960_V1_ClearCommand(Command);
6779 Command->CommandType = DAC960_ImmediateCommand;
6780 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6781 sizeof(DAC960_V1_CommandMailbox_T));
6782 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6783 DCDB.BusAddress = DataTransferBufferDMA;
6784 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6785 }
6786 else
6787 {
6788 spin_lock_irqsave(&Controller->queue_lock, flags);
6789 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6790 DAC960_WaitForCommand(Controller);
6791 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6792 DAC960_V1_ClearCommand(Command);
6793 Command->CommandType = DAC960_ImmediateCommand;
6794 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6795 sizeof(DAC960_V1_CommandMailbox_T));
6796 if (DataTransferBuffer != NULL)
6797 Command->V1.CommandMailbox.Type3.BusAddress =
6798 DataTransferBufferDMA;
6799 }
6800 DAC960_ExecuteCommand(Command);
6801 CommandStatus = Command->V1.CommandStatus;
6802 spin_lock_irqsave(&Controller->queue_lock, flags);
6803 DAC960_DeallocateCommand(Command);
6804 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6805 if (DataTransferLength > 0)
6806 {
6807 if (copy_to_user(UserCommand.DataTransferBuffer,
6808 DataTransferBuffer, DataTransferLength)) {
6809 ErrorCode = -EFAULT;
6810 goto Failure1;
6811 }
6812 }
6813 if (CommandOpcode == DAC960_V1_DCDB)
6814 {
6815 /*
6816 I don't believe Target or Channel in the DCDB_IOBUF
6817 should be any different from the contents of DCDB.
6818 */
6819 Controller->V1.DirectCommandActive[DCDB.Channel]
6820 [DCDB.TargetID] = false;
6821 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6822 sizeof(DAC960_V1_DCDB_T))) {
6823 ErrorCode = -EFAULT;
6824 goto Failure1;
6825 }
6826 }
6827 ErrorCode = CommandStatus;
6828 Failure1:
6829 if (DataTransferBuffer != NULL)
6830 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6831 DataTransferBuffer, DataTransferBufferDMA);
6832 if (DCDB_IOBUF != NULL)
6833 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6834 DCDB_IOBUF, DCDB_IOBUFDMA);
6835 Failure1a:
6836 return ErrorCode;
6837 }
6838 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6839 {
6840 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6841 (DAC960_V2_UserCommand_T __user *) Argument;
6842 DAC960_V2_UserCommand_T UserCommand;
6843 DAC960_Controller_T *Controller;
6844 DAC960_Command_T *Command = NULL;
6845 DAC960_V2_CommandMailbox_T *CommandMailbox;
6846 DAC960_V2_CommandStatus_T CommandStatus;
6847 unsigned long flags;
6848 int ControllerNumber, DataTransferLength;
6849 int DataTransferResidue, RequestSenseLength;
6850 unsigned char *DataTransferBuffer = NULL;
6851 dma_addr_t DataTransferBufferDMA;
6852 unsigned char *RequestSenseBuffer = NULL;
6853 dma_addr_t RequestSenseBufferDMA;
6854 if (UserSpaceUserCommand == NULL) return -EINVAL;
6855 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6856 sizeof(DAC960_V2_UserCommand_T))) {
6857 ErrorCode = -EFAULT;
6858 goto Failure2a;
6859 }
6860 ControllerNumber = UserCommand.ControllerNumber;
6861 if (ControllerNumber < 0 ||
6862 ControllerNumber > DAC960_ControllerCount - 1)
6863 return -ENXIO;
6864 Controller = DAC960_Controllers[ControllerNumber];
6865 if (Controller == NULL) return -ENXIO;
6866 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
6867 DataTransferLength = UserCommand.DataTransferLength;
6868 if (DataTransferLength > 0)
6869 {
6870 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6871 DataTransferLength, &DataTransferBufferDMA);
6872 if (DataTransferBuffer == NULL) return -ENOMEM;
6873 memset(DataTransferBuffer, 0, DataTransferLength);
6874 }
6875 else if (DataTransferLength < 0)
6876 {
6877 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6878 -DataTransferLength, &DataTransferBufferDMA);
6879 if (DataTransferBuffer == NULL) return -ENOMEM;
6880 if (copy_from_user(DataTransferBuffer,
6881 UserCommand.DataTransferBuffer,
6882 -DataTransferLength)) {
6883 ErrorCode = -EFAULT;
6884 goto Failure2;
6885 }
6886 }
6887 RequestSenseLength = UserCommand.RequestSenseLength;
6888 if (RequestSenseLength > 0)
6889 {
6890 RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice,
6891 RequestSenseLength, &RequestSenseBufferDMA);
6892 if (RequestSenseBuffer == NULL)
6893 {
6894 ErrorCode = -ENOMEM;
6895 goto Failure2;
6896 }
6897 memset(RequestSenseBuffer, 0, RequestSenseLength);
6898 }
6899 spin_lock_irqsave(&Controller->queue_lock, flags);
6900 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6901 DAC960_WaitForCommand(Controller);
6902 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6903 DAC960_V2_ClearCommand(Command);
6904 Command->CommandType = DAC960_ImmediateCommand;
6905 CommandMailbox = &Command->V2.CommandMailbox;
6906 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6907 sizeof(DAC960_V2_CommandMailbox_T));
6908 CommandMailbox->Common.CommandControlBits
6909 .AdditionalScatterGatherListMemory = false;
6910 CommandMailbox->Common.CommandControlBits
6911 .NoAutoRequestSense = true;
6912 CommandMailbox->Common.DataTransferSize = 0;
6913 CommandMailbox->Common.DataTransferPageNumber = 0;
6914 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6915 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6916 if (DataTransferLength != 0)
6917 {
6918 if (DataTransferLength > 0)
6919 {
6920 CommandMailbox->Common.CommandControlBits
6921 .DataTransferControllerToHost = true;
6922 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6923 }
6924 else
6925 {
6926 CommandMailbox->Common.CommandControlBits
6927 .DataTransferControllerToHost = false;
6928 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6929 }
6930 CommandMailbox->Common.DataTransferMemoryAddress
6931 .ScatterGatherSegments[0]
6932 .SegmentDataPointer = DataTransferBufferDMA;
6933 CommandMailbox->Common.DataTransferMemoryAddress
6934 .ScatterGatherSegments[0]
6935 .SegmentByteCount =
6936 CommandMailbox->Common.DataTransferSize;
6937 }
6938 if (RequestSenseLength > 0)
6939 {
6940 CommandMailbox->Common.CommandControlBits
6941 .NoAutoRequestSense = false;
6942 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6943 CommandMailbox->Common.RequestSenseBusAddress =
6944 RequestSenseBufferDMA;
6945 }
6946 DAC960_ExecuteCommand(Command);
6947 CommandStatus = Command->V2.CommandStatus;
6948 RequestSenseLength = Command->V2.RequestSenseLength;
6949 DataTransferResidue = Command->V2.DataTransferResidue;
6950 spin_lock_irqsave(&Controller->queue_lock, flags);
6951 DAC960_DeallocateCommand(Command);
6952 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6953 if (RequestSenseLength > UserCommand.RequestSenseLength)
6954 RequestSenseLength = UserCommand.RequestSenseLength;
6955 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6956 &DataTransferResidue,
6957 sizeof(DataTransferResidue))) {
6958 ErrorCode = -EFAULT;
6959 goto Failure2;
6960 }
6961 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6962 &RequestSenseLength, sizeof(RequestSenseLength))) {
6963 ErrorCode = -EFAULT;
6964 goto Failure2;
6965 }
6966 if (DataTransferLength > 0)
6967 {
6968 if (copy_to_user(UserCommand.DataTransferBuffer,
6969 DataTransferBuffer, DataTransferLength)) {
6970 ErrorCode = -EFAULT;
6971 goto Failure2;
6972 }
6973 }
6974 if (RequestSenseLength > 0)
6975 {
6976 if (copy_to_user(UserCommand.RequestSenseBuffer,
6977 RequestSenseBuffer, RequestSenseLength)) {
6978 ErrorCode = -EFAULT;
6979 goto Failure2;
6980 }
6981 }
6982 ErrorCode = CommandStatus;
6983 Failure2:
6984 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6985 DataTransferBuffer, DataTransferBufferDMA);
6986 if (RequestSenseBuffer != NULL)
6987 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
6988 RequestSenseBuffer, RequestSenseBufferDMA);
6989 Failure2a:
6990 return ErrorCode;
6991 }
6992 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
6993 {
6994 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
6995 (DAC960_V2_GetHealthStatus_T __user *) Argument;
6996 DAC960_V2_GetHealthStatus_T GetHealthStatus;
6997 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
6998 DAC960_Controller_T *Controller;
6999 int ControllerNumber;
7000 if (UserSpaceGetHealthStatus == NULL) return -EINVAL;
7001 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
7002 sizeof(DAC960_V2_GetHealthStatus_T)))
7003 return -EFAULT;
7004 ControllerNumber = GetHealthStatus.ControllerNumber;
7005 if (ControllerNumber < 0 ||
7006 ControllerNumber > DAC960_ControllerCount - 1)
7007 return -ENXIO;
7008 Controller = DAC960_Controllers[ControllerNumber];
7009 if (Controller == NULL) return -ENXIO;
7010 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
7011 if (copy_from_user(&HealthStatusBuffer,
7012 GetHealthStatus.HealthStatusBuffer,
7013 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7014 return -EFAULT;
7015 while (Controller->V2.HealthStatusBuffer->StatusChangeCounter
7016 == HealthStatusBuffer.StatusChangeCounter &&
7017 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7018 == HealthStatusBuffer.NextEventSequenceNumber)
7019 {
7020 interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue,
7021 DAC960_MonitoringTimerInterval);
7022 if (signal_pending(current)) return -EINTR;
7023 }
7024 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7025 Controller->V2.HealthStatusBuffer,
7026 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7027 return -EFAULT;
7028 return 0;
7029 }
7030 }
7031 return -EINVAL;
7032}
7033
2b8693c0 7034static const struct file_operations DAC960_gam_fops = {
1da177e4
LT		 7035 .owner = THIS_MODULE,
7036 .ioctl = DAC960_gam_ioctl
7037};
7038
7039static struct miscdevice DAC960_gam_dev = {
7040 DAC960_GAM_MINOR,
7041 "dac960_gam",
7042 &DAC960_gam_fops
7043};
7044
7045static int DAC960_gam_init(void)
7046{
7047 int ret;
7048
7049 ret = misc_register(&DAC960_gam_dev);
7050 if (ret)
7051 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7052 return ret;
7053}
7054
7055static void DAC960_gam_cleanup(void)
7056{
7057 misc_deregister(&DAC960_gam_dev);
7058}
7059
7060#endif /* DAC960_GAM_MINOR */
7061
5b76ffd5
CH		 7062static struct DAC960_privdata DAC960_GEM_privdata = {
7063 .HardwareType = DAC960_GEM_Controller,
7064 .FirmwareType = DAC960_V2_Controller,
7065 .InterruptHandler = DAC960_GEM_InterruptHandler,
7066 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7067};
7068
7069
1da177e4
LT		 7070static struct DAC960_privdata DAC960_BA_privdata = {
7071 .HardwareType = DAC960_BA_Controller,
7072 .FirmwareType = DAC960_V2_Controller,
7073 .InterruptHandler = DAC960_BA_InterruptHandler,
7074 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7075};
7076
7077static struct DAC960_privdata DAC960_LP_privdata = {
7078 .HardwareType = DAC960_LP_Controller,
7079 .FirmwareType = DAC960_LP_Controller,
7080 .InterruptHandler = DAC960_LP_InterruptHandler,
7081 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7082};
7083
7084static struct DAC960_privdata DAC960_LA_privdata = {
7085 .HardwareType = DAC960_LA_Controller,
7086 .FirmwareType = DAC960_V1_Controller,
7087 .InterruptHandler = DAC960_LA_InterruptHandler,
7088 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7089};
7090
7091static struct DAC960_privdata DAC960_PG_privdata = {
7092 .HardwareType = DAC960_PG_Controller,
7093 .FirmwareType = DAC960_V1_Controller,
7094 .InterruptHandler = DAC960_PG_InterruptHandler,
7095 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7096};
7097
7098static struct DAC960_privdata DAC960_PD_privdata = {
7099 .HardwareType = DAC960_PD_Controller,
7100 .FirmwareType = DAC960_V1_Controller,
7101 .InterruptHandler = DAC960_PD_InterruptHandler,
7102 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7103};
7104
7105static struct DAC960_privdata DAC960_P_privdata = {
7106 .HardwareType = DAC960_P_Controller,
7107 .FirmwareType = DAC960_V1_Controller,
7108 .InterruptHandler = DAC960_P_InterruptHandler,
7109 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7110};
7111
7112static struct pci_device_id DAC960_id_table[] = {
5b76ffd5
CH		 7113 {
7114 .vendor = PCI_VENDOR_ID_MYLEX,
7115 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
fddafd3d 7116 .subvendor = PCI_VENDOR_ID_MYLEX,
5b76ffd5
CH		 7117 .subdevice = PCI_ANY_ID,
7118 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7119 },
1da177e4
LT		 7120 {
7121 .vendor = PCI_VENDOR_ID_MYLEX,
7122 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7123 .subvendor = PCI_ANY_ID,
7124 .subdevice = PCI_ANY_ID,
7125 .driver_data = (unsigned long) &DAC960_BA_privdata,
7126 },
7127 {
7128 .vendor = PCI_VENDOR_ID_MYLEX,
7129 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7130 .subvendor = PCI_ANY_ID,
7131 .subdevice = PCI_ANY_ID,
7132 .driver_data = (unsigned long) &DAC960_LP_privdata,
7133 },
7134 {
7135 .vendor = PCI_VENDOR_ID_DEC,
7136 .device = PCI_DEVICE_ID_DEC_21285,
7137 .subvendor = PCI_VENDOR_ID_MYLEX,
7138 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7139 .driver_data = (unsigned long) &DAC960_LA_privdata,
7140 },
7141 {
7142 .vendor = PCI_VENDOR_ID_MYLEX,
7143 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7144 .subvendor = PCI_ANY_ID,
7145 .subdevice = PCI_ANY_ID,
7146 .driver_data = (unsigned long) &DAC960_PG_privdata,
7147 },
7148 {
7149 .vendor = PCI_VENDOR_ID_MYLEX,
7150 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7151 .subvendor = PCI_ANY_ID,
7152 .subdevice = PCI_ANY_ID,
7153 .driver_data = (unsigned long) &DAC960_PD_privdata,
7154 },
7155 {
7156 .vendor = PCI_VENDOR_ID_MYLEX,
7157 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7158 .subvendor = PCI_ANY_ID,
7159 .subdevice = PCI_ANY_ID,
7160 .driver_data = (unsigned long) &DAC960_P_privdata,
7161 },
7162 {0, },
7163};
7164
7165MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7166
7167static struct pci_driver DAC960_pci_driver = {
7168 .name = "DAC960",
7169 .id_table = DAC960_id_table,
7170 .probe = DAC960_Probe,
7171 .remove = DAC960_Remove,
7172};
7173
7174static int DAC960_init_module(void)
7175{
7176 int ret;
7177
9bfab8ce 7178 ret = pci_register_driver(&DAC960_pci_driver);
1da177e4
LT		 7179#ifdef DAC960_GAM_MINOR
7180 if (!ret)
7181 DAC960_gam_init();
7182#endif
7183 return ret;
7184}
7185
7186static void DAC960_cleanup_module(void)
7187{
7188 int i;
7189
7190#ifdef DAC960_GAM_MINOR
7191 DAC960_gam_cleanup();
7192#endif
7193
7194 for (i = 0; i < DAC960_ControllerCount; i++) {
7195 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7196 if (Controller == NULL)
7197 continue;
7198 DAC960_FinalizeController(Controller);
7199 }
7200 if (DAC960_ProcDirectoryEntry != NULL) {
7201 remove_proc_entry("rd/status", NULL);
7202 remove_proc_entry("rd", NULL);
7203 }
7204 DAC960_ControllerCount = 0;
7205 pci_unregister_driver(&DAC960_pci_driver);
7206}
7207
7208module_init(DAC960_init_module);
7209module_exit(DAC960_cleanup_module);
7210
7211MODULE_LICENSE("GPL");
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