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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
1da177e4 LT |
35 | #include <linux/kernel.h> |
36 | #include <linux/module.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/list.h> | |
40 | #include <linux/mm.h> | |
41 | #include <linux/highmem.h> | |
42 | #include <linux/spinlock.h> | |
43 | #include <linux/blkdev.h> | |
44 | #include <linux/delay.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/completion.h> | |
48 | #include <linux/suspend.h> | |
49 | #include <linux/workqueue.h> | |
67846b30 | 50 | #include <linux/jiffies.h> |
378f058c | 51 | #include <linux/scatterlist.h> |
1da177e4 | 52 | #include <scsi/scsi.h> |
193515d5 | 53 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
54 | #include <scsi/scsi_host.h> |
55 | #include <linux/libata.h> | |
56 | #include <asm/io.h> | |
57 | #include <asm/semaphore.h> | |
58 | #include <asm/byteorder.h> | |
59 | ||
60 | #include "libata.h" | |
61 | ||
d7bb4cc7 | 62 | /* debounce timing parameters in msecs { interval, duration, timeout } */ |
e9c83914 TH |
63 | const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; |
64 | const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; | |
65 | const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; | |
d7bb4cc7 | 66 | |
3373efd8 TH |
67 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
68 | u16 heads, u16 sectors); | |
69 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
70 | static void ata_dev_xfermask(struct ata_device *dev); | |
1da177e4 LT |
71 | |
72 | static unsigned int ata_unique_id = 1; | |
73 | static struct workqueue_struct *ata_wq; | |
74 | ||
453b07ac TH |
75 | struct workqueue_struct *ata_aux_wq; |
76 | ||
418dc1f5 | 77 | int atapi_enabled = 1; |
1623c81e JG |
78 | module_param(atapi_enabled, int, 0444); |
79 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
80 | ||
95de719a AL |
81 | int atapi_dmadir = 0; |
82 | module_param(atapi_dmadir, int, 0444); | |
83 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
84 | ||
c3c013a2 JG |
85 | int libata_fua = 0; |
86 | module_param_named(fua, libata_fua, int, 0444); | |
87 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
88 | ||
a8601e5f AM |
89 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; |
90 | module_param(ata_probe_timeout, int, 0444); | |
91 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | |
92 | ||
1da177e4 LT |
93 | MODULE_AUTHOR("Jeff Garzik"); |
94 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
95 | MODULE_LICENSE("GPL"); | |
96 | MODULE_VERSION(DRV_VERSION); | |
97 | ||
0baab86b | 98 | |
1da177e4 LT |
99 | /** |
100 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
101 | * @tf: Taskfile to convert | |
102 | * @fis: Buffer into which data will output | |
103 | * @pmp: Port multiplier port | |
104 | * | |
105 | * Converts a standard ATA taskfile to a Serial ATA | |
106 | * FIS structure (Register - Host to Device). | |
107 | * | |
108 | * LOCKING: | |
109 | * Inherited from caller. | |
110 | */ | |
111 | ||
057ace5e | 112 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
113 | { |
114 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
115 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
116 | bit 7 indicates Command FIS */ | |
117 | fis[2] = tf->command; | |
118 | fis[3] = tf->feature; | |
119 | ||
120 | fis[4] = tf->lbal; | |
121 | fis[5] = tf->lbam; | |
122 | fis[6] = tf->lbah; | |
123 | fis[7] = tf->device; | |
124 | ||
125 | fis[8] = tf->hob_lbal; | |
126 | fis[9] = tf->hob_lbam; | |
127 | fis[10] = tf->hob_lbah; | |
128 | fis[11] = tf->hob_feature; | |
129 | ||
130 | fis[12] = tf->nsect; | |
131 | fis[13] = tf->hob_nsect; | |
132 | fis[14] = 0; | |
133 | fis[15] = tf->ctl; | |
134 | ||
135 | fis[16] = 0; | |
136 | fis[17] = 0; | |
137 | fis[18] = 0; | |
138 | fis[19] = 0; | |
139 | } | |
140 | ||
141 | /** | |
142 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
143 | * @fis: Buffer from which data will be input | |
144 | * @tf: Taskfile to output | |
145 | * | |
e12a1be6 | 146 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
147 | * |
148 | * LOCKING: | |
149 | * Inherited from caller. | |
150 | */ | |
151 | ||
057ace5e | 152 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
153 | { |
154 | tf->command = fis[2]; /* status */ | |
155 | tf->feature = fis[3]; /* error */ | |
156 | ||
157 | tf->lbal = fis[4]; | |
158 | tf->lbam = fis[5]; | |
159 | tf->lbah = fis[6]; | |
160 | tf->device = fis[7]; | |
161 | ||
162 | tf->hob_lbal = fis[8]; | |
163 | tf->hob_lbam = fis[9]; | |
164 | tf->hob_lbah = fis[10]; | |
165 | ||
166 | tf->nsect = fis[12]; | |
167 | tf->hob_nsect = fis[13]; | |
168 | } | |
169 | ||
8cbd6df1 AL |
170 | static const u8 ata_rw_cmds[] = { |
171 | /* pio multi */ | |
172 | ATA_CMD_READ_MULTI, | |
173 | ATA_CMD_WRITE_MULTI, | |
174 | ATA_CMD_READ_MULTI_EXT, | |
175 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
176 | 0, |
177 | 0, | |
178 | 0, | |
179 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
180 | /* pio */ |
181 | ATA_CMD_PIO_READ, | |
182 | ATA_CMD_PIO_WRITE, | |
183 | ATA_CMD_PIO_READ_EXT, | |
184 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
185 | 0, |
186 | 0, | |
187 | 0, | |
188 | 0, | |
8cbd6df1 AL |
189 | /* dma */ |
190 | ATA_CMD_READ, | |
191 | ATA_CMD_WRITE, | |
192 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
193 | ATA_CMD_WRITE_EXT, |
194 | 0, | |
195 | 0, | |
196 | 0, | |
197 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 198 | }; |
1da177e4 LT |
199 | |
200 | /** | |
8cbd6df1 | 201 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
bd056d7e TH |
202 | * @tf: command to examine and configure |
203 | * @dev: device tf belongs to | |
1da177e4 | 204 | * |
2e9edbf8 | 205 | * Examine the device configuration and tf->flags to calculate |
8cbd6df1 | 206 | * the proper read/write commands and protocol to use. |
1da177e4 LT |
207 | * |
208 | * LOCKING: | |
209 | * caller. | |
210 | */ | |
bd056d7e | 211 | static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) |
1da177e4 | 212 | { |
9a3dccc4 | 213 | u8 cmd; |
1da177e4 | 214 | |
9a3dccc4 | 215 | int index, fua, lba48, write; |
2e9edbf8 | 216 | |
9a3dccc4 | 217 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
218 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
219 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 220 | |
8cbd6df1 AL |
221 | if (dev->flags & ATA_DFLAG_PIO) { |
222 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 223 | index = dev->multi_count ? 0 : 8; |
bd056d7e | 224 | } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) { |
8d238e01 AC |
225 | /* Unable to use DMA due to host limitation */ |
226 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 227 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
228 | } else { |
229 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 230 | index = 16; |
8cbd6df1 | 231 | } |
1da177e4 | 232 | |
9a3dccc4 TH |
233 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
234 | if (cmd) { | |
235 | tf->command = cmd; | |
236 | return 0; | |
237 | } | |
238 | return -1; | |
1da177e4 LT |
239 | } |
240 | ||
35b649fe TH |
241 | /** |
242 | * ata_tf_read_block - Read block address from ATA taskfile | |
243 | * @tf: ATA taskfile of interest | |
244 | * @dev: ATA device @tf belongs to | |
245 | * | |
246 | * LOCKING: | |
247 | * None. | |
248 | * | |
249 | * Read block address from @tf. This function can handle all | |
250 | * three address formats - LBA, LBA48 and CHS. tf->protocol and | |
251 | * flags select the address format to use. | |
252 | * | |
253 | * RETURNS: | |
254 | * Block address read from @tf. | |
255 | */ | |
256 | u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) | |
257 | { | |
258 | u64 block = 0; | |
259 | ||
260 | if (tf->flags & ATA_TFLAG_LBA) { | |
261 | if (tf->flags & ATA_TFLAG_LBA48) { | |
262 | block |= (u64)tf->hob_lbah << 40; | |
263 | block |= (u64)tf->hob_lbam << 32; | |
264 | block |= tf->hob_lbal << 24; | |
265 | } else | |
266 | block |= (tf->device & 0xf) << 24; | |
267 | ||
268 | block |= tf->lbah << 16; | |
269 | block |= tf->lbam << 8; | |
270 | block |= tf->lbal; | |
271 | } else { | |
272 | u32 cyl, head, sect; | |
273 | ||
274 | cyl = tf->lbam | (tf->lbah << 8); | |
275 | head = tf->device & 0xf; | |
276 | sect = tf->lbal; | |
277 | ||
278 | block = (cyl * dev->heads + head) * dev->sectors + sect; | |
279 | } | |
280 | ||
281 | return block; | |
282 | } | |
283 | ||
bd056d7e TH |
284 | /** |
285 | * ata_build_rw_tf - Build ATA taskfile for given read/write request | |
286 | * @tf: Target ATA taskfile | |
287 | * @dev: ATA device @tf belongs to | |
288 | * @block: Block address | |
289 | * @n_block: Number of blocks | |
290 | * @tf_flags: RW/FUA etc... | |
291 | * @tag: tag | |
292 | * | |
293 | * LOCKING: | |
294 | * None. | |
295 | * | |
296 | * Build ATA taskfile @tf for read/write request described by | |
297 | * @block, @n_block, @tf_flags and @tag on @dev. | |
298 | * | |
299 | * RETURNS: | |
300 | * | |
301 | * 0 on success, -ERANGE if the request is too large for @dev, | |
302 | * -EINVAL if the request is invalid. | |
303 | */ | |
304 | int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, | |
305 | u64 block, u32 n_block, unsigned int tf_flags, | |
306 | unsigned int tag) | |
307 | { | |
308 | tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
309 | tf->flags |= tf_flags; | |
310 | ||
311 | if ((dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF | | |
70e6ad0c TH |
312 | ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ && |
313 | likely(tag != ATA_TAG_INTERNAL)) { | |
bd056d7e TH |
314 | /* yay, NCQ */ |
315 | if (!lba_48_ok(block, n_block)) | |
316 | return -ERANGE; | |
317 | ||
318 | tf->protocol = ATA_PROT_NCQ; | |
319 | tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; | |
320 | ||
321 | if (tf->flags & ATA_TFLAG_WRITE) | |
322 | tf->command = ATA_CMD_FPDMA_WRITE; | |
323 | else | |
324 | tf->command = ATA_CMD_FPDMA_READ; | |
325 | ||
326 | tf->nsect = tag << 3; | |
327 | tf->hob_feature = (n_block >> 8) & 0xff; | |
328 | tf->feature = n_block & 0xff; | |
329 | ||
330 | tf->hob_lbah = (block >> 40) & 0xff; | |
331 | tf->hob_lbam = (block >> 32) & 0xff; | |
332 | tf->hob_lbal = (block >> 24) & 0xff; | |
333 | tf->lbah = (block >> 16) & 0xff; | |
334 | tf->lbam = (block >> 8) & 0xff; | |
335 | tf->lbal = block & 0xff; | |
336 | ||
337 | tf->device = 1 << 6; | |
338 | if (tf->flags & ATA_TFLAG_FUA) | |
339 | tf->device |= 1 << 7; | |
340 | } else if (dev->flags & ATA_DFLAG_LBA) { | |
341 | tf->flags |= ATA_TFLAG_LBA; | |
342 | ||
343 | if (lba_28_ok(block, n_block)) { | |
344 | /* use LBA28 */ | |
345 | tf->device |= (block >> 24) & 0xf; | |
346 | } else if (lba_48_ok(block, n_block)) { | |
347 | if (!(dev->flags & ATA_DFLAG_LBA48)) | |
348 | return -ERANGE; | |
349 | ||
350 | /* use LBA48 */ | |
351 | tf->flags |= ATA_TFLAG_LBA48; | |
352 | ||
353 | tf->hob_nsect = (n_block >> 8) & 0xff; | |
354 | ||
355 | tf->hob_lbah = (block >> 40) & 0xff; | |
356 | tf->hob_lbam = (block >> 32) & 0xff; | |
357 | tf->hob_lbal = (block >> 24) & 0xff; | |
358 | } else | |
359 | /* request too large even for LBA48 */ | |
360 | return -ERANGE; | |
361 | ||
362 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
363 | return -EINVAL; | |
364 | ||
365 | tf->nsect = n_block & 0xff; | |
366 | ||
367 | tf->lbah = (block >> 16) & 0xff; | |
368 | tf->lbam = (block >> 8) & 0xff; | |
369 | tf->lbal = block & 0xff; | |
370 | ||
371 | tf->device |= ATA_LBA; | |
372 | } else { | |
373 | /* CHS */ | |
374 | u32 sect, head, cyl, track; | |
375 | ||
376 | /* The request -may- be too large for CHS addressing. */ | |
377 | if (!lba_28_ok(block, n_block)) | |
378 | return -ERANGE; | |
379 | ||
380 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
381 | return -EINVAL; | |
382 | ||
383 | /* Convert LBA to CHS */ | |
384 | track = (u32)block / dev->sectors; | |
385 | cyl = track / dev->heads; | |
386 | head = track % dev->heads; | |
387 | sect = (u32)block % dev->sectors + 1; | |
388 | ||
389 | DPRINTK("block %u track %u cyl %u head %u sect %u\n", | |
390 | (u32)block, track, cyl, head, sect); | |
391 | ||
392 | /* Check whether the converted CHS can fit. | |
393 | Cylinder: 0-65535 | |
394 | Head: 0-15 | |
395 | Sector: 1-255*/ | |
396 | if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) | |
397 | return -ERANGE; | |
398 | ||
399 | tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ | |
400 | tf->lbal = sect; | |
401 | tf->lbam = cyl; | |
402 | tf->lbah = cyl >> 8; | |
403 | tf->device |= head; | |
404 | } | |
405 | ||
406 | return 0; | |
407 | } | |
408 | ||
cb95d562 TH |
409 | /** |
410 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
411 | * @pio_mask: pio_mask | |
412 | * @mwdma_mask: mwdma_mask | |
413 | * @udma_mask: udma_mask | |
414 | * | |
415 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
416 | * unsigned int xfer_mask. | |
417 | * | |
418 | * LOCKING: | |
419 | * None. | |
420 | * | |
421 | * RETURNS: | |
422 | * Packed xfer_mask. | |
423 | */ | |
424 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
425 | unsigned int mwdma_mask, | |
426 | unsigned int udma_mask) | |
427 | { | |
428 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
429 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
430 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
431 | } | |
432 | ||
c0489e4e TH |
433 | /** |
434 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
435 | * @xfer_mask: xfer_mask to unpack | |
436 | * @pio_mask: resulting pio_mask | |
437 | * @mwdma_mask: resulting mwdma_mask | |
438 | * @udma_mask: resulting udma_mask | |
439 | * | |
440 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
441 | * Any NULL distination masks will be ignored. | |
442 | */ | |
443 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
444 | unsigned int *pio_mask, | |
445 | unsigned int *mwdma_mask, | |
446 | unsigned int *udma_mask) | |
447 | { | |
448 | if (pio_mask) | |
449 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
450 | if (mwdma_mask) | |
451 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
452 | if (udma_mask) | |
453 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
454 | } | |
455 | ||
cb95d562 | 456 | static const struct ata_xfer_ent { |
be9a50c8 | 457 | int shift, bits; |
cb95d562 TH |
458 | u8 base; |
459 | } ata_xfer_tbl[] = { | |
460 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
461 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
462 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
463 | { -1, }, | |
464 | }; | |
465 | ||
466 | /** | |
467 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
468 | * @xfer_mask: xfer_mask of interest | |
469 | * | |
470 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
471 | * bit of @xfer_mask is considered. | |
472 | * | |
473 | * LOCKING: | |
474 | * None. | |
475 | * | |
476 | * RETURNS: | |
477 | * Matching XFER_* value, 0 if no match found. | |
478 | */ | |
479 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
480 | { | |
481 | int highbit = fls(xfer_mask) - 1; | |
482 | const struct ata_xfer_ent *ent; | |
483 | ||
484 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
485 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
486 | return ent->base + highbit - ent->shift; | |
487 | return 0; | |
488 | } | |
489 | ||
490 | /** | |
491 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
492 | * @xfer_mode: XFER_* of interest | |
493 | * | |
494 | * Return matching xfer_mask for @xfer_mode. | |
495 | * | |
496 | * LOCKING: | |
497 | * None. | |
498 | * | |
499 | * RETURNS: | |
500 | * Matching xfer_mask, 0 if no match found. | |
501 | */ | |
502 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
503 | { | |
504 | const struct ata_xfer_ent *ent; | |
505 | ||
506 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
507 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
508 | return 1 << (ent->shift + xfer_mode - ent->base); | |
509 | return 0; | |
510 | } | |
511 | ||
512 | /** | |
513 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
514 | * @xfer_mode: XFER_* of interest | |
515 | * | |
516 | * Return matching xfer_shift for @xfer_mode. | |
517 | * | |
518 | * LOCKING: | |
519 | * None. | |
520 | * | |
521 | * RETURNS: | |
522 | * Matching xfer_shift, -1 if no match found. | |
523 | */ | |
524 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
525 | { | |
526 | const struct ata_xfer_ent *ent; | |
527 | ||
528 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
529 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
530 | return ent->shift; | |
531 | return -1; | |
532 | } | |
533 | ||
1da177e4 | 534 | /** |
1da7b0d0 TH |
535 | * ata_mode_string - convert xfer_mask to string |
536 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
537 | * |
538 | * Determine string which represents the highest speed | |
1da7b0d0 | 539 | * (highest bit in @modemask). |
1da177e4 LT |
540 | * |
541 | * LOCKING: | |
542 | * None. | |
543 | * | |
544 | * RETURNS: | |
545 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 546 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 | 547 | */ |
1da7b0d0 | 548 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 549 | { |
75f554bc TH |
550 | static const char * const xfer_mode_str[] = { |
551 | "PIO0", | |
552 | "PIO1", | |
553 | "PIO2", | |
554 | "PIO3", | |
555 | "PIO4", | |
b352e57d AC |
556 | "PIO5", |
557 | "PIO6", | |
75f554bc TH |
558 | "MWDMA0", |
559 | "MWDMA1", | |
560 | "MWDMA2", | |
b352e57d AC |
561 | "MWDMA3", |
562 | "MWDMA4", | |
75f554bc TH |
563 | "UDMA/16", |
564 | "UDMA/25", | |
565 | "UDMA/33", | |
566 | "UDMA/44", | |
567 | "UDMA/66", | |
568 | "UDMA/100", | |
569 | "UDMA/133", | |
570 | "UDMA7", | |
571 | }; | |
1da7b0d0 | 572 | int highbit; |
1da177e4 | 573 | |
1da7b0d0 TH |
574 | highbit = fls(xfer_mask) - 1; |
575 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
576 | return xfer_mode_str[highbit]; | |
1da177e4 | 577 | return "<n/a>"; |
1da177e4 LT |
578 | } |
579 | ||
4c360c81 TH |
580 | static const char *sata_spd_string(unsigned int spd) |
581 | { | |
582 | static const char * const spd_str[] = { | |
583 | "1.5 Gbps", | |
584 | "3.0 Gbps", | |
585 | }; | |
586 | ||
587 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
588 | return "<unknown>"; | |
589 | return spd_str[spd - 1]; | |
590 | } | |
591 | ||
3373efd8 | 592 | void ata_dev_disable(struct ata_device *dev) |
0b8efb0a | 593 | { |
0dd4b21f | 594 | if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) { |
f15a1daf | 595 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); |
0b8efb0a TH |
596 | dev->class++; |
597 | } | |
598 | } | |
599 | ||
1da177e4 LT |
600 | /** |
601 | * ata_pio_devchk - PATA device presence detection | |
602 | * @ap: ATA channel to examine | |
603 | * @device: Device to examine (starting at zero) | |
604 | * | |
605 | * This technique was originally described in | |
606 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
607 | * later found its way into the ATA/ATAPI spec. | |
608 | * | |
609 | * Write a pattern to the ATA shadow registers, | |
610 | * and if a device is present, it will respond by | |
611 | * correctly storing and echoing back the | |
612 | * ATA shadow register contents. | |
613 | * | |
614 | * LOCKING: | |
615 | * caller. | |
616 | */ | |
617 | ||
618 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
619 | unsigned int device) | |
620 | { | |
621 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
622 | u8 nsect, lbal; | |
623 | ||
624 | ap->ops->dev_select(ap, device); | |
625 | ||
626 | outb(0x55, ioaddr->nsect_addr); | |
627 | outb(0xaa, ioaddr->lbal_addr); | |
628 | ||
629 | outb(0xaa, ioaddr->nsect_addr); | |
630 | outb(0x55, ioaddr->lbal_addr); | |
631 | ||
632 | outb(0x55, ioaddr->nsect_addr); | |
633 | outb(0xaa, ioaddr->lbal_addr); | |
634 | ||
635 | nsect = inb(ioaddr->nsect_addr); | |
636 | lbal = inb(ioaddr->lbal_addr); | |
637 | ||
638 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
639 | return 1; /* we found a device */ | |
640 | ||
641 | return 0; /* nothing found */ | |
642 | } | |
643 | ||
644 | /** | |
645 | * ata_mmio_devchk - PATA device presence detection | |
646 | * @ap: ATA channel to examine | |
647 | * @device: Device to examine (starting at zero) | |
648 | * | |
649 | * This technique was originally described in | |
650 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
651 | * later found its way into the ATA/ATAPI spec. | |
652 | * | |
653 | * Write a pattern to the ATA shadow registers, | |
654 | * and if a device is present, it will respond by | |
655 | * correctly storing and echoing back the | |
656 | * ATA shadow register contents. | |
657 | * | |
658 | * LOCKING: | |
659 | * caller. | |
660 | */ | |
661 | ||
662 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
663 | unsigned int device) | |
664 | { | |
665 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
666 | u8 nsect, lbal; | |
667 | ||
668 | ap->ops->dev_select(ap, device); | |
669 | ||
670 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
671 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
672 | ||
673 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
674 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
675 | ||
676 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
677 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
678 | ||
679 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
680 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
681 | ||
682 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
683 | return 1; /* we found a device */ | |
684 | ||
685 | return 0; /* nothing found */ | |
686 | } | |
687 | ||
688 | /** | |
689 | * ata_devchk - PATA device presence detection | |
690 | * @ap: ATA channel to examine | |
691 | * @device: Device to examine (starting at zero) | |
692 | * | |
693 | * Dispatch ATA device presence detection, depending | |
694 | * on whether we are using PIO or MMIO to talk to the | |
695 | * ATA shadow registers. | |
696 | * | |
697 | * LOCKING: | |
698 | * caller. | |
699 | */ | |
700 | ||
701 | static unsigned int ata_devchk(struct ata_port *ap, | |
702 | unsigned int device) | |
703 | { | |
704 | if (ap->flags & ATA_FLAG_MMIO) | |
705 | return ata_mmio_devchk(ap, device); | |
706 | return ata_pio_devchk(ap, device); | |
707 | } | |
708 | ||
709 | /** | |
710 | * ata_dev_classify - determine device type based on ATA-spec signature | |
711 | * @tf: ATA taskfile register set for device to be identified | |
712 | * | |
713 | * Determine from taskfile register contents whether a device is | |
714 | * ATA or ATAPI, as per "Signature and persistence" section | |
715 | * of ATA/PI spec (volume 1, sect 5.14). | |
716 | * | |
717 | * LOCKING: | |
718 | * None. | |
719 | * | |
720 | * RETURNS: | |
721 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
722 | * the event of failure. | |
723 | */ | |
724 | ||
057ace5e | 725 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
726 | { |
727 | /* Apple's open source Darwin code hints that some devices only | |
728 | * put a proper signature into the LBA mid/high registers, | |
729 | * So, we only check those. It's sufficient for uniqueness. | |
730 | */ | |
731 | ||
732 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
733 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
734 | DPRINTK("found ATA device by sig\n"); | |
735 | return ATA_DEV_ATA; | |
736 | } | |
737 | ||
738 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
739 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
740 | DPRINTK("found ATAPI device by sig\n"); | |
741 | return ATA_DEV_ATAPI; | |
742 | } | |
743 | ||
744 | DPRINTK("unknown device\n"); | |
745 | return ATA_DEV_UNKNOWN; | |
746 | } | |
747 | ||
748 | /** | |
749 | * ata_dev_try_classify - Parse returned ATA device signature | |
750 | * @ap: ATA channel to examine | |
751 | * @device: Device to examine (starting at zero) | |
b4dc7623 | 752 | * @r_err: Value of error register on completion |
1da177e4 LT |
753 | * |
754 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
755 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
756 | * shadow registers, indicating the results of device detection | |
757 | * and diagnostics. | |
758 | * | |
759 | * Select the ATA device, and read the values from the ATA shadow | |
760 | * registers. Then parse according to the Error register value, | |
761 | * and the spec-defined values examined by ata_dev_classify(). | |
762 | * | |
763 | * LOCKING: | |
764 | * caller. | |
b4dc7623 TH |
765 | * |
766 | * RETURNS: | |
767 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 LT |
768 | */ |
769 | ||
b4dc7623 TH |
770 | static unsigned int |
771 | ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) | |
1da177e4 | 772 | { |
1da177e4 LT |
773 | struct ata_taskfile tf; |
774 | unsigned int class; | |
775 | u8 err; | |
776 | ||
777 | ap->ops->dev_select(ap, device); | |
778 | ||
779 | memset(&tf, 0, sizeof(tf)); | |
780 | ||
1da177e4 | 781 | ap->ops->tf_read(ap, &tf); |
0169e284 | 782 | err = tf.feature; |
b4dc7623 TH |
783 | if (r_err) |
784 | *r_err = err; | |
1da177e4 | 785 | |
93590859 AC |
786 | /* see if device passed diags: if master then continue and warn later */ |
787 | if (err == 0 && device == 0) | |
788 | /* diagnostic fail : do nothing _YET_ */ | |
789 | ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC; | |
790 | else if (err == 1) | |
1da177e4 LT |
791 | /* do nothing */ ; |
792 | else if ((device == 0) && (err == 0x81)) | |
793 | /* do nothing */ ; | |
794 | else | |
b4dc7623 | 795 | return ATA_DEV_NONE; |
1da177e4 | 796 | |
b4dc7623 | 797 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 798 | class = ata_dev_classify(&tf); |
b4dc7623 | 799 | |
1da177e4 | 800 | if (class == ATA_DEV_UNKNOWN) |
b4dc7623 | 801 | return ATA_DEV_NONE; |
1da177e4 | 802 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) |
b4dc7623 TH |
803 | return ATA_DEV_NONE; |
804 | return class; | |
1da177e4 LT |
805 | } |
806 | ||
807 | /** | |
6a62a04d | 808 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
809 | * @id: IDENTIFY DEVICE results we will examine |
810 | * @s: string into which data is output | |
811 | * @ofs: offset into identify device page | |
812 | * @len: length of string to return. must be an even number. | |
813 | * | |
814 | * The strings in the IDENTIFY DEVICE page are broken up into | |
815 | * 16-bit chunks. Run through the string, and output each | |
816 | * 8-bit chunk linearly, regardless of platform. | |
817 | * | |
818 | * LOCKING: | |
819 | * caller. | |
820 | */ | |
821 | ||
6a62a04d TH |
822 | void ata_id_string(const u16 *id, unsigned char *s, |
823 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
824 | { |
825 | unsigned int c; | |
826 | ||
827 | while (len > 0) { | |
828 | c = id[ofs] >> 8; | |
829 | *s = c; | |
830 | s++; | |
831 | ||
832 | c = id[ofs] & 0xff; | |
833 | *s = c; | |
834 | s++; | |
835 | ||
836 | ofs++; | |
837 | len -= 2; | |
838 | } | |
839 | } | |
840 | ||
0e949ff3 | 841 | /** |
6a62a04d | 842 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
843 | * @id: IDENTIFY DEVICE results we will examine |
844 | * @s: string into which data is output | |
845 | * @ofs: offset into identify device page | |
846 | * @len: length of string to return. must be an odd number. | |
847 | * | |
6a62a04d | 848 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
849 | * trims trailing spaces and terminates the resulting string with |
850 | * null. @len must be actual maximum length (even number) + 1. | |
851 | * | |
852 | * LOCKING: | |
853 | * caller. | |
854 | */ | |
6a62a04d TH |
855 | void ata_id_c_string(const u16 *id, unsigned char *s, |
856 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
857 | { |
858 | unsigned char *p; | |
859 | ||
860 | WARN_ON(!(len & 1)); | |
861 | ||
6a62a04d | 862 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
863 | |
864 | p = s + strnlen(s, len - 1); | |
865 | while (p > s && p[-1] == ' ') | |
866 | p--; | |
867 | *p = '\0'; | |
868 | } | |
0baab86b | 869 | |
2940740b TH |
870 | static u64 ata_id_n_sectors(const u16 *id) |
871 | { | |
872 | if (ata_id_has_lba(id)) { | |
873 | if (ata_id_has_lba48(id)) | |
874 | return ata_id_u64(id, 100); | |
875 | else | |
876 | return ata_id_u32(id, 60); | |
877 | } else { | |
878 | if (ata_id_current_chs_valid(id)) | |
879 | return ata_id_u32(id, 57); | |
880 | else | |
881 | return id[1] * id[3] * id[6]; | |
882 | } | |
883 | } | |
884 | ||
0baab86b EF |
885 | /** |
886 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
887 | * @ap: ATA channel to manipulate | |
888 | * @device: ATA device (numbered from zero) to select | |
889 | * | |
890 | * This function performs no actual function. | |
891 | * | |
892 | * May be used as the dev_select() entry in ata_port_operations. | |
893 | * | |
894 | * LOCKING: | |
895 | * caller. | |
896 | */ | |
1da177e4 LT |
897 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
898 | { | |
899 | } | |
900 | ||
0baab86b | 901 | |
1da177e4 LT |
902 | /** |
903 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
904 | * @ap: ATA channel to manipulate | |
905 | * @device: ATA device (numbered from zero) to select | |
906 | * | |
907 | * Use the method defined in the ATA specification to | |
908 | * make either device 0, or device 1, active on the | |
0baab86b EF |
909 | * ATA channel. Works with both PIO and MMIO. |
910 | * | |
911 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
912 | * |
913 | * LOCKING: | |
914 | * caller. | |
915 | */ | |
916 | ||
917 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
918 | { | |
919 | u8 tmp; | |
920 | ||
921 | if (device == 0) | |
922 | tmp = ATA_DEVICE_OBS; | |
923 | else | |
924 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
925 | ||
926 | if (ap->flags & ATA_FLAG_MMIO) { | |
927 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
928 | } else { | |
929 | outb(tmp, ap->ioaddr.device_addr); | |
930 | } | |
931 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
932 | } | |
933 | ||
934 | /** | |
935 | * ata_dev_select - Select device 0/1 on ATA bus | |
936 | * @ap: ATA channel to manipulate | |
937 | * @device: ATA device (numbered from zero) to select | |
938 | * @wait: non-zero to wait for Status register BSY bit to clear | |
939 | * @can_sleep: non-zero if context allows sleeping | |
940 | * | |
941 | * Use the method defined in the ATA specification to | |
942 | * make either device 0, or device 1, active on the | |
943 | * ATA channel. | |
944 | * | |
945 | * This is a high-level version of ata_std_dev_select(), | |
946 | * which additionally provides the services of inserting | |
947 | * the proper pauses and status polling, where needed. | |
948 | * | |
949 | * LOCKING: | |
950 | * caller. | |
951 | */ | |
952 | ||
953 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
954 | unsigned int wait, unsigned int can_sleep) | |
955 | { | |
88574551 | 956 | if (ata_msg_probe(ap)) |
0dd4b21f | 957 | ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: " |
88574551 | 958 | "device %u, wait %u\n", ap->id, device, wait); |
1da177e4 LT |
959 | |
960 | if (wait) | |
961 | ata_wait_idle(ap); | |
962 | ||
963 | ap->ops->dev_select(ap, device); | |
964 | ||
965 | if (wait) { | |
966 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
967 | msleep(150); | |
968 | ata_wait_idle(ap); | |
969 | } | |
970 | } | |
971 | ||
972 | /** | |
973 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 974 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 975 | * |
0bd3300a TH |
976 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
977 | * page. | |
1da177e4 LT |
978 | * |
979 | * LOCKING: | |
980 | * caller. | |
981 | */ | |
982 | ||
0bd3300a | 983 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
984 | { |
985 | DPRINTK("49==0x%04x " | |
986 | "53==0x%04x " | |
987 | "63==0x%04x " | |
988 | "64==0x%04x " | |
989 | "75==0x%04x \n", | |
0bd3300a TH |
990 | id[49], |
991 | id[53], | |
992 | id[63], | |
993 | id[64], | |
994 | id[75]); | |
1da177e4 LT |
995 | DPRINTK("80==0x%04x " |
996 | "81==0x%04x " | |
997 | "82==0x%04x " | |
998 | "83==0x%04x " | |
999 | "84==0x%04x \n", | |
0bd3300a TH |
1000 | id[80], |
1001 | id[81], | |
1002 | id[82], | |
1003 | id[83], | |
1004 | id[84]); | |
1da177e4 LT |
1005 | DPRINTK("88==0x%04x " |
1006 | "93==0x%04x\n", | |
0bd3300a TH |
1007 | id[88], |
1008 | id[93]); | |
1da177e4 LT |
1009 | } |
1010 | ||
cb95d562 TH |
1011 | /** |
1012 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
1013 | * @id: IDENTIFY data to compute xfer mask from | |
1014 | * | |
1015 | * Compute the xfermask for this device. This is not as trivial | |
1016 | * as it seems if we must consider early devices correctly. | |
1017 | * | |
1018 | * FIXME: pre IDE drive timing (do we care ?). | |
1019 | * | |
1020 | * LOCKING: | |
1021 | * None. | |
1022 | * | |
1023 | * RETURNS: | |
1024 | * Computed xfermask | |
1025 | */ | |
1026 | static unsigned int ata_id_xfermask(const u16 *id) | |
1027 | { | |
1028 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
1029 | ||
1030 | /* Usual case. Word 53 indicates word 64 is valid */ | |
1031 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
1032 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
1033 | pio_mask <<= 3; | |
1034 | pio_mask |= 0x7; | |
1035 | } else { | |
1036 | /* If word 64 isn't valid then Word 51 high byte holds | |
1037 | * the PIO timing number for the maximum. Turn it into | |
1038 | * a mask. | |
1039 | */ | |
7a0f1c8a | 1040 | u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; |
46767aeb AC |
1041 | if (mode < 5) /* Valid PIO range */ |
1042 | pio_mask = (2 << mode) - 1; | |
1043 | else | |
1044 | pio_mask = 1; | |
cb95d562 TH |
1045 | |
1046 | /* But wait.. there's more. Design your standards by | |
1047 | * committee and you too can get a free iordy field to | |
1048 | * process. However its the speeds not the modes that | |
1049 | * are supported... Note drivers using the timing API | |
1050 | * will get this right anyway | |
1051 | */ | |
1052 | } | |
1053 | ||
1054 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
fb21f0d0 | 1055 | |
b352e57d AC |
1056 | if (ata_id_is_cfa(id)) { |
1057 | /* | |
1058 | * Process compact flash extended modes | |
1059 | */ | |
1060 | int pio = id[163] & 0x7; | |
1061 | int dma = (id[163] >> 3) & 7; | |
1062 | ||
1063 | if (pio) | |
1064 | pio_mask |= (1 << 5); | |
1065 | if (pio > 1) | |
1066 | pio_mask |= (1 << 6); | |
1067 | if (dma) | |
1068 | mwdma_mask |= (1 << 3); | |
1069 | if (dma > 1) | |
1070 | mwdma_mask |= (1 << 4); | |
1071 | } | |
1072 | ||
fb21f0d0 TH |
1073 | udma_mask = 0; |
1074 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
1075 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
cb95d562 TH |
1076 | |
1077 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
1078 | } | |
1079 | ||
86e45b6b TH |
1080 | /** |
1081 | * ata_port_queue_task - Queue port_task | |
1082 | * @ap: The ata_port to queue port_task for | |
e2a7f77a | 1083 | * @fn: workqueue function to be scheduled |
65f27f38 | 1084 | * @data: data for @fn to use |
e2a7f77a | 1085 | * @delay: delay time for workqueue function |
86e45b6b TH |
1086 | * |
1087 | * Schedule @fn(@data) for execution after @delay jiffies using | |
1088 | * port_task. There is one port_task per port and it's the | |
1089 | * user(low level driver)'s responsibility to make sure that only | |
1090 | * one task is active at any given time. | |
1091 | * | |
1092 | * libata core layer takes care of synchronization between | |
1093 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
1094 | * synchronization. | |
1095 | * | |
1096 | * LOCKING: | |
1097 | * Inherited from caller. | |
1098 | */ | |
65f27f38 | 1099 | void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, |
86e45b6b TH |
1100 | unsigned long delay) |
1101 | { | |
1102 | int rc; | |
1103 | ||
b51e9e5d | 1104 | if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK) |
86e45b6b TH |
1105 | return; |
1106 | ||
65f27f38 DH |
1107 | PREPARE_DELAYED_WORK(&ap->port_task, fn); |
1108 | ap->port_task_data = data; | |
86e45b6b | 1109 | |
52bad64d | 1110 | rc = queue_delayed_work(ata_wq, &ap->port_task, delay); |
86e45b6b TH |
1111 | |
1112 | /* rc == 0 means that another user is using port task */ | |
1113 | WARN_ON(rc == 0); | |
1114 | } | |
1115 | ||
1116 | /** | |
1117 | * ata_port_flush_task - Flush port_task | |
1118 | * @ap: The ata_port to flush port_task for | |
1119 | * | |
1120 | * After this function completes, port_task is guranteed not to | |
1121 | * be running or scheduled. | |
1122 | * | |
1123 | * LOCKING: | |
1124 | * Kernel thread context (may sleep) | |
1125 | */ | |
1126 | void ata_port_flush_task(struct ata_port *ap) | |
1127 | { | |
1128 | unsigned long flags; | |
1129 | ||
1130 | DPRINTK("ENTER\n"); | |
1131 | ||
ba6a1308 | 1132 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 1133 | ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK; |
ba6a1308 | 1134 | spin_unlock_irqrestore(ap->lock, flags); |
86e45b6b TH |
1135 | |
1136 | DPRINTK("flush #1\n"); | |
1137 | flush_workqueue(ata_wq); | |
1138 | ||
1139 | /* | |
1140 | * At this point, if a task is running, it's guaranteed to see | |
1141 | * the FLUSH flag; thus, it will never queue pio tasks again. | |
1142 | * Cancel and flush. | |
1143 | */ | |
1144 | if (!cancel_delayed_work(&ap->port_task)) { | |
0dd4b21f | 1145 | if (ata_msg_ctl(ap)) |
88574551 TH |
1146 | ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n", |
1147 | __FUNCTION__); | |
86e45b6b TH |
1148 | flush_workqueue(ata_wq); |
1149 | } | |
1150 | ||
ba6a1308 | 1151 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 1152 | ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK; |
ba6a1308 | 1153 | spin_unlock_irqrestore(ap->lock, flags); |
86e45b6b | 1154 | |
0dd4b21f BP |
1155 | if (ata_msg_ctl(ap)) |
1156 | ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); | |
86e45b6b TH |
1157 | } |
1158 | ||
77853bf2 | 1159 | void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 1160 | { |
77853bf2 | 1161 | struct completion *waiting = qc->private_data; |
a2a7a662 | 1162 | |
a2a7a662 | 1163 | complete(waiting); |
a2a7a662 TH |
1164 | } |
1165 | ||
1166 | /** | |
2432697b | 1167 | * ata_exec_internal_sg - execute libata internal command |
a2a7a662 TH |
1168 | * @dev: Device to which the command is sent |
1169 | * @tf: Taskfile registers for the command and the result | |
d69cf37d | 1170 | * @cdb: CDB for packet command |
a2a7a662 | 1171 | * @dma_dir: Data tranfer direction of the command |
2432697b TH |
1172 | * @sg: sg list for the data buffer of the command |
1173 | * @n_elem: Number of sg entries | |
a2a7a662 TH |
1174 | * |
1175 | * Executes libata internal command with timeout. @tf contains | |
1176 | * command on entry and result on return. Timeout and error | |
1177 | * conditions are reported via return value. No recovery action | |
1178 | * is taken after a command times out. It's caller's duty to | |
1179 | * clean up after timeout. | |
1180 | * | |
1181 | * LOCKING: | |
1182 | * None. Should be called with kernel context, might sleep. | |
551e8889 TH |
1183 | * |
1184 | * RETURNS: | |
1185 | * Zero on success, AC_ERR_* mask on failure | |
a2a7a662 | 1186 | */ |
2432697b TH |
1187 | unsigned ata_exec_internal_sg(struct ata_device *dev, |
1188 | struct ata_taskfile *tf, const u8 *cdb, | |
1189 | int dma_dir, struct scatterlist *sg, | |
1190 | unsigned int n_elem) | |
a2a7a662 | 1191 | { |
3373efd8 | 1192 | struct ata_port *ap = dev->ap; |
a2a7a662 TH |
1193 | u8 command = tf->command; |
1194 | struct ata_queued_cmd *qc; | |
2ab7db1f | 1195 | unsigned int tag, preempted_tag; |
dedaf2b0 | 1196 | u32 preempted_sactive, preempted_qc_active; |
60be6b9a | 1197 | DECLARE_COMPLETION_ONSTACK(wait); |
a2a7a662 | 1198 | unsigned long flags; |
77853bf2 | 1199 | unsigned int err_mask; |
d95a717f | 1200 | int rc; |
a2a7a662 | 1201 | |
ba6a1308 | 1202 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 | 1203 | |
e3180499 | 1204 | /* no internal command while frozen */ |
b51e9e5d | 1205 | if (ap->pflags & ATA_PFLAG_FROZEN) { |
ba6a1308 | 1206 | spin_unlock_irqrestore(ap->lock, flags); |
e3180499 TH |
1207 | return AC_ERR_SYSTEM; |
1208 | } | |
1209 | ||
2ab7db1f | 1210 | /* initialize internal qc */ |
a2a7a662 | 1211 | |
2ab7db1f TH |
1212 | /* XXX: Tag 0 is used for drivers with legacy EH as some |
1213 | * drivers choke if any other tag is given. This breaks | |
1214 | * ata_tag_internal() test for those drivers. Don't use new | |
1215 | * EH stuff without converting to it. | |
1216 | */ | |
1217 | if (ap->ops->error_handler) | |
1218 | tag = ATA_TAG_INTERNAL; | |
1219 | else | |
1220 | tag = 0; | |
1221 | ||
6cec4a39 | 1222 | if (test_and_set_bit(tag, &ap->qc_allocated)) |
2ab7db1f | 1223 | BUG(); |
f69499f4 | 1224 | qc = __ata_qc_from_tag(ap, tag); |
2ab7db1f TH |
1225 | |
1226 | qc->tag = tag; | |
1227 | qc->scsicmd = NULL; | |
1228 | qc->ap = ap; | |
1229 | qc->dev = dev; | |
1230 | ata_qc_reinit(qc); | |
1231 | ||
1232 | preempted_tag = ap->active_tag; | |
dedaf2b0 TH |
1233 | preempted_sactive = ap->sactive; |
1234 | preempted_qc_active = ap->qc_active; | |
2ab7db1f | 1235 | ap->active_tag = ATA_TAG_POISON; |
dedaf2b0 TH |
1236 | ap->sactive = 0; |
1237 | ap->qc_active = 0; | |
2ab7db1f TH |
1238 | |
1239 | /* prepare & issue qc */ | |
a2a7a662 | 1240 | qc->tf = *tf; |
d69cf37d TH |
1241 | if (cdb) |
1242 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
e61e0672 | 1243 | qc->flags |= ATA_QCFLAG_RESULT_TF; |
a2a7a662 TH |
1244 | qc->dma_dir = dma_dir; |
1245 | if (dma_dir != DMA_NONE) { | |
2432697b TH |
1246 | unsigned int i, buflen = 0; |
1247 | ||
1248 | for (i = 0; i < n_elem; i++) | |
1249 | buflen += sg[i].length; | |
1250 | ||
1251 | ata_sg_init(qc, sg, n_elem); | |
a2a7a662 | 1252 | qc->nsect = buflen / ATA_SECT_SIZE; |
49c80429 | 1253 | qc->nbytes = buflen; |
a2a7a662 TH |
1254 | } |
1255 | ||
77853bf2 | 1256 | qc->private_data = &wait; |
a2a7a662 TH |
1257 | qc->complete_fn = ata_qc_complete_internal; |
1258 | ||
8e0e694a | 1259 | ata_qc_issue(qc); |
a2a7a662 | 1260 | |
ba6a1308 | 1261 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 | 1262 | |
a8601e5f | 1263 | rc = wait_for_completion_timeout(&wait, ata_probe_timeout); |
d95a717f TH |
1264 | |
1265 | ata_port_flush_task(ap); | |
41ade50c | 1266 | |
d95a717f | 1267 | if (!rc) { |
ba6a1308 | 1268 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 TH |
1269 | |
1270 | /* We're racing with irq here. If we lose, the | |
1271 | * following test prevents us from completing the qc | |
d95a717f TH |
1272 | * twice. If we win, the port is frozen and will be |
1273 | * cleaned up by ->post_internal_cmd(). | |
a2a7a662 | 1274 | */ |
77853bf2 | 1275 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
d95a717f TH |
1276 | qc->err_mask |= AC_ERR_TIMEOUT; |
1277 | ||
1278 | if (ap->ops->error_handler) | |
1279 | ata_port_freeze(ap); | |
1280 | else | |
1281 | ata_qc_complete(qc); | |
f15a1daf | 1282 | |
0dd4b21f BP |
1283 | if (ata_msg_warn(ap)) |
1284 | ata_dev_printk(dev, KERN_WARNING, | |
88574551 | 1285 | "qc timeout (cmd 0x%x)\n", command); |
a2a7a662 TH |
1286 | } |
1287 | ||
ba6a1308 | 1288 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 TH |
1289 | } |
1290 | ||
d95a717f TH |
1291 | /* do post_internal_cmd */ |
1292 | if (ap->ops->post_internal_cmd) | |
1293 | ap->ops->post_internal_cmd(qc); | |
1294 | ||
1295 | if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) { | |
0dd4b21f | 1296 | if (ata_msg_warn(ap)) |
88574551 | 1297 | ata_dev_printk(dev, KERN_WARNING, |
0dd4b21f | 1298 | "zero err_mask for failed " |
88574551 | 1299 | "internal command, assuming AC_ERR_OTHER\n"); |
d95a717f TH |
1300 | qc->err_mask |= AC_ERR_OTHER; |
1301 | } | |
1302 | ||
15869303 | 1303 | /* finish up */ |
ba6a1308 | 1304 | spin_lock_irqsave(ap->lock, flags); |
15869303 | 1305 | |
e61e0672 | 1306 | *tf = qc->result_tf; |
77853bf2 TH |
1307 | err_mask = qc->err_mask; |
1308 | ||
1309 | ata_qc_free(qc); | |
2ab7db1f | 1310 | ap->active_tag = preempted_tag; |
dedaf2b0 TH |
1311 | ap->sactive = preempted_sactive; |
1312 | ap->qc_active = preempted_qc_active; | |
77853bf2 | 1313 | |
1f7dd3e9 TH |
1314 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. |
1315 | * Until those drivers are fixed, we detect the condition | |
1316 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1317 | * port. | |
1318 | * | |
1319 | * Note that this doesn't change any behavior as internal | |
1320 | * command failure results in disabling the device in the | |
1321 | * higher layer for LLDDs without new reset/EH callbacks. | |
1322 | * | |
1323 | * Kill the following code as soon as those drivers are fixed. | |
1324 | */ | |
198e0fed | 1325 | if (ap->flags & ATA_FLAG_DISABLED) { |
1f7dd3e9 TH |
1326 | err_mask |= AC_ERR_SYSTEM; |
1327 | ata_port_probe(ap); | |
1328 | } | |
1329 | ||
ba6a1308 | 1330 | spin_unlock_irqrestore(ap->lock, flags); |
15869303 | 1331 | |
77853bf2 | 1332 | return err_mask; |
a2a7a662 TH |
1333 | } |
1334 | ||
2432697b | 1335 | /** |
33480a0e | 1336 | * ata_exec_internal - execute libata internal command |
2432697b TH |
1337 | * @dev: Device to which the command is sent |
1338 | * @tf: Taskfile registers for the command and the result | |
1339 | * @cdb: CDB for packet command | |
1340 | * @dma_dir: Data tranfer direction of the command | |
1341 | * @buf: Data buffer of the command | |
1342 | * @buflen: Length of data buffer | |
1343 | * | |
1344 | * Wrapper around ata_exec_internal_sg() which takes simple | |
1345 | * buffer instead of sg list. | |
1346 | * | |
1347 | * LOCKING: | |
1348 | * None. Should be called with kernel context, might sleep. | |
1349 | * | |
1350 | * RETURNS: | |
1351 | * Zero on success, AC_ERR_* mask on failure | |
1352 | */ | |
1353 | unsigned ata_exec_internal(struct ata_device *dev, | |
1354 | struct ata_taskfile *tf, const u8 *cdb, | |
1355 | int dma_dir, void *buf, unsigned int buflen) | |
1356 | { | |
33480a0e TH |
1357 | struct scatterlist *psg = NULL, sg; |
1358 | unsigned int n_elem = 0; | |
2432697b | 1359 | |
33480a0e TH |
1360 | if (dma_dir != DMA_NONE) { |
1361 | WARN_ON(!buf); | |
1362 | sg_init_one(&sg, buf, buflen); | |
1363 | psg = &sg; | |
1364 | n_elem++; | |
1365 | } | |
2432697b | 1366 | |
33480a0e | 1367 | return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem); |
2432697b TH |
1368 | } |
1369 | ||
977e6b9f TH |
1370 | /** |
1371 | * ata_do_simple_cmd - execute simple internal command | |
1372 | * @dev: Device to which the command is sent | |
1373 | * @cmd: Opcode to execute | |
1374 | * | |
1375 | * Execute a 'simple' command, that only consists of the opcode | |
1376 | * 'cmd' itself, without filling any other registers | |
1377 | * | |
1378 | * LOCKING: | |
1379 | * Kernel thread context (may sleep). | |
1380 | * | |
1381 | * RETURNS: | |
1382 | * Zero on success, AC_ERR_* mask on failure | |
e58eb583 | 1383 | */ |
77b08fb5 | 1384 | unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) |
e58eb583 TH |
1385 | { |
1386 | struct ata_taskfile tf; | |
e58eb583 TH |
1387 | |
1388 | ata_tf_init(dev, &tf); | |
1389 | ||
1390 | tf.command = cmd; | |
1391 | tf.flags |= ATA_TFLAG_DEVICE; | |
1392 | tf.protocol = ATA_PROT_NODATA; | |
1393 | ||
977e6b9f | 1394 | return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
e58eb583 TH |
1395 | } |
1396 | ||
1bc4ccff AC |
1397 | /** |
1398 | * ata_pio_need_iordy - check if iordy needed | |
1399 | * @adev: ATA device | |
1400 | * | |
1401 | * Check if the current speed of the device requires IORDY. Used | |
1402 | * by various controllers for chip configuration. | |
1403 | */ | |
1404 | ||
1405 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |
1406 | { | |
1407 | int pio; | |
1408 | int speed = adev->pio_mode - XFER_PIO_0; | |
1409 | ||
1410 | if (speed < 2) | |
1411 | return 0; | |
1412 | if (speed > 2) | |
1413 | return 1; | |
2e9edbf8 | 1414 | |
1bc4ccff AC |
1415 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ |
1416 | ||
1417 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ | |
1418 | pio = adev->id[ATA_ID_EIDE_PIO]; | |
1419 | /* Is the speed faster than the drive allows non IORDY ? */ | |
1420 | if (pio) { | |
1421 | /* This is cycle times not frequency - watch the logic! */ | |
1422 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
1423 | return 1; | |
1424 | return 0; | |
1425 | } | |
1426 | } | |
1427 | return 0; | |
1428 | } | |
1429 | ||
1da177e4 | 1430 | /** |
49016aca | 1431 | * ata_dev_read_id - Read ID data from the specified device |
49016aca TH |
1432 | * @dev: target device |
1433 | * @p_class: pointer to class of the target device (may be changed) | |
bff04647 | 1434 | * @flags: ATA_READID_* flags |
fe635c7e | 1435 | * @id: buffer to read IDENTIFY data into |
1da177e4 | 1436 | * |
49016aca TH |
1437 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1438 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
aec5c3c1 TH |
1439 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS |
1440 | * for pre-ATA4 drives. | |
1da177e4 LT |
1441 | * |
1442 | * LOCKING: | |
49016aca TH |
1443 | * Kernel thread context (may sleep) |
1444 | * | |
1445 | * RETURNS: | |
1446 | * 0 on success, -errno otherwise. | |
1da177e4 | 1447 | */ |
a9beec95 | 1448 | int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, |
bff04647 | 1449 | unsigned int flags, u16 *id) |
1da177e4 | 1450 | { |
3373efd8 | 1451 | struct ata_port *ap = dev->ap; |
49016aca | 1452 | unsigned int class = *p_class; |
a0123703 | 1453 | struct ata_taskfile tf; |
49016aca TH |
1454 | unsigned int err_mask = 0; |
1455 | const char *reason; | |
1456 | int rc; | |
1da177e4 | 1457 | |
0dd4b21f | 1458 | if (ata_msg_ctl(ap)) |
88574551 TH |
1459 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", |
1460 | __FUNCTION__, ap->id, dev->devno); | |
1da177e4 | 1461 | |
49016aca | 1462 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
1da177e4 | 1463 | |
49016aca | 1464 | retry: |
3373efd8 | 1465 | ata_tf_init(dev, &tf); |
a0123703 | 1466 | |
49016aca TH |
1467 | switch (class) { |
1468 | case ATA_DEV_ATA: | |
a0123703 | 1469 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1470 | break; |
1471 | case ATA_DEV_ATAPI: | |
a0123703 | 1472 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1473 | break; |
1474 | default: | |
1475 | rc = -ENODEV; | |
1476 | reason = "unsupported class"; | |
1477 | goto err_out; | |
1da177e4 LT |
1478 | } |
1479 | ||
a0123703 | 1480 | tf.protocol = ATA_PROT_PIO; |
800b3996 | 1481 | tf.flags |= ATA_TFLAG_POLLING; /* for polling presence detection */ |
1da177e4 | 1482 | |
3373efd8 | 1483 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, |
49016aca | 1484 | id, sizeof(id[0]) * ATA_ID_WORDS); |
a0123703 | 1485 | if (err_mask) { |
800b3996 | 1486 | if (err_mask & AC_ERR_NODEV_HINT) { |
55a8e2c8 TH |
1487 | DPRINTK("ata%u.%d: NODEV after polling detection\n", |
1488 | ap->id, dev->devno); | |
1489 | return -ENOENT; | |
1490 | } | |
1491 | ||
49016aca TH |
1492 | rc = -EIO; |
1493 | reason = "I/O error"; | |
1da177e4 LT |
1494 | goto err_out; |
1495 | } | |
1496 | ||
49016aca | 1497 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 | 1498 | |
49016aca | 1499 | /* sanity check */ |
a4f5749b TH |
1500 | rc = -EINVAL; |
1501 | reason = "device reports illegal type"; | |
1502 | ||
1503 | if (class == ATA_DEV_ATA) { | |
1504 | if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) | |
1505 | goto err_out; | |
1506 | } else { | |
1507 | if (ata_id_is_ata(id)) | |
1508 | goto err_out; | |
49016aca TH |
1509 | } |
1510 | ||
bff04647 | 1511 | if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { |
49016aca TH |
1512 | /* |
1513 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1514 | * SRST RESET | |
1515 | * IDENTIFY | |
1516 | * INITIALIZE DEVICE PARAMETERS | |
1517 | * anything else.. | |
1518 | * Some drives were very specific about that exact sequence. | |
1519 | */ | |
1520 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
3373efd8 | 1521 | err_mask = ata_dev_init_params(dev, id[3], id[6]); |
49016aca TH |
1522 | if (err_mask) { |
1523 | rc = -EIO; | |
1524 | reason = "INIT_DEV_PARAMS failed"; | |
1525 | goto err_out; | |
1526 | } | |
1527 | ||
1528 | /* current CHS translation info (id[53-58]) might be | |
1529 | * changed. reread the identify device info. | |
1530 | */ | |
bff04647 | 1531 | flags &= ~ATA_READID_POSTRESET; |
49016aca TH |
1532 | goto retry; |
1533 | } | |
1534 | } | |
1535 | ||
1536 | *p_class = class; | |
fe635c7e | 1537 | |
49016aca TH |
1538 | return 0; |
1539 | ||
1540 | err_out: | |
88574551 | 1541 | if (ata_msg_warn(ap)) |
0dd4b21f | 1542 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " |
88574551 | 1543 | "(%s, err_mask=0x%x)\n", reason, err_mask); |
49016aca TH |
1544 | return rc; |
1545 | } | |
1546 | ||
3373efd8 | 1547 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
4b2f3ede | 1548 | { |
3373efd8 | 1549 | return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); |
4b2f3ede TH |
1550 | } |
1551 | ||
a6e6ce8e TH |
1552 | static void ata_dev_config_ncq(struct ata_device *dev, |
1553 | char *desc, size_t desc_sz) | |
1554 | { | |
1555 | struct ata_port *ap = dev->ap; | |
1556 | int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); | |
1557 | ||
1558 | if (!ata_id_has_ncq(dev->id)) { | |
1559 | desc[0] = '\0'; | |
1560 | return; | |
1561 | } | |
6919a0a6 AC |
1562 | if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) { |
1563 | snprintf(desc, desc_sz, "NCQ (not used)"); | |
1564 | return; | |
1565 | } | |
a6e6ce8e | 1566 | if (ap->flags & ATA_FLAG_NCQ) { |
cca3974e | 1567 | hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); |
a6e6ce8e TH |
1568 | dev->flags |= ATA_DFLAG_NCQ; |
1569 | } | |
1570 | ||
1571 | if (hdepth >= ddepth) | |
1572 | snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); | |
1573 | else | |
1574 | snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); | |
1575 | } | |
1576 | ||
e6d902a3 BK |
1577 | static void ata_set_port_max_cmd_len(struct ata_port *ap) |
1578 | { | |
1579 | int i; | |
1580 | ||
cca3974e JG |
1581 | if (ap->scsi_host) { |
1582 | unsigned int len = 0; | |
1583 | ||
e6d902a3 | 1584 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
cca3974e JG |
1585 | len = max(len, ap->device[i].cdb_len); |
1586 | ||
1587 | ap->scsi_host->max_cmd_len = len; | |
e6d902a3 BK |
1588 | } |
1589 | } | |
1590 | ||
49016aca | 1591 | /** |
ffeae418 | 1592 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
ffeae418 TH |
1593 | * @dev: Target device to configure |
1594 | * | |
1595 | * Configure @dev according to @dev->id. Generic and low-level | |
1596 | * driver specific fixups are also applied. | |
49016aca TH |
1597 | * |
1598 | * LOCKING: | |
ffeae418 TH |
1599 | * Kernel thread context (may sleep) |
1600 | * | |
1601 | * RETURNS: | |
1602 | * 0 on success, -errno otherwise | |
49016aca | 1603 | */ |
efdaedc4 | 1604 | int ata_dev_configure(struct ata_device *dev) |
49016aca | 1605 | { |
3373efd8 | 1606 | struct ata_port *ap = dev->ap; |
efdaedc4 | 1607 | int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO; |
1148c3a7 | 1608 | const u16 *id = dev->id; |
ff8854b2 | 1609 | unsigned int xfer_mask; |
b352e57d | 1610 | char revbuf[7]; /* XYZ-99\0 */ |
e6d902a3 | 1611 | int rc; |
49016aca | 1612 | |
0dd4b21f | 1613 | if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { |
88574551 TH |
1614 | ata_dev_printk(dev, KERN_INFO, |
1615 | "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1616 | __FUNCTION__, ap->id, dev->devno); | |
ffeae418 | 1617 | return 0; |
49016aca TH |
1618 | } |
1619 | ||
0dd4b21f | 1620 | if (ata_msg_probe(ap)) |
88574551 TH |
1621 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", |
1622 | __FUNCTION__, ap->id, dev->devno); | |
1da177e4 | 1623 | |
c39f5ebe | 1624 | /* print device capabilities */ |
0dd4b21f | 1625 | if (ata_msg_probe(ap)) |
88574551 TH |
1626 | ata_dev_printk(dev, KERN_DEBUG, |
1627 | "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " | |
1628 | "85:%04x 86:%04x 87:%04x 88:%04x\n", | |
0dd4b21f | 1629 | __FUNCTION__, |
f15a1daf TH |
1630 | id[49], id[82], id[83], id[84], |
1631 | id[85], id[86], id[87], id[88]); | |
c39f5ebe | 1632 | |
208a9933 | 1633 | /* initialize to-be-configured parameters */ |
ea1dd4e1 | 1634 | dev->flags &= ~ATA_DFLAG_CFG_MASK; |
208a9933 TH |
1635 | dev->max_sectors = 0; |
1636 | dev->cdb_len = 0; | |
1637 | dev->n_sectors = 0; | |
1638 | dev->cylinders = 0; | |
1639 | dev->heads = 0; | |
1640 | dev->sectors = 0; | |
1641 | ||
1da177e4 LT |
1642 | /* |
1643 | * common ATA, ATAPI feature tests | |
1644 | */ | |
1645 | ||
ff8854b2 | 1646 | /* find max transfer mode; for printk only */ |
1148c3a7 | 1647 | xfer_mask = ata_id_xfermask(id); |
1da177e4 | 1648 | |
0dd4b21f BP |
1649 | if (ata_msg_probe(ap)) |
1650 | ata_dump_id(id); | |
1da177e4 LT |
1651 | |
1652 | /* ATA-specific feature tests */ | |
1653 | if (dev->class == ATA_DEV_ATA) { | |
b352e57d AC |
1654 | if (ata_id_is_cfa(id)) { |
1655 | if (id[162] & 1) /* CPRM may make this media unusable */ | |
1656 | ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n", | |
1657 | ap->id, dev->devno); | |
1658 | snprintf(revbuf, 7, "CFA"); | |
1659 | } | |
1660 | else | |
1661 | snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); | |
1662 | ||
1148c3a7 | 1663 | dev->n_sectors = ata_id_n_sectors(id); |
2940740b | 1664 | |
1148c3a7 | 1665 | if (ata_id_has_lba(id)) { |
4c2d721a | 1666 | const char *lba_desc; |
a6e6ce8e | 1667 | char ncq_desc[20]; |
8bf62ece | 1668 | |
4c2d721a TH |
1669 | lba_desc = "LBA"; |
1670 | dev->flags |= ATA_DFLAG_LBA; | |
1148c3a7 | 1671 | if (ata_id_has_lba48(id)) { |
8bf62ece | 1672 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a | 1673 | lba_desc = "LBA48"; |
6fc49adb TH |
1674 | |
1675 | if (dev->n_sectors >= (1UL << 28) && | |
1676 | ata_id_has_flush_ext(id)) | |
1677 | dev->flags |= ATA_DFLAG_FLUSH_EXT; | |
4c2d721a | 1678 | } |
8bf62ece | 1679 | |
a6e6ce8e TH |
1680 | /* config NCQ */ |
1681 | ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); | |
1682 | ||
8bf62ece | 1683 | /* print device info to dmesg */ |
5afc8142 | 1684 | if (ata_msg_drv(ap) && print_info) |
b352e57d | 1685 | ata_dev_printk(dev, KERN_INFO, "%s, " |
a6e6ce8e | 1686 | "max %s, %Lu sectors: %s %s\n", |
b352e57d | 1687 | revbuf, |
f15a1daf TH |
1688 | ata_mode_string(xfer_mask), |
1689 | (unsigned long long)dev->n_sectors, | |
a6e6ce8e | 1690 | lba_desc, ncq_desc); |
ffeae418 | 1691 | } else { |
8bf62ece AL |
1692 | /* CHS */ |
1693 | ||
1694 | /* Default translation */ | |
1148c3a7 TH |
1695 | dev->cylinders = id[1]; |
1696 | dev->heads = id[3]; | |
1697 | dev->sectors = id[6]; | |
8bf62ece | 1698 | |
1148c3a7 | 1699 | if (ata_id_current_chs_valid(id)) { |
8bf62ece | 1700 | /* Current CHS translation is valid. */ |
1148c3a7 TH |
1701 | dev->cylinders = id[54]; |
1702 | dev->heads = id[55]; | |
1703 | dev->sectors = id[56]; | |
8bf62ece AL |
1704 | } |
1705 | ||
1706 | /* print device info to dmesg */ | |
5afc8142 | 1707 | if (ata_msg_drv(ap) && print_info) |
b352e57d | 1708 | ata_dev_printk(dev, KERN_INFO, "%s, " |
f15a1daf | 1709 | "max %s, %Lu sectors: CHS %u/%u/%u\n", |
b352e57d | 1710 | revbuf, |
f15a1daf TH |
1711 | ata_mode_string(xfer_mask), |
1712 | (unsigned long long)dev->n_sectors, | |
88574551 TH |
1713 | dev->cylinders, dev->heads, |
1714 | dev->sectors); | |
1da177e4 LT |
1715 | } |
1716 | ||
07f6f7d0 AL |
1717 | if (dev->id[59] & 0x100) { |
1718 | dev->multi_count = dev->id[59] & 0xff; | |
5afc8142 | 1719 | if (ata_msg_drv(ap) && print_info) |
88574551 TH |
1720 | ata_dev_printk(dev, KERN_INFO, |
1721 | "ata%u: dev %u multi count %u\n", | |
1722 | ap->id, dev->devno, dev->multi_count); | |
07f6f7d0 AL |
1723 | } |
1724 | ||
6e7846e9 | 1725 | dev->cdb_len = 16; |
1da177e4 LT |
1726 | } |
1727 | ||
1728 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1729 | else if (dev->class == ATA_DEV_ATAPI) { |
08a556db AL |
1730 | char *cdb_intr_string = ""; |
1731 | ||
1148c3a7 | 1732 | rc = atapi_cdb_len(id); |
1da177e4 | 1733 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
0dd4b21f | 1734 | if (ata_msg_warn(ap)) |
88574551 TH |
1735 | ata_dev_printk(dev, KERN_WARNING, |
1736 | "unsupported CDB len\n"); | |
ffeae418 | 1737 | rc = -EINVAL; |
1da177e4 LT |
1738 | goto err_out_nosup; |
1739 | } | |
6e7846e9 | 1740 | dev->cdb_len = (unsigned int) rc; |
1da177e4 | 1741 | |
08a556db | 1742 | if (ata_id_cdb_intr(dev->id)) { |
312f7da2 | 1743 | dev->flags |= ATA_DFLAG_CDB_INTR; |
08a556db AL |
1744 | cdb_intr_string = ", CDB intr"; |
1745 | } | |
312f7da2 | 1746 | |
1da177e4 | 1747 | /* print device info to dmesg */ |
5afc8142 | 1748 | if (ata_msg_drv(ap) && print_info) |
12436c30 TH |
1749 | ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n", |
1750 | ata_mode_string(xfer_mask), | |
1751 | cdb_intr_string); | |
1da177e4 LT |
1752 | } |
1753 | ||
914ed354 TH |
1754 | /* determine max_sectors */ |
1755 | dev->max_sectors = ATA_MAX_SECTORS; | |
1756 | if (dev->flags & ATA_DFLAG_LBA48) | |
1757 | dev->max_sectors = ATA_MAX_SECTORS_LBA48; | |
1758 | ||
93590859 AC |
1759 | if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { |
1760 | /* Let the user know. We don't want to disallow opens for | |
1761 | rescue purposes, or in case the vendor is just a blithering | |
1762 | idiot */ | |
1763 | if (print_info) { | |
1764 | ata_dev_printk(dev, KERN_WARNING, | |
1765 | "Drive reports diagnostics failure. This may indicate a drive\n"); | |
1766 | ata_dev_printk(dev, KERN_WARNING, | |
1767 | "fault or invalid emulation. Contact drive vendor for information.\n"); | |
1768 | } | |
1769 | } | |
1770 | ||
e6d902a3 | 1771 | ata_set_port_max_cmd_len(ap); |
6e7846e9 | 1772 | |
4b2f3ede | 1773 | /* limit bridge transfers to udma5, 200 sectors */ |
3373efd8 | 1774 | if (ata_dev_knobble(dev)) { |
5afc8142 | 1775 | if (ata_msg_drv(ap) && print_info) |
f15a1daf TH |
1776 | ata_dev_printk(dev, KERN_INFO, |
1777 | "applying bridge limits\n"); | |
5a529139 | 1778 | dev->udma_mask &= ATA_UDMA5; |
4b2f3ede TH |
1779 | dev->max_sectors = ATA_MAX_SECTORS; |
1780 | } | |
1781 | ||
1782 | if (ap->ops->dev_config) | |
1783 | ap->ops->dev_config(ap, dev); | |
1784 | ||
0dd4b21f BP |
1785 | if (ata_msg_probe(ap)) |
1786 | ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", | |
1787 | __FUNCTION__, ata_chk_status(ap)); | |
ffeae418 | 1788 | return 0; |
1da177e4 LT |
1789 | |
1790 | err_out_nosup: | |
0dd4b21f | 1791 | if (ata_msg_probe(ap)) |
88574551 TH |
1792 | ata_dev_printk(dev, KERN_DEBUG, |
1793 | "%s: EXIT, err\n", __FUNCTION__); | |
ffeae418 | 1794 | return rc; |
1da177e4 LT |
1795 | } |
1796 | ||
1797 | /** | |
1798 | * ata_bus_probe - Reset and probe ATA bus | |
1799 | * @ap: Bus to probe | |
1800 | * | |
0cba632b JG |
1801 | * Master ATA bus probing function. Initiates a hardware-dependent |
1802 | * bus reset, then attempts to identify any devices found on | |
1803 | * the bus. | |
1804 | * | |
1da177e4 | 1805 | * LOCKING: |
0cba632b | 1806 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1807 | * |
1808 | * RETURNS: | |
96072e69 | 1809 | * Zero on success, negative errno otherwise. |
1da177e4 LT |
1810 | */ |
1811 | ||
80289167 | 1812 | int ata_bus_probe(struct ata_port *ap) |
1da177e4 | 1813 | { |
28ca5c57 | 1814 | unsigned int classes[ATA_MAX_DEVICES]; |
14d2bac1 TH |
1815 | int tries[ATA_MAX_DEVICES]; |
1816 | int i, rc, down_xfermask; | |
e82cbdb9 | 1817 | struct ata_device *dev; |
1da177e4 | 1818 | |
28ca5c57 | 1819 | ata_port_probe(ap); |
c19ba8af | 1820 | |
14d2bac1 TH |
1821 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1822 | tries[i] = ATA_PROBE_MAX_TRIES; | |
1823 | ||
1824 | retry: | |
1825 | down_xfermask = 0; | |
1826 | ||
2044470c | 1827 | /* reset and determine device classes */ |
52783c5d | 1828 | ap->ops->phy_reset(ap); |
2061a47a | 1829 | |
52783c5d TH |
1830 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1831 | dev = &ap->device[i]; | |
c19ba8af | 1832 | |
52783c5d TH |
1833 | if (!(ap->flags & ATA_FLAG_DISABLED) && |
1834 | dev->class != ATA_DEV_UNKNOWN) | |
1835 | classes[dev->devno] = dev->class; | |
1836 | else | |
1837 | classes[dev->devno] = ATA_DEV_NONE; | |
2044470c | 1838 | |
52783c5d | 1839 | dev->class = ATA_DEV_UNKNOWN; |
28ca5c57 | 1840 | } |
1da177e4 | 1841 | |
52783c5d | 1842 | ata_port_probe(ap); |
2044470c | 1843 | |
b6079ca4 AC |
1844 | /* after the reset the device state is PIO 0 and the controller |
1845 | state is undefined. Record the mode */ | |
1846 | ||
1847 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1848 | ap->device[i].pio_mode = XFER_PIO_0; | |
1849 | ||
28ca5c57 | 1850 | /* read IDENTIFY page and configure devices */ |
1da177e4 | 1851 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e82cbdb9 | 1852 | dev = &ap->device[i]; |
28ca5c57 | 1853 | |
ec573755 TH |
1854 | if (tries[i]) |
1855 | dev->class = classes[i]; | |
ffeae418 | 1856 | |
14d2bac1 | 1857 | if (!ata_dev_enabled(dev)) |
ffeae418 | 1858 | continue; |
ffeae418 | 1859 | |
bff04647 TH |
1860 | rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, |
1861 | dev->id); | |
14d2bac1 TH |
1862 | if (rc) |
1863 | goto fail; | |
1864 | ||
efdaedc4 TH |
1865 | ap->eh_context.i.flags |= ATA_EHI_PRINTINFO; |
1866 | rc = ata_dev_configure(dev); | |
1867 | ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO; | |
14d2bac1 TH |
1868 | if (rc) |
1869 | goto fail; | |
1da177e4 LT |
1870 | } |
1871 | ||
e82cbdb9 | 1872 | /* configure transfer mode */ |
3adcebb2 | 1873 | rc = ata_set_mode(ap, &dev); |
51713d35 TH |
1874 | if (rc) { |
1875 | down_xfermask = 1; | |
1876 | goto fail; | |
e82cbdb9 | 1877 | } |
1da177e4 | 1878 | |
e82cbdb9 TH |
1879 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1880 | if (ata_dev_enabled(&ap->device[i])) | |
1881 | return 0; | |
1da177e4 | 1882 | |
e82cbdb9 TH |
1883 | /* no device present, disable port */ |
1884 | ata_port_disable(ap); | |
1da177e4 | 1885 | ap->ops->port_disable(ap); |
96072e69 | 1886 | return -ENODEV; |
14d2bac1 TH |
1887 | |
1888 | fail: | |
1889 | switch (rc) { | |
1890 | case -EINVAL: | |
1891 | case -ENODEV: | |
1892 | tries[dev->devno] = 0; | |
1893 | break; | |
1894 | case -EIO: | |
3c567b7d | 1895 | sata_down_spd_limit(ap); |
14d2bac1 TH |
1896 | /* fall through */ |
1897 | default: | |
1898 | tries[dev->devno]--; | |
1899 | if (down_xfermask && | |
3373efd8 | 1900 | ata_down_xfermask_limit(dev, tries[dev->devno] == 1)) |
14d2bac1 TH |
1901 | tries[dev->devno] = 0; |
1902 | } | |
1903 | ||
ec573755 | 1904 | if (!tries[dev->devno]) { |
3373efd8 TH |
1905 | ata_down_xfermask_limit(dev, 1); |
1906 | ata_dev_disable(dev); | |
ec573755 TH |
1907 | } |
1908 | ||
14d2bac1 | 1909 | goto retry; |
1da177e4 LT |
1910 | } |
1911 | ||
1912 | /** | |
0cba632b JG |
1913 | * ata_port_probe - Mark port as enabled |
1914 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1915 | * |
0cba632b JG |
1916 | * Modify @ap data structure such that the system |
1917 | * thinks that the entire port is enabled. | |
1918 | * | |
cca3974e | 1919 | * LOCKING: host lock, or some other form of |
0cba632b | 1920 | * serialization. |
1da177e4 LT |
1921 | */ |
1922 | ||
1923 | void ata_port_probe(struct ata_port *ap) | |
1924 | { | |
198e0fed | 1925 | ap->flags &= ~ATA_FLAG_DISABLED; |
1da177e4 LT |
1926 | } |
1927 | ||
3be680b7 TH |
1928 | /** |
1929 | * sata_print_link_status - Print SATA link status | |
1930 | * @ap: SATA port to printk link status about | |
1931 | * | |
1932 | * This function prints link speed and status of a SATA link. | |
1933 | * | |
1934 | * LOCKING: | |
1935 | * None. | |
1936 | */ | |
1937 | static void sata_print_link_status(struct ata_port *ap) | |
1938 | { | |
6d5f9732 | 1939 | u32 sstatus, scontrol, tmp; |
3be680b7 | 1940 | |
81952c54 | 1941 | if (sata_scr_read(ap, SCR_STATUS, &sstatus)) |
3be680b7 | 1942 | return; |
81952c54 | 1943 | sata_scr_read(ap, SCR_CONTROL, &scontrol); |
3be680b7 | 1944 | |
81952c54 | 1945 | if (ata_port_online(ap)) { |
3be680b7 | 1946 | tmp = (sstatus >> 4) & 0xf; |
f15a1daf TH |
1947 | ata_port_printk(ap, KERN_INFO, |
1948 | "SATA link up %s (SStatus %X SControl %X)\n", | |
1949 | sata_spd_string(tmp), sstatus, scontrol); | |
3be680b7 | 1950 | } else { |
f15a1daf TH |
1951 | ata_port_printk(ap, KERN_INFO, |
1952 | "SATA link down (SStatus %X SControl %X)\n", | |
1953 | sstatus, scontrol); | |
3be680b7 TH |
1954 | } |
1955 | } | |
1956 | ||
1da177e4 | 1957 | /** |
780a87f7 JG |
1958 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1959 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1960 | * |
780a87f7 JG |
1961 | * This function issues commands to standard SATA Sxxx |
1962 | * PHY registers, to wake up the phy (and device), and | |
1963 | * clear any reset condition. | |
1da177e4 LT |
1964 | * |
1965 | * LOCKING: | |
0cba632b | 1966 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1967 | * |
1968 | */ | |
1969 | void __sata_phy_reset(struct ata_port *ap) | |
1970 | { | |
1971 | u32 sstatus; | |
1972 | unsigned long timeout = jiffies + (HZ * 5); | |
1973 | ||
1974 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e | 1975 | /* issue phy wake/reset */ |
81952c54 | 1976 | sata_scr_write_flush(ap, SCR_CONTROL, 0x301); |
62ba2841 TH |
1977 | /* Couldn't find anything in SATA I/II specs, but |
1978 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1979 | mdelay(1); | |
1da177e4 | 1980 | } |
81952c54 TH |
1981 | /* phy wake/clear reset */ |
1982 | sata_scr_write_flush(ap, SCR_CONTROL, 0x300); | |
1da177e4 LT |
1983 | |
1984 | /* wait for phy to become ready, if necessary */ | |
1985 | do { | |
1986 | msleep(200); | |
81952c54 | 1987 | sata_scr_read(ap, SCR_STATUS, &sstatus); |
1da177e4 LT |
1988 | if ((sstatus & 0xf) != 1) |
1989 | break; | |
1990 | } while (time_before(jiffies, timeout)); | |
1991 | ||
3be680b7 TH |
1992 | /* print link status */ |
1993 | sata_print_link_status(ap); | |
656563e3 | 1994 | |
3be680b7 | 1995 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 1996 | if (!ata_port_offline(ap)) |
1da177e4 | 1997 | ata_port_probe(ap); |
3be680b7 | 1998 | else |
1da177e4 | 1999 | ata_port_disable(ap); |
1da177e4 | 2000 | |
198e0fed | 2001 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2002 | return; |
2003 | ||
2004 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
2005 | ata_port_disable(ap); | |
2006 | return; | |
2007 | } | |
2008 | ||
2009 | ap->cbl = ATA_CBL_SATA; | |
2010 | } | |
2011 | ||
2012 | /** | |
780a87f7 JG |
2013 | * sata_phy_reset - Reset SATA bus. |
2014 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 2015 | * |
780a87f7 JG |
2016 | * This function resets the SATA bus, and then probes |
2017 | * the bus for devices. | |
1da177e4 LT |
2018 | * |
2019 | * LOCKING: | |
0cba632b | 2020 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2021 | * |
2022 | */ | |
2023 | void sata_phy_reset(struct ata_port *ap) | |
2024 | { | |
2025 | __sata_phy_reset(ap); | |
198e0fed | 2026 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2027 | return; |
2028 | ata_bus_reset(ap); | |
2029 | } | |
2030 | ||
ebdfca6e AC |
2031 | /** |
2032 | * ata_dev_pair - return other device on cable | |
ebdfca6e AC |
2033 | * @adev: device |
2034 | * | |
2035 | * Obtain the other device on the same cable, or if none is | |
2036 | * present NULL is returned | |
2037 | */ | |
2e9edbf8 | 2038 | |
3373efd8 | 2039 | struct ata_device *ata_dev_pair(struct ata_device *adev) |
ebdfca6e | 2040 | { |
3373efd8 | 2041 | struct ata_port *ap = adev->ap; |
ebdfca6e | 2042 | struct ata_device *pair = &ap->device[1 - adev->devno]; |
e1211e3f | 2043 | if (!ata_dev_enabled(pair)) |
ebdfca6e AC |
2044 | return NULL; |
2045 | return pair; | |
2046 | } | |
2047 | ||
1da177e4 | 2048 | /** |
780a87f7 JG |
2049 | * ata_port_disable - Disable port. |
2050 | * @ap: Port to be disabled. | |
1da177e4 | 2051 | * |
780a87f7 JG |
2052 | * Modify @ap data structure such that the system |
2053 | * thinks that the entire port is disabled, and should | |
2054 | * never attempt to probe or communicate with devices | |
2055 | * on this port. | |
2056 | * | |
cca3974e | 2057 | * LOCKING: host lock, or some other form of |
780a87f7 | 2058 | * serialization. |
1da177e4 LT |
2059 | */ |
2060 | ||
2061 | void ata_port_disable(struct ata_port *ap) | |
2062 | { | |
2063 | ap->device[0].class = ATA_DEV_NONE; | |
2064 | ap->device[1].class = ATA_DEV_NONE; | |
198e0fed | 2065 | ap->flags |= ATA_FLAG_DISABLED; |
1da177e4 LT |
2066 | } |
2067 | ||
1c3fae4d | 2068 | /** |
3c567b7d | 2069 | * sata_down_spd_limit - adjust SATA spd limit downward |
1c3fae4d TH |
2070 | * @ap: Port to adjust SATA spd limit for |
2071 | * | |
2072 | * Adjust SATA spd limit of @ap downward. Note that this | |
2073 | * function only adjusts the limit. The change must be applied | |
3c567b7d | 2074 | * using sata_set_spd(). |
1c3fae4d TH |
2075 | * |
2076 | * LOCKING: | |
2077 | * Inherited from caller. | |
2078 | * | |
2079 | * RETURNS: | |
2080 | * 0 on success, negative errno on failure | |
2081 | */ | |
3c567b7d | 2082 | int sata_down_spd_limit(struct ata_port *ap) |
1c3fae4d | 2083 | { |
81952c54 TH |
2084 | u32 sstatus, spd, mask; |
2085 | int rc, highbit; | |
1c3fae4d | 2086 | |
81952c54 TH |
2087 | rc = sata_scr_read(ap, SCR_STATUS, &sstatus); |
2088 | if (rc) | |
2089 | return rc; | |
1c3fae4d TH |
2090 | |
2091 | mask = ap->sata_spd_limit; | |
2092 | if (mask <= 1) | |
2093 | return -EINVAL; | |
2094 | highbit = fls(mask) - 1; | |
2095 | mask &= ~(1 << highbit); | |
2096 | ||
81952c54 | 2097 | spd = (sstatus >> 4) & 0xf; |
1c3fae4d TH |
2098 | if (spd <= 1) |
2099 | return -EINVAL; | |
2100 | spd--; | |
2101 | mask &= (1 << spd) - 1; | |
2102 | if (!mask) | |
2103 | return -EINVAL; | |
2104 | ||
2105 | ap->sata_spd_limit = mask; | |
2106 | ||
f15a1daf TH |
2107 | ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", |
2108 | sata_spd_string(fls(mask))); | |
1c3fae4d TH |
2109 | |
2110 | return 0; | |
2111 | } | |
2112 | ||
3c567b7d | 2113 | static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) |
1c3fae4d TH |
2114 | { |
2115 | u32 spd, limit; | |
2116 | ||
2117 | if (ap->sata_spd_limit == UINT_MAX) | |
2118 | limit = 0; | |
2119 | else | |
2120 | limit = fls(ap->sata_spd_limit); | |
2121 | ||
2122 | spd = (*scontrol >> 4) & 0xf; | |
2123 | *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); | |
2124 | ||
2125 | return spd != limit; | |
2126 | } | |
2127 | ||
2128 | /** | |
3c567b7d | 2129 | * sata_set_spd_needed - is SATA spd configuration needed |
1c3fae4d TH |
2130 | * @ap: Port in question |
2131 | * | |
2132 | * Test whether the spd limit in SControl matches | |
2133 | * @ap->sata_spd_limit. This function is used to determine | |
2134 | * whether hardreset is necessary to apply SATA spd | |
2135 | * configuration. | |
2136 | * | |
2137 | * LOCKING: | |
2138 | * Inherited from caller. | |
2139 | * | |
2140 | * RETURNS: | |
2141 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
2142 | */ | |
3c567b7d | 2143 | int sata_set_spd_needed(struct ata_port *ap) |
1c3fae4d TH |
2144 | { |
2145 | u32 scontrol; | |
2146 | ||
81952c54 | 2147 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) |
1c3fae4d TH |
2148 | return 0; |
2149 | ||
3c567b7d | 2150 | return __sata_set_spd_needed(ap, &scontrol); |
1c3fae4d TH |
2151 | } |
2152 | ||
2153 | /** | |
3c567b7d | 2154 | * sata_set_spd - set SATA spd according to spd limit |
1c3fae4d TH |
2155 | * @ap: Port to set SATA spd for |
2156 | * | |
2157 | * Set SATA spd of @ap according to sata_spd_limit. | |
2158 | * | |
2159 | * LOCKING: | |
2160 | * Inherited from caller. | |
2161 | * | |
2162 | * RETURNS: | |
2163 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
81952c54 | 2164 | * changed. Negative errno if SCR registers are inaccessible. |
1c3fae4d | 2165 | */ |
3c567b7d | 2166 | int sata_set_spd(struct ata_port *ap) |
1c3fae4d TH |
2167 | { |
2168 | u32 scontrol; | |
81952c54 | 2169 | int rc; |
1c3fae4d | 2170 | |
81952c54 TH |
2171 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2172 | return rc; | |
1c3fae4d | 2173 | |
3c567b7d | 2174 | if (!__sata_set_spd_needed(ap, &scontrol)) |
1c3fae4d TH |
2175 | return 0; |
2176 | ||
81952c54 TH |
2177 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) |
2178 | return rc; | |
2179 | ||
1c3fae4d TH |
2180 | return 1; |
2181 | } | |
2182 | ||
452503f9 AC |
2183 | /* |
2184 | * This mode timing computation functionality is ported over from | |
2185 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
2186 | */ | |
2187 | /* | |
b352e57d | 2188 | * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). |
452503f9 | 2189 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except |
b352e57d AC |
2190 | * for UDMA6, which is currently supported only by Maxtor drives. |
2191 | * | |
2192 | * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. | |
452503f9 AC |
2193 | */ |
2194 | ||
2195 | static const struct ata_timing ata_timing[] = { | |
2196 | ||
2197 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
2198 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
2199 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
2200 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
2201 | ||
b352e57d AC |
2202 | { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, |
2203 | { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, | |
452503f9 AC |
2204 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, |
2205 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
2206 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
2207 | ||
2208 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2e9edbf8 | 2209 | |
452503f9 AC |
2210 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, |
2211 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
2212 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2e9edbf8 | 2213 | |
452503f9 AC |
2214 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, |
2215 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
2216 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
2217 | ||
b352e57d AC |
2218 | { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, |
2219 | { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, | |
452503f9 AC |
2220 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, |
2221 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
2222 | ||
2223 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
2224 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
2225 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
2226 | ||
2227 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
2228 | ||
2229 | { 0xFF } | |
2230 | }; | |
2231 | ||
2232 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
2233 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
2234 | ||
2235 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
2236 | { | |
2237 | q->setup = EZ(t->setup * 1000, T); | |
2238 | q->act8b = EZ(t->act8b * 1000, T); | |
2239 | q->rec8b = EZ(t->rec8b * 1000, T); | |
2240 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
2241 | q->active = EZ(t->active * 1000, T); | |
2242 | q->recover = EZ(t->recover * 1000, T); | |
2243 | q->cycle = EZ(t->cycle * 1000, T); | |
2244 | q->udma = EZ(t->udma * 1000, UT); | |
2245 | } | |
2246 | ||
2247 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
2248 | struct ata_timing *m, unsigned int what) | |
2249 | { | |
2250 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
2251 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
2252 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
2253 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
2254 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
2255 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
2256 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
2257 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
2258 | } | |
2259 | ||
2260 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
2261 | { | |
2262 | const struct ata_timing *t; | |
2263 | ||
2264 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 2265 | if (t->mode == 0xFF) |
452503f9 | 2266 | return NULL; |
2e9edbf8 | 2267 | return t; |
452503f9 AC |
2268 | } |
2269 | ||
2270 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
2271 | struct ata_timing *t, int T, int UT) | |
2272 | { | |
2273 | const struct ata_timing *s; | |
2274 | struct ata_timing p; | |
2275 | ||
2276 | /* | |
2e9edbf8 | 2277 | * Find the mode. |
75b1f2f8 | 2278 | */ |
452503f9 AC |
2279 | |
2280 | if (!(s = ata_timing_find_mode(speed))) | |
2281 | return -EINVAL; | |
2282 | ||
75b1f2f8 AL |
2283 | memcpy(t, s, sizeof(*s)); |
2284 | ||
452503f9 AC |
2285 | /* |
2286 | * If the drive is an EIDE drive, it can tell us it needs extended | |
2287 | * PIO/MW_DMA cycle timing. | |
2288 | */ | |
2289 | ||
2290 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
2291 | memset(&p, 0, sizeof(p)); | |
2292 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
2293 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
2294 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
2295 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
2296 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
2297 | } | |
2298 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
2299 | } | |
2300 | ||
2301 | /* | |
2302 | * Convert the timing to bus clock counts. | |
2303 | */ | |
2304 | ||
75b1f2f8 | 2305 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
2306 | |
2307 | /* | |
c893a3ae RD |
2308 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
2309 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
2310 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
2311 | */ |
2312 | ||
fd3367af | 2313 | if (speed > XFER_PIO_6) { |
452503f9 AC |
2314 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); |
2315 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
2316 | } | |
2317 | ||
2318 | /* | |
c893a3ae | 2319 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
2320 | */ |
2321 | ||
2322 | if (t->act8b + t->rec8b < t->cyc8b) { | |
2323 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
2324 | t->rec8b = t->cyc8b - t->act8b; | |
2325 | } | |
2326 | ||
2327 | if (t->active + t->recover < t->cycle) { | |
2328 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
2329 | t->recover = t->cycle - t->active; | |
2330 | } | |
2331 | ||
2332 | return 0; | |
2333 | } | |
2334 | ||
cf176e1a TH |
2335 | /** |
2336 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
cf176e1a TH |
2337 | * @dev: Device to adjust xfer masks |
2338 | * @force_pio0: Force PIO0 | |
2339 | * | |
2340 | * Adjust xfer masks of @dev downward. Note that this function | |
2341 | * does not apply the change. Invoking ata_set_mode() afterwards | |
2342 | * will apply the limit. | |
2343 | * | |
2344 | * LOCKING: | |
2345 | * Inherited from caller. | |
2346 | * | |
2347 | * RETURNS: | |
2348 | * 0 on success, negative errno on failure | |
2349 | */ | |
3373efd8 | 2350 | int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0) |
cf176e1a TH |
2351 | { |
2352 | unsigned long xfer_mask; | |
2353 | int highbit; | |
2354 | ||
2355 | xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask, | |
2356 | dev->udma_mask); | |
2357 | ||
2358 | if (!xfer_mask) | |
2359 | goto fail; | |
2360 | /* don't gear down to MWDMA from UDMA, go directly to PIO */ | |
2361 | if (xfer_mask & ATA_MASK_UDMA) | |
2362 | xfer_mask &= ~ATA_MASK_MWDMA; | |
2363 | ||
2364 | highbit = fls(xfer_mask) - 1; | |
2365 | xfer_mask &= ~(1 << highbit); | |
2366 | if (force_pio0) | |
2367 | xfer_mask &= 1 << ATA_SHIFT_PIO; | |
2368 | if (!xfer_mask) | |
2369 | goto fail; | |
2370 | ||
2371 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
2372 | &dev->udma_mask); | |
2373 | ||
f15a1daf TH |
2374 | ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n", |
2375 | ata_mode_string(xfer_mask)); | |
cf176e1a TH |
2376 | |
2377 | return 0; | |
2378 | ||
2379 | fail: | |
2380 | return -EINVAL; | |
2381 | } | |
2382 | ||
3373efd8 | 2383 | static int ata_dev_set_mode(struct ata_device *dev) |
1da177e4 | 2384 | { |
baa1e78a | 2385 | struct ata_eh_context *ehc = &dev->ap->eh_context; |
83206a29 TH |
2386 | unsigned int err_mask; |
2387 | int rc; | |
1da177e4 | 2388 | |
e8384607 | 2389 | dev->flags &= ~ATA_DFLAG_PIO; |
1da177e4 LT |
2390 | if (dev->xfer_shift == ATA_SHIFT_PIO) |
2391 | dev->flags |= ATA_DFLAG_PIO; | |
2392 | ||
3373efd8 | 2393 | err_mask = ata_dev_set_xfermode(dev); |
83206a29 | 2394 | if (err_mask) { |
f15a1daf TH |
2395 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " |
2396 | "(err_mask=0x%x)\n", err_mask); | |
83206a29 TH |
2397 | return -EIO; |
2398 | } | |
1da177e4 | 2399 | |
baa1e78a | 2400 | ehc->i.flags |= ATA_EHI_POST_SETMODE; |
3373efd8 | 2401 | rc = ata_dev_revalidate(dev, 0); |
baa1e78a | 2402 | ehc->i.flags &= ~ATA_EHI_POST_SETMODE; |
5eb45c02 | 2403 | if (rc) |
83206a29 | 2404 | return rc; |
48a8a14f | 2405 | |
23e71c3d TH |
2406 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
2407 | dev->xfer_shift, (int)dev->xfer_mode); | |
1da177e4 | 2408 | |
f15a1daf TH |
2409 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", |
2410 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
83206a29 | 2411 | return 0; |
1da177e4 LT |
2412 | } |
2413 | ||
1da177e4 LT |
2414 | /** |
2415 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
2416 | * @ap: port on which timings will be programmed | |
e82cbdb9 | 2417 | * @r_failed_dev: out paramter for failed device |
1da177e4 | 2418 | * |
e82cbdb9 TH |
2419 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If |
2420 | * ata_set_mode() fails, pointer to the failing device is | |
2421 | * returned in @r_failed_dev. | |
780a87f7 | 2422 | * |
1da177e4 | 2423 | * LOCKING: |
0cba632b | 2424 | * PCI/etc. bus probe sem. |
e82cbdb9 TH |
2425 | * |
2426 | * RETURNS: | |
2427 | * 0 on success, negative errno otherwise | |
1da177e4 | 2428 | */ |
1ad8e7f9 | 2429 | int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) |
1da177e4 | 2430 | { |
e8e0619f | 2431 | struct ata_device *dev; |
e82cbdb9 | 2432 | int i, rc = 0, used_dma = 0, found = 0; |
1da177e4 | 2433 | |
3adcebb2 | 2434 | /* has private set_mode? */ |
b229a7b0 AC |
2435 | if (ap->ops->set_mode) |
2436 | return ap->ops->set_mode(ap, r_failed_dev); | |
3adcebb2 | 2437 | |
a6d5a51c TH |
2438 | /* step 1: calculate xfer_mask */ |
2439 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
acf356b1 | 2440 | unsigned int pio_mask, dma_mask; |
a6d5a51c | 2441 | |
e8e0619f TH |
2442 | dev = &ap->device[i]; |
2443 | ||
e1211e3f | 2444 | if (!ata_dev_enabled(dev)) |
a6d5a51c TH |
2445 | continue; |
2446 | ||
3373efd8 | 2447 | ata_dev_xfermask(dev); |
1da177e4 | 2448 | |
acf356b1 TH |
2449 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); |
2450 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
2451 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); | |
2452 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
5444a6f4 | 2453 | |
4f65977d | 2454 | found = 1; |
5444a6f4 AC |
2455 | if (dev->dma_mode) |
2456 | used_dma = 1; | |
a6d5a51c | 2457 | } |
4f65977d | 2458 | if (!found) |
e82cbdb9 | 2459 | goto out; |
a6d5a51c TH |
2460 | |
2461 | /* step 2: always set host PIO timings */ | |
e8e0619f TH |
2462 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2463 | dev = &ap->device[i]; | |
2464 | if (!ata_dev_enabled(dev)) | |
2465 | continue; | |
2466 | ||
2467 | if (!dev->pio_mode) { | |
f15a1daf | 2468 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); |
e8e0619f | 2469 | rc = -EINVAL; |
e82cbdb9 | 2470 | goto out; |
e8e0619f TH |
2471 | } |
2472 | ||
2473 | dev->xfer_mode = dev->pio_mode; | |
2474 | dev->xfer_shift = ATA_SHIFT_PIO; | |
2475 | if (ap->ops->set_piomode) | |
2476 | ap->ops->set_piomode(ap, dev); | |
2477 | } | |
1da177e4 | 2478 | |
a6d5a51c | 2479 | /* step 3: set host DMA timings */ |
e8e0619f TH |
2480 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2481 | dev = &ap->device[i]; | |
2482 | ||
2483 | if (!ata_dev_enabled(dev) || !dev->dma_mode) | |
2484 | continue; | |
2485 | ||
2486 | dev->xfer_mode = dev->dma_mode; | |
2487 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
2488 | if (ap->ops->set_dmamode) | |
2489 | ap->ops->set_dmamode(ap, dev); | |
2490 | } | |
1da177e4 LT |
2491 | |
2492 | /* step 4: update devices' xfer mode */ | |
83206a29 | 2493 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e8e0619f | 2494 | dev = &ap->device[i]; |
1da177e4 | 2495 | |
02670bf3 TH |
2496 | /* don't udpate suspended devices' xfer mode */ |
2497 | if (!ata_dev_ready(dev)) | |
83206a29 TH |
2498 | continue; |
2499 | ||
3373efd8 | 2500 | rc = ata_dev_set_mode(dev); |
5bbc53f4 | 2501 | if (rc) |
e82cbdb9 | 2502 | goto out; |
83206a29 | 2503 | } |
1da177e4 | 2504 | |
e8e0619f TH |
2505 | /* Record simplex status. If we selected DMA then the other |
2506 | * host channels are not permitted to do so. | |
5444a6f4 | 2507 | */ |
cca3974e JG |
2508 | if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) |
2509 | ap->host->simplex_claimed = 1; | |
5444a6f4 | 2510 | |
e8e0619f | 2511 | /* step5: chip specific finalisation */ |
1da177e4 LT |
2512 | if (ap->ops->post_set_mode) |
2513 | ap->ops->post_set_mode(ap); | |
2514 | ||
e82cbdb9 TH |
2515 | out: |
2516 | if (rc) | |
2517 | *r_failed_dev = dev; | |
2518 | return rc; | |
1da177e4 LT |
2519 | } |
2520 | ||
1fdffbce JG |
2521 | /** |
2522 | * ata_tf_to_host - issue ATA taskfile to host controller | |
2523 | * @ap: port to which command is being issued | |
2524 | * @tf: ATA taskfile register set | |
2525 | * | |
2526 | * Issues ATA taskfile register set to ATA host controller, | |
2527 | * with proper synchronization with interrupt handler and | |
2528 | * other threads. | |
2529 | * | |
2530 | * LOCKING: | |
cca3974e | 2531 | * spin_lock_irqsave(host lock) |
1fdffbce JG |
2532 | */ |
2533 | ||
2534 | static inline void ata_tf_to_host(struct ata_port *ap, | |
2535 | const struct ata_taskfile *tf) | |
2536 | { | |
2537 | ap->ops->tf_load(ap, tf); | |
2538 | ap->ops->exec_command(ap, tf); | |
2539 | } | |
2540 | ||
1da177e4 LT |
2541 | /** |
2542 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
2543 | * @ap: port containing status register to be polled | |
2544 | * @tmout_pat: impatience timeout | |
2545 | * @tmout: overall timeout | |
2546 | * | |
780a87f7 JG |
2547 | * Sleep until ATA Status register bit BSY clears, |
2548 | * or a timeout occurs. | |
2549 | * | |
d1adc1bb TH |
2550 | * LOCKING: |
2551 | * Kernel thread context (may sleep). | |
2552 | * | |
2553 | * RETURNS: | |
2554 | * 0 on success, -errno otherwise. | |
1da177e4 | 2555 | */ |
d1adc1bb TH |
2556 | int ata_busy_sleep(struct ata_port *ap, |
2557 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
2558 | { |
2559 | unsigned long timer_start, timeout; | |
2560 | u8 status; | |
2561 | ||
2562 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
2563 | timer_start = jiffies; | |
2564 | timeout = timer_start + tmout_pat; | |
d1adc1bb TH |
2565 | while (status != 0xff && (status & ATA_BUSY) && |
2566 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
2567 | msleep(50); |
2568 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
2569 | } | |
2570 | ||
d1adc1bb | 2571 | if (status != 0xff && (status & ATA_BUSY)) |
f15a1daf | 2572 | ata_port_printk(ap, KERN_WARNING, |
35aa7a43 JG |
2573 | "port is slow to respond, please be patient " |
2574 | "(Status 0x%x)\n", status); | |
1da177e4 LT |
2575 | |
2576 | timeout = timer_start + tmout; | |
d1adc1bb TH |
2577 | while (status != 0xff && (status & ATA_BUSY) && |
2578 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
2579 | msleep(50); |
2580 | status = ata_chk_status(ap); | |
2581 | } | |
2582 | ||
d1adc1bb TH |
2583 | if (status == 0xff) |
2584 | return -ENODEV; | |
2585 | ||
1da177e4 | 2586 | if (status & ATA_BUSY) { |
f15a1daf | 2587 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
35aa7a43 JG |
2588 | "(%lu secs, Status 0x%x)\n", |
2589 | tmout / HZ, status); | |
d1adc1bb | 2590 | return -EBUSY; |
1da177e4 LT |
2591 | } |
2592 | ||
2593 | return 0; | |
2594 | } | |
2595 | ||
2596 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
2597 | { | |
2598 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2599 | unsigned int dev0 = devmask & (1 << 0); | |
2600 | unsigned int dev1 = devmask & (1 << 1); | |
2601 | unsigned long timeout; | |
2602 | ||
2603 | /* if device 0 was found in ata_devchk, wait for its | |
2604 | * BSY bit to clear | |
2605 | */ | |
2606 | if (dev0) | |
2607 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2608 | ||
2609 | /* if device 1 was found in ata_devchk, wait for | |
2610 | * register access, then wait for BSY to clear | |
2611 | */ | |
2612 | timeout = jiffies + ATA_TMOUT_BOOT; | |
2613 | while (dev1) { | |
2614 | u8 nsect, lbal; | |
2615 | ||
2616 | ap->ops->dev_select(ap, 1); | |
2617 | if (ap->flags & ATA_FLAG_MMIO) { | |
2618 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
2619 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
2620 | } else { | |
2621 | nsect = inb(ioaddr->nsect_addr); | |
2622 | lbal = inb(ioaddr->lbal_addr); | |
2623 | } | |
2624 | if ((nsect == 1) && (lbal == 1)) | |
2625 | break; | |
2626 | if (time_after(jiffies, timeout)) { | |
2627 | dev1 = 0; | |
2628 | break; | |
2629 | } | |
2630 | msleep(50); /* give drive a breather */ | |
2631 | } | |
2632 | if (dev1) | |
2633 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2634 | ||
2635 | /* is all this really necessary? */ | |
2636 | ap->ops->dev_select(ap, 0); | |
2637 | if (dev1) | |
2638 | ap->ops->dev_select(ap, 1); | |
2639 | if (dev0) | |
2640 | ap->ops->dev_select(ap, 0); | |
2641 | } | |
2642 | ||
1da177e4 LT |
2643 | static unsigned int ata_bus_softreset(struct ata_port *ap, |
2644 | unsigned int devmask) | |
2645 | { | |
2646 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2647 | ||
2648 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
2649 | ||
2650 | /* software reset. causes dev0 to be selected */ | |
2651 | if (ap->flags & ATA_FLAG_MMIO) { | |
2652 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2653 | udelay(20); /* FIXME: flush */ | |
2654 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
2655 | udelay(20); /* FIXME: flush */ | |
2656 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2657 | } else { | |
2658 | outb(ap->ctl, ioaddr->ctl_addr); | |
2659 | udelay(10); | |
2660 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2661 | udelay(10); | |
2662 | outb(ap->ctl, ioaddr->ctl_addr); | |
2663 | } | |
2664 | ||
2665 | /* spec mandates ">= 2ms" before checking status. | |
2666 | * We wait 150ms, because that was the magic delay used for | |
2667 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2668 | * between when the ATA command register is written, and then | |
2669 | * status is checked. Because waiting for "a while" before | |
2670 | * checking status is fine, post SRST, we perform this magic | |
2671 | * delay here as well. | |
09c7ad79 AC |
2672 | * |
2673 | * Old drivers/ide uses the 2mS rule and then waits for ready | |
1da177e4 LT |
2674 | */ |
2675 | msleep(150); | |
2676 | ||
2e9edbf8 | 2677 | /* Before we perform post reset processing we want to see if |
298a41ca TH |
2678 | * the bus shows 0xFF because the odd clown forgets the D7 |
2679 | * pulldown resistor. | |
2680 | */ | |
d1adc1bb TH |
2681 | if (ata_check_status(ap) == 0xFF) |
2682 | return 0; | |
09c7ad79 | 2683 | |
1da177e4 LT |
2684 | ata_bus_post_reset(ap, devmask); |
2685 | ||
2686 | return 0; | |
2687 | } | |
2688 | ||
2689 | /** | |
2690 | * ata_bus_reset - reset host port and associated ATA channel | |
2691 | * @ap: port to reset | |
2692 | * | |
2693 | * This is typically the first time we actually start issuing | |
2694 | * commands to the ATA channel. We wait for BSY to clear, then | |
2695 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2696 | * result. Determine what devices, if any, are on the channel | |
2697 | * by looking at the device 0/1 error register. Look at the signature | |
2698 | * stored in each device's taskfile registers, to determine if | |
2699 | * the device is ATA or ATAPI. | |
2700 | * | |
2701 | * LOCKING: | |
0cba632b | 2702 | * PCI/etc. bus probe sem. |
cca3974e | 2703 | * Obtains host lock. |
1da177e4 LT |
2704 | * |
2705 | * SIDE EFFECTS: | |
198e0fed | 2706 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
1da177e4 LT |
2707 | */ |
2708 | ||
2709 | void ata_bus_reset(struct ata_port *ap) | |
2710 | { | |
2711 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2712 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2713 | u8 err; | |
aec5c3c1 | 2714 | unsigned int dev0, dev1 = 0, devmask = 0; |
1da177e4 LT |
2715 | |
2716 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2717 | ||
2718 | /* determine if device 0/1 are present */ | |
2719 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2720 | dev0 = 1; | |
2721 | else { | |
2722 | dev0 = ata_devchk(ap, 0); | |
2723 | if (slave_possible) | |
2724 | dev1 = ata_devchk(ap, 1); | |
2725 | } | |
2726 | ||
2727 | if (dev0) | |
2728 | devmask |= (1 << 0); | |
2729 | if (dev1) | |
2730 | devmask |= (1 << 1); | |
2731 | ||
2732 | /* select device 0 again */ | |
2733 | ap->ops->dev_select(ap, 0); | |
2734 | ||
2735 | /* issue bus reset */ | |
2736 | if (ap->flags & ATA_FLAG_SRST) | |
aec5c3c1 TH |
2737 | if (ata_bus_softreset(ap, devmask)) |
2738 | goto err_out; | |
1da177e4 LT |
2739 | |
2740 | /* | |
2741 | * determine by signature whether we have ATA or ATAPI devices | |
2742 | */ | |
b4dc7623 | 2743 | ap->device[0].class = ata_dev_try_classify(ap, 0, &err); |
1da177e4 | 2744 | if ((slave_possible) && (err != 0x81)) |
b4dc7623 | 2745 | ap->device[1].class = ata_dev_try_classify(ap, 1, &err); |
1da177e4 LT |
2746 | |
2747 | /* re-enable interrupts */ | |
2748 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2749 | ata_irq_on(ap); | |
2750 | ||
2751 | /* is double-select really necessary? */ | |
2752 | if (ap->device[1].class != ATA_DEV_NONE) | |
2753 | ap->ops->dev_select(ap, 1); | |
2754 | if (ap->device[0].class != ATA_DEV_NONE) | |
2755 | ap->ops->dev_select(ap, 0); | |
2756 | ||
2757 | /* if no devices were detected, disable this port */ | |
2758 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2759 | (ap->device[1].class == ATA_DEV_NONE)) | |
2760 | goto err_out; | |
2761 | ||
2762 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2763 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2764 | if (ap->flags & ATA_FLAG_MMIO) | |
2765 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2766 | else | |
2767 | outb(ap->ctl, ioaddr->ctl_addr); | |
2768 | } | |
2769 | ||
2770 | DPRINTK("EXIT\n"); | |
2771 | return; | |
2772 | ||
2773 | err_out: | |
f15a1daf | 2774 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
1da177e4 LT |
2775 | ap->ops->port_disable(ap); |
2776 | ||
2777 | DPRINTK("EXIT\n"); | |
2778 | } | |
2779 | ||
d7bb4cc7 TH |
2780 | /** |
2781 | * sata_phy_debounce - debounce SATA phy status | |
2782 | * @ap: ATA port to debounce SATA phy status for | |
2783 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2784 | * | |
2785 | * Make sure SStatus of @ap reaches stable state, determined by | |
2786 | * holding the same value where DET is not 1 for @duration polled | |
2787 | * every @interval, before @timeout. Timeout constraints the | |
2788 | * beginning of the stable state. Because, after hot unplugging, | |
2789 | * DET gets stuck at 1 on some controllers, this functions waits | |
2790 | * until timeout then returns 0 if DET is stable at 1. | |
2791 | * | |
2792 | * LOCKING: | |
2793 | * Kernel thread context (may sleep) | |
2794 | * | |
2795 | * RETURNS: | |
2796 | * 0 on success, -errno on failure. | |
2797 | */ | |
2798 | int sata_phy_debounce(struct ata_port *ap, const unsigned long *params) | |
7a7921e8 | 2799 | { |
d7bb4cc7 TH |
2800 | unsigned long interval_msec = params[0]; |
2801 | unsigned long duration = params[1] * HZ / 1000; | |
2802 | unsigned long timeout = jiffies + params[2] * HZ / 1000; | |
2803 | unsigned long last_jiffies; | |
2804 | u32 last, cur; | |
2805 | int rc; | |
2806 | ||
2807 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2808 | return rc; | |
2809 | cur &= 0xf; | |
2810 | ||
2811 | last = cur; | |
2812 | last_jiffies = jiffies; | |
2813 | ||
2814 | while (1) { | |
2815 | msleep(interval_msec); | |
2816 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2817 | return rc; | |
2818 | cur &= 0xf; | |
2819 | ||
2820 | /* DET stable? */ | |
2821 | if (cur == last) { | |
2822 | if (cur == 1 && time_before(jiffies, timeout)) | |
2823 | continue; | |
2824 | if (time_after(jiffies, last_jiffies + duration)) | |
2825 | return 0; | |
2826 | continue; | |
2827 | } | |
2828 | ||
2829 | /* unstable, start over */ | |
2830 | last = cur; | |
2831 | last_jiffies = jiffies; | |
2832 | ||
2833 | /* check timeout */ | |
2834 | if (time_after(jiffies, timeout)) | |
2835 | return -EBUSY; | |
2836 | } | |
2837 | } | |
2838 | ||
2839 | /** | |
2840 | * sata_phy_resume - resume SATA phy | |
2841 | * @ap: ATA port to resume SATA phy for | |
2842 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2843 | * | |
2844 | * Resume SATA phy of @ap and debounce it. | |
2845 | * | |
2846 | * LOCKING: | |
2847 | * Kernel thread context (may sleep) | |
2848 | * | |
2849 | * RETURNS: | |
2850 | * 0 on success, -errno on failure. | |
2851 | */ | |
2852 | int sata_phy_resume(struct ata_port *ap, const unsigned long *params) | |
2853 | { | |
2854 | u32 scontrol; | |
81952c54 TH |
2855 | int rc; |
2856 | ||
2857 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
2858 | return rc; | |
7a7921e8 | 2859 | |
852ee16a | 2860 | scontrol = (scontrol & 0x0f0) | 0x300; |
81952c54 TH |
2861 | |
2862 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2863 | return rc; | |
7a7921e8 | 2864 | |
d7bb4cc7 TH |
2865 | /* Some PHYs react badly if SStatus is pounded immediately |
2866 | * after resuming. Delay 200ms before debouncing. | |
2867 | */ | |
2868 | msleep(200); | |
7a7921e8 | 2869 | |
d7bb4cc7 | 2870 | return sata_phy_debounce(ap, params); |
7a7921e8 TH |
2871 | } |
2872 | ||
f5914a46 TH |
2873 | static void ata_wait_spinup(struct ata_port *ap) |
2874 | { | |
2875 | struct ata_eh_context *ehc = &ap->eh_context; | |
2876 | unsigned long end, secs; | |
2877 | int rc; | |
2878 | ||
2879 | /* first, debounce phy if SATA */ | |
2880 | if (ap->cbl == ATA_CBL_SATA) { | |
e9c83914 | 2881 | rc = sata_phy_debounce(ap, sata_deb_timing_hotplug); |
f5914a46 TH |
2882 | |
2883 | /* if debounced successfully and offline, no need to wait */ | |
2884 | if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap)) | |
2885 | return; | |
2886 | } | |
2887 | ||
2888 | /* okay, let's give the drive time to spin up */ | |
2889 | end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000; | |
2890 | secs = ((end - jiffies) + HZ - 1) / HZ; | |
2891 | ||
2892 | if (time_after(jiffies, end)) | |
2893 | return; | |
2894 | ||
2895 | if (secs > 5) | |
2896 | ata_port_printk(ap, KERN_INFO, "waiting for device to spin up " | |
2897 | "(%lu secs)\n", secs); | |
2898 | ||
2899 | schedule_timeout_uninterruptible(end - jiffies); | |
2900 | } | |
2901 | ||
2902 | /** | |
2903 | * ata_std_prereset - prepare for reset | |
2904 | * @ap: ATA port to be reset | |
2905 | * | |
2906 | * @ap is about to be reset. Initialize it. | |
2907 | * | |
2908 | * LOCKING: | |
2909 | * Kernel thread context (may sleep) | |
2910 | * | |
2911 | * RETURNS: | |
2912 | * 0 on success, -errno otherwise. | |
2913 | */ | |
2914 | int ata_std_prereset(struct ata_port *ap) | |
2915 | { | |
2916 | struct ata_eh_context *ehc = &ap->eh_context; | |
e9c83914 | 2917 | const unsigned long *timing = sata_ehc_deb_timing(ehc); |
f5914a46 TH |
2918 | int rc; |
2919 | ||
28324304 TH |
2920 | /* handle link resume & hotplug spinup */ |
2921 | if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && | |
2922 | (ap->flags & ATA_FLAG_HRST_TO_RESUME)) | |
2923 | ehc->i.action |= ATA_EH_HARDRESET; | |
2924 | ||
2925 | if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) && | |
2926 | (ap->flags & ATA_FLAG_SKIP_D2H_BSY)) | |
2927 | ata_wait_spinup(ap); | |
f5914a46 TH |
2928 | |
2929 | /* if we're about to do hardreset, nothing more to do */ | |
2930 | if (ehc->i.action & ATA_EH_HARDRESET) | |
2931 | return 0; | |
2932 | ||
2933 | /* if SATA, resume phy */ | |
2934 | if (ap->cbl == ATA_CBL_SATA) { | |
f5914a46 TH |
2935 | rc = sata_phy_resume(ap, timing); |
2936 | if (rc && rc != -EOPNOTSUPP) { | |
2937 | /* phy resume failed */ | |
2938 | ata_port_printk(ap, KERN_WARNING, "failed to resume " | |
2939 | "link for reset (errno=%d)\n", rc); | |
2940 | return rc; | |
2941 | } | |
2942 | } | |
2943 | ||
2944 | /* Wait for !BSY if the controller can wait for the first D2H | |
2945 | * Reg FIS and we don't know that no device is attached. | |
2946 | */ | |
2947 | if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) | |
2948 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2949 | ||
2950 | return 0; | |
2951 | } | |
2952 | ||
c2bd5804 TH |
2953 | /** |
2954 | * ata_std_softreset - reset host port via ATA SRST | |
2955 | * @ap: port to reset | |
c2bd5804 TH |
2956 | * @classes: resulting classes of attached devices |
2957 | * | |
52783c5d | 2958 | * Reset host port using ATA SRST. |
c2bd5804 TH |
2959 | * |
2960 | * LOCKING: | |
2961 | * Kernel thread context (may sleep) | |
2962 | * | |
2963 | * RETURNS: | |
2964 | * 0 on success, -errno otherwise. | |
2965 | */ | |
2bf2cb26 | 2966 | int ata_std_softreset(struct ata_port *ap, unsigned int *classes) |
c2bd5804 TH |
2967 | { |
2968 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2969 | unsigned int devmask = 0, err_mask; | |
2970 | u8 err; | |
2971 | ||
2972 | DPRINTK("ENTER\n"); | |
2973 | ||
81952c54 | 2974 | if (ata_port_offline(ap)) { |
3a39746a TH |
2975 | classes[0] = ATA_DEV_NONE; |
2976 | goto out; | |
2977 | } | |
2978 | ||
c2bd5804 TH |
2979 | /* determine if device 0/1 are present */ |
2980 | if (ata_devchk(ap, 0)) | |
2981 | devmask |= (1 << 0); | |
2982 | if (slave_possible && ata_devchk(ap, 1)) | |
2983 | devmask |= (1 << 1); | |
2984 | ||
c2bd5804 TH |
2985 | /* select device 0 again */ |
2986 | ap->ops->dev_select(ap, 0); | |
2987 | ||
2988 | /* issue bus reset */ | |
2989 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
2990 | err_mask = ata_bus_softreset(ap, devmask); | |
2991 | if (err_mask) { | |
f15a1daf TH |
2992 | ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n", |
2993 | err_mask); | |
c2bd5804 TH |
2994 | return -EIO; |
2995 | } | |
2996 | ||
2997 | /* determine by signature whether we have ATA or ATAPI devices */ | |
2998 | classes[0] = ata_dev_try_classify(ap, 0, &err); | |
2999 | if (slave_possible && err != 0x81) | |
3000 | classes[1] = ata_dev_try_classify(ap, 1, &err); | |
3001 | ||
3a39746a | 3002 | out: |
c2bd5804 TH |
3003 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
3004 | return 0; | |
3005 | } | |
3006 | ||
3007 | /** | |
b6103f6d | 3008 | * sata_port_hardreset - reset port via SATA phy reset |
c2bd5804 | 3009 | * @ap: port to reset |
b6103f6d | 3010 | * @timing: timing parameters { interval, duratinon, timeout } in msec |
c2bd5804 TH |
3011 | * |
3012 | * SATA phy-reset host port using DET bits of SControl register. | |
c2bd5804 TH |
3013 | * |
3014 | * LOCKING: | |
3015 | * Kernel thread context (may sleep) | |
3016 | * | |
3017 | * RETURNS: | |
3018 | * 0 on success, -errno otherwise. | |
3019 | */ | |
b6103f6d | 3020 | int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing) |
c2bd5804 | 3021 | { |
852ee16a | 3022 | u32 scontrol; |
81952c54 | 3023 | int rc; |
852ee16a | 3024 | |
c2bd5804 TH |
3025 | DPRINTK("ENTER\n"); |
3026 | ||
3c567b7d | 3027 | if (sata_set_spd_needed(ap)) { |
1c3fae4d TH |
3028 | /* SATA spec says nothing about how to reconfigure |
3029 | * spd. To be on the safe side, turn off phy during | |
3030 | * reconfiguration. This works for at least ICH7 AHCI | |
3031 | * and Sil3124. | |
3032 | */ | |
81952c54 | 3033 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
b6103f6d | 3034 | goto out; |
81952c54 | 3035 | |
a34b6fc0 | 3036 | scontrol = (scontrol & 0x0f0) | 0x304; |
81952c54 TH |
3037 | |
3038 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
b6103f6d | 3039 | goto out; |
1c3fae4d | 3040 | |
3c567b7d | 3041 | sata_set_spd(ap); |
1c3fae4d TH |
3042 | } |
3043 | ||
3044 | /* issue phy wake/reset */ | |
81952c54 | 3045 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
b6103f6d | 3046 | goto out; |
81952c54 | 3047 | |
852ee16a | 3048 | scontrol = (scontrol & 0x0f0) | 0x301; |
81952c54 TH |
3049 | |
3050 | if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) | |
b6103f6d | 3051 | goto out; |
c2bd5804 | 3052 | |
1c3fae4d | 3053 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
c2bd5804 TH |
3054 | * 10.4.2 says at least 1 ms. |
3055 | */ | |
3056 | msleep(1); | |
3057 | ||
1c3fae4d | 3058 | /* bring phy back */ |
b6103f6d TH |
3059 | rc = sata_phy_resume(ap, timing); |
3060 | out: | |
3061 | DPRINTK("EXIT, rc=%d\n", rc); | |
3062 | return rc; | |
3063 | } | |
3064 | ||
3065 | /** | |
3066 | * sata_std_hardreset - reset host port via SATA phy reset | |
3067 | * @ap: port to reset | |
3068 | * @class: resulting class of attached device | |
3069 | * | |
3070 | * SATA phy-reset host port using DET bits of SControl register, | |
3071 | * wait for !BSY and classify the attached device. | |
3072 | * | |
3073 | * LOCKING: | |
3074 | * Kernel thread context (may sleep) | |
3075 | * | |
3076 | * RETURNS: | |
3077 | * 0 on success, -errno otherwise. | |
3078 | */ | |
3079 | int sata_std_hardreset(struct ata_port *ap, unsigned int *class) | |
3080 | { | |
3081 | const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context); | |
3082 | int rc; | |
3083 | ||
3084 | DPRINTK("ENTER\n"); | |
3085 | ||
3086 | /* do hardreset */ | |
3087 | rc = sata_port_hardreset(ap, timing); | |
3088 | if (rc) { | |
3089 | ata_port_printk(ap, KERN_ERR, | |
3090 | "COMRESET failed (errno=%d)\n", rc); | |
3091 | return rc; | |
3092 | } | |
c2bd5804 | 3093 | |
c2bd5804 | 3094 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 3095 | if (ata_port_offline(ap)) { |
c2bd5804 TH |
3096 | *class = ATA_DEV_NONE; |
3097 | DPRINTK("EXIT, link offline\n"); | |
3098 | return 0; | |
3099 | } | |
3100 | ||
3101 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
f15a1daf TH |
3102 | ata_port_printk(ap, KERN_ERR, |
3103 | "COMRESET failed (device not ready)\n"); | |
c2bd5804 TH |
3104 | return -EIO; |
3105 | } | |
3106 | ||
3a39746a TH |
3107 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
3108 | ||
c2bd5804 TH |
3109 | *class = ata_dev_try_classify(ap, 0, NULL); |
3110 | ||
3111 | DPRINTK("EXIT, class=%u\n", *class); | |
3112 | return 0; | |
3113 | } | |
3114 | ||
3115 | /** | |
3116 | * ata_std_postreset - standard postreset callback | |
3117 | * @ap: the target ata_port | |
3118 | * @classes: classes of attached devices | |
3119 | * | |
3120 | * This function is invoked after a successful reset. Note that | |
3121 | * the device might have been reset more than once using | |
3122 | * different reset methods before postreset is invoked. | |
c2bd5804 | 3123 | * |
c2bd5804 TH |
3124 | * LOCKING: |
3125 | * Kernel thread context (may sleep) | |
3126 | */ | |
3127 | void ata_std_postreset(struct ata_port *ap, unsigned int *classes) | |
3128 | { | |
dc2b3515 TH |
3129 | u32 serror; |
3130 | ||
c2bd5804 TH |
3131 | DPRINTK("ENTER\n"); |
3132 | ||
c2bd5804 | 3133 | /* print link status */ |
81952c54 | 3134 | sata_print_link_status(ap); |
c2bd5804 | 3135 | |
dc2b3515 TH |
3136 | /* clear SError */ |
3137 | if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) | |
3138 | sata_scr_write(ap, SCR_ERROR, serror); | |
3139 | ||
3a39746a | 3140 | /* re-enable interrupts */ |
e3180499 TH |
3141 | if (!ap->ops->error_handler) { |
3142 | /* FIXME: hack. create a hook instead */ | |
3143 | if (ap->ioaddr.ctl_addr) | |
3144 | ata_irq_on(ap); | |
3145 | } | |
c2bd5804 TH |
3146 | |
3147 | /* is double-select really necessary? */ | |
3148 | if (classes[0] != ATA_DEV_NONE) | |
3149 | ap->ops->dev_select(ap, 1); | |
3150 | if (classes[1] != ATA_DEV_NONE) | |
3151 | ap->ops->dev_select(ap, 0); | |
3152 | ||
3a39746a TH |
3153 | /* bail out if no device is present */ |
3154 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
3155 | DPRINTK("EXIT, no device\n"); | |
3156 | return; | |
3157 | } | |
3158 | ||
3159 | /* set up device control */ | |
3160 | if (ap->ioaddr.ctl_addr) { | |
3161 | if (ap->flags & ATA_FLAG_MMIO) | |
3162 | writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
3163 | else | |
3164 | outb(ap->ctl, ap->ioaddr.ctl_addr); | |
3165 | } | |
c2bd5804 TH |
3166 | |
3167 | DPRINTK("EXIT\n"); | |
3168 | } | |
3169 | ||
623a3128 TH |
3170 | /** |
3171 | * ata_dev_same_device - Determine whether new ID matches configured device | |
623a3128 TH |
3172 | * @dev: device to compare against |
3173 | * @new_class: class of the new device | |
3174 | * @new_id: IDENTIFY page of the new device | |
3175 | * | |
3176 | * Compare @new_class and @new_id against @dev and determine | |
3177 | * whether @dev is the device indicated by @new_class and | |
3178 | * @new_id. | |
3179 | * | |
3180 | * LOCKING: | |
3181 | * None. | |
3182 | * | |
3183 | * RETURNS: | |
3184 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
3185 | */ | |
3373efd8 TH |
3186 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, |
3187 | const u16 *new_id) | |
623a3128 TH |
3188 | { |
3189 | const u16 *old_id = dev->id; | |
3190 | unsigned char model[2][41], serial[2][21]; | |
3191 | u64 new_n_sectors; | |
3192 | ||
3193 | if (dev->class != new_class) { | |
f15a1daf TH |
3194 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", |
3195 | dev->class, new_class); | |
623a3128 TH |
3196 | return 0; |
3197 | } | |
3198 | ||
3199 | ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0])); | |
3200 | ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1])); | |
3201 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0])); | |
3202 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1])); | |
3203 | new_n_sectors = ata_id_n_sectors(new_id); | |
3204 | ||
3205 | if (strcmp(model[0], model[1])) { | |
f15a1daf TH |
3206 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " |
3207 | "'%s' != '%s'\n", model[0], model[1]); | |
623a3128 TH |
3208 | return 0; |
3209 | } | |
3210 | ||
3211 | if (strcmp(serial[0], serial[1])) { | |
f15a1daf TH |
3212 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " |
3213 | "'%s' != '%s'\n", serial[0], serial[1]); | |
623a3128 TH |
3214 | return 0; |
3215 | } | |
3216 | ||
3217 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { | |
f15a1daf TH |
3218 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " |
3219 | "%llu != %llu\n", | |
3220 | (unsigned long long)dev->n_sectors, | |
3221 | (unsigned long long)new_n_sectors); | |
623a3128 TH |
3222 | return 0; |
3223 | } | |
3224 | ||
3225 | return 1; | |
3226 | } | |
3227 | ||
3228 | /** | |
3229 | * ata_dev_revalidate - Revalidate ATA device | |
623a3128 | 3230 | * @dev: device to revalidate |
bff04647 | 3231 | * @readid_flags: read ID flags |
623a3128 TH |
3232 | * |
3233 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
3234 | * the port. | |
3235 | * | |
3236 | * LOCKING: | |
3237 | * Kernel thread context (may sleep) | |
3238 | * | |
3239 | * RETURNS: | |
3240 | * 0 on success, negative errno otherwise | |
3241 | */ | |
bff04647 | 3242 | int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags) |
623a3128 | 3243 | { |
5eb45c02 | 3244 | unsigned int class = dev->class; |
f15a1daf | 3245 | u16 *id = (void *)dev->ap->sector_buf; |
623a3128 TH |
3246 | int rc; |
3247 | ||
5eb45c02 TH |
3248 | if (!ata_dev_enabled(dev)) { |
3249 | rc = -ENODEV; | |
3250 | goto fail; | |
3251 | } | |
623a3128 | 3252 | |
fe635c7e | 3253 | /* read ID data */ |
bff04647 | 3254 | rc = ata_dev_read_id(dev, &class, readid_flags, id); |
623a3128 TH |
3255 | if (rc) |
3256 | goto fail; | |
3257 | ||
3258 | /* is the device still there? */ | |
3373efd8 | 3259 | if (!ata_dev_same_device(dev, class, id)) { |
623a3128 TH |
3260 | rc = -ENODEV; |
3261 | goto fail; | |
3262 | } | |
3263 | ||
fe635c7e | 3264 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); |
623a3128 TH |
3265 | |
3266 | /* configure device according to the new ID */ | |
efdaedc4 | 3267 | rc = ata_dev_configure(dev); |
5eb45c02 TH |
3268 | if (rc == 0) |
3269 | return 0; | |
623a3128 TH |
3270 | |
3271 | fail: | |
f15a1daf | 3272 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); |
623a3128 TH |
3273 | return rc; |
3274 | } | |
3275 | ||
6919a0a6 AC |
3276 | struct ata_blacklist_entry { |
3277 | const char *model_num; | |
3278 | const char *model_rev; | |
3279 | unsigned long horkage; | |
3280 | }; | |
3281 | ||
3282 | static const struct ata_blacklist_entry ata_device_blacklist [] = { | |
3283 | /* Devices with DMA related problems under Linux */ | |
3284 | { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, | |
3285 | { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, | |
3286 | { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, | |
3287 | { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, | |
3288 | { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, | |
3289 | { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, | |
3290 | { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, | |
3291 | { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, | |
3292 | { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, | |
3293 | { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, | |
3294 | { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, | |
3295 | { "CRD-84", NULL, ATA_HORKAGE_NODMA }, | |
3296 | { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, | |
3297 | { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, | |
3298 | { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, | |
3299 | { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, | |
3300 | { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, | |
3301 | { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, | |
3302 | { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, | |
3303 | { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, | |
3304 | { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, | |
3305 | { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, | |
3306 | { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, | |
3307 | { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, | |
3308 | { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, | |
3309 | { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, | |
3310 | { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, | |
3311 | { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, | |
3312 | { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, | |
3313 | { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA }, | |
3314 | ||
3315 | /* Devices we expect to fail diagnostics */ | |
3316 | ||
3317 | /* Devices where NCQ should be avoided */ | |
3318 | /* NCQ is slow */ | |
3319 | { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, | |
3320 | ||
3321 | /* Devices with NCQ limits */ | |
3322 | ||
3323 | /* End Marker */ | |
3324 | { } | |
1da177e4 | 3325 | }; |
2e9edbf8 | 3326 | |
f4b15fef AC |
3327 | static int ata_strim(char *s, size_t len) |
3328 | { | |
3329 | len = strnlen(s, len); | |
3330 | ||
3331 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
3332 | while ((len > 0) && (s[len - 1] == ' ')) { | |
3333 | len--; | |
3334 | s[len] = 0; | |
3335 | } | |
3336 | return len; | |
3337 | } | |
1da177e4 | 3338 | |
6919a0a6 | 3339 | unsigned long ata_device_blacklisted(const struct ata_device *dev) |
1da177e4 | 3340 | { |
f4b15fef AC |
3341 | unsigned char model_num[40]; |
3342 | unsigned char model_rev[16]; | |
3343 | unsigned int nlen, rlen; | |
6919a0a6 | 3344 | const struct ata_blacklist_entry *ad = ata_device_blacklist; |
3a778275 | 3345 | |
f4b15fef AC |
3346 | ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS, |
3347 | sizeof(model_num)); | |
3348 | ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS, | |
3349 | sizeof(model_rev)); | |
3350 | nlen = ata_strim(model_num, sizeof(model_num)); | |
3351 | rlen = ata_strim(model_rev, sizeof(model_rev)); | |
1da177e4 | 3352 | |
6919a0a6 AC |
3353 | while (ad->model_num) { |
3354 | if (!strncmp(ad->model_num, model_num, nlen)) { | |
3355 | if (ad->model_rev == NULL) | |
3356 | return ad->horkage; | |
3357 | if (!strncmp(ad->model_rev, model_rev, rlen)) | |
3358 | return ad->horkage; | |
f4b15fef | 3359 | } |
6919a0a6 | 3360 | ad++; |
f4b15fef | 3361 | } |
1da177e4 LT |
3362 | return 0; |
3363 | } | |
3364 | ||
6919a0a6 AC |
3365 | static int ata_dma_blacklisted(const struct ata_device *dev) |
3366 | { | |
3367 | /* We don't support polling DMA. | |
3368 | * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) | |
3369 | * if the LLDD handles only interrupts in the HSM_ST_LAST state. | |
3370 | */ | |
3371 | if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) && | |
3372 | (dev->flags & ATA_DFLAG_CDB_INTR)) | |
3373 | return 1; | |
3374 | return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0; | |
3375 | } | |
3376 | ||
a6d5a51c TH |
3377 | /** |
3378 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
a6d5a51c TH |
3379 | * @dev: Device to compute xfermask for |
3380 | * | |
acf356b1 TH |
3381 | * Compute supported xfermask of @dev and store it in |
3382 | * dev->*_mask. This function is responsible for applying all | |
3383 | * known limits including host controller limits, device | |
3384 | * blacklist, etc... | |
a6d5a51c TH |
3385 | * |
3386 | * LOCKING: | |
3387 | * None. | |
a6d5a51c | 3388 | */ |
3373efd8 | 3389 | static void ata_dev_xfermask(struct ata_device *dev) |
1da177e4 | 3390 | { |
3373efd8 | 3391 | struct ata_port *ap = dev->ap; |
cca3974e | 3392 | struct ata_host *host = ap->host; |
a6d5a51c | 3393 | unsigned long xfer_mask; |
1da177e4 | 3394 | |
37deecb5 | 3395 | /* controller modes available */ |
565083e1 TH |
3396 | xfer_mask = ata_pack_xfermask(ap->pio_mask, |
3397 | ap->mwdma_mask, ap->udma_mask); | |
3398 | ||
3399 | /* Apply cable rule here. Don't apply it early because when | |
3400 | * we handle hot plug the cable type can itself change. | |
3401 | */ | |
3402 | if (ap->cbl == ATA_CBL_PATA40) | |
3403 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
fc085150 AC |
3404 | /* Apply drive side cable rule. Unknown or 80 pin cables reported |
3405 | * host side are checked drive side as well. Cases where we know a | |
3406 | * 40wire cable is used safely for 80 are not checked here. | |
3407 | */ | |
3408 | if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80)) | |
3409 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
3410 | ||
1da177e4 | 3411 | |
37deecb5 TH |
3412 | xfer_mask &= ata_pack_xfermask(dev->pio_mask, |
3413 | dev->mwdma_mask, dev->udma_mask); | |
3414 | xfer_mask &= ata_id_xfermask(dev->id); | |
565083e1 | 3415 | |
b352e57d AC |
3416 | /* |
3417 | * CFA Advanced TrueIDE timings are not allowed on a shared | |
3418 | * cable | |
3419 | */ | |
3420 | if (ata_dev_pair(dev)) { | |
3421 | /* No PIO5 or PIO6 */ | |
3422 | xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); | |
3423 | /* No MWDMA3 or MWDMA 4 */ | |
3424 | xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); | |
3425 | } | |
3426 | ||
37deecb5 TH |
3427 | if (ata_dma_blacklisted(dev)) { |
3428 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
f15a1daf TH |
3429 | ata_dev_printk(dev, KERN_WARNING, |
3430 | "device is on DMA blacklist, disabling DMA\n"); | |
37deecb5 | 3431 | } |
a6d5a51c | 3432 | |
cca3974e | 3433 | if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) { |
37deecb5 TH |
3434 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); |
3435 | ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " | |
3436 | "other device, disabling DMA\n"); | |
5444a6f4 | 3437 | } |
565083e1 | 3438 | |
5444a6f4 AC |
3439 | if (ap->ops->mode_filter) |
3440 | xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask); | |
3441 | ||
565083e1 TH |
3442 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, |
3443 | &dev->mwdma_mask, &dev->udma_mask); | |
1da177e4 LT |
3444 | } |
3445 | ||
1da177e4 LT |
3446 | /** |
3447 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
1da177e4 LT |
3448 | * @dev: Device to which command will be sent |
3449 | * | |
780a87f7 JG |
3450 | * Issue SET FEATURES - XFER MODE command to device @dev |
3451 | * on port @ap. | |
3452 | * | |
1da177e4 | 3453 | * LOCKING: |
0cba632b | 3454 | * PCI/etc. bus probe sem. |
83206a29 TH |
3455 | * |
3456 | * RETURNS: | |
3457 | * 0 on success, AC_ERR_* mask otherwise. | |
1da177e4 LT |
3458 | */ |
3459 | ||
3373efd8 | 3460 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) |
1da177e4 | 3461 | { |
a0123703 | 3462 | struct ata_taskfile tf; |
83206a29 | 3463 | unsigned int err_mask; |
1da177e4 LT |
3464 | |
3465 | /* set up set-features taskfile */ | |
3466 | DPRINTK("set features - xfer mode\n"); | |
3467 | ||
3373efd8 | 3468 | ata_tf_init(dev, &tf); |
a0123703 TH |
3469 | tf.command = ATA_CMD_SET_FEATURES; |
3470 | tf.feature = SETFEATURES_XFER; | |
3471 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3472 | tf.protocol = ATA_PROT_NODATA; | |
3473 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 3474 | |
3373efd8 | 3475 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
1da177e4 | 3476 | |
83206a29 TH |
3477 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3478 | return err_mask; | |
1da177e4 LT |
3479 | } |
3480 | ||
8bf62ece AL |
3481 | /** |
3482 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
8bf62ece | 3483 | * @dev: Device to which command will be sent |
e2a7f77a RD |
3484 | * @heads: Number of heads (taskfile parameter) |
3485 | * @sectors: Number of sectors (taskfile parameter) | |
8bf62ece AL |
3486 | * |
3487 | * LOCKING: | |
6aff8f1f TH |
3488 | * Kernel thread context (may sleep) |
3489 | * | |
3490 | * RETURNS: | |
3491 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece | 3492 | */ |
3373efd8 TH |
3493 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
3494 | u16 heads, u16 sectors) | |
8bf62ece | 3495 | { |
a0123703 | 3496 | struct ata_taskfile tf; |
6aff8f1f | 3497 | unsigned int err_mask; |
8bf62ece AL |
3498 | |
3499 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
3500 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
00b6f5e9 | 3501 | return AC_ERR_INVALID; |
8bf62ece AL |
3502 | |
3503 | /* set up init dev params taskfile */ | |
3504 | DPRINTK("init dev params \n"); | |
3505 | ||
3373efd8 | 3506 | ata_tf_init(dev, &tf); |
a0123703 TH |
3507 | tf.command = ATA_CMD_INIT_DEV_PARAMS; |
3508 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3509 | tf.protocol = ATA_PROT_NODATA; | |
3510 | tf.nsect = sectors; | |
3511 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 3512 | |
3373efd8 | 3513 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
8bf62ece | 3514 | |
6aff8f1f TH |
3515 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3516 | return err_mask; | |
8bf62ece AL |
3517 | } |
3518 | ||
1da177e4 | 3519 | /** |
0cba632b JG |
3520 | * ata_sg_clean - Unmap DMA memory associated with command |
3521 | * @qc: Command containing DMA memory to be released | |
3522 | * | |
3523 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
3524 | * |
3525 | * LOCKING: | |
cca3974e | 3526 | * spin_lock_irqsave(host lock) |
1da177e4 | 3527 | */ |
70e6ad0c | 3528 | void ata_sg_clean(struct ata_queued_cmd *qc) |
1da177e4 LT |
3529 | { |
3530 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 3531 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3532 | int dir = qc->dma_dir; |
cedc9a47 | 3533 | void *pad_buf = NULL; |
1da177e4 | 3534 | |
a4631474 TH |
3535 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
3536 | WARN_ON(sg == NULL); | |
1da177e4 LT |
3537 | |
3538 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 3539 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 3540 | |
2c13b7ce | 3541 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 3542 | |
cedc9a47 JG |
3543 | /* if we padded the buffer out to 32-bit bound, and data |
3544 | * xfer direction is from-device, we must copy from the | |
3545 | * pad buffer back into the supplied buffer | |
3546 | */ | |
3547 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
3548 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3549 | ||
3550 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d | 3551 | if (qc->n_elem) |
2f1f610b | 3552 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); |
cedc9a47 JG |
3553 | /* restore last sg */ |
3554 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
3555 | if (pad_buf) { | |
3556 | struct scatterlist *psg = &qc->pad_sgent; | |
3557 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3558 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 3559 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3560 | } |
3561 | } else { | |
2e242fa9 | 3562 | if (qc->n_elem) |
2f1f610b | 3563 | dma_unmap_single(ap->dev, |
e1410f2d JG |
3564 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), |
3565 | dir); | |
cedc9a47 JG |
3566 | /* restore sg */ |
3567 | sg->length += qc->pad_len; | |
3568 | if (pad_buf) | |
3569 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
3570 | pad_buf, qc->pad_len); | |
3571 | } | |
1da177e4 LT |
3572 | |
3573 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 3574 | qc->__sg = NULL; |
1da177e4 LT |
3575 | } |
3576 | ||
3577 | /** | |
3578 | * ata_fill_sg - Fill PCI IDE PRD table | |
3579 | * @qc: Metadata associated with taskfile to be transferred | |
3580 | * | |
780a87f7 JG |
3581 | * Fill PCI IDE PRD (scatter-gather) table with segments |
3582 | * associated with the current disk command. | |
3583 | * | |
1da177e4 | 3584 | * LOCKING: |
cca3974e | 3585 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3586 | * |
3587 | */ | |
3588 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
3589 | { | |
1da177e4 | 3590 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
3591 | struct scatterlist *sg; |
3592 | unsigned int idx; | |
1da177e4 | 3593 | |
a4631474 | 3594 | WARN_ON(qc->__sg == NULL); |
f131883e | 3595 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
3596 | |
3597 | idx = 0; | |
cedc9a47 | 3598 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
3599 | u32 addr, offset; |
3600 | u32 sg_len, len; | |
3601 | ||
3602 | /* determine if physical DMA addr spans 64K boundary. | |
3603 | * Note h/w doesn't support 64-bit, so we unconditionally | |
3604 | * truncate dma_addr_t to u32. | |
3605 | */ | |
3606 | addr = (u32) sg_dma_address(sg); | |
3607 | sg_len = sg_dma_len(sg); | |
3608 | ||
3609 | while (sg_len) { | |
3610 | offset = addr & 0xffff; | |
3611 | len = sg_len; | |
3612 | if ((offset + sg_len) > 0x10000) | |
3613 | len = 0x10000 - offset; | |
3614 | ||
3615 | ap->prd[idx].addr = cpu_to_le32(addr); | |
3616 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
3617 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
3618 | ||
3619 | idx++; | |
3620 | sg_len -= len; | |
3621 | addr += len; | |
3622 | } | |
3623 | } | |
3624 | ||
3625 | if (idx) | |
3626 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
3627 | } | |
3628 | /** | |
3629 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
3630 | * @qc: Metadata associated with taskfile to check | |
3631 | * | |
780a87f7 JG |
3632 | * Allow low-level driver to filter ATA PACKET commands, returning |
3633 | * a status indicating whether or not it is OK to use DMA for the | |
3634 | * supplied PACKET command. | |
3635 | * | |
1da177e4 | 3636 | * LOCKING: |
cca3974e | 3637 | * spin_lock_irqsave(host lock) |
0cba632b | 3638 | * |
1da177e4 LT |
3639 | * RETURNS: 0 when ATAPI DMA can be used |
3640 | * nonzero otherwise | |
3641 | */ | |
3642 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
3643 | { | |
3644 | struct ata_port *ap = qc->ap; | |
3645 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
3646 | ||
3647 | if (ap->ops->check_atapi_dma) | |
3648 | rc = ap->ops->check_atapi_dma(qc); | |
3649 | ||
3650 | return rc; | |
3651 | } | |
3652 | /** | |
3653 | * ata_qc_prep - Prepare taskfile for submission | |
3654 | * @qc: Metadata associated with taskfile to be prepared | |
3655 | * | |
780a87f7 JG |
3656 | * Prepare ATA taskfile for submission. |
3657 | * | |
1da177e4 | 3658 | * LOCKING: |
cca3974e | 3659 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3660 | */ |
3661 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
3662 | { | |
3663 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3664 | return; | |
3665 | ||
3666 | ata_fill_sg(qc); | |
3667 | } | |
3668 | ||
e46834cd BK |
3669 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } |
3670 | ||
0cba632b JG |
3671 | /** |
3672 | * ata_sg_init_one - Associate command with memory buffer | |
3673 | * @qc: Command to be associated | |
3674 | * @buf: Memory buffer | |
3675 | * @buflen: Length of memory buffer, in bytes. | |
3676 | * | |
3677 | * Initialize the data-related elements of queued_cmd @qc | |
3678 | * to point to a single memory buffer, @buf of byte length @buflen. | |
3679 | * | |
3680 | * LOCKING: | |
cca3974e | 3681 | * spin_lock_irqsave(host lock) |
0cba632b JG |
3682 | */ |
3683 | ||
1da177e4 LT |
3684 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
3685 | { | |
1da177e4 LT |
3686 | qc->flags |= ATA_QCFLAG_SINGLE; |
3687 | ||
cedc9a47 | 3688 | qc->__sg = &qc->sgent; |
1da177e4 | 3689 | qc->n_elem = 1; |
cedc9a47 | 3690 | qc->orig_n_elem = 1; |
1da177e4 | 3691 | qc->buf_virt = buf; |
233277ca | 3692 | qc->nbytes = buflen; |
1da177e4 | 3693 | |
61c0596c | 3694 | sg_init_one(&qc->sgent, buf, buflen); |
1da177e4 LT |
3695 | } |
3696 | ||
0cba632b JG |
3697 | /** |
3698 | * ata_sg_init - Associate command with scatter-gather table. | |
3699 | * @qc: Command to be associated | |
3700 | * @sg: Scatter-gather table. | |
3701 | * @n_elem: Number of elements in s/g table. | |
3702 | * | |
3703 | * Initialize the data-related elements of queued_cmd @qc | |
3704 | * to point to a scatter-gather table @sg, containing @n_elem | |
3705 | * elements. | |
3706 | * | |
3707 | * LOCKING: | |
cca3974e | 3708 | * spin_lock_irqsave(host lock) |
0cba632b JG |
3709 | */ |
3710 | ||
1da177e4 LT |
3711 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
3712 | unsigned int n_elem) | |
3713 | { | |
3714 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 3715 | qc->__sg = sg; |
1da177e4 | 3716 | qc->n_elem = n_elem; |
cedc9a47 | 3717 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
3718 | } |
3719 | ||
3720 | /** | |
0cba632b JG |
3721 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
3722 | * @qc: Command with memory buffer to be mapped. | |
3723 | * | |
3724 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
3725 | * |
3726 | * LOCKING: | |
cca3974e | 3727 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3728 | * |
3729 | * RETURNS: | |
0cba632b | 3730 | * Zero on success, negative on error. |
1da177e4 LT |
3731 | */ |
3732 | ||
3733 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
3734 | { | |
3735 | struct ata_port *ap = qc->ap; | |
3736 | int dir = qc->dma_dir; | |
cedc9a47 | 3737 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3738 | dma_addr_t dma_address; |
2e242fa9 | 3739 | int trim_sg = 0; |
1da177e4 | 3740 | |
cedc9a47 JG |
3741 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3742 | qc->pad_len = sg->length & 3; | |
3743 | if (qc->pad_len) { | |
3744 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3745 | struct scatterlist *psg = &qc->pad_sgent; | |
3746 | ||
a4631474 | 3747 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3748 | |
3749 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3750 | ||
3751 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
3752 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
3753 | qc->pad_len); | |
3754 | ||
3755 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3756 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3757 | /* trim sg */ | |
3758 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
3759 | if (sg->length == 0) |
3760 | trim_sg = 1; | |
cedc9a47 JG |
3761 | |
3762 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
3763 | sg->length, qc->pad_len); | |
3764 | } | |
3765 | ||
2e242fa9 TH |
3766 | if (trim_sg) { |
3767 | qc->n_elem--; | |
e1410f2d JG |
3768 | goto skip_map; |
3769 | } | |
3770 | ||
2f1f610b | 3771 | dma_address = dma_map_single(ap->dev, qc->buf_virt, |
32529e01 | 3772 | sg->length, dir); |
537a95d9 TH |
3773 | if (dma_mapping_error(dma_address)) { |
3774 | /* restore sg */ | |
3775 | sg->length += qc->pad_len; | |
1da177e4 | 3776 | return -1; |
537a95d9 | 3777 | } |
1da177e4 LT |
3778 | |
3779 | sg_dma_address(sg) = dma_address; | |
32529e01 | 3780 | sg_dma_len(sg) = sg->length; |
1da177e4 | 3781 | |
2e242fa9 | 3782 | skip_map: |
1da177e4 LT |
3783 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
3784 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3785 | ||
3786 | return 0; | |
3787 | } | |
3788 | ||
3789 | /** | |
0cba632b JG |
3790 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
3791 | * @qc: Command with scatter-gather table to be mapped. | |
3792 | * | |
3793 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
3794 | * |
3795 | * LOCKING: | |
cca3974e | 3796 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3797 | * |
3798 | * RETURNS: | |
0cba632b | 3799 | * Zero on success, negative on error. |
1da177e4 LT |
3800 | * |
3801 | */ | |
3802 | ||
3803 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
3804 | { | |
3805 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
3806 | struct scatterlist *sg = qc->__sg; |
3807 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 3808 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 LT |
3809 | |
3810 | VPRINTK("ENTER, ata%u\n", ap->id); | |
a4631474 | 3811 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 3812 | |
cedc9a47 JG |
3813 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3814 | qc->pad_len = lsg->length & 3; | |
3815 | if (qc->pad_len) { | |
3816 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3817 | struct scatterlist *psg = &qc->pad_sgent; | |
3818 | unsigned int offset; | |
3819 | ||
a4631474 | 3820 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3821 | |
3822 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3823 | ||
3824 | /* | |
3825 | * psg->page/offset are used to copy to-be-written | |
3826 | * data in this function or read data in ata_sg_clean. | |
3827 | */ | |
3828 | offset = lsg->offset + lsg->length - qc->pad_len; | |
3829 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
3830 | psg->offset = offset_in_page(offset); | |
3831 | ||
3832 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
3833 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3834 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 3835 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3836 | } |
3837 | ||
3838 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3839 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3840 | /* trim last sg */ | |
3841 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
3842 | if (lsg->length == 0) |
3843 | trim_sg = 1; | |
cedc9a47 JG |
3844 | |
3845 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
3846 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
3847 | } | |
3848 | ||
e1410f2d JG |
3849 | pre_n_elem = qc->n_elem; |
3850 | if (trim_sg && pre_n_elem) | |
3851 | pre_n_elem--; | |
3852 | ||
3853 | if (!pre_n_elem) { | |
3854 | n_elem = 0; | |
3855 | goto skip_map; | |
3856 | } | |
3857 | ||
1da177e4 | 3858 | dir = qc->dma_dir; |
2f1f610b | 3859 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
3860 | if (n_elem < 1) { |
3861 | /* restore last sg */ | |
3862 | lsg->length += qc->pad_len; | |
1da177e4 | 3863 | return -1; |
537a95d9 | 3864 | } |
1da177e4 LT |
3865 | |
3866 | DPRINTK("%d sg elements mapped\n", n_elem); | |
3867 | ||
e1410f2d | 3868 | skip_map: |
1da177e4 LT |
3869 | qc->n_elem = n_elem; |
3870 | ||
3871 | return 0; | |
3872 | } | |
3873 | ||
0baab86b | 3874 | /** |
c893a3ae | 3875 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
3876 | * @buf: Buffer to swap |
3877 | * @buf_words: Number of 16-bit words in buffer. | |
3878 | * | |
3879 | * Swap halves of 16-bit words if needed to convert from | |
3880 | * little-endian byte order to native cpu byte order, or | |
3881 | * vice-versa. | |
3882 | * | |
3883 | * LOCKING: | |
6f0ef4fa | 3884 | * Inherited from caller. |
0baab86b | 3885 | */ |
1da177e4 LT |
3886 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
3887 | { | |
3888 | #ifdef __BIG_ENDIAN | |
3889 | unsigned int i; | |
3890 | ||
3891 | for (i = 0; i < buf_words; i++) | |
3892 | buf[i] = le16_to_cpu(buf[i]); | |
3893 | #endif /* __BIG_ENDIAN */ | |
3894 | } | |
3895 | ||
6ae4cfb5 AL |
3896 | /** |
3897 | * ata_mmio_data_xfer - Transfer data by MMIO | |
bf717b11 | 3898 | * @adev: device for this I/O |
6ae4cfb5 AL |
3899 | * @buf: data buffer |
3900 | * @buflen: buffer length | |
344babaa | 3901 | * @write_data: read/write |
6ae4cfb5 AL |
3902 | * |
3903 | * Transfer data from/to the device data register by MMIO. | |
3904 | * | |
3905 | * LOCKING: | |
3906 | * Inherited from caller. | |
6ae4cfb5 AL |
3907 | */ |
3908 | ||
88574551 | 3909 | void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, |
a6b2c5d4 | 3910 | unsigned int buflen, int write_data) |
1da177e4 | 3911 | { |
a6b2c5d4 | 3912 | struct ata_port *ap = adev->ap; |
1da177e4 LT |
3913 | unsigned int i; |
3914 | unsigned int words = buflen >> 1; | |
3915 | u16 *buf16 = (u16 *) buf; | |
3916 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
3917 | ||
6ae4cfb5 | 3918 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
3919 | if (write_data) { |
3920 | for (i = 0; i < words; i++) | |
3921 | writew(le16_to_cpu(buf16[i]), mmio); | |
3922 | } else { | |
3923 | for (i = 0; i < words; i++) | |
3924 | buf16[i] = cpu_to_le16(readw(mmio)); | |
3925 | } | |
6ae4cfb5 AL |
3926 | |
3927 | /* Transfer trailing 1 byte, if any. */ | |
3928 | if (unlikely(buflen & 0x01)) { | |
3929 | u16 align_buf[1] = { 0 }; | |
3930 | unsigned char *trailing_buf = buf + buflen - 1; | |
3931 | ||
3932 | if (write_data) { | |
3933 | memcpy(align_buf, trailing_buf, 1); | |
3934 | writew(le16_to_cpu(align_buf[0]), mmio); | |
3935 | } else { | |
3936 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
3937 | memcpy(trailing_buf, align_buf, 1); | |
3938 | } | |
3939 | } | |
1da177e4 LT |
3940 | } |
3941 | ||
6ae4cfb5 AL |
3942 | /** |
3943 | * ata_pio_data_xfer - Transfer data by PIO | |
a6b2c5d4 | 3944 | * @adev: device to target |
6ae4cfb5 AL |
3945 | * @buf: data buffer |
3946 | * @buflen: buffer length | |
344babaa | 3947 | * @write_data: read/write |
6ae4cfb5 AL |
3948 | * |
3949 | * Transfer data from/to the device data register by PIO. | |
3950 | * | |
3951 | * LOCKING: | |
3952 | * Inherited from caller. | |
6ae4cfb5 AL |
3953 | */ |
3954 | ||
88574551 | 3955 | void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf, |
a6b2c5d4 | 3956 | unsigned int buflen, int write_data) |
1da177e4 | 3957 | { |
a6b2c5d4 | 3958 | struct ata_port *ap = adev->ap; |
6ae4cfb5 | 3959 | unsigned int words = buflen >> 1; |
1da177e4 | 3960 | |
6ae4cfb5 | 3961 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 3962 | if (write_data) |
6ae4cfb5 | 3963 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 3964 | else |
6ae4cfb5 AL |
3965 | insw(ap->ioaddr.data_addr, buf, words); |
3966 | ||
3967 | /* Transfer trailing 1 byte, if any. */ | |
3968 | if (unlikely(buflen & 0x01)) { | |
3969 | u16 align_buf[1] = { 0 }; | |
3970 | unsigned char *trailing_buf = buf + buflen - 1; | |
3971 | ||
3972 | if (write_data) { | |
3973 | memcpy(align_buf, trailing_buf, 1); | |
3974 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3975 | } else { | |
3976 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
3977 | memcpy(trailing_buf, align_buf, 1); | |
3978 | } | |
3979 | } | |
1da177e4 LT |
3980 | } |
3981 | ||
75e99585 AC |
3982 | /** |
3983 | * ata_pio_data_xfer_noirq - Transfer data by PIO | |
3984 | * @adev: device to target | |
3985 | * @buf: data buffer | |
3986 | * @buflen: buffer length | |
3987 | * @write_data: read/write | |
3988 | * | |
88574551 | 3989 | * Transfer data from/to the device data register by PIO. Do the |
75e99585 AC |
3990 | * transfer with interrupts disabled. |
3991 | * | |
3992 | * LOCKING: | |
3993 | * Inherited from caller. | |
3994 | */ | |
3995 | ||
3996 | void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, | |
3997 | unsigned int buflen, int write_data) | |
3998 | { | |
3999 | unsigned long flags; | |
4000 | local_irq_save(flags); | |
4001 | ata_pio_data_xfer(adev, buf, buflen, write_data); | |
4002 | local_irq_restore(flags); | |
4003 | } | |
4004 | ||
4005 | ||
6ae4cfb5 AL |
4006 | /** |
4007 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
4008 | * @qc: Command on going | |
4009 | * | |
4010 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
4011 | * | |
4012 | * LOCKING: | |
4013 | * Inherited from caller. | |
4014 | */ | |
4015 | ||
1da177e4 LT |
4016 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
4017 | { | |
4018 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 4019 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
4020 | struct ata_port *ap = qc->ap; |
4021 | struct page *page; | |
4022 | unsigned int offset; | |
4023 | unsigned char *buf; | |
4024 | ||
4025 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 4026 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
4027 | |
4028 | page = sg[qc->cursg].page; | |
4029 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
4030 | ||
4031 | /* get the current page and offset */ | |
4032 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
4033 | offset %= PAGE_SIZE; | |
4034 | ||
1da177e4 LT |
4035 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
4036 | ||
91b8b313 AL |
4037 | if (PageHighMem(page)) { |
4038 | unsigned long flags; | |
4039 | ||
a6b2c5d4 | 4040 | /* FIXME: use a bounce buffer */ |
91b8b313 AL |
4041 | local_irq_save(flags); |
4042 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 4043 | |
91b8b313 | 4044 | /* do the actual data transfer */ |
a6b2c5d4 | 4045 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
1da177e4 | 4046 | |
91b8b313 AL |
4047 | kunmap_atomic(buf, KM_IRQ0); |
4048 | local_irq_restore(flags); | |
4049 | } else { | |
4050 | buf = page_address(page); | |
a6b2c5d4 | 4051 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
91b8b313 | 4052 | } |
1da177e4 LT |
4053 | |
4054 | qc->cursect++; | |
4055 | qc->cursg_ofs++; | |
4056 | ||
32529e01 | 4057 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
4058 | qc->cursg++; |
4059 | qc->cursg_ofs = 0; | |
4060 | } | |
1da177e4 | 4061 | } |
1da177e4 | 4062 | |
07f6f7d0 AL |
4063 | /** |
4064 | * ata_pio_sectors - Transfer one or many 512-byte sectors. | |
4065 | * @qc: Command on going | |
4066 | * | |
c81e29b4 | 4067 | * Transfer one or many ATA_SECT_SIZE of data from/to the |
07f6f7d0 AL |
4068 | * ATA device for the DRQ request. |
4069 | * | |
4070 | * LOCKING: | |
4071 | * Inherited from caller. | |
4072 | */ | |
1da177e4 | 4073 | |
07f6f7d0 AL |
4074 | static void ata_pio_sectors(struct ata_queued_cmd *qc) |
4075 | { | |
4076 | if (is_multi_taskfile(&qc->tf)) { | |
4077 | /* READ/WRITE MULTIPLE */ | |
4078 | unsigned int nsect; | |
4079 | ||
587005de | 4080 | WARN_ON(qc->dev->multi_count == 0); |
1da177e4 | 4081 | |
07f6f7d0 AL |
4082 | nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count); |
4083 | while (nsect--) | |
4084 | ata_pio_sector(qc); | |
4085 | } else | |
4086 | ata_pio_sector(qc); | |
4087 | } | |
4088 | ||
c71c1857 AL |
4089 | /** |
4090 | * atapi_send_cdb - Write CDB bytes to hardware | |
4091 | * @ap: Port to which ATAPI device is attached. | |
4092 | * @qc: Taskfile currently active | |
4093 | * | |
4094 | * When device has indicated its readiness to accept | |
4095 | * a CDB, this function is called. Send the CDB. | |
4096 | * | |
4097 | * LOCKING: | |
4098 | * caller. | |
4099 | */ | |
4100 | ||
4101 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
4102 | { | |
4103 | /* send SCSI cdb */ | |
4104 | DPRINTK("send cdb\n"); | |
db024d53 | 4105 | WARN_ON(qc->dev->cdb_len < 12); |
c71c1857 | 4106 | |
a6b2c5d4 | 4107 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); |
c71c1857 AL |
4108 | ata_altstatus(ap); /* flush */ |
4109 | ||
4110 | switch (qc->tf.protocol) { | |
4111 | case ATA_PROT_ATAPI: | |
4112 | ap->hsm_task_state = HSM_ST; | |
4113 | break; | |
4114 | case ATA_PROT_ATAPI_NODATA: | |
4115 | ap->hsm_task_state = HSM_ST_LAST; | |
4116 | break; | |
4117 | case ATA_PROT_ATAPI_DMA: | |
4118 | ap->hsm_task_state = HSM_ST_LAST; | |
4119 | /* initiate bmdma */ | |
4120 | ap->ops->bmdma_start(qc); | |
4121 | break; | |
4122 | } | |
1da177e4 LT |
4123 | } |
4124 | ||
6ae4cfb5 AL |
4125 | /** |
4126 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4127 | * @qc: Command on going | |
4128 | * @bytes: number of bytes | |
4129 | * | |
4130 | * Transfer Transfer data from/to the ATAPI device. | |
4131 | * | |
4132 | * LOCKING: | |
4133 | * Inherited from caller. | |
4134 | * | |
4135 | */ | |
4136 | ||
1da177e4 LT |
4137 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
4138 | { | |
4139 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 4140 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
4141 | struct ata_port *ap = qc->ap; |
4142 | struct page *page; | |
4143 | unsigned char *buf; | |
4144 | unsigned int offset, count; | |
4145 | ||
563a6e1f | 4146 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 4147 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
4148 | |
4149 | next_sg: | |
563a6e1f | 4150 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 4151 | /* |
563a6e1f AL |
4152 | * The end of qc->sg is reached and the device expects |
4153 | * more data to transfer. In order not to overrun qc->sg | |
4154 | * and fulfill length specified in the byte count register, | |
4155 | * - for read case, discard trailing data from the device | |
4156 | * - for write case, padding zero data to the device | |
4157 | */ | |
4158 | u16 pad_buf[1] = { 0 }; | |
4159 | unsigned int words = bytes >> 1; | |
4160 | unsigned int i; | |
4161 | ||
4162 | if (words) /* warning if bytes > 1 */ | |
f15a1daf TH |
4163 | ata_dev_printk(qc->dev, KERN_WARNING, |
4164 | "%u bytes trailing data\n", bytes); | |
563a6e1f AL |
4165 | |
4166 | for (i = 0; i < words; i++) | |
a6b2c5d4 | 4167 | ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write); |
563a6e1f | 4168 | |
14be71f4 | 4169 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
4170 | return; |
4171 | } | |
4172 | ||
cedc9a47 | 4173 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 4174 | |
1da177e4 LT |
4175 | page = sg->page; |
4176 | offset = sg->offset + qc->cursg_ofs; | |
4177 | ||
4178 | /* get the current page and offset */ | |
4179 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
4180 | offset %= PAGE_SIZE; | |
4181 | ||
6952df03 | 4182 | /* don't overrun current sg */ |
32529e01 | 4183 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
4184 | |
4185 | /* don't cross page boundaries */ | |
4186 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
4187 | ||
7282aa4b AL |
4188 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
4189 | ||
91b8b313 AL |
4190 | if (PageHighMem(page)) { |
4191 | unsigned long flags; | |
4192 | ||
a6b2c5d4 | 4193 | /* FIXME: use bounce buffer */ |
91b8b313 AL |
4194 | local_irq_save(flags); |
4195 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 4196 | |
91b8b313 | 4197 | /* do the actual data transfer */ |
a6b2c5d4 | 4198 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
7282aa4b | 4199 | |
91b8b313 AL |
4200 | kunmap_atomic(buf, KM_IRQ0); |
4201 | local_irq_restore(flags); | |
4202 | } else { | |
4203 | buf = page_address(page); | |
a6b2c5d4 | 4204 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
91b8b313 | 4205 | } |
1da177e4 LT |
4206 | |
4207 | bytes -= count; | |
4208 | qc->curbytes += count; | |
4209 | qc->cursg_ofs += count; | |
4210 | ||
32529e01 | 4211 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
4212 | qc->cursg++; |
4213 | qc->cursg_ofs = 0; | |
4214 | } | |
4215 | ||
563a6e1f | 4216 | if (bytes) |
1da177e4 | 4217 | goto next_sg; |
1da177e4 LT |
4218 | } |
4219 | ||
6ae4cfb5 AL |
4220 | /** |
4221 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4222 | * @qc: Command on going | |
4223 | * | |
4224 | * Transfer Transfer data from/to the ATAPI device. | |
4225 | * | |
4226 | * LOCKING: | |
4227 | * Inherited from caller. | |
6ae4cfb5 AL |
4228 | */ |
4229 | ||
1da177e4 LT |
4230 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
4231 | { | |
4232 | struct ata_port *ap = qc->ap; | |
4233 | struct ata_device *dev = qc->dev; | |
4234 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
4235 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
4236 | ||
eec4c3f3 AL |
4237 | /* Abuse qc->result_tf for temp storage of intermediate TF |
4238 | * here to save some kernel stack usage. | |
4239 | * For normal completion, qc->result_tf is not relevant. For | |
4240 | * error, qc->result_tf is later overwritten by ata_qc_complete(). | |
4241 | * So, the correctness of qc->result_tf is not affected. | |
4242 | */ | |
4243 | ap->ops->tf_read(ap, &qc->result_tf); | |
4244 | ireason = qc->result_tf.nsect; | |
4245 | bc_lo = qc->result_tf.lbam; | |
4246 | bc_hi = qc->result_tf.lbah; | |
1da177e4 LT |
4247 | bytes = (bc_hi << 8) | bc_lo; |
4248 | ||
4249 | /* shall be cleared to zero, indicating xfer of data */ | |
4250 | if (ireason & (1 << 0)) | |
4251 | goto err_out; | |
4252 | ||
4253 | /* make sure transfer direction matches expected */ | |
4254 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
4255 | if (do_write != i_write) | |
4256 | goto err_out; | |
4257 | ||
312f7da2 AL |
4258 | VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes); |
4259 | ||
1da177e4 LT |
4260 | __atapi_pio_bytes(qc, bytes); |
4261 | ||
4262 | return; | |
4263 | ||
4264 | err_out: | |
f15a1daf | 4265 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); |
11a56d24 | 4266 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 4267 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
4268 | } |
4269 | ||
4270 | /** | |
c234fb00 AL |
4271 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. |
4272 | * @ap: the target ata_port | |
4273 | * @qc: qc on going | |
1da177e4 | 4274 | * |
c234fb00 AL |
4275 | * RETURNS: |
4276 | * 1 if ok in workqueue, 0 otherwise. | |
1da177e4 | 4277 | */ |
c234fb00 AL |
4278 | |
4279 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) | |
1da177e4 | 4280 | { |
c234fb00 AL |
4281 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4282 | return 1; | |
1da177e4 | 4283 | |
c234fb00 AL |
4284 | if (ap->hsm_task_state == HSM_ST_FIRST) { |
4285 | if (qc->tf.protocol == ATA_PROT_PIO && | |
4286 | (qc->tf.flags & ATA_TFLAG_WRITE)) | |
4287 | return 1; | |
1da177e4 | 4288 | |
c234fb00 AL |
4289 | if (is_atapi_taskfile(&qc->tf) && |
4290 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
4291 | return 1; | |
fe79e683 AL |
4292 | } |
4293 | ||
c234fb00 AL |
4294 | return 0; |
4295 | } | |
1da177e4 | 4296 | |
c17ea20d TH |
4297 | /** |
4298 | * ata_hsm_qc_complete - finish a qc running on standard HSM | |
4299 | * @qc: Command to complete | |
4300 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4301 | * | |
4302 | * Finish @qc which is running on standard HSM. | |
4303 | * | |
4304 | * LOCKING: | |
cca3974e | 4305 | * If @in_wq is zero, spin_lock_irqsave(host lock). |
c17ea20d TH |
4306 | * Otherwise, none on entry and grabs host lock. |
4307 | */ | |
4308 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) | |
4309 | { | |
4310 | struct ata_port *ap = qc->ap; | |
4311 | unsigned long flags; | |
4312 | ||
4313 | if (ap->ops->error_handler) { | |
4314 | if (in_wq) { | |
ba6a1308 | 4315 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d | 4316 | |
cca3974e JG |
4317 | /* EH might have kicked in while host lock is |
4318 | * released. | |
c17ea20d TH |
4319 | */ |
4320 | qc = ata_qc_from_tag(ap, qc->tag); | |
4321 | if (qc) { | |
4322 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { | |
4323 | ata_irq_on(ap); | |
4324 | ata_qc_complete(qc); | |
4325 | } else | |
4326 | ata_port_freeze(ap); | |
4327 | } | |
4328 | ||
ba6a1308 | 4329 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
4330 | } else { |
4331 | if (likely(!(qc->err_mask & AC_ERR_HSM))) | |
4332 | ata_qc_complete(qc); | |
4333 | else | |
4334 | ata_port_freeze(ap); | |
4335 | } | |
4336 | } else { | |
4337 | if (in_wq) { | |
ba6a1308 | 4338 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d TH |
4339 | ata_irq_on(ap); |
4340 | ata_qc_complete(qc); | |
ba6a1308 | 4341 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
4342 | } else |
4343 | ata_qc_complete(qc); | |
4344 | } | |
1da177e4 | 4345 | |
c81e29b4 | 4346 | ata_altstatus(ap); /* flush */ |
c17ea20d TH |
4347 | } |
4348 | ||
bb5cb290 AL |
4349 | /** |
4350 | * ata_hsm_move - move the HSM to the next state. | |
4351 | * @ap: the target ata_port | |
4352 | * @qc: qc on going | |
4353 | * @status: current device status | |
4354 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4355 | * | |
4356 | * RETURNS: | |
4357 | * 1 when poll next status needed, 0 otherwise. | |
4358 | */ | |
9a1004d0 TH |
4359 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, |
4360 | u8 status, int in_wq) | |
e2cec771 | 4361 | { |
bb5cb290 AL |
4362 | unsigned long flags = 0; |
4363 | int poll_next; | |
4364 | ||
6912ccd5 AL |
4365 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); |
4366 | ||
bb5cb290 AL |
4367 | /* Make sure ata_qc_issue_prot() does not throw things |
4368 | * like DMA polling into the workqueue. Notice that | |
4369 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). | |
4370 | */ | |
c234fb00 | 4371 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); |
bb5cb290 | 4372 | |
e2cec771 | 4373 | fsm_start: |
999bb6f4 AL |
4374 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
4375 | ap->id, qc->tf.protocol, ap->hsm_task_state, status); | |
4376 | ||
e2cec771 AL |
4377 | switch (ap->hsm_task_state) { |
4378 | case HSM_ST_FIRST: | |
bb5cb290 AL |
4379 | /* Send first data block or PACKET CDB */ |
4380 | ||
4381 | /* If polling, we will stay in the work queue after | |
4382 | * sending the data. Otherwise, interrupt handler | |
4383 | * takes over after sending the data. | |
4384 | */ | |
4385 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
4386 | ||
e2cec771 | 4387 | /* check device status */ |
3655d1d3 AL |
4388 | if (unlikely((status & ATA_DRQ) == 0)) { |
4389 | /* handle BSY=0, DRQ=0 as error */ | |
4390 | if (likely(status & (ATA_ERR | ATA_DF))) | |
4391 | /* device stops HSM for abort/error */ | |
4392 | qc->err_mask |= AC_ERR_DEV; | |
4393 | else | |
4394 | /* HSM violation. Let EH handle this */ | |
4395 | qc->err_mask |= AC_ERR_HSM; | |
4396 | ||
14be71f4 | 4397 | ap->hsm_task_state = HSM_ST_ERR; |
e2cec771 | 4398 | goto fsm_start; |
1da177e4 LT |
4399 | } |
4400 | ||
71601958 AL |
4401 | /* Device should not ask for data transfer (DRQ=1) |
4402 | * when it finds something wrong. | |
eee6c32f AL |
4403 | * We ignore DRQ here and stop the HSM by |
4404 | * changing hsm_task_state to HSM_ST_ERR and | |
4405 | * let the EH abort the command or reset the device. | |
71601958 AL |
4406 | */ |
4407 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4408 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4409 | ap->id, status); | |
3655d1d3 | 4410 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4411 | ap->hsm_task_state = HSM_ST_ERR; |
4412 | goto fsm_start; | |
71601958 | 4413 | } |
1da177e4 | 4414 | |
bb5cb290 AL |
4415 | /* Send the CDB (atapi) or the first data block (ata pio out). |
4416 | * During the state transition, interrupt handler shouldn't | |
4417 | * be invoked before the data transfer is complete and | |
4418 | * hsm_task_state is changed. Hence, the following locking. | |
4419 | */ | |
4420 | if (in_wq) | |
ba6a1308 | 4421 | spin_lock_irqsave(ap->lock, flags); |
1da177e4 | 4422 | |
bb5cb290 AL |
4423 | if (qc->tf.protocol == ATA_PROT_PIO) { |
4424 | /* PIO data out protocol. | |
4425 | * send first data block. | |
4426 | */ | |
0565c26d | 4427 | |
bb5cb290 AL |
4428 | /* ata_pio_sectors() might change the state |
4429 | * to HSM_ST_LAST. so, the state is changed here | |
4430 | * before ata_pio_sectors(). | |
4431 | */ | |
4432 | ap->hsm_task_state = HSM_ST; | |
4433 | ata_pio_sectors(qc); | |
4434 | ata_altstatus(ap); /* flush */ | |
4435 | } else | |
4436 | /* send CDB */ | |
4437 | atapi_send_cdb(ap, qc); | |
4438 | ||
4439 | if (in_wq) | |
ba6a1308 | 4440 | spin_unlock_irqrestore(ap->lock, flags); |
bb5cb290 AL |
4441 | |
4442 | /* if polling, ata_pio_task() handles the rest. | |
4443 | * otherwise, interrupt handler takes over from here. | |
4444 | */ | |
e2cec771 | 4445 | break; |
1c848984 | 4446 | |
e2cec771 AL |
4447 | case HSM_ST: |
4448 | /* complete command or read/write the data register */ | |
4449 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
4450 | /* ATAPI PIO protocol */ | |
4451 | if ((status & ATA_DRQ) == 0) { | |
3655d1d3 AL |
4452 | /* No more data to transfer or device error. |
4453 | * Device error will be tagged in HSM_ST_LAST. | |
4454 | */ | |
e2cec771 AL |
4455 | ap->hsm_task_state = HSM_ST_LAST; |
4456 | goto fsm_start; | |
4457 | } | |
1da177e4 | 4458 | |
71601958 AL |
4459 | /* Device should not ask for data transfer (DRQ=1) |
4460 | * when it finds something wrong. | |
eee6c32f AL |
4461 | * We ignore DRQ here and stop the HSM by |
4462 | * changing hsm_task_state to HSM_ST_ERR and | |
4463 | * let the EH abort the command or reset the device. | |
71601958 AL |
4464 | */ |
4465 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4466 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4467 | ap->id, status); | |
3655d1d3 | 4468 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4469 | ap->hsm_task_state = HSM_ST_ERR; |
4470 | goto fsm_start; | |
71601958 | 4471 | } |
1da177e4 | 4472 | |
e2cec771 | 4473 | atapi_pio_bytes(qc); |
7fb6ec28 | 4474 | |
e2cec771 AL |
4475 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) |
4476 | /* bad ireason reported by device */ | |
4477 | goto fsm_start; | |
1da177e4 | 4478 | |
e2cec771 AL |
4479 | } else { |
4480 | /* ATA PIO protocol */ | |
4481 | if (unlikely((status & ATA_DRQ) == 0)) { | |
4482 | /* handle BSY=0, DRQ=0 as error */ | |
3655d1d3 AL |
4483 | if (likely(status & (ATA_ERR | ATA_DF))) |
4484 | /* device stops HSM for abort/error */ | |
4485 | qc->err_mask |= AC_ERR_DEV; | |
4486 | else | |
55a8e2c8 TH |
4487 | /* HSM violation. Let EH handle this. |
4488 | * Phantom devices also trigger this | |
4489 | * condition. Mark hint. | |
4490 | */ | |
4491 | qc->err_mask |= AC_ERR_HSM | | |
4492 | AC_ERR_NODEV_HINT; | |
3655d1d3 | 4493 | |
e2cec771 AL |
4494 | ap->hsm_task_state = HSM_ST_ERR; |
4495 | goto fsm_start; | |
4496 | } | |
1da177e4 | 4497 | |
eee6c32f AL |
4498 | /* For PIO reads, some devices may ask for |
4499 | * data transfer (DRQ=1) alone with ERR=1. | |
4500 | * We respect DRQ here and transfer one | |
4501 | * block of junk data before changing the | |
4502 | * hsm_task_state to HSM_ST_ERR. | |
4503 | * | |
4504 | * For PIO writes, ERR=1 DRQ=1 doesn't make | |
4505 | * sense since the data block has been | |
4506 | * transferred to the device. | |
71601958 AL |
4507 | */ |
4508 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
71601958 AL |
4509 | /* data might be corrputed */ |
4510 | qc->err_mask |= AC_ERR_DEV; | |
eee6c32f AL |
4511 | |
4512 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { | |
4513 | ata_pio_sectors(qc); | |
4514 | ata_altstatus(ap); | |
4515 | status = ata_wait_idle(ap); | |
4516 | } | |
4517 | ||
3655d1d3 AL |
4518 | if (status & (ATA_BUSY | ATA_DRQ)) |
4519 | qc->err_mask |= AC_ERR_HSM; | |
4520 | ||
eee6c32f AL |
4521 | /* ata_pio_sectors() might change the |
4522 | * state to HSM_ST_LAST. so, the state | |
4523 | * is changed after ata_pio_sectors(). | |
4524 | */ | |
4525 | ap->hsm_task_state = HSM_ST_ERR; | |
4526 | goto fsm_start; | |
71601958 AL |
4527 | } |
4528 | ||
e2cec771 AL |
4529 | ata_pio_sectors(qc); |
4530 | ||
4531 | if (ap->hsm_task_state == HSM_ST_LAST && | |
4532 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
4533 | /* all data read */ | |
4534 | ata_altstatus(ap); | |
52a32205 | 4535 | status = ata_wait_idle(ap); |
e2cec771 AL |
4536 | goto fsm_start; |
4537 | } | |
4538 | } | |
4539 | ||
4540 | ata_altstatus(ap); /* flush */ | |
bb5cb290 | 4541 | poll_next = 1; |
1da177e4 LT |
4542 | break; |
4543 | ||
14be71f4 | 4544 | case HSM_ST_LAST: |
6912ccd5 AL |
4545 | if (unlikely(!ata_ok(status))) { |
4546 | qc->err_mask |= __ac_err_mask(status); | |
e2cec771 AL |
4547 | ap->hsm_task_state = HSM_ST_ERR; |
4548 | goto fsm_start; | |
4549 | } | |
4550 | ||
4551 | /* no more data to transfer */ | |
4332a771 AL |
4552 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", |
4553 | ap->id, qc->dev->devno, status); | |
e2cec771 | 4554 | |
6912ccd5 AL |
4555 | WARN_ON(qc->err_mask); |
4556 | ||
e2cec771 | 4557 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 4558 | |
e2cec771 | 4559 | /* complete taskfile transaction */ |
c17ea20d | 4560 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4561 | |
4562 | poll_next = 0; | |
1da177e4 LT |
4563 | break; |
4564 | ||
14be71f4 | 4565 | case HSM_ST_ERR: |
e2cec771 AL |
4566 | /* make sure qc->err_mask is available to |
4567 | * know what's wrong and recover | |
4568 | */ | |
4569 | WARN_ON(qc->err_mask == 0); | |
4570 | ||
4571 | ap->hsm_task_state = HSM_ST_IDLE; | |
bb5cb290 | 4572 | |
999bb6f4 | 4573 | /* complete taskfile transaction */ |
c17ea20d | 4574 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4575 | |
4576 | poll_next = 0; | |
e2cec771 AL |
4577 | break; |
4578 | default: | |
bb5cb290 | 4579 | poll_next = 0; |
6912ccd5 | 4580 | BUG(); |
1da177e4 LT |
4581 | } |
4582 | ||
bb5cb290 | 4583 | return poll_next; |
1da177e4 LT |
4584 | } |
4585 | ||
65f27f38 | 4586 | static void ata_pio_task(struct work_struct *work) |
8061f5f0 | 4587 | { |
65f27f38 DH |
4588 | struct ata_port *ap = |
4589 | container_of(work, struct ata_port, port_task.work); | |
4590 | struct ata_queued_cmd *qc = ap->port_task_data; | |
8061f5f0 | 4591 | u8 status; |
a1af3734 | 4592 | int poll_next; |
8061f5f0 | 4593 | |
7fb6ec28 | 4594 | fsm_start: |
a1af3734 | 4595 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); |
8061f5f0 | 4596 | |
a1af3734 AL |
4597 | /* |
4598 | * This is purely heuristic. This is a fast path. | |
4599 | * Sometimes when we enter, BSY will be cleared in | |
4600 | * a chk-status or two. If not, the drive is probably seeking | |
4601 | * or something. Snooze for a couple msecs, then | |
4602 | * chk-status again. If still busy, queue delayed work. | |
4603 | */ | |
4604 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
4605 | if (status & ATA_BUSY) { | |
4606 | msleep(2); | |
4607 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
4608 | if (status & ATA_BUSY) { | |
31ce6dae | 4609 | ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); |
a1af3734 AL |
4610 | return; |
4611 | } | |
8061f5f0 TH |
4612 | } |
4613 | ||
a1af3734 AL |
4614 | /* move the HSM */ |
4615 | poll_next = ata_hsm_move(ap, qc, status, 1); | |
8061f5f0 | 4616 | |
a1af3734 AL |
4617 | /* another command or interrupt handler |
4618 | * may be running at this point. | |
4619 | */ | |
4620 | if (poll_next) | |
7fb6ec28 | 4621 | goto fsm_start; |
8061f5f0 TH |
4622 | } |
4623 | ||
1da177e4 LT |
4624 | /** |
4625 | * ata_qc_new - Request an available ATA command, for queueing | |
4626 | * @ap: Port associated with device @dev | |
4627 | * @dev: Device from whom we request an available command structure | |
4628 | * | |
4629 | * LOCKING: | |
0cba632b | 4630 | * None. |
1da177e4 LT |
4631 | */ |
4632 | ||
4633 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
4634 | { | |
4635 | struct ata_queued_cmd *qc = NULL; | |
4636 | unsigned int i; | |
4637 | ||
e3180499 | 4638 | /* no command while frozen */ |
b51e9e5d | 4639 | if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) |
e3180499 TH |
4640 | return NULL; |
4641 | ||
2ab7db1f TH |
4642 | /* the last tag is reserved for internal command. */ |
4643 | for (i = 0; i < ATA_MAX_QUEUE - 1; i++) | |
6cec4a39 | 4644 | if (!test_and_set_bit(i, &ap->qc_allocated)) { |
f69499f4 | 4645 | qc = __ata_qc_from_tag(ap, i); |
1da177e4 LT |
4646 | break; |
4647 | } | |
4648 | ||
4649 | if (qc) | |
4650 | qc->tag = i; | |
4651 | ||
4652 | return qc; | |
4653 | } | |
4654 | ||
4655 | /** | |
4656 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
1da177e4 LT |
4657 | * @dev: Device from whom we request an available command structure |
4658 | * | |
4659 | * LOCKING: | |
0cba632b | 4660 | * None. |
1da177e4 LT |
4661 | */ |
4662 | ||
3373efd8 | 4663 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) |
1da177e4 | 4664 | { |
3373efd8 | 4665 | struct ata_port *ap = dev->ap; |
1da177e4 LT |
4666 | struct ata_queued_cmd *qc; |
4667 | ||
4668 | qc = ata_qc_new(ap); | |
4669 | if (qc) { | |
1da177e4 LT |
4670 | qc->scsicmd = NULL; |
4671 | qc->ap = ap; | |
4672 | qc->dev = dev; | |
1da177e4 | 4673 | |
2c13b7ce | 4674 | ata_qc_reinit(qc); |
1da177e4 LT |
4675 | } |
4676 | ||
4677 | return qc; | |
4678 | } | |
4679 | ||
1da177e4 LT |
4680 | /** |
4681 | * ata_qc_free - free unused ata_queued_cmd | |
4682 | * @qc: Command to complete | |
4683 | * | |
4684 | * Designed to free unused ata_queued_cmd object | |
4685 | * in case something prevents using it. | |
4686 | * | |
4687 | * LOCKING: | |
cca3974e | 4688 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4689 | */ |
4690 | void ata_qc_free(struct ata_queued_cmd *qc) | |
4691 | { | |
4ba946e9 TH |
4692 | struct ata_port *ap = qc->ap; |
4693 | unsigned int tag; | |
4694 | ||
a4631474 | 4695 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 4696 | |
4ba946e9 TH |
4697 | qc->flags = 0; |
4698 | tag = qc->tag; | |
4699 | if (likely(ata_tag_valid(tag))) { | |
4ba946e9 | 4700 | qc->tag = ATA_TAG_POISON; |
6cec4a39 | 4701 | clear_bit(tag, &ap->qc_allocated); |
4ba946e9 | 4702 | } |
1da177e4 LT |
4703 | } |
4704 | ||
76014427 | 4705 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 4706 | { |
dedaf2b0 TH |
4707 | struct ata_port *ap = qc->ap; |
4708 | ||
a4631474 TH |
4709 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4710 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
4711 | |
4712 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4713 | ata_sg_clean(qc); | |
4714 | ||
7401abf2 | 4715 | /* command should be marked inactive atomically with qc completion */ |
dedaf2b0 TH |
4716 | if (qc->tf.protocol == ATA_PROT_NCQ) |
4717 | ap->sactive &= ~(1 << qc->tag); | |
4718 | else | |
4719 | ap->active_tag = ATA_TAG_POISON; | |
7401abf2 | 4720 | |
3f3791d3 AL |
4721 | /* atapi: mark qc as inactive to prevent the interrupt handler |
4722 | * from completing the command twice later, before the error handler | |
4723 | * is called. (when rc != 0 and atapi request sense is needed) | |
4724 | */ | |
4725 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
dedaf2b0 | 4726 | ap->qc_active &= ~(1 << qc->tag); |
3f3791d3 | 4727 | |
1da177e4 | 4728 | /* call completion callback */ |
77853bf2 | 4729 | qc->complete_fn(qc); |
1da177e4 LT |
4730 | } |
4731 | ||
39599a53 TH |
4732 | static void fill_result_tf(struct ata_queued_cmd *qc) |
4733 | { | |
4734 | struct ata_port *ap = qc->ap; | |
4735 | ||
4736 | ap->ops->tf_read(ap, &qc->result_tf); | |
4737 | qc->result_tf.flags = qc->tf.flags; | |
4738 | } | |
4739 | ||
f686bcb8 TH |
4740 | /** |
4741 | * ata_qc_complete - Complete an active ATA command | |
4742 | * @qc: Command to complete | |
4743 | * @err_mask: ATA Status register contents | |
4744 | * | |
4745 | * Indicate to the mid and upper layers that an ATA | |
4746 | * command has completed, with either an ok or not-ok status. | |
4747 | * | |
4748 | * LOCKING: | |
cca3974e | 4749 | * spin_lock_irqsave(host lock) |
f686bcb8 TH |
4750 | */ |
4751 | void ata_qc_complete(struct ata_queued_cmd *qc) | |
4752 | { | |
4753 | struct ata_port *ap = qc->ap; | |
4754 | ||
4755 | /* XXX: New EH and old EH use different mechanisms to | |
4756 | * synchronize EH with regular execution path. | |
4757 | * | |
4758 | * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. | |
4759 | * Normal execution path is responsible for not accessing a | |
4760 | * failed qc. libata core enforces the rule by returning NULL | |
4761 | * from ata_qc_from_tag() for failed qcs. | |
4762 | * | |
4763 | * Old EH depends on ata_qc_complete() nullifying completion | |
4764 | * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does | |
4765 | * not synchronize with interrupt handler. Only PIO task is | |
4766 | * taken care of. | |
4767 | */ | |
4768 | if (ap->ops->error_handler) { | |
b51e9e5d | 4769 | WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); |
f686bcb8 TH |
4770 | |
4771 | if (unlikely(qc->err_mask)) | |
4772 | qc->flags |= ATA_QCFLAG_FAILED; | |
4773 | ||
4774 | if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { | |
4775 | if (!ata_tag_internal(qc->tag)) { | |
4776 | /* always fill result TF for failed qc */ | |
39599a53 | 4777 | fill_result_tf(qc); |
f686bcb8 TH |
4778 | ata_qc_schedule_eh(qc); |
4779 | return; | |
4780 | } | |
4781 | } | |
4782 | ||
4783 | /* read result TF if requested */ | |
4784 | if (qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 4785 | fill_result_tf(qc); |
f686bcb8 TH |
4786 | |
4787 | __ata_qc_complete(qc); | |
4788 | } else { | |
4789 | if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) | |
4790 | return; | |
4791 | ||
4792 | /* read result TF if failed or requested */ | |
4793 | if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 4794 | fill_result_tf(qc); |
f686bcb8 TH |
4795 | |
4796 | __ata_qc_complete(qc); | |
4797 | } | |
4798 | } | |
4799 | ||
dedaf2b0 TH |
4800 | /** |
4801 | * ata_qc_complete_multiple - Complete multiple qcs successfully | |
4802 | * @ap: port in question | |
4803 | * @qc_active: new qc_active mask | |
4804 | * @finish_qc: LLDD callback invoked before completing a qc | |
4805 | * | |
4806 | * Complete in-flight commands. This functions is meant to be | |
4807 | * called from low-level driver's interrupt routine to complete | |
4808 | * requests normally. ap->qc_active and @qc_active is compared | |
4809 | * and commands are completed accordingly. | |
4810 | * | |
4811 | * LOCKING: | |
cca3974e | 4812 | * spin_lock_irqsave(host lock) |
dedaf2b0 TH |
4813 | * |
4814 | * RETURNS: | |
4815 | * Number of completed commands on success, -errno otherwise. | |
4816 | */ | |
4817 | int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, | |
4818 | void (*finish_qc)(struct ata_queued_cmd *)) | |
4819 | { | |
4820 | int nr_done = 0; | |
4821 | u32 done_mask; | |
4822 | int i; | |
4823 | ||
4824 | done_mask = ap->qc_active ^ qc_active; | |
4825 | ||
4826 | if (unlikely(done_mask & qc_active)) { | |
4827 | ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " | |
4828 | "(%08x->%08x)\n", ap->qc_active, qc_active); | |
4829 | return -EINVAL; | |
4830 | } | |
4831 | ||
4832 | for (i = 0; i < ATA_MAX_QUEUE; i++) { | |
4833 | struct ata_queued_cmd *qc; | |
4834 | ||
4835 | if (!(done_mask & (1 << i))) | |
4836 | continue; | |
4837 | ||
4838 | if ((qc = ata_qc_from_tag(ap, i))) { | |
4839 | if (finish_qc) | |
4840 | finish_qc(qc); | |
4841 | ata_qc_complete(qc); | |
4842 | nr_done++; | |
4843 | } | |
4844 | } | |
4845 | ||
4846 | return nr_done; | |
4847 | } | |
4848 | ||
1da177e4 LT |
4849 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) |
4850 | { | |
4851 | struct ata_port *ap = qc->ap; | |
4852 | ||
4853 | switch (qc->tf.protocol) { | |
3dc1d881 | 4854 | case ATA_PROT_NCQ: |
1da177e4 LT |
4855 | case ATA_PROT_DMA: |
4856 | case ATA_PROT_ATAPI_DMA: | |
4857 | return 1; | |
4858 | ||
4859 | case ATA_PROT_ATAPI: | |
4860 | case ATA_PROT_PIO: | |
1da177e4 LT |
4861 | if (ap->flags & ATA_FLAG_PIO_DMA) |
4862 | return 1; | |
4863 | ||
4864 | /* fall through */ | |
4865 | ||
4866 | default: | |
4867 | return 0; | |
4868 | } | |
4869 | ||
4870 | /* never reached */ | |
4871 | } | |
4872 | ||
4873 | /** | |
4874 | * ata_qc_issue - issue taskfile to device | |
4875 | * @qc: command to issue to device | |
4876 | * | |
4877 | * Prepare an ATA command to submission to device. | |
4878 | * This includes mapping the data into a DMA-able | |
4879 | * area, filling in the S/G table, and finally | |
4880 | * writing the taskfile to hardware, starting the command. | |
4881 | * | |
4882 | * LOCKING: | |
cca3974e | 4883 | * spin_lock_irqsave(host lock) |
1da177e4 | 4884 | */ |
8e0e694a | 4885 | void ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
4886 | { |
4887 | struct ata_port *ap = qc->ap; | |
4888 | ||
dedaf2b0 TH |
4889 | /* Make sure only one non-NCQ command is outstanding. The |
4890 | * check is skipped for old EH because it reuses active qc to | |
4891 | * request ATAPI sense. | |
4892 | */ | |
4893 | WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag)); | |
4894 | ||
4895 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
4896 | WARN_ON(ap->sactive & (1 << qc->tag)); | |
4897 | ap->sactive |= 1 << qc->tag; | |
4898 | } else { | |
4899 | WARN_ON(ap->sactive); | |
4900 | ap->active_tag = qc->tag; | |
4901 | } | |
4902 | ||
e4a70e76 | 4903 | qc->flags |= ATA_QCFLAG_ACTIVE; |
dedaf2b0 | 4904 | ap->qc_active |= 1 << qc->tag; |
e4a70e76 | 4905 | |
1da177e4 LT |
4906 | if (ata_should_dma_map(qc)) { |
4907 | if (qc->flags & ATA_QCFLAG_SG) { | |
4908 | if (ata_sg_setup(qc)) | |
8e436af9 | 4909 | goto sg_err; |
1da177e4 LT |
4910 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
4911 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 4912 | goto sg_err; |
1da177e4 LT |
4913 | } |
4914 | } else { | |
4915 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
4916 | } | |
4917 | ||
4918 | ap->ops->qc_prep(qc); | |
4919 | ||
8e0e694a TH |
4920 | qc->err_mask |= ap->ops->qc_issue(qc); |
4921 | if (unlikely(qc->err_mask)) | |
4922 | goto err; | |
4923 | return; | |
1da177e4 | 4924 | |
8e436af9 TH |
4925 | sg_err: |
4926 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
8e0e694a TH |
4927 | qc->err_mask |= AC_ERR_SYSTEM; |
4928 | err: | |
4929 | ata_qc_complete(qc); | |
1da177e4 LT |
4930 | } |
4931 | ||
4932 | /** | |
4933 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
4934 | * @qc: command to issue to device | |
4935 | * | |
4936 | * Using various libata functions and hooks, this function | |
4937 | * starts an ATA command. ATA commands are grouped into | |
4938 | * classes called "protocols", and issuing each type of protocol | |
4939 | * is slightly different. | |
4940 | * | |
0baab86b EF |
4941 | * May be used as the qc_issue() entry in ata_port_operations. |
4942 | * | |
1da177e4 | 4943 | * LOCKING: |
cca3974e | 4944 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4945 | * |
4946 | * RETURNS: | |
9a3d9eb0 | 4947 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
4948 | */ |
4949 | ||
9a3d9eb0 | 4950 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
4951 | { |
4952 | struct ata_port *ap = qc->ap; | |
4953 | ||
e50362ec AL |
4954 | /* Use polling pio if the LLD doesn't handle |
4955 | * interrupt driven pio and atapi CDB interrupt. | |
4956 | */ | |
4957 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
4958 | switch (qc->tf.protocol) { | |
4959 | case ATA_PROT_PIO: | |
e3472cbe | 4960 | case ATA_PROT_NODATA: |
e50362ec AL |
4961 | case ATA_PROT_ATAPI: |
4962 | case ATA_PROT_ATAPI_NODATA: | |
4963 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
4964 | break; | |
4965 | case ATA_PROT_ATAPI_DMA: | |
4966 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
3a778275 | 4967 | /* see ata_dma_blacklisted() */ |
e50362ec AL |
4968 | BUG(); |
4969 | break; | |
4970 | default: | |
4971 | break; | |
4972 | } | |
4973 | } | |
4974 | ||
3d3cca37 TH |
4975 | /* Some controllers show flaky interrupt behavior after |
4976 | * setting xfer mode. Use polling instead. | |
4977 | */ | |
4978 | if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES && | |
4979 | qc->tf.feature == SETFEATURES_XFER) && | |
4980 | (ap->flags & ATA_FLAG_SETXFER_POLLING)) | |
4981 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
4982 | ||
312f7da2 | 4983 | /* select the device */ |
1da177e4 LT |
4984 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
4985 | ||
312f7da2 | 4986 | /* start the command */ |
1da177e4 LT |
4987 | switch (qc->tf.protocol) { |
4988 | case ATA_PROT_NODATA: | |
312f7da2 AL |
4989 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4990 | ata_qc_set_polling(qc); | |
4991 | ||
e5338254 | 4992 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
4993 | ap->hsm_task_state = HSM_ST_LAST; |
4994 | ||
4995 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 4996 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
312f7da2 | 4997 | |
1da177e4 LT |
4998 | break; |
4999 | ||
5000 | case ATA_PROT_DMA: | |
587005de | 5001 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 5002 | |
1da177e4 LT |
5003 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
5004 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
5005 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 5006 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
5007 | break; |
5008 | ||
312f7da2 AL |
5009 | case ATA_PROT_PIO: |
5010 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
5011 | ata_qc_set_polling(qc); | |
1da177e4 | 5012 | |
e5338254 | 5013 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 | 5014 | |
54f00389 AL |
5015 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
5016 | /* PIO data out protocol */ | |
5017 | ap->hsm_task_state = HSM_ST_FIRST; | |
31ce6dae | 5018 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
5019 | |
5020 | /* always send first data block using | |
e27486db | 5021 | * the ata_pio_task() codepath. |
54f00389 | 5022 | */ |
312f7da2 | 5023 | } else { |
54f00389 AL |
5024 | /* PIO data in protocol */ |
5025 | ap->hsm_task_state = HSM_ST; | |
5026 | ||
5027 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 5028 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
5029 | |
5030 | /* if polling, ata_pio_task() handles the rest. | |
5031 | * otherwise, interrupt handler takes over from here. | |
5032 | */ | |
312f7da2 AL |
5033 | } |
5034 | ||
1da177e4 LT |
5035 | break; |
5036 | ||
1da177e4 | 5037 | case ATA_PROT_ATAPI: |
1da177e4 | 5038 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
5039 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
5040 | ata_qc_set_polling(qc); | |
5041 | ||
e5338254 | 5042 | ata_tf_to_host(ap, &qc->tf); |
f6ef65e6 | 5043 | |
312f7da2 AL |
5044 | ap->hsm_task_state = HSM_ST_FIRST; |
5045 | ||
5046 | /* send cdb by polling if no cdb interrupt */ | |
5047 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
5048 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
31ce6dae | 5049 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
5050 | break; |
5051 | ||
5052 | case ATA_PROT_ATAPI_DMA: | |
587005de | 5053 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 5054 | |
1da177e4 LT |
5055 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
5056 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
5057 | ap->hsm_task_state = HSM_ST_FIRST; |
5058 | ||
5059 | /* send cdb by polling if no cdb interrupt */ | |
5060 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
31ce6dae | 5061 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
5062 | break; |
5063 | ||
5064 | default: | |
5065 | WARN_ON(1); | |
9a3d9eb0 | 5066 | return AC_ERR_SYSTEM; |
1da177e4 LT |
5067 | } |
5068 | ||
5069 | return 0; | |
5070 | } | |
5071 | ||
1da177e4 LT |
5072 | /** |
5073 | * ata_host_intr - Handle host interrupt for given (port, task) | |
5074 | * @ap: Port on which interrupt arrived (possibly...) | |
5075 | * @qc: Taskfile currently active in engine | |
5076 | * | |
5077 | * Handle host interrupt for given queued command. Currently, | |
5078 | * only DMA interrupts are handled. All other commands are | |
5079 | * handled via polling with interrupts disabled (nIEN bit). | |
5080 | * | |
5081 | * LOCKING: | |
cca3974e | 5082 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
5083 | * |
5084 | * RETURNS: | |
5085 | * One if interrupt was handled, zero if not (shared irq). | |
5086 | */ | |
5087 | ||
5088 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
5089 | struct ata_queued_cmd *qc) | |
5090 | { | |
ea54763f | 5091 | struct ata_eh_info *ehi = &ap->eh_info; |
312f7da2 | 5092 | u8 status, host_stat = 0; |
1da177e4 | 5093 | |
312f7da2 AL |
5094 | VPRINTK("ata%u: protocol %d task_state %d\n", |
5095 | ap->id, qc->tf.protocol, ap->hsm_task_state); | |
1da177e4 | 5096 | |
312f7da2 AL |
5097 | /* Check whether we are expecting interrupt in this state */ |
5098 | switch (ap->hsm_task_state) { | |
5099 | case HSM_ST_FIRST: | |
6912ccd5 AL |
5100 | /* Some pre-ATAPI-4 devices assert INTRQ |
5101 | * at this state when ready to receive CDB. | |
5102 | */ | |
1da177e4 | 5103 | |
312f7da2 AL |
5104 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. |
5105 | * The flag was turned on only for atapi devices. | |
5106 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
5107 | */ | |
5108 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 5109 | goto idle_irq; |
1da177e4 | 5110 | break; |
312f7da2 AL |
5111 | case HSM_ST_LAST: |
5112 | if (qc->tf.protocol == ATA_PROT_DMA || | |
5113 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
5114 | /* check status of DMA engine */ | |
5115 | host_stat = ap->ops->bmdma_status(ap); | |
5116 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
5117 | ||
5118 | /* if it's not our irq... */ | |
5119 | if (!(host_stat & ATA_DMA_INTR)) | |
5120 | goto idle_irq; | |
5121 | ||
5122 | /* before we do anything else, clear DMA-Start bit */ | |
5123 | ap->ops->bmdma_stop(qc); | |
a4f16610 AL |
5124 | |
5125 | if (unlikely(host_stat & ATA_DMA_ERR)) { | |
5126 | /* error when transfering data to/from memory */ | |
5127 | qc->err_mask |= AC_ERR_HOST_BUS; | |
5128 | ap->hsm_task_state = HSM_ST_ERR; | |
5129 | } | |
312f7da2 AL |
5130 | } |
5131 | break; | |
5132 | case HSM_ST: | |
5133 | break; | |
1da177e4 LT |
5134 | default: |
5135 | goto idle_irq; | |
5136 | } | |
5137 | ||
312f7da2 AL |
5138 | /* check altstatus */ |
5139 | status = ata_altstatus(ap); | |
5140 | if (status & ATA_BUSY) | |
5141 | goto idle_irq; | |
1da177e4 | 5142 | |
312f7da2 AL |
5143 | /* check main status, clearing INTRQ */ |
5144 | status = ata_chk_status(ap); | |
5145 | if (unlikely(status & ATA_BUSY)) | |
5146 | goto idle_irq; | |
1da177e4 | 5147 | |
312f7da2 AL |
5148 | /* ack bmdma irq events */ |
5149 | ap->ops->irq_clear(ap); | |
1da177e4 | 5150 | |
bb5cb290 | 5151 | ata_hsm_move(ap, qc, status, 0); |
ea54763f TH |
5152 | |
5153 | if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || | |
5154 | qc->tf.protocol == ATA_PROT_ATAPI_DMA)) | |
5155 | ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); | |
5156 | ||
1da177e4 LT |
5157 | return 1; /* irq handled */ |
5158 | ||
5159 | idle_irq: | |
5160 | ap->stats.idle_irq++; | |
5161 | ||
5162 | #ifdef ATA_IRQ_TRAP | |
5163 | if ((ap->stats.idle_irq % 1000) == 0) { | |
1da177e4 | 5164 | ata_irq_ack(ap, 0); /* debug trap */ |
f15a1daf | 5165 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
23cfce89 | 5166 | return 1; |
1da177e4 LT |
5167 | } |
5168 | #endif | |
5169 | return 0; /* irq not handled */ | |
5170 | } | |
5171 | ||
5172 | /** | |
5173 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b | 5174 | * @irq: irq line (unused) |
cca3974e | 5175 | * @dev_instance: pointer to our ata_host information structure |
1da177e4 | 5176 | * |
0cba632b JG |
5177 | * Default interrupt handler for PCI IDE devices. Calls |
5178 | * ata_host_intr() for each port that is not disabled. | |
5179 | * | |
1da177e4 | 5180 | * LOCKING: |
cca3974e | 5181 | * Obtains host lock during operation. |
1da177e4 LT |
5182 | * |
5183 | * RETURNS: | |
0cba632b | 5184 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
5185 | */ |
5186 | ||
7d12e780 | 5187 | irqreturn_t ata_interrupt (int irq, void *dev_instance) |
1da177e4 | 5188 | { |
cca3974e | 5189 | struct ata_host *host = dev_instance; |
1da177e4 LT |
5190 | unsigned int i; |
5191 | unsigned int handled = 0; | |
5192 | unsigned long flags; | |
5193 | ||
5194 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
cca3974e | 5195 | spin_lock_irqsave(&host->lock, flags); |
1da177e4 | 5196 | |
cca3974e | 5197 | for (i = 0; i < host->n_ports; i++) { |
1da177e4 LT |
5198 | struct ata_port *ap; |
5199 | ||
cca3974e | 5200 | ap = host->ports[i]; |
c1389503 | 5201 | if (ap && |
029f5468 | 5202 | !(ap->flags & ATA_FLAG_DISABLED)) { |
1da177e4 LT |
5203 | struct ata_queued_cmd *qc; |
5204 | ||
5205 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
312f7da2 | 5206 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 5207 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
5208 | handled |= ata_host_intr(ap, qc); |
5209 | } | |
5210 | } | |
5211 | ||
cca3974e | 5212 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 LT |
5213 | |
5214 | return IRQ_RETVAL(handled); | |
5215 | } | |
5216 | ||
34bf2170 TH |
5217 | /** |
5218 | * sata_scr_valid - test whether SCRs are accessible | |
5219 | * @ap: ATA port to test SCR accessibility for | |
5220 | * | |
5221 | * Test whether SCRs are accessible for @ap. | |
5222 | * | |
5223 | * LOCKING: | |
5224 | * None. | |
5225 | * | |
5226 | * RETURNS: | |
5227 | * 1 if SCRs are accessible, 0 otherwise. | |
5228 | */ | |
5229 | int sata_scr_valid(struct ata_port *ap) | |
5230 | { | |
5231 | return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read; | |
5232 | } | |
5233 | ||
5234 | /** | |
5235 | * sata_scr_read - read SCR register of the specified port | |
5236 | * @ap: ATA port to read SCR for | |
5237 | * @reg: SCR to read | |
5238 | * @val: Place to store read value | |
5239 | * | |
5240 | * Read SCR register @reg of @ap into *@val. This function is | |
5241 | * guaranteed to succeed if the cable type of the port is SATA | |
5242 | * and the port implements ->scr_read. | |
5243 | * | |
5244 | * LOCKING: | |
5245 | * None. | |
5246 | * | |
5247 | * RETURNS: | |
5248 | * 0 on success, negative errno on failure. | |
5249 | */ | |
5250 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | |
5251 | { | |
5252 | if (sata_scr_valid(ap)) { | |
5253 | *val = ap->ops->scr_read(ap, reg); | |
5254 | return 0; | |
5255 | } | |
5256 | return -EOPNOTSUPP; | |
5257 | } | |
5258 | ||
5259 | /** | |
5260 | * sata_scr_write - write SCR register of the specified port | |
5261 | * @ap: ATA port to write SCR for | |
5262 | * @reg: SCR to write | |
5263 | * @val: value to write | |
5264 | * | |
5265 | * Write @val to SCR register @reg of @ap. This function is | |
5266 | * guaranteed to succeed if the cable type of the port is SATA | |
5267 | * and the port implements ->scr_read. | |
5268 | * | |
5269 | * LOCKING: | |
5270 | * None. | |
5271 | * | |
5272 | * RETURNS: | |
5273 | * 0 on success, negative errno on failure. | |
5274 | */ | |
5275 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) | |
5276 | { | |
5277 | if (sata_scr_valid(ap)) { | |
5278 | ap->ops->scr_write(ap, reg, val); | |
5279 | return 0; | |
5280 | } | |
5281 | return -EOPNOTSUPP; | |
5282 | } | |
5283 | ||
5284 | /** | |
5285 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
5286 | * @ap: ATA port to write SCR for | |
5287 | * @reg: SCR to write | |
5288 | * @val: value to write | |
5289 | * | |
5290 | * This function is identical to sata_scr_write() except that this | |
5291 | * function performs flush after writing to the register. | |
5292 | * | |
5293 | * LOCKING: | |
5294 | * None. | |
5295 | * | |
5296 | * RETURNS: | |
5297 | * 0 on success, negative errno on failure. | |
5298 | */ | |
5299 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) | |
5300 | { | |
5301 | if (sata_scr_valid(ap)) { | |
5302 | ap->ops->scr_write(ap, reg, val); | |
5303 | ap->ops->scr_read(ap, reg); | |
5304 | return 0; | |
5305 | } | |
5306 | return -EOPNOTSUPP; | |
5307 | } | |
5308 | ||
5309 | /** | |
5310 | * ata_port_online - test whether the given port is online | |
5311 | * @ap: ATA port to test | |
5312 | * | |
5313 | * Test whether @ap is online. Note that this function returns 0 | |
5314 | * if online status of @ap cannot be obtained, so | |
5315 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5316 | * | |
5317 | * LOCKING: | |
5318 | * None. | |
5319 | * | |
5320 | * RETURNS: | |
5321 | * 1 if the port online status is available and online. | |
5322 | */ | |
5323 | int ata_port_online(struct ata_port *ap) | |
5324 | { | |
5325 | u32 sstatus; | |
5326 | ||
5327 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) | |
5328 | return 1; | |
5329 | return 0; | |
5330 | } | |
5331 | ||
5332 | /** | |
5333 | * ata_port_offline - test whether the given port is offline | |
5334 | * @ap: ATA port to test | |
5335 | * | |
5336 | * Test whether @ap is offline. Note that this function returns | |
5337 | * 0 if offline status of @ap cannot be obtained, so | |
5338 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5339 | * | |
5340 | * LOCKING: | |
5341 | * None. | |
5342 | * | |
5343 | * RETURNS: | |
5344 | * 1 if the port offline status is available and offline. | |
5345 | */ | |
5346 | int ata_port_offline(struct ata_port *ap) | |
5347 | { | |
5348 | u32 sstatus; | |
5349 | ||
5350 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) | |
5351 | return 1; | |
5352 | return 0; | |
5353 | } | |
0baab86b | 5354 | |
77b08fb5 | 5355 | int ata_flush_cache(struct ata_device *dev) |
9b847548 | 5356 | { |
977e6b9f | 5357 | unsigned int err_mask; |
9b847548 JA |
5358 | u8 cmd; |
5359 | ||
5360 | if (!ata_try_flush_cache(dev)) | |
5361 | return 0; | |
5362 | ||
6fc49adb | 5363 | if (dev->flags & ATA_DFLAG_FLUSH_EXT) |
9b847548 JA |
5364 | cmd = ATA_CMD_FLUSH_EXT; |
5365 | else | |
5366 | cmd = ATA_CMD_FLUSH; | |
5367 | ||
977e6b9f TH |
5368 | err_mask = ata_do_simple_cmd(dev, cmd); |
5369 | if (err_mask) { | |
5370 | ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); | |
5371 | return -EIO; | |
5372 | } | |
5373 | ||
5374 | return 0; | |
9b847548 JA |
5375 | } |
5376 | ||
cca3974e JG |
5377 | static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, |
5378 | unsigned int action, unsigned int ehi_flags, | |
5379 | int wait) | |
500530f6 TH |
5380 | { |
5381 | unsigned long flags; | |
5382 | int i, rc; | |
5383 | ||
cca3974e JG |
5384 | for (i = 0; i < host->n_ports; i++) { |
5385 | struct ata_port *ap = host->ports[i]; | |
500530f6 TH |
5386 | |
5387 | /* Previous resume operation might still be in | |
5388 | * progress. Wait for PM_PENDING to clear. | |
5389 | */ | |
5390 | if (ap->pflags & ATA_PFLAG_PM_PENDING) { | |
5391 | ata_port_wait_eh(ap); | |
5392 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5393 | } | |
5394 | ||
5395 | /* request PM ops to EH */ | |
5396 | spin_lock_irqsave(ap->lock, flags); | |
5397 | ||
5398 | ap->pm_mesg = mesg; | |
5399 | if (wait) { | |
5400 | rc = 0; | |
5401 | ap->pm_result = &rc; | |
5402 | } | |
5403 | ||
5404 | ap->pflags |= ATA_PFLAG_PM_PENDING; | |
5405 | ap->eh_info.action |= action; | |
5406 | ap->eh_info.flags |= ehi_flags; | |
5407 | ||
5408 | ata_port_schedule_eh(ap); | |
5409 | ||
5410 | spin_unlock_irqrestore(ap->lock, flags); | |
5411 | ||
5412 | /* wait and check result */ | |
5413 | if (wait) { | |
5414 | ata_port_wait_eh(ap); | |
5415 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5416 | if (rc) | |
5417 | return rc; | |
5418 | } | |
5419 | } | |
5420 | ||
5421 | return 0; | |
5422 | } | |
5423 | ||
5424 | /** | |
cca3974e JG |
5425 | * ata_host_suspend - suspend host |
5426 | * @host: host to suspend | |
500530f6 TH |
5427 | * @mesg: PM message |
5428 | * | |
cca3974e | 5429 | * Suspend @host. Actual operation is performed by EH. This |
500530f6 TH |
5430 | * function requests EH to perform PM operations and waits for EH |
5431 | * to finish. | |
5432 | * | |
5433 | * LOCKING: | |
5434 | * Kernel thread context (may sleep). | |
5435 | * | |
5436 | * RETURNS: | |
5437 | * 0 on success, -errno on failure. | |
5438 | */ | |
cca3974e | 5439 | int ata_host_suspend(struct ata_host *host, pm_message_t mesg) |
500530f6 TH |
5440 | { |
5441 | int i, j, rc; | |
5442 | ||
cca3974e | 5443 | rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); |
500530f6 TH |
5444 | if (rc) |
5445 | goto fail; | |
5446 | ||
5447 | /* EH is quiescent now. Fail if we have any ready device. | |
5448 | * This happens if hotplug occurs between completion of device | |
5449 | * suspension and here. | |
5450 | */ | |
cca3974e JG |
5451 | for (i = 0; i < host->n_ports; i++) { |
5452 | struct ata_port *ap = host->ports[i]; | |
500530f6 TH |
5453 | |
5454 | for (j = 0; j < ATA_MAX_DEVICES; j++) { | |
5455 | struct ata_device *dev = &ap->device[j]; | |
5456 | ||
5457 | if (ata_dev_ready(dev)) { | |
5458 | ata_port_printk(ap, KERN_WARNING, | |
5459 | "suspend failed, device %d " | |
5460 | "still active\n", dev->devno); | |
5461 | rc = -EBUSY; | |
5462 | goto fail; | |
5463 | } | |
5464 | } | |
5465 | } | |
5466 | ||
cca3974e | 5467 | host->dev->power.power_state = mesg; |
500530f6 TH |
5468 | return 0; |
5469 | ||
5470 | fail: | |
cca3974e | 5471 | ata_host_resume(host); |
500530f6 TH |
5472 | return rc; |
5473 | } | |
5474 | ||
5475 | /** | |
cca3974e JG |
5476 | * ata_host_resume - resume host |
5477 | * @host: host to resume | |
500530f6 | 5478 | * |
cca3974e | 5479 | * Resume @host. Actual operation is performed by EH. This |
500530f6 TH |
5480 | * function requests EH to perform PM operations and returns. |
5481 | * Note that all resume operations are performed parallely. | |
5482 | * | |
5483 | * LOCKING: | |
5484 | * Kernel thread context (may sleep). | |
5485 | */ | |
cca3974e | 5486 | void ata_host_resume(struct ata_host *host) |
500530f6 | 5487 | { |
cca3974e JG |
5488 | ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, |
5489 | ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); | |
5490 | host->dev->power.power_state = PMSG_ON; | |
500530f6 TH |
5491 | } |
5492 | ||
c893a3ae RD |
5493 | /** |
5494 | * ata_port_start - Set port up for dma. | |
5495 | * @ap: Port to initialize | |
5496 | * | |
5497 | * Called just after data structures for each port are | |
5498 | * initialized. Allocates space for PRD table. | |
5499 | * | |
5500 | * May be used as the port_start() entry in ata_port_operations. | |
5501 | * | |
5502 | * LOCKING: | |
5503 | * Inherited from caller. | |
5504 | */ | |
5505 | ||
1da177e4 LT |
5506 | int ata_port_start (struct ata_port *ap) |
5507 | { | |
2f1f610b | 5508 | struct device *dev = ap->dev; |
6037d6bb | 5509 | int rc; |
1da177e4 LT |
5510 | |
5511 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
5512 | if (!ap->prd) | |
5513 | return -ENOMEM; | |
5514 | ||
6037d6bb JG |
5515 | rc = ata_pad_alloc(ap, dev); |
5516 | if (rc) { | |
cedc9a47 | 5517 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 5518 | return rc; |
cedc9a47 JG |
5519 | } |
5520 | ||
1da177e4 LT |
5521 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
5522 | ||
5523 | return 0; | |
5524 | } | |
5525 | ||
0baab86b EF |
5526 | |
5527 | /** | |
5528 | * ata_port_stop - Undo ata_port_start() | |
5529 | * @ap: Port to shut down | |
5530 | * | |
5531 | * Frees the PRD table. | |
5532 | * | |
5533 | * May be used as the port_stop() entry in ata_port_operations. | |
5534 | * | |
5535 | * LOCKING: | |
6f0ef4fa | 5536 | * Inherited from caller. |
0baab86b EF |
5537 | */ |
5538 | ||
1da177e4 LT |
5539 | void ata_port_stop (struct ata_port *ap) |
5540 | { | |
2f1f610b | 5541 | struct device *dev = ap->dev; |
1da177e4 LT |
5542 | |
5543 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 5544 | ata_pad_free(ap, dev); |
1da177e4 LT |
5545 | } |
5546 | ||
cca3974e | 5547 | void ata_host_stop (struct ata_host *host) |
aa8f0dc6 | 5548 | { |
cca3974e JG |
5549 | if (host->mmio_base) |
5550 | iounmap(host->mmio_base); | |
aa8f0dc6 JG |
5551 | } |
5552 | ||
3ef3b43d TH |
5553 | /** |
5554 | * ata_dev_init - Initialize an ata_device structure | |
5555 | * @dev: Device structure to initialize | |
5556 | * | |
5557 | * Initialize @dev in preparation for probing. | |
5558 | * | |
5559 | * LOCKING: | |
5560 | * Inherited from caller. | |
5561 | */ | |
5562 | void ata_dev_init(struct ata_device *dev) | |
5563 | { | |
5564 | struct ata_port *ap = dev->ap; | |
72fa4b74 TH |
5565 | unsigned long flags; |
5566 | ||
5a04bf4b TH |
5567 | /* SATA spd limit is bound to the first device */ |
5568 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5569 | ||
72fa4b74 TH |
5570 | /* High bits of dev->flags are used to record warm plug |
5571 | * requests which occur asynchronously. Synchronize using | |
cca3974e | 5572 | * host lock. |
72fa4b74 | 5573 | */ |
ba6a1308 | 5574 | spin_lock_irqsave(ap->lock, flags); |
72fa4b74 | 5575 | dev->flags &= ~ATA_DFLAG_INIT_MASK; |
ba6a1308 | 5576 | spin_unlock_irqrestore(ap->lock, flags); |
3ef3b43d | 5577 | |
72fa4b74 TH |
5578 | memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, |
5579 | sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); | |
3ef3b43d TH |
5580 | dev->pio_mask = UINT_MAX; |
5581 | dev->mwdma_mask = UINT_MAX; | |
5582 | dev->udma_mask = UINT_MAX; | |
5583 | } | |
5584 | ||
1da177e4 | 5585 | /** |
155a8a9c | 5586 | * ata_port_init - Initialize an ata_port structure |
1da177e4 | 5587 | * @ap: Structure to initialize |
cca3974e | 5588 | * @host: Collection of hosts to which @ap belongs |
1da177e4 LT |
5589 | * @ent: Probe information provided by low-level driver |
5590 | * @port_no: Port number associated with this ata_port | |
5591 | * | |
155a8a9c | 5592 | * Initialize a new ata_port structure. |
0cba632b | 5593 | * |
1da177e4 | 5594 | * LOCKING: |
0cba632b | 5595 | * Inherited from caller. |
1da177e4 | 5596 | */ |
cca3974e | 5597 | void ata_port_init(struct ata_port *ap, struct ata_host *host, |
155a8a9c | 5598 | const struct ata_probe_ent *ent, unsigned int port_no) |
1da177e4 LT |
5599 | { |
5600 | unsigned int i; | |
5601 | ||
cca3974e | 5602 | ap->lock = &host->lock; |
198e0fed | 5603 | ap->flags = ATA_FLAG_DISABLED; |
155a8a9c | 5604 | ap->id = ata_unique_id++; |
1da177e4 | 5605 | ap->ctl = ATA_DEVCTL_OBS; |
cca3974e | 5606 | ap->host = host; |
2f1f610b | 5607 | ap->dev = ent->dev; |
1da177e4 | 5608 | ap->port_no = port_no; |
fea63e38 TH |
5609 | if (port_no == 1 && ent->pinfo2) { |
5610 | ap->pio_mask = ent->pinfo2->pio_mask; | |
5611 | ap->mwdma_mask = ent->pinfo2->mwdma_mask; | |
5612 | ap->udma_mask = ent->pinfo2->udma_mask; | |
5613 | ap->flags |= ent->pinfo2->flags; | |
5614 | ap->ops = ent->pinfo2->port_ops; | |
5615 | } else { | |
5616 | ap->pio_mask = ent->pio_mask; | |
5617 | ap->mwdma_mask = ent->mwdma_mask; | |
5618 | ap->udma_mask = ent->udma_mask; | |
5619 | ap->flags |= ent->port_flags; | |
5620 | ap->ops = ent->port_ops; | |
5621 | } | |
5a04bf4b | 5622 | ap->hw_sata_spd_limit = UINT_MAX; |
1da177e4 LT |
5623 | ap->active_tag = ATA_TAG_POISON; |
5624 | ap->last_ctl = 0xFF; | |
bd5d825c BP |
5625 | |
5626 | #if defined(ATA_VERBOSE_DEBUG) | |
5627 | /* turn on all debugging levels */ | |
5628 | ap->msg_enable = 0x00FF; | |
5629 | #elif defined(ATA_DEBUG) | |
5630 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; | |
88574551 | 5631 | #else |
0dd4b21f | 5632 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; |
bd5d825c | 5633 | #endif |
1da177e4 | 5634 | |
65f27f38 DH |
5635 | INIT_DELAYED_WORK(&ap->port_task, NULL); |
5636 | INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); | |
5637 | INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); | |
a72ec4ce | 5638 | INIT_LIST_HEAD(&ap->eh_done_q); |
c6cf9e99 | 5639 | init_waitqueue_head(&ap->eh_wait_q); |
1da177e4 | 5640 | |
838df628 TH |
5641 | /* set cable type */ |
5642 | ap->cbl = ATA_CBL_NONE; | |
5643 | if (ap->flags & ATA_FLAG_SATA) | |
5644 | ap->cbl = ATA_CBL_SATA; | |
5645 | ||
acf356b1 TH |
5646 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
5647 | struct ata_device *dev = &ap->device[i]; | |
38d87234 | 5648 | dev->ap = ap; |
72fa4b74 | 5649 | dev->devno = i; |
3ef3b43d | 5650 | ata_dev_init(dev); |
acf356b1 | 5651 | } |
1da177e4 LT |
5652 | |
5653 | #ifdef ATA_IRQ_TRAP | |
5654 | ap->stats.unhandled_irq = 1; | |
5655 | ap->stats.idle_irq = 1; | |
5656 | #endif | |
5657 | ||
5658 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
5659 | } | |
5660 | ||
155a8a9c | 5661 | /** |
4608c160 TH |
5662 | * ata_port_init_shost - Initialize SCSI host associated with ATA port |
5663 | * @ap: ATA port to initialize SCSI host for | |
5664 | * @shost: SCSI host associated with @ap | |
155a8a9c | 5665 | * |
4608c160 | 5666 | * Initialize SCSI host @shost associated with ATA port @ap. |
155a8a9c BK |
5667 | * |
5668 | * LOCKING: | |
5669 | * Inherited from caller. | |
5670 | */ | |
4608c160 | 5671 | static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost) |
155a8a9c | 5672 | { |
cca3974e | 5673 | ap->scsi_host = shost; |
155a8a9c | 5674 | |
4608c160 TH |
5675 | shost->unique_id = ap->id; |
5676 | shost->max_id = 16; | |
5677 | shost->max_lun = 1; | |
5678 | shost->max_channel = 1; | |
5679 | shost->max_cmd_len = 12; | |
155a8a9c BK |
5680 | } |
5681 | ||
1da177e4 | 5682 | /** |
996139f1 | 5683 | * ata_port_add - Attach low-level ATA driver to system |
1da177e4 | 5684 | * @ent: Information provided by low-level driver |
cca3974e | 5685 | * @host: Collections of ports to which we add |
1da177e4 LT |
5686 | * @port_no: Port number associated with this host |
5687 | * | |
0cba632b JG |
5688 | * Attach low-level ATA driver to system. |
5689 | * | |
1da177e4 | 5690 | * LOCKING: |
0cba632b | 5691 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5692 | * |
5693 | * RETURNS: | |
0cba632b | 5694 | * New ata_port on success, for NULL on error. |
1da177e4 | 5695 | */ |
996139f1 | 5696 | static struct ata_port * ata_port_add(const struct ata_probe_ent *ent, |
cca3974e | 5697 | struct ata_host *host, |
1da177e4 LT |
5698 | unsigned int port_no) |
5699 | { | |
996139f1 | 5700 | struct Scsi_Host *shost; |
1da177e4 | 5701 | struct ata_port *ap; |
1da177e4 LT |
5702 | |
5703 | DPRINTK("ENTER\n"); | |
aec5c3c1 | 5704 | |
52783c5d | 5705 | if (!ent->port_ops->error_handler && |
cca3974e | 5706 | !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) { |
aec5c3c1 TH |
5707 | printk(KERN_ERR "ata%u: no reset mechanism available\n", |
5708 | port_no); | |
5709 | return NULL; | |
5710 | } | |
5711 | ||
996139f1 JG |
5712 | shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); |
5713 | if (!shost) | |
1da177e4 LT |
5714 | return NULL; |
5715 | ||
996139f1 | 5716 | shost->transportt = &ata_scsi_transport_template; |
30afc84c | 5717 | |
996139f1 | 5718 | ap = ata_shost_to_port(shost); |
1da177e4 | 5719 | |
cca3974e | 5720 | ata_port_init(ap, host, ent, port_no); |
996139f1 | 5721 | ata_port_init_shost(ap, shost); |
1da177e4 | 5722 | |
1da177e4 | 5723 | return ap; |
1da177e4 LT |
5724 | } |
5725 | ||
b03732f0 | 5726 | /** |
cca3974e JG |
5727 | * ata_sas_host_init - Initialize a host struct |
5728 | * @host: host to initialize | |
5729 | * @dev: device host is attached to | |
5730 | * @flags: host flags | |
5731 | * @ops: port_ops | |
b03732f0 BK |
5732 | * |
5733 | * LOCKING: | |
5734 | * PCI/etc. bus probe sem. | |
5735 | * | |
5736 | */ | |
5737 | ||
cca3974e JG |
5738 | void ata_host_init(struct ata_host *host, struct device *dev, |
5739 | unsigned long flags, const struct ata_port_operations *ops) | |
b03732f0 | 5740 | { |
cca3974e JG |
5741 | spin_lock_init(&host->lock); |
5742 | host->dev = dev; | |
5743 | host->flags = flags; | |
5744 | host->ops = ops; | |
b03732f0 BK |
5745 | } |
5746 | ||
1da177e4 | 5747 | /** |
0cba632b JG |
5748 | * ata_device_add - Register hardware device with ATA and SCSI layers |
5749 | * @ent: Probe information describing hardware device to be registered | |
5750 | * | |
5751 | * This function processes the information provided in the probe | |
5752 | * information struct @ent, allocates the necessary ATA and SCSI | |
5753 | * host information structures, initializes them, and registers | |
5754 | * everything with requisite kernel subsystems. | |
5755 | * | |
5756 | * This function requests irqs, probes the ATA bus, and probes | |
5757 | * the SCSI bus. | |
1da177e4 LT |
5758 | * |
5759 | * LOCKING: | |
0cba632b | 5760 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5761 | * |
5762 | * RETURNS: | |
0cba632b | 5763 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 | 5764 | */ |
057ace5e | 5765 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 | 5766 | { |
6d0500df | 5767 | unsigned int i; |
1da177e4 | 5768 | struct device *dev = ent->dev; |
cca3974e | 5769 | struct ata_host *host; |
39b07ce6 | 5770 | int rc; |
1da177e4 LT |
5771 | |
5772 | DPRINTK("ENTER\n"); | |
f20b16ff | 5773 | |
02f076aa AC |
5774 | if (ent->irq == 0) { |
5775 | dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n"); | |
5776 | return 0; | |
5777 | } | |
1da177e4 | 5778 | /* alloc a container for our list of ATA ports (buses) */ |
cca3974e JG |
5779 | host = kzalloc(sizeof(struct ata_host) + |
5780 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); | |
5781 | if (!host) | |
1da177e4 | 5782 | return 0; |
1da177e4 | 5783 | |
cca3974e JG |
5784 | ata_host_init(host, dev, ent->_host_flags, ent->port_ops); |
5785 | host->n_ports = ent->n_ports; | |
5786 | host->irq = ent->irq; | |
5787 | host->irq2 = ent->irq2; | |
5788 | host->mmio_base = ent->mmio_base; | |
5789 | host->private_data = ent->private_data; | |
1da177e4 LT |
5790 | |
5791 | /* register each port bound to this device */ | |
cca3974e | 5792 | for (i = 0; i < host->n_ports; i++) { |
1da177e4 LT |
5793 | struct ata_port *ap; |
5794 | unsigned long xfer_mode_mask; | |
2ec7df04 | 5795 | int irq_line = ent->irq; |
1da177e4 | 5796 | |
cca3974e | 5797 | ap = ata_port_add(ent, host, i); |
c38778c3 | 5798 | host->ports[i] = ap; |
1da177e4 LT |
5799 | if (!ap) |
5800 | goto err_out; | |
5801 | ||
dd5b06c4 TH |
5802 | /* dummy? */ |
5803 | if (ent->dummy_port_mask & (1 << i)) { | |
5804 | ata_port_printk(ap, KERN_INFO, "DUMMY\n"); | |
5805 | ap->ops = &ata_dummy_port_ops; | |
5806 | continue; | |
5807 | } | |
5808 | ||
5809 | /* start port */ | |
5810 | rc = ap->ops->port_start(ap); | |
5811 | if (rc) { | |
cca3974e JG |
5812 | host->ports[i] = NULL; |
5813 | scsi_host_put(ap->scsi_host); | |
dd5b06c4 TH |
5814 | goto err_out; |
5815 | } | |
5816 | ||
2ec7df04 AC |
5817 | /* Report the secondary IRQ for second channel legacy */ |
5818 | if (i == 1 && ent->irq2) | |
5819 | irq_line = ent->irq2; | |
5820 | ||
1da177e4 LT |
5821 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | |
5822 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
5823 | (ap->pio_mask << ATA_SHIFT_PIO); | |
5824 | ||
5825 | /* print per-port info to dmesg */ | |
f15a1daf | 5826 | ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX " |
2ec7df04 | 5827 | "ctl 0x%lX bmdma 0x%lX irq %d\n", |
f15a1daf TH |
5828 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', |
5829 | ata_mode_string(xfer_mode_mask), | |
5830 | ap->ioaddr.cmd_addr, | |
5831 | ap->ioaddr.ctl_addr, | |
5832 | ap->ioaddr.bmdma_addr, | |
2ec7df04 | 5833 | irq_line); |
1da177e4 | 5834 | |
0f0a3ad3 TH |
5835 | /* freeze port before requesting IRQ */ |
5836 | ata_eh_freeze_port(ap); | |
1da177e4 LT |
5837 | } |
5838 | ||
2ec7df04 | 5839 | /* obtain irq, that may be shared between channels */ |
39b07ce6 | 5840 | rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, |
cca3974e | 5841 | DRV_NAME, host); |
39b07ce6 JG |
5842 | if (rc) { |
5843 | dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", | |
5844 | ent->irq, rc); | |
1da177e4 | 5845 | goto err_out; |
39b07ce6 | 5846 | } |
1da177e4 | 5847 | |
2ec7df04 AC |
5848 | /* do we have a second IRQ for the other channel, eg legacy mode */ |
5849 | if (ent->irq2) { | |
5850 | /* We will get weird core code crashes later if this is true | |
5851 | so trap it now */ | |
5852 | BUG_ON(ent->irq == ent->irq2); | |
5853 | ||
5854 | rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags, | |
cca3974e | 5855 | DRV_NAME, host); |
2ec7df04 AC |
5856 | if (rc) { |
5857 | dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", | |
5858 | ent->irq2, rc); | |
5859 | goto err_out_free_irq; | |
5860 | } | |
5861 | } | |
5862 | ||
1da177e4 LT |
5863 | /* perform each probe synchronously */ |
5864 | DPRINTK("probe begin\n"); | |
cca3974e JG |
5865 | for (i = 0; i < host->n_ports; i++) { |
5866 | struct ata_port *ap = host->ports[i]; | |
5a04bf4b | 5867 | u32 scontrol; |
1da177e4 LT |
5868 | int rc; |
5869 | ||
5a04bf4b TH |
5870 | /* init sata_spd_limit to the current value */ |
5871 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { | |
5872 | int spd = (scontrol >> 4) & 0xf; | |
5873 | ap->hw_sata_spd_limit &= (1 << spd) - 1; | |
5874 | } | |
5875 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5876 | ||
cca3974e | 5877 | rc = scsi_add_host(ap->scsi_host, dev); |
1da177e4 | 5878 | if (rc) { |
f15a1daf | 5879 | ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n"); |
1da177e4 LT |
5880 | /* FIXME: do something useful here */ |
5881 | /* FIXME: handle unconditional calls to | |
5882 | * scsi_scan_host and ata_host_remove, below, | |
5883 | * at the very least | |
5884 | */ | |
5885 | } | |
3e706399 | 5886 | |
52783c5d | 5887 | if (ap->ops->error_handler) { |
1cdaf534 | 5888 | struct ata_eh_info *ehi = &ap->eh_info; |
3e706399 TH |
5889 | unsigned long flags; |
5890 | ||
5891 | ata_port_probe(ap); | |
5892 | ||
5893 | /* kick EH for boot probing */ | |
ba6a1308 | 5894 | spin_lock_irqsave(ap->lock, flags); |
3e706399 | 5895 | |
1cdaf534 TH |
5896 | ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1; |
5897 | ehi->action |= ATA_EH_SOFTRESET; | |
5898 | ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; | |
3e706399 | 5899 | |
b51e9e5d | 5900 | ap->pflags |= ATA_PFLAG_LOADING; |
3e706399 TH |
5901 | ata_port_schedule_eh(ap); |
5902 | ||
ba6a1308 | 5903 | spin_unlock_irqrestore(ap->lock, flags); |
3e706399 TH |
5904 | |
5905 | /* wait for EH to finish */ | |
5906 | ata_port_wait_eh(ap); | |
5907 | } else { | |
5908 | DPRINTK("ata%u: bus probe begin\n", ap->id); | |
5909 | rc = ata_bus_probe(ap); | |
5910 | DPRINTK("ata%u: bus probe end\n", ap->id); | |
5911 | ||
5912 | if (rc) { | |
5913 | /* FIXME: do something useful here? | |
5914 | * Current libata behavior will | |
5915 | * tear down everything when | |
5916 | * the module is removed | |
5917 | * or the h/w is unplugged. | |
5918 | */ | |
5919 | } | |
5920 | } | |
1da177e4 LT |
5921 | } |
5922 | ||
5923 | /* probes are done, now scan each port's disk(s) */ | |
c893a3ae | 5924 | DPRINTK("host probe begin\n"); |
cca3974e JG |
5925 | for (i = 0; i < host->n_ports; i++) { |
5926 | struct ata_port *ap = host->ports[i]; | |
1da177e4 | 5927 | |
644dd0cc | 5928 | ata_scsi_scan_host(ap); |
1da177e4 LT |
5929 | } |
5930 | ||
cca3974e | 5931 | dev_set_drvdata(dev, host); |
1da177e4 LT |
5932 | |
5933 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
5934 | return ent->n_ports; /* success */ | |
5935 | ||
2ec7df04 | 5936 | err_out_free_irq: |
cca3974e | 5937 | free_irq(ent->irq, host); |
1da177e4 | 5938 | err_out: |
cca3974e JG |
5939 | for (i = 0; i < host->n_ports; i++) { |
5940 | struct ata_port *ap = host->ports[i]; | |
77f3f879 TH |
5941 | if (ap) { |
5942 | ap->ops->port_stop(ap); | |
cca3974e | 5943 | scsi_host_put(ap->scsi_host); |
77f3f879 | 5944 | } |
1da177e4 | 5945 | } |
6d0500df | 5946 | |
cca3974e | 5947 | kfree(host); |
1da177e4 LT |
5948 | VPRINTK("EXIT, returning 0\n"); |
5949 | return 0; | |
5950 | } | |
5951 | ||
720ba126 TH |
5952 | /** |
5953 | * ata_port_detach - Detach ATA port in prepration of device removal | |
5954 | * @ap: ATA port to be detached | |
5955 | * | |
5956 | * Detach all ATA devices and the associated SCSI devices of @ap; | |
5957 | * then, remove the associated SCSI host. @ap is guaranteed to | |
5958 | * be quiescent on return from this function. | |
5959 | * | |
5960 | * LOCKING: | |
5961 | * Kernel thread context (may sleep). | |
5962 | */ | |
5963 | void ata_port_detach(struct ata_port *ap) | |
5964 | { | |
5965 | unsigned long flags; | |
5966 | int i; | |
5967 | ||
5968 | if (!ap->ops->error_handler) | |
c3cf30a9 | 5969 | goto skip_eh; |
720ba126 TH |
5970 | |
5971 | /* tell EH we're leaving & flush EH */ | |
ba6a1308 | 5972 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 5973 | ap->pflags |= ATA_PFLAG_UNLOADING; |
ba6a1308 | 5974 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5975 | |
5976 | ata_port_wait_eh(ap); | |
5977 | ||
5978 | /* EH is now guaranteed to see UNLOADING, so no new device | |
5979 | * will be attached. Disable all existing devices. | |
5980 | */ | |
ba6a1308 | 5981 | spin_lock_irqsave(ap->lock, flags); |
720ba126 TH |
5982 | |
5983 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
5984 | ata_dev_disable(&ap->device[i]); | |
5985 | ||
ba6a1308 | 5986 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5987 | |
5988 | /* Final freeze & EH. All in-flight commands are aborted. EH | |
5989 | * will be skipped and retrials will be terminated with bad | |
5990 | * target. | |
5991 | */ | |
ba6a1308 | 5992 | spin_lock_irqsave(ap->lock, flags); |
720ba126 | 5993 | ata_port_freeze(ap); /* won't be thawed */ |
ba6a1308 | 5994 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5995 | |
5996 | ata_port_wait_eh(ap); | |
5997 | ||
5998 | /* Flush hotplug task. The sequence is similar to | |
5999 | * ata_port_flush_task(). | |
6000 | */ | |
6001 | flush_workqueue(ata_aux_wq); | |
6002 | cancel_delayed_work(&ap->hotplug_task); | |
6003 | flush_workqueue(ata_aux_wq); | |
6004 | ||
c3cf30a9 | 6005 | skip_eh: |
720ba126 | 6006 | /* remove the associated SCSI host */ |
cca3974e | 6007 | scsi_remove_host(ap->scsi_host); |
720ba126 TH |
6008 | } |
6009 | ||
17b14451 | 6010 | /** |
cca3974e JG |
6011 | * ata_host_remove - PCI layer callback for device removal |
6012 | * @host: ATA host set that was removed | |
17b14451 | 6013 | * |
2e9edbf8 | 6014 | * Unregister all objects associated with this host set. Free those |
17b14451 AC |
6015 | * objects. |
6016 | * | |
6017 | * LOCKING: | |
6018 | * Inherited from calling layer (may sleep). | |
6019 | */ | |
6020 | ||
cca3974e | 6021 | void ata_host_remove(struct ata_host *host) |
17b14451 | 6022 | { |
17b14451 AC |
6023 | unsigned int i; |
6024 | ||
cca3974e JG |
6025 | for (i = 0; i < host->n_ports; i++) |
6026 | ata_port_detach(host->ports[i]); | |
17b14451 | 6027 | |
cca3974e JG |
6028 | free_irq(host->irq, host); |
6029 | if (host->irq2) | |
6030 | free_irq(host->irq2, host); | |
17b14451 | 6031 | |
cca3974e JG |
6032 | for (i = 0; i < host->n_ports; i++) { |
6033 | struct ata_port *ap = host->ports[i]; | |
17b14451 | 6034 | |
cca3974e | 6035 | ata_scsi_release(ap->scsi_host); |
17b14451 AC |
6036 | |
6037 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
6038 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
6039 | ||
2ec7df04 AC |
6040 | /* FIXME: Add -ac IDE pci mods to remove these special cases */ |
6041 | if (ioaddr->cmd_addr == ATA_PRIMARY_CMD) | |
6042 | release_region(ATA_PRIMARY_CMD, 8); | |
6043 | else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD) | |
6044 | release_region(ATA_SECONDARY_CMD, 8); | |
17b14451 AC |
6045 | } |
6046 | ||
cca3974e | 6047 | scsi_host_put(ap->scsi_host); |
17b14451 AC |
6048 | } |
6049 | ||
cca3974e JG |
6050 | if (host->ops->host_stop) |
6051 | host->ops->host_stop(host); | |
17b14451 | 6052 | |
cca3974e | 6053 | kfree(host); |
17b14451 AC |
6054 | } |
6055 | ||
1da177e4 LT |
6056 | /** |
6057 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4f931374 | 6058 | * @shost: libata host to be unloaded |
1da177e4 LT |
6059 | * |
6060 | * Performs all duties necessary to shut down a libata port... | |
6061 | * Kill port kthread, disable port, and release resources. | |
6062 | * | |
6063 | * LOCKING: | |
6064 | * Inherited from SCSI layer. | |
6065 | * | |
6066 | * RETURNS: | |
6067 | * One. | |
6068 | */ | |
6069 | ||
cca3974e | 6070 | int ata_scsi_release(struct Scsi_Host *shost) |
1da177e4 | 6071 | { |
cca3974e | 6072 | struct ata_port *ap = ata_shost_to_port(shost); |
1da177e4 LT |
6073 | |
6074 | DPRINTK("ENTER\n"); | |
6075 | ||
6076 | ap->ops->port_disable(ap); | |
6543bc07 | 6077 | ap->ops->port_stop(ap); |
1da177e4 LT |
6078 | |
6079 | DPRINTK("EXIT\n"); | |
6080 | return 1; | |
6081 | } | |
6082 | ||
f6d950e2 BK |
6083 | struct ata_probe_ent * |
6084 | ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port) | |
6085 | { | |
6086 | struct ata_probe_ent *probe_ent; | |
6087 | ||
6088 | probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); | |
6089 | if (!probe_ent) { | |
6090 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
6091 | kobject_name(&(dev->kobj))); | |
6092 | return NULL; | |
6093 | } | |
6094 | ||
6095 | INIT_LIST_HEAD(&probe_ent->node); | |
6096 | probe_ent->dev = dev; | |
6097 | ||
6098 | probe_ent->sht = port->sht; | |
cca3974e | 6099 | probe_ent->port_flags = port->flags; |
f6d950e2 BK |
6100 | probe_ent->pio_mask = port->pio_mask; |
6101 | probe_ent->mwdma_mask = port->mwdma_mask; | |
6102 | probe_ent->udma_mask = port->udma_mask; | |
6103 | probe_ent->port_ops = port->port_ops; | |
d639ca94 | 6104 | probe_ent->private_data = port->private_data; |
f6d950e2 BK |
6105 | |
6106 | return probe_ent; | |
6107 | } | |
6108 | ||
1da177e4 LT |
6109 | /** |
6110 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
6111 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
6112 | * |
6113 | * Utility function which initializes data_addr, error_addr, | |
6114 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
6115 | * device_addr, status_addr, and command_addr to standard offsets | |
6116 | * relative to cmd_addr. | |
6117 | * | |
6118 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 6119 | */ |
0baab86b | 6120 | |
1da177e4 LT |
6121 | void ata_std_ports(struct ata_ioports *ioaddr) |
6122 | { | |
6123 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
6124 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
6125 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
6126 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
6127 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
6128 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
6129 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
6130 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
6131 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
6132 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
6133 | } | |
6134 | ||
0baab86b | 6135 | |
374b1873 JG |
6136 | #ifdef CONFIG_PCI |
6137 | ||
cca3974e | 6138 | void ata_pci_host_stop (struct ata_host *host) |
374b1873 | 6139 | { |
cca3974e | 6140 | struct pci_dev *pdev = to_pci_dev(host->dev); |
374b1873 | 6141 | |
cca3974e | 6142 | pci_iounmap(pdev, host->mmio_base); |
374b1873 JG |
6143 | } |
6144 | ||
1da177e4 LT |
6145 | /** |
6146 | * ata_pci_remove_one - PCI layer callback for device removal | |
6147 | * @pdev: PCI device that was removed | |
6148 | * | |
6149 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 6150 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
6151 | * Handle this by unregistering all objects associated |
6152 | * with this PCI device. Free those objects. Then finally | |
6153 | * release PCI resources and disable device. | |
6154 | * | |
6155 | * LOCKING: | |
6156 | * Inherited from PCI layer (may sleep). | |
6157 | */ | |
6158 | ||
6159 | void ata_pci_remove_one (struct pci_dev *pdev) | |
6160 | { | |
6161 | struct device *dev = pci_dev_to_dev(pdev); | |
cca3974e | 6162 | struct ata_host *host = dev_get_drvdata(dev); |
1da177e4 | 6163 | |
cca3974e | 6164 | ata_host_remove(host); |
f0eb62b8 | 6165 | |
1da177e4 LT |
6166 | pci_release_regions(pdev); |
6167 | pci_disable_device(pdev); | |
6168 | dev_set_drvdata(dev, NULL); | |
6169 | } | |
6170 | ||
6171 | /* move to PCI subsystem */ | |
057ace5e | 6172 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
6173 | { |
6174 | unsigned long tmp = 0; | |
6175 | ||
6176 | switch (bits->width) { | |
6177 | case 1: { | |
6178 | u8 tmp8 = 0; | |
6179 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
6180 | tmp = tmp8; | |
6181 | break; | |
6182 | } | |
6183 | case 2: { | |
6184 | u16 tmp16 = 0; | |
6185 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
6186 | tmp = tmp16; | |
6187 | break; | |
6188 | } | |
6189 | case 4: { | |
6190 | u32 tmp32 = 0; | |
6191 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
6192 | tmp = tmp32; | |
6193 | break; | |
6194 | } | |
6195 | ||
6196 | default: | |
6197 | return -EINVAL; | |
6198 | } | |
6199 | ||
6200 | tmp &= bits->mask; | |
6201 | ||
6202 | return (tmp == bits->val) ? 1 : 0; | |
6203 | } | |
9b847548 | 6204 | |
3c5100c1 | 6205 | void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) |
9b847548 JA |
6206 | { |
6207 | pci_save_state(pdev); | |
500530f6 | 6208 | |
3c5100c1 | 6209 | if (mesg.event == PM_EVENT_SUSPEND) { |
500530f6 TH |
6210 | pci_disable_device(pdev); |
6211 | pci_set_power_state(pdev, PCI_D3hot); | |
6212 | } | |
9b847548 JA |
6213 | } |
6214 | ||
500530f6 | 6215 | void ata_pci_device_do_resume(struct pci_dev *pdev) |
9b847548 JA |
6216 | { |
6217 | pci_set_power_state(pdev, PCI_D0); | |
6218 | pci_restore_state(pdev); | |
6219 | pci_enable_device(pdev); | |
6220 | pci_set_master(pdev); | |
500530f6 TH |
6221 | } |
6222 | ||
3c5100c1 | 6223 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) |
500530f6 | 6224 | { |
cca3974e | 6225 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
500530f6 TH |
6226 | int rc = 0; |
6227 | ||
cca3974e | 6228 | rc = ata_host_suspend(host, mesg); |
500530f6 TH |
6229 | if (rc) |
6230 | return rc; | |
6231 | ||
3c5100c1 | 6232 | ata_pci_device_do_suspend(pdev, mesg); |
500530f6 TH |
6233 | |
6234 | return 0; | |
6235 | } | |
6236 | ||
6237 | int ata_pci_device_resume(struct pci_dev *pdev) | |
6238 | { | |
cca3974e | 6239 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
500530f6 TH |
6240 | |
6241 | ata_pci_device_do_resume(pdev); | |
cca3974e | 6242 | ata_host_resume(host); |
9b847548 JA |
6243 | return 0; |
6244 | } | |
1da177e4 LT |
6245 | #endif /* CONFIG_PCI */ |
6246 | ||
6247 | ||
1da177e4 LT |
6248 | static int __init ata_init(void) |
6249 | { | |
a8601e5f | 6250 | ata_probe_timeout *= HZ; |
1da177e4 LT |
6251 | ata_wq = create_workqueue("ata"); |
6252 | if (!ata_wq) | |
6253 | return -ENOMEM; | |
6254 | ||
453b07ac TH |
6255 | ata_aux_wq = create_singlethread_workqueue("ata_aux"); |
6256 | if (!ata_aux_wq) { | |
6257 | destroy_workqueue(ata_wq); | |
6258 | return -ENOMEM; | |
6259 | } | |
6260 | ||
1da177e4 LT |
6261 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); |
6262 | return 0; | |
6263 | } | |
6264 | ||
6265 | static void __exit ata_exit(void) | |
6266 | { | |
6267 | destroy_workqueue(ata_wq); | |
453b07ac | 6268 | destroy_workqueue(ata_aux_wq); |
1da177e4 LT |
6269 | } |
6270 | ||
a4625085 | 6271 | subsys_initcall(ata_init); |
1da177e4 LT |
6272 | module_exit(ata_exit); |
6273 | ||
67846b30 | 6274 | static unsigned long ratelimit_time; |
34af946a | 6275 | static DEFINE_SPINLOCK(ata_ratelimit_lock); |
67846b30 JG |
6276 | |
6277 | int ata_ratelimit(void) | |
6278 | { | |
6279 | int rc; | |
6280 | unsigned long flags; | |
6281 | ||
6282 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
6283 | ||
6284 | if (time_after(jiffies, ratelimit_time)) { | |
6285 | rc = 1; | |
6286 | ratelimit_time = jiffies + (HZ/5); | |
6287 | } else | |
6288 | rc = 0; | |
6289 | ||
6290 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
6291 | ||
6292 | return rc; | |
6293 | } | |
6294 | ||
c22daff4 TH |
6295 | /** |
6296 | * ata_wait_register - wait until register value changes | |
6297 | * @reg: IO-mapped register | |
6298 | * @mask: Mask to apply to read register value | |
6299 | * @val: Wait condition | |
6300 | * @interval_msec: polling interval in milliseconds | |
6301 | * @timeout_msec: timeout in milliseconds | |
6302 | * | |
6303 | * Waiting for some bits of register to change is a common | |
6304 | * operation for ATA controllers. This function reads 32bit LE | |
6305 | * IO-mapped register @reg and tests for the following condition. | |
6306 | * | |
6307 | * (*@reg & mask) != val | |
6308 | * | |
6309 | * If the condition is met, it returns; otherwise, the process is | |
6310 | * repeated after @interval_msec until timeout. | |
6311 | * | |
6312 | * LOCKING: | |
6313 | * Kernel thread context (may sleep) | |
6314 | * | |
6315 | * RETURNS: | |
6316 | * The final register value. | |
6317 | */ | |
6318 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
6319 | unsigned long interval_msec, | |
6320 | unsigned long timeout_msec) | |
6321 | { | |
6322 | unsigned long timeout; | |
6323 | u32 tmp; | |
6324 | ||
6325 | tmp = ioread32(reg); | |
6326 | ||
6327 | /* Calculate timeout _after_ the first read to make sure | |
6328 | * preceding writes reach the controller before starting to | |
6329 | * eat away the timeout. | |
6330 | */ | |
6331 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
6332 | ||
6333 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
6334 | msleep(interval_msec); | |
6335 | tmp = ioread32(reg); | |
6336 | } | |
6337 | ||
6338 | return tmp; | |
6339 | } | |
6340 | ||
dd5b06c4 TH |
6341 | /* |
6342 | * Dummy port_ops | |
6343 | */ | |
6344 | static void ata_dummy_noret(struct ata_port *ap) { } | |
6345 | static int ata_dummy_ret0(struct ata_port *ap) { return 0; } | |
6346 | static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } | |
6347 | ||
6348 | static u8 ata_dummy_check_status(struct ata_port *ap) | |
6349 | { | |
6350 | return ATA_DRDY; | |
6351 | } | |
6352 | ||
6353 | static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) | |
6354 | { | |
6355 | return AC_ERR_SYSTEM; | |
6356 | } | |
6357 | ||
6358 | const struct ata_port_operations ata_dummy_port_ops = { | |
6359 | .port_disable = ata_port_disable, | |
6360 | .check_status = ata_dummy_check_status, | |
6361 | .check_altstatus = ata_dummy_check_status, | |
6362 | .dev_select = ata_noop_dev_select, | |
6363 | .qc_prep = ata_noop_qc_prep, | |
6364 | .qc_issue = ata_dummy_qc_issue, | |
6365 | .freeze = ata_dummy_noret, | |
6366 | .thaw = ata_dummy_noret, | |
6367 | .error_handler = ata_dummy_noret, | |
6368 | .post_internal_cmd = ata_dummy_qc_noret, | |
6369 | .irq_clear = ata_dummy_noret, | |
6370 | .port_start = ata_dummy_ret0, | |
6371 | .port_stop = ata_dummy_noret, | |
6372 | }; | |
6373 | ||
1da177e4 LT |
6374 | /* |
6375 | * libata is essentially a library of internal helper functions for | |
6376 | * low-level ATA host controller drivers. As such, the API/ABI is | |
6377 | * likely to change as new drivers are added and updated. | |
6378 | * Do not depend on ABI/API stability. | |
6379 | */ | |
6380 | ||
e9c83914 TH |
6381 | EXPORT_SYMBOL_GPL(sata_deb_timing_normal); |
6382 | EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); | |
6383 | EXPORT_SYMBOL_GPL(sata_deb_timing_long); | |
dd5b06c4 | 6384 | EXPORT_SYMBOL_GPL(ata_dummy_port_ops); |
1da177e4 LT |
6385 | EXPORT_SYMBOL_GPL(ata_std_bios_param); |
6386 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
cca3974e | 6387 | EXPORT_SYMBOL_GPL(ata_host_init); |
1da177e4 | 6388 | EXPORT_SYMBOL_GPL(ata_device_add); |
720ba126 | 6389 | EXPORT_SYMBOL_GPL(ata_port_detach); |
cca3974e | 6390 | EXPORT_SYMBOL_GPL(ata_host_remove); |
1da177e4 LT |
6391 | EXPORT_SYMBOL_GPL(ata_sg_init); |
6392 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
9a1004d0 | 6393 | EXPORT_SYMBOL_GPL(ata_hsm_move); |
f686bcb8 | 6394 | EXPORT_SYMBOL_GPL(ata_qc_complete); |
dedaf2b0 | 6395 | EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); |
1da177e4 | 6396 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
1da177e4 LT |
6397 | EXPORT_SYMBOL_GPL(ata_tf_load); |
6398 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
6399 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
6400 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
6401 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
6402 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
6403 | EXPORT_SYMBOL_GPL(ata_check_status); | |
6404 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
6405 | EXPORT_SYMBOL_GPL(ata_exec_command); |
6406 | EXPORT_SYMBOL_GPL(ata_port_start); | |
6407 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 6408 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 | 6409 | EXPORT_SYMBOL_GPL(ata_interrupt); |
a6b2c5d4 AC |
6410 | EXPORT_SYMBOL_GPL(ata_mmio_data_xfer); |
6411 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer); | |
75e99585 | 6412 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq); |
1da177e4 | 6413 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
e46834cd | 6414 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); |
1da177e4 LT |
6415 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
6416 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
6417 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
6418 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
6419 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
6d97dbd7 TH |
6420 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); |
6421 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); | |
6422 | EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); | |
6423 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); | |
6424 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); | |
1da177e4 | 6425 | EXPORT_SYMBOL_GPL(ata_port_probe); |
3c567b7d | 6426 | EXPORT_SYMBOL_GPL(sata_set_spd); |
d7bb4cc7 TH |
6427 | EXPORT_SYMBOL_GPL(sata_phy_debounce); |
6428 | EXPORT_SYMBOL_GPL(sata_phy_resume); | |
1da177e4 LT |
6429 | EXPORT_SYMBOL_GPL(sata_phy_reset); |
6430 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
6431 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
f5914a46 | 6432 | EXPORT_SYMBOL_GPL(ata_std_prereset); |
c2bd5804 | 6433 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
b6103f6d | 6434 | EXPORT_SYMBOL_GPL(sata_port_hardreset); |
c2bd5804 TH |
6435 | EXPORT_SYMBOL_GPL(sata_std_hardreset); |
6436 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
2e9edbf8 JG |
6437 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
6438 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
1da177e4 | 6439 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 6440 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
c22daff4 | 6441 | EXPORT_SYMBOL_GPL(ata_wait_register); |
6f8b9958 | 6442 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
86e45b6b | 6443 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
6444 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
6445 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
1da177e4 | 6446 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
83c47bcb | 6447 | EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); |
a6e6ce8e | 6448 | EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); |
1da177e4 LT |
6449 | EXPORT_SYMBOL_GPL(ata_scsi_release); |
6450 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
34bf2170 TH |
6451 | EXPORT_SYMBOL_GPL(sata_scr_valid); |
6452 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
6453 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
6454 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
6455 | EXPORT_SYMBOL_GPL(ata_port_online); | |
6456 | EXPORT_SYMBOL_GPL(ata_port_offline); | |
cca3974e JG |
6457 | EXPORT_SYMBOL_GPL(ata_host_suspend); |
6458 | EXPORT_SYMBOL_GPL(ata_host_resume); | |
6a62a04d TH |
6459 | EXPORT_SYMBOL_GPL(ata_id_string); |
6460 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
6919a0a6 | 6461 | EXPORT_SYMBOL_GPL(ata_device_blacklisted); |
1da177e4 LT |
6462 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
6463 | ||
1bc4ccff | 6464 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
6465 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
6466 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
6467 | ||
1da177e4 LT |
6468 | #ifdef CONFIG_PCI |
6469 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 6470 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
6471 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
6472 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
6473 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
500530f6 TH |
6474 | EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); |
6475 | EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); | |
9b847548 JA |
6476 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
6477 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
67951ade AC |
6478 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
6479 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
1da177e4 | 6480 | #endif /* CONFIG_PCI */ |
9b847548 | 6481 | |
9b847548 JA |
6482 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); |
6483 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); | |
ece1d636 | 6484 | |
ece1d636 | 6485 | EXPORT_SYMBOL_GPL(ata_eng_timeout); |
7b70fc03 TH |
6486 | EXPORT_SYMBOL_GPL(ata_port_schedule_eh); |
6487 | EXPORT_SYMBOL_GPL(ata_port_abort); | |
e3180499 TH |
6488 | EXPORT_SYMBOL_GPL(ata_port_freeze); |
6489 | EXPORT_SYMBOL_GPL(ata_eh_freeze_port); | |
6490 | EXPORT_SYMBOL_GPL(ata_eh_thaw_port); | |
ece1d636 TH |
6491 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
6492 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
022bdb07 | 6493 | EXPORT_SYMBOL_GPL(ata_do_eh); |