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669a5db4 JG |
1 | /* |
2 | * ata_generic.c - Generic PATA/SATA controller driver. | |
3 | * Copyright 2005 Red Hat Inc <alan@redhat.com>, all rights reserved. | |
4 | * | |
85cd7251 | 5 | * Elements from ide/pci/generic.c |
669a5db4 JG |
6 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> |
7 | * Portions (C) Copyright 2002 Red Hat Inc <alan@redhat.com> | |
8 | * | |
9 | * May be copied or modified under the terms of the GNU General Public License | |
85cd7251 | 10 | * |
669a5db4 JG |
11 | * Driver for PCI IDE interfaces implementing the standard bus mastering |
12 | * interface functionality. This assumes the BIOS did the drive set up and | |
13 | * tuning for us. By default we do not grab all IDE class devices as they | |
14 | * may have other drivers or need fixups to avoid problems. Instead we keep | |
15 | * a default list of stuff without documentation/driver that appears to | |
85cd7251 | 16 | * work. |
669a5db4 JG |
17 | */ |
18 | ||
19 | #include <linux/kernel.h> | |
20 | #include <linux/module.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/blkdev.h> | |
24 | #include <linux/delay.h> | |
25 | #include <scsi/scsi_host.h> | |
26 | #include <linux/libata.h> | |
27 | ||
28 | #define DRV_NAME "ata_generic" | |
5e8f757c | 29 | #define DRV_VERSION "0.2.15" |
669a5db4 JG |
30 | |
31 | /* | |
32 | * A generic parallel ATA driver using libata | |
33 | */ | |
34 | ||
669a5db4 JG |
35 | /** |
36 | * generic_set_mode - mode setting | |
0260731f | 37 | * @link: link to set up |
b229a7b0 | 38 | * @unused: returned device on error |
669a5db4 JG |
39 | * |
40 | * Use a non standard set_mode function. We don't want to be tuned. | |
41 | * The BIOS configured everything. Our job is not to fiddle. We | |
42 | * read the dma enabled bits from the PCI configuration of the device | |
85cd7251 | 43 | * and respect them. |
669a5db4 | 44 | */ |
85cd7251 | 45 | |
0260731f | 46 | static int generic_set_mode(struct ata_link *link, struct ata_device **unused) |
669a5db4 | 47 | { |
0260731f | 48 | struct ata_port *ap = link->ap; |
669a5db4 | 49 | int dma_enabled = 0; |
f58229f8 | 50 | struct ata_device *dev; |
5e8f757c | 51 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
669a5db4 JG |
52 | |
53 | /* Bits 5 and 6 indicate if DMA is active on master/slave */ | |
54 | if (ap->ioaddr.bmdma_addr) | |
d6f4d5ea | 55 | dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
85cd7251 | 56 | |
5e8f757c AC |
57 | if (pdev->vendor == PCI_VENDOR_ID_CENATEK) |
58 | dma_enabled = 0xFF; | |
59 | ||
0260731f | 60 | ata_link_for_each_dev(dev, link) { |
f8ab6d8e TH |
61 | if (!ata_dev_enabled(dev)) |
62 | continue; | |
63 | ||
64 | /* We don't really care */ | |
65 | dev->pio_mode = XFER_PIO_0; | |
66 | dev->dma_mode = XFER_MW_DMA_0; | |
67 | /* We do need the right mode information for DMA or PIO | |
68 | and this comes from the current configuration flags */ | |
69 | if (dma_enabled & (1 << (5 + dev->devno))) { | |
9d3501ab TH |
70 | unsigned int xfer_mask = ata_id_xfermask(dev->id); |
71 | const char *name; | |
72 | ||
73 | if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) | |
74 | name = ata_mode_string(xfer_mask); | |
75 | else { | |
76 | /* SWDMA perhaps? */ | |
77 | name = "DMA"; | |
78 | xfer_mask |= ata_xfer_mode2mask(XFER_MW_DMA_0); | |
79 | } | |
80 | ||
81 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", | |
82 | name); | |
83 | ||
84 | dev->xfer_mode = ata_xfer_mask2mode(xfer_mask); | |
85 | dev->xfer_shift = ata_xfer_mode2shift(dev->xfer_mode); | |
f8ab6d8e TH |
86 | dev->flags &= ~ATA_DFLAG_PIO; |
87 | } else { | |
88 | ata_dev_printk(dev, KERN_INFO, "configured for PIO\n"); | |
89 | dev->xfer_mode = XFER_PIO_0; | |
90 | dev->xfer_shift = ATA_SHIFT_PIO; | |
91 | dev->flags |= ATA_DFLAG_PIO; | |
669a5db4 JG |
92 | } |
93 | } | |
b229a7b0 | 94 | return 0; |
669a5db4 JG |
95 | } |
96 | ||
97 | static struct scsi_host_template generic_sht = { | |
68d1d07b | 98 | ATA_BMDMA_SHT(DRV_NAME), |
669a5db4 JG |
99 | }; |
100 | ||
101 | static struct ata_port_operations generic_port_ops = { | |
102 | .set_mode = generic_set_mode, | |
6bd99b4e | 103 | .mode_filter = ata_pci_default_filter, |
85cd7251 | 104 | |
669a5db4 JG |
105 | .tf_load = ata_tf_load, |
106 | .tf_read = ata_tf_read, | |
107 | .check_status = ata_check_status, | |
108 | .exec_command = ata_exec_command, | |
109 | .dev_select = ata_std_dev_select, | |
110 | ||
111 | .bmdma_setup = ata_bmdma_setup, | |
112 | .bmdma_start = ata_bmdma_start, | |
113 | .bmdma_stop = ata_bmdma_stop, | |
114 | .bmdma_status = ata_bmdma_status, | |
85cd7251 | 115 | |
0d5ff566 | 116 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
117 | |
118 | .freeze = ata_bmdma_freeze, | |
119 | .thaw = ata_bmdma_thaw, | |
eb4a2c7f | 120 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 121 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
eb4a2c7f | 122 | .cable_detect = ata_cable_unknown, |
669a5db4 JG |
123 | |
124 | .qc_prep = ata_qc_prep, | |
125 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 126 | |
669a5db4 JG |
127 | .irq_handler = ata_interrupt, |
128 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 129 | .irq_on = ata_irq_on, |
669a5db4 | 130 | |
81ad1837 | 131 | .port_start = ata_sff_port_start, |
85cd7251 JG |
132 | }; |
133 | ||
669a5db4 JG |
134 | static int all_generic_ide; /* Set to claim all devices */ |
135 | ||
136 | /** | |
137 | * ata_generic_init - attach generic IDE | |
138 | * @dev: PCI device found | |
139 | * @id: match entry | |
140 | * | |
141 | * Called each time a matching IDE interface is found. We check if the | |
85cd7251 | 142 | * interface is one we wish to claim and if so we perform any chip |
669a5db4 JG |
143 | * specific hacks then let the ATA layer do the heavy lifting. |
144 | */ | |
85cd7251 | 145 | |
669a5db4 JG |
146 | static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
147 | { | |
148 | u16 command; | |
1626aeb8 | 149 | static const struct ata_port_info info = { |
669a5db4 | 150 | .sht = &generic_sht, |
1d2808fd | 151 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
152 | .pio_mask = 0x1f, |
153 | .mwdma_mask = 0x07, | |
bf6263a8 | 154 | .udma_mask = ATA_UDMA5, |
669a5db4 JG |
155 | .port_ops = &generic_port_ops |
156 | }; | |
1626aeb8 | 157 | const struct ata_port_info *ppi[] = { &info, NULL }; |
85cd7251 | 158 | |
669a5db4 JG |
159 | /* Don't use the generic entry unless instructed to do so */ |
160 | if (id->driver_data == 1 && all_generic_ide == 0) | |
161 | return -ENODEV; | |
162 | ||
163 | /* Devices that need care */ | |
164 | if (dev->vendor == PCI_VENDOR_ID_UMC && | |
165 | dev->device == PCI_DEVICE_ID_UMC_UM8886A && | |
166 | (!(PCI_FUNC(dev->devfn) & 1))) | |
167 | return -ENODEV; | |
168 | ||
169 | if (dev->vendor == PCI_VENDOR_ID_OPTI && | |
170 | dev->device == PCI_DEVICE_ID_OPTI_82C558 && | |
171 | (!(PCI_FUNC(dev->devfn) & 1))) | |
172 | return -ENODEV; | |
173 | ||
174 | /* Don't re-enable devices in generic mode or we will break some | |
175 | motherboards with disabled and unused IDE controllers */ | |
176 | pci_read_config_word(dev, PCI_COMMAND, &command); | |
177 | if (!(command & PCI_COMMAND_IO)) | |
178 | return -ENODEV; | |
85cd7251 | 179 | |
669a5db4 JG |
180 | if (dev->vendor == PCI_VENDOR_ID_AL) |
181 | ata_pci_clear_simplex(dev); | |
182 | ||
1626aeb8 | 183 | return ata_pci_init_one(dev, ppi); |
669a5db4 JG |
184 | } |
185 | ||
186 | static struct pci_device_id ata_generic[] = { | |
187 | { PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), }, | |
188 | { PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), }, | |
85cd7251 | 189 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8673F), }, |
669a5db4 JG |
190 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886A), }, |
191 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF), }, | |
192 | { PCI_DEVICE(PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), }, | |
193 | { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), }, | |
194 | { PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), }, | |
5e8f757c | 195 | { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE), }, |
669a5db4 JG |
196 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO), }, |
197 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), }, | |
198 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), }, | |
199 | /* Must come last. If you add entries adjust this table appropriately */ | |
200 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 1}, | |
201 | { 0, }, | |
202 | }; | |
203 | ||
204 | static struct pci_driver ata_generic_pci_driver = { | |
205 | .name = DRV_NAME, | |
206 | .id_table = ata_generic, | |
207 | .probe = ata_generic_init_one, | |
30ced0f0 | 208 | .remove = ata_pci_remove_one, |
438ac6d5 | 209 | #ifdef CONFIG_PM |
30ced0f0 AC |
210 | .suspend = ata_pci_device_suspend, |
211 | .resume = ata_pci_device_resume, | |
438ac6d5 | 212 | #endif |
669a5db4 JG |
213 | }; |
214 | ||
215 | static int __init ata_generic_init(void) | |
216 | { | |
3f03c671 | 217 | return pci_register_driver(&ata_generic_pci_driver); |
669a5db4 JG |
218 | } |
219 | ||
220 | ||
221 | static void __exit ata_generic_exit(void) | |
222 | { | |
223 | pci_unregister_driver(&ata_generic_pci_driver); | |
224 | } | |
225 | ||
226 | ||
227 | MODULE_AUTHOR("Alan Cox"); | |
228 | MODULE_DESCRIPTION("low-level driver for generic ATA"); | |
229 | MODULE_LICENSE("GPL"); | |
230 | MODULE_DEVICE_TABLE(pci, ata_generic); | |
231 | MODULE_VERSION(DRV_VERSION); | |
232 | ||
233 | module_init(ata_generic_init); | |
234 | module_exit(ata_generic_exit); | |
235 | ||
236 | module_param(all_generic_ide, int, 0); |