]> bbs.cooldavid.org Git - net-next-2.6.git/blame - crypto/async_tx/async_pq.c
async_pq: rename scribble page
[net-next-2.6.git] / crypto / async_tx / async_pq.c
CommitLineData
b2f46fd8
DW
1/*
2 * Copyright(c) 2007 Yuri Tikhonov <yur@emcraft.com>
3 * Copyright(c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the Free
7 * Software Foundation; either version 2 of the License, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc., 59
17 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called COPYING.
21 */
22#include <linux/kernel.h>
23#include <linux/interrupt.h>
24#include <linux/dma-mapping.h>
25#include <linux/raid/pq.h>
26#include <linux/async_tx.h>
27
28/**
030b0772
DW
29 * pq_scribble_page - space to hold throwaway P or Q buffer for
30 * synchronous gen_syndrome
b2f46fd8 31 */
030b0772 32static struct page *pq_scribble_page;
b2f46fd8 33
b2f46fd8
DW
34/* the struct page *blocks[] parameter passed to async_gen_syndrome()
35 * and async_syndrome_val() contains the 'P' destination address at
36 * blocks[disks-2] and the 'Q' destination address at blocks[disks-1]
37 *
38 * note: these are macros as they are used as lvalues
39 */
40#define P(b, d) (b[d-2])
41#define Q(b, d) (b[d-1])
42
43/**
44 * do_async_gen_syndrome - asynchronously calculate P and/or Q
45 */
46static __async_inline struct dma_async_tx_descriptor *
47do_async_gen_syndrome(struct dma_chan *chan, struct page **blocks,
48 const unsigned char *scfs, unsigned int offset, int disks,
49 size_t len, dma_addr_t *dma_src,
50 struct async_submit_ctl *submit)
51{
52 struct dma_async_tx_descriptor *tx = NULL;
53 struct dma_device *dma = chan->device;
54 enum dma_ctrl_flags dma_flags = 0;
55 enum async_tx_flags flags_orig = submit->flags;
56 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
57 dma_async_tx_callback cb_param_orig = submit->cb_param;
58 int src_cnt = disks - 2;
59 unsigned char coefs[src_cnt];
60 unsigned short pq_src_cnt;
61 dma_addr_t dma_dest[2];
62 int src_off = 0;
63 int idx;
64 int i;
65
66 /* DMAs use destinations as sources, so use BIDIRECTIONAL mapping */
67 if (P(blocks, disks))
68 dma_dest[0] = dma_map_page(dma->dev, P(blocks, disks), offset,
69 len, DMA_BIDIRECTIONAL);
70 else
71 dma_flags |= DMA_PREP_PQ_DISABLE_P;
72 if (Q(blocks, disks))
73 dma_dest[1] = dma_map_page(dma->dev, Q(blocks, disks), offset,
74 len, DMA_BIDIRECTIONAL);
75 else
76 dma_flags |= DMA_PREP_PQ_DISABLE_Q;
77
78 /* convert source addresses being careful to collapse 'empty'
79 * sources and update the coefficients accordingly
80 */
81 for (i = 0, idx = 0; i < src_cnt; i++) {
5dd33c9a 82 if (blocks[i] == NULL)
b2f46fd8
DW
83 continue;
84 dma_src[idx] = dma_map_page(dma->dev, blocks[i], offset, len,
85 DMA_TO_DEVICE);
86 coefs[idx] = scfs[i];
87 idx++;
88 }
89 src_cnt = idx;
90
91 while (src_cnt > 0) {
92 submit->flags = flags_orig;
93 pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags));
94 /* if we are submitting additional pqs, leave the chain open,
95 * clear the callback parameters, and leave the destination
96 * buffers mapped
97 */
98 if (src_cnt > pq_src_cnt) {
99 submit->flags &= ~ASYNC_TX_ACK;
0403e382 100 submit->flags |= ASYNC_TX_FENCE;
b2f46fd8
DW
101 dma_flags |= DMA_COMPL_SKIP_DEST_UNMAP;
102 submit->cb_fn = NULL;
103 submit->cb_param = NULL;
104 } else {
105 dma_flags &= ~DMA_COMPL_SKIP_DEST_UNMAP;
106 submit->cb_fn = cb_fn_orig;
107 submit->cb_param = cb_param_orig;
108 if (cb_fn_orig)
109 dma_flags |= DMA_PREP_INTERRUPT;
110 }
0403e382
DW
111 if (submit->flags & ASYNC_TX_FENCE)
112 dma_flags |= DMA_PREP_FENCE;
b2f46fd8
DW
113
114 /* Since we have clobbered the src_list we are committed
115 * to doing this asynchronously. Drivers force forward
116 * progress in case they can not provide a descriptor
117 */
118 for (;;) {
119 tx = dma->device_prep_dma_pq(chan, dma_dest,
120 &dma_src[src_off],
121 pq_src_cnt,
122 &coefs[src_off], len,
123 dma_flags);
124 if (likely(tx))
125 break;
126 async_tx_quiesce(&submit->depend_tx);
127 dma_async_issue_pending(chan);
128 }
129
130 async_tx_submit(chan, tx, submit);
131 submit->depend_tx = tx;
132
133 /* drop completed sources */
134 src_cnt -= pq_src_cnt;
135 src_off += pq_src_cnt;
136
137 dma_flags |= DMA_PREP_CONTINUE;
138 }
139
140 return tx;
141}
142
143/**
144 * do_sync_gen_syndrome - synchronously calculate a raid6 syndrome
145 */
146static void
147do_sync_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
148 size_t len, struct async_submit_ctl *submit)
149{
150 void **srcs;
151 int i;
152
153 if (submit->scribble)
154 srcs = submit->scribble;
155 else
156 srcs = (void **) blocks;
157
158 for (i = 0; i < disks; i++) {
5dd33c9a 159 if (blocks[i] == NULL) {
b2f46fd8 160 BUG_ON(i > disks - 3); /* P or Q can't be zero */
5dd33c9a 161 srcs[i] = (void*)raid6_empty_zero_page;
b2f46fd8
DW
162 } else
163 srcs[i] = page_address(blocks[i]) + offset;
164 }
165 raid6_call.gen_syndrome(disks, len, srcs);
166 async_tx_sync_epilog(submit);
167}
168
169/**
170 * async_gen_syndrome - asynchronously calculate a raid6 syndrome
171 * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1
172 * @offset: common offset into each block (src and dest) to start transaction
173 * @disks: number of blocks (including missing P or Q, see below)
174 * @len: length of operation in bytes
175 * @submit: submission/completion modifiers
176 *
177 * General note: This routine assumes a field of GF(2^8) with a
178 * primitive polynomial of 0x11d and a generator of {02}.
179 *
180 * 'disks' note: callers can optionally omit either P or Q (but not
181 * both) from the calculation by setting blocks[disks-2] or
182 * blocks[disks-1] to NULL. When P or Q is omitted 'len' must be <=
183 * PAGE_SIZE as a temporary buffer of this size is used in the
184 * synchronous path. 'disks' always accounts for both destination
5676470f
DW
185 * buffers. If any source buffers (blocks[i] where i < disks - 2) are
186 * set to NULL those buffers will be replaced with the raid6_zero_page
187 * in the synchronous path and omitted in the hardware-asynchronous
188 * path.
b2f46fd8
DW
189 *
190 * 'blocks' note: if submit->scribble is NULL then the contents of
5676470f
DW
191 * 'blocks' may be overwritten to perform address conversions
192 * (dma_map_page() or page_address()).
b2f46fd8
DW
193 */
194struct dma_async_tx_descriptor *
195async_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
196 size_t len, struct async_submit_ctl *submit)
197{
198 int src_cnt = disks - 2;
199 struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ,
200 &P(blocks, disks), 2,
201 blocks, src_cnt, len);
202 struct dma_device *device = chan ? chan->device : NULL;
203 dma_addr_t *dma_src = NULL;
204
205 BUG_ON(disks > 255 || !(P(blocks, disks) || Q(blocks, disks)));
206
207 if (submit->scribble)
208 dma_src = submit->scribble;
209 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
210 dma_src = (dma_addr_t *) blocks;
211
212 if (dma_src && device &&
213 (src_cnt <= dma_maxpq(device, 0) ||
83544ae9
DW
214 dma_maxpq(device, DMA_PREP_CONTINUE) > 0) &&
215 is_dma_pq_aligned(device, offset, 0, len)) {
b2f46fd8
DW
216 /* run the p+q asynchronously */
217 pr_debug("%s: (async) disks: %d len: %zu\n",
218 __func__, disks, len);
219 return do_async_gen_syndrome(chan, blocks, raid6_gfexp, offset,
220 disks, len, dma_src, submit);
221 }
222
223 /* run the pq synchronously */
224 pr_debug("%s: (sync) disks: %d len: %zu\n", __func__, disks, len);
225
226 /* wait for any prerequisite operations */
227 async_tx_quiesce(&submit->depend_tx);
228
229 if (!P(blocks, disks)) {
030b0772 230 P(blocks, disks) = pq_scribble_page;
b2f46fd8
DW
231 BUG_ON(len + offset > PAGE_SIZE);
232 }
233 if (!Q(blocks, disks)) {
030b0772 234 Q(blocks, disks) = pq_scribble_page;
b2f46fd8
DW
235 BUG_ON(len + offset > PAGE_SIZE);
236 }
237 do_sync_gen_syndrome(blocks, offset, disks, len, submit);
238
239 return NULL;
240}
241EXPORT_SYMBOL_GPL(async_gen_syndrome);
242
243/**
244 * async_syndrome_val - asynchronously validate a raid6 syndrome
245 * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1
246 * @offset: common offset into each block (src and dest) to start transaction
247 * @disks: number of blocks (including missing P or Q, see below)
248 * @len: length of operation in bytes
249 * @pqres: on val failure SUM_CHECK_P_RESULT and/or SUM_CHECK_Q_RESULT are set
250 * @spare: temporary result buffer for the synchronous case
251 * @submit: submission / completion modifiers
252 *
253 * The same notes from async_gen_syndrome apply to the 'blocks',
254 * and 'disks' parameters of this routine. The synchronous path
255 * requires a temporary result buffer and submit->scribble to be
256 * specified.
257 */
258struct dma_async_tx_descriptor *
259async_syndrome_val(struct page **blocks, unsigned int offset, int disks,
260 size_t len, enum sum_check_flags *pqres, struct page *spare,
261 struct async_submit_ctl *submit)
262{
263 struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ_VAL,
264 NULL, 0, blocks, disks,
265 len);
266 struct dma_device *device = chan ? chan->device : NULL;
267 struct dma_async_tx_descriptor *tx;
b2141e69 268 unsigned char coefs[disks-2];
b2f46fd8
DW
269 enum dma_ctrl_flags dma_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0;
270 dma_addr_t *dma_src = NULL;
b2141e69 271 int src_cnt = 0;
b2f46fd8
DW
272
273 BUG_ON(disks < 4);
274
275 if (submit->scribble)
276 dma_src = submit->scribble;
277 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
278 dma_src = (dma_addr_t *) blocks;
279
83544ae9
DW
280 if (dma_src && device && disks <= dma_maxpq(device, 0) &&
281 is_dma_pq_aligned(device, offset, 0, len)) {
b2f46fd8
DW
282 struct device *dev = device->dev;
283 dma_addr_t *pq = &dma_src[disks-2];
284 int i;
285
286 pr_debug("%s: (async) disks: %d len: %zu\n",
287 __func__, disks, len);
288 if (!P(blocks, disks))
289 dma_flags |= DMA_PREP_PQ_DISABLE_P;
b2141e69 290 else
5676470f 291 pq[0] = dma_map_page(dev, P(blocks, disks),
b2141e69
N
292 offset, len,
293 DMA_TO_DEVICE);
b2f46fd8
DW
294 if (!Q(blocks, disks))
295 dma_flags |= DMA_PREP_PQ_DISABLE_Q;
b2141e69 296 else
5676470f 297 pq[1] = dma_map_page(dev, Q(blocks, disks),
b2141e69
N
298 offset, len,
299 DMA_TO_DEVICE);
300
0403e382
DW
301 if (submit->flags & ASYNC_TX_FENCE)
302 dma_flags |= DMA_PREP_FENCE;
b2141e69
N
303 for (i = 0; i < disks-2; i++)
304 if (likely(blocks[i])) {
305 dma_src[src_cnt] = dma_map_page(dev, blocks[i],
306 offset, len,
307 DMA_TO_DEVICE);
308 coefs[src_cnt] = raid6_gfexp[i];
309 src_cnt++;
310 }
b2f46fd8
DW
311
312 for (;;) {
313 tx = device->device_prep_dma_pq_val(chan, pq, dma_src,
b2141e69
N
314 src_cnt,
315 coefs,
b2f46fd8
DW
316 len, pqres,
317 dma_flags);
318 if (likely(tx))
319 break;
320 async_tx_quiesce(&submit->depend_tx);
321 dma_async_issue_pending(chan);
322 }
323 async_tx_submit(chan, tx, submit);
324
325 return tx;
326 } else {
327 struct page *p_src = P(blocks, disks);
328 struct page *q_src = Q(blocks, disks);
329 enum async_tx_flags flags_orig = submit->flags;
330 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
331 void *scribble = submit->scribble;
332 void *cb_param_orig = submit->cb_param;
333 void *p, *q, *s;
334
335 pr_debug("%s: (sync) disks: %d len: %zu\n",
336 __func__, disks, len);
337
338 /* caller must provide a temporary result buffer and
339 * allow the input parameters to be preserved
340 */
341 BUG_ON(!spare || !scribble);
342
343 /* wait for any prerequisite operations */
344 async_tx_quiesce(&submit->depend_tx);
345
346 /* recompute p and/or q into the temporary buffer and then
347 * check to see the result matches the current value
348 */
349 tx = NULL;
350 *pqres = 0;
351 if (p_src) {
352 init_async_submit(submit, ASYNC_TX_XOR_ZERO_DST, NULL,
353 NULL, NULL, scribble);
354 tx = async_xor(spare, blocks, offset, disks-2, len, submit);
355 async_tx_quiesce(&tx);
356 p = page_address(p_src) + offset;
357 s = page_address(spare) + offset;
358 *pqres |= !!memcmp(p, s, len) << SUM_CHECK_P;
359 }
360
361 if (q_src) {
362 P(blocks, disks) = NULL;
363 Q(blocks, disks) = spare;
364 init_async_submit(submit, 0, NULL, NULL, NULL, scribble);
365 tx = async_gen_syndrome(blocks, offset, disks, len, submit);
366 async_tx_quiesce(&tx);
367 q = page_address(q_src) + offset;
368 s = page_address(spare) + offset;
369 *pqres |= !!memcmp(q, s, len) << SUM_CHECK_Q;
370 }
371
372 /* restore P, Q and submit */
373 P(blocks, disks) = p_src;
374 Q(blocks, disks) = q_src;
375
376 submit->cb_fn = cb_fn_orig;
377 submit->cb_param = cb_param_orig;
378 submit->flags = flags_orig;
379 async_tx_sync_epilog(submit);
380
381 return NULL;
382 }
383}
384EXPORT_SYMBOL_GPL(async_syndrome_val);
385
386static int __init async_pq_init(void)
387{
030b0772 388 pq_scribble_page = alloc_page(GFP_KERNEL);
b2f46fd8 389
030b0772 390 if (pq_scribble_page)
b2f46fd8
DW
391 return 0;
392
393 pr_err("%s: failed to allocate required spare page\n", __func__);
394
395 return -ENOMEM;
396}
397
398static void __exit async_pq_exit(void)
399{
030b0772 400 put_page(pq_scribble_page);
b2f46fd8
DW
401}
402
403module_init(async_pq_init);
404module_exit(async_pq_exit);
405
406MODULE_DESCRIPTION("asynchronous raid6 syndrome generation/validation");
407MODULE_LICENSE("GPL");