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1/*
2 * irq.h: in kernel interrupt controller related definitions
3 * Copyright (c) 2007, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 * Authors:
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
19 *
20 */
21
22#ifndef __IRQ_H
23#define __IRQ_H
24
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25#include <linux/mm_types.h>
26#include <linux/hrtimer.h>
edf88417 27#include <linux/kvm_host.h>
3f353858 28#include <linux/spinlock.h>
82470196 29
e2174021 30#include "iodev.h"
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31#include "ioapic.h"
32#include "lapic.h"
85f455f7 33
c65bbfa1 34#define PIC_NUM_PINS 16
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35#define SELECT_PIC(irq) \
36 ((irq) < 8 ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE)
c65bbfa1 37
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38struct kvm;
39struct kvm_vcpu;
40
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41struct kvm_kpic_state {
42 u8 last_irr; /* edge detection */
43 u8 irr; /* interrupt request register */
44 u8 imr; /* interrupt mask register */
45 u8 isr; /* interrupt service register */
46 u8 priority_add; /* highest irq priority */
47 u8 irq_base;
48 u8 read_reg_select;
49 u8 poll;
50 u8 special_mask;
51 u8 init_state;
52 u8 auto_eoi;
53 u8 rotate_on_auto_eoi;
54 u8 special_fully_nested_mode;
55 u8 init4; /* true if 4 byte init */
56 u8 elcr; /* PIIX edge/trigger selection */
57 u8 elcr_mask;
eebb5f31 58 u8 isr_ack; /* interrupt ack detection */
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59 struct kvm_pic *pics_state;
60};
61
62struct kvm_pic {
fa8273e9 63 raw_spinlock_t lock;
50a085bd 64 bool wakeup_needed;
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65 unsigned pending_acks;
66 struct kvm *kvm;
85f455f7 67 struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */
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68 int output; /* intr from master PIC */
69 struct kvm_io_device dev;
f5244726 70 void (*ack_notifier)(void *opaque, int irq);
1a6e4a8c 71 unsigned long irq_states[16];
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72};
73
74struct kvm_pic *kvm_create_pic(struct kvm *kvm);
72bb2fcd 75void kvm_destroy_pic(struct kvm *kvm);
f5244726 76int kvm_pic_read_irq(struct kvm *kvm);
6ceb9d79 77void kvm_pic_update_irq(struct kvm_pic *s);
e4825800 78void kvm_pic_clear_isr_ack(struct kvm *kvm);
85f455f7 79
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80static inline struct kvm_pic *pic_irqchip(struct kvm *kvm)
81{
d7deeeb0 82 return kvm->arch.vpic;
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83}
84
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85static inline int irqchip_in_kernel(struct kvm *kvm)
86{
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87 int ret;
88
89 ret = (pic_irqchip(kvm) != NULL);
90 smp_rmb();
91 return ret;
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92}
93
2fcceae1 94void kvm_pic_reset(struct kvm_kpic_state *s);
8be5453f 95
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96void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu);
97void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu);
8fdb2351 98void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu);
2f52d58c 99void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu);
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100void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu);
101void __kvm_migrate_timers(struct kvm_vcpu *vcpu);
97222cc8 102
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103int pit_has_pending_timer(struct kvm_vcpu *vcpu);
104int apic_has_pending_timer(struct kvm_vcpu *vcpu);
105
85f455f7 106#endif