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Commit | Line | Data |
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7837699f SY |
1 | /* |
2 | * 8253/8254 interval timer emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2006 Intel Corporation | |
6 | * Copyright (c) 2007 Keir Fraser, XenSource Inc | |
7 | * Copyright (c) 2008 Intel Corporation | |
221d059d | 8 | * Copyright 2009 Red Hat, Inc. and/or its affilates. |
7837699f SY |
9 | * |
10 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
11 | * of this software and associated documentation files (the "Software"), to deal | |
12 | * in the Software without restriction, including without limitation the rights | |
13 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
14 | * copies of the Software, and to permit persons to whom the Software is | |
15 | * furnished to do so, subject to the following conditions: | |
16 | * | |
17 | * The above copyright notice and this permission notice shall be included in | |
18 | * all copies or substantial portions of the Software. | |
19 | * | |
20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
21 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
23 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
24 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
25 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
26 | * THE SOFTWARE. | |
27 | * | |
28 | * Authors: | |
29 | * Sheng Yang <sheng.yang@intel.com> | |
30 | * Based on QEMU and Xen. | |
31 | */ | |
32 | ||
a78d9626 JP |
33 | #define pr_fmt(fmt) "pit: " fmt |
34 | ||
7837699f | 35 | #include <linux/kvm_host.h> |
5a0e3ad6 | 36 | #include <linux/slab.h> |
33572ac0 | 37 | #include <linux/workqueue.h> |
7837699f SY |
38 | |
39 | #include "irq.h" | |
40 | #include "i8254.h" | |
41 | ||
42 | #ifndef CONFIG_X86_64 | |
6f6d6a1a | 43 | #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) |
7837699f SY |
44 | #else |
45 | #define mod_64(x, y) ((x) % (y)) | |
46 | #endif | |
47 | ||
48 | #define RW_STATE_LSB 1 | |
49 | #define RW_STATE_MSB 2 | |
50 | #define RW_STATE_WORD0 3 | |
51 | #define RW_STATE_WORD1 4 | |
52 | ||
53 | /* Compute with 96 bit intermediate result: (a*b)/c */ | |
54 | static u64 muldiv64(u64 a, u32 b, u32 c) | |
55 | { | |
56 | union { | |
57 | u64 ll; | |
58 | struct { | |
59 | u32 low, high; | |
60 | } l; | |
61 | } u, res; | |
62 | u64 rl, rh; | |
63 | ||
64 | u.ll = a; | |
65 | rl = (u64)u.l.low * (u64)b; | |
66 | rh = (u64)u.l.high * (u64)b; | |
67 | rh += (rl >> 32); | |
6f6d6a1a RZ |
68 | res.l.high = div64_u64(rh, c); |
69 | res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c); | |
7837699f SY |
70 | return res.ll; |
71 | } | |
72 | ||
73 | static void pit_set_gate(struct kvm *kvm, int channel, u32 val) | |
74 | { | |
75 | struct kvm_kpit_channel_state *c = | |
76 | &kvm->arch.vpit->pit_state.channels[channel]; | |
77 | ||
78 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
79 | ||
80 | switch (c->mode) { | |
81 | default: | |
82 | case 0: | |
83 | case 4: | |
84 | /* XXX: just disable/enable counting */ | |
85 | break; | |
86 | case 1: | |
87 | case 2: | |
88 | case 3: | |
89 | case 5: | |
90 | /* Restart counting on rising edge. */ | |
91 | if (c->gate < val) | |
92 | c->count_load_time = ktime_get(); | |
93 | break; | |
94 | } | |
95 | ||
96 | c->gate = val; | |
97 | } | |
98 | ||
8b2cf73c | 99 | static int pit_get_gate(struct kvm *kvm, int channel) |
7837699f SY |
100 | { |
101 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
102 | ||
103 | return kvm->arch.vpit->pit_state.channels[channel].gate; | |
104 | } | |
105 | ||
fd668423 MT |
106 | static s64 __kpit_elapsed(struct kvm *kvm) |
107 | { | |
108 | s64 elapsed; | |
109 | ktime_t remaining; | |
110 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
111 | ||
0ff77873 MT |
112 | if (!ps->pit_timer.period) |
113 | return 0; | |
114 | ||
ede2ccc5 MT |
115 | /* |
116 | * The Counter does not stop when it reaches zero. In | |
117 | * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to | |
118 | * the highest count, either FFFF hex for binary counting | |
119 | * or 9999 for BCD counting, and continues counting. | |
120 | * Modes 2 and 3 are periodic; the Counter reloads | |
121 | * itself with the initial count and continues counting | |
122 | * from there. | |
123 | */ | |
ace15464 | 124 | remaining = hrtimer_get_remaining(&ps->pit_timer.timer); |
ede2ccc5 MT |
125 | elapsed = ps->pit_timer.period - ktime_to_ns(remaining); |
126 | elapsed = mod_64(elapsed, ps->pit_timer.period); | |
fd668423 MT |
127 | |
128 | return elapsed; | |
129 | } | |
130 | ||
131 | static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c, | |
132 | int channel) | |
133 | { | |
134 | if (channel == 0) | |
135 | return __kpit_elapsed(kvm); | |
136 | ||
137 | return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time)); | |
138 | } | |
139 | ||
7837699f SY |
140 | static int pit_get_count(struct kvm *kvm, int channel) |
141 | { | |
142 | struct kvm_kpit_channel_state *c = | |
143 | &kvm->arch.vpit->pit_state.channels[channel]; | |
144 | s64 d, t; | |
145 | int counter; | |
146 | ||
147 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
148 | ||
fd668423 | 149 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
150 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
151 | ||
152 | switch (c->mode) { | |
153 | case 0: | |
154 | case 1: | |
155 | case 4: | |
156 | case 5: | |
157 | counter = (c->count - d) & 0xffff; | |
158 | break; | |
159 | case 3: | |
160 | /* XXX: may be incorrect for odd counts */ | |
161 | counter = c->count - (mod_64((2 * d), c->count)); | |
162 | break; | |
163 | default: | |
164 | counter = c->count - mod_64(d, c->count); | |
165 | break; | |
166 | } | |
167 | return counter; | |
168 | } | |
169 | ||
170 | static int pit_get_out(struct kvm *kvm, int channel) | |
171 | { | |
172 | struct kvm_kpit_channel_state *c = | |
173 | &kvm->arch.vpit->pit_state.channels[channel]; | |
174 | s64 d, t; | |
175 | int out; | |
176 | ||
177 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
178 | ||
fd668423 | 179 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
180 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
181 | ||
182 | switch (c->mode) { | |
183 | default: | |
184 | case 0: | |
185 | out = (d >= c->count); | |
186 | break; | |
187 | case 1: | |
188 | out = (d < c->count); | |
189 | break; | |
190 | case 2: | |
191 | out = ((mod_64(d, c->count) == 0) && (d != 0)); | |
192 | break; | |
193 | case 3: | |
194 | out = (mod_64(d, c->count) < ((c->count + 1) >> 1)); | |
195 | break; | |
196 | case 4: | |
197 | case 5: | |
198 | out = (d == c->count); | |
199 | break; | |
200 | } | |
201 | ||
202 | return out; | |
203 | } | |
204 | ||
205 | static void pit_latch_count(struct kvm *kvm, int channel) | |
206 | { | |
207 | struct kvm_kpit_channel_state *c = | |
208 | &kvm->arch.vpit->pit_state.channels[channel]; | |
209 | ||
210 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
211 | ||
212 | if (!c->count_latched) { | |
213 | c->latched_count = pit_get_count(kvm, channel); | |
214 | c->count_latched = c->rw_mode; | |
215 | } | |
216 | } | |
217 | ||
218 | static void pit_latch_status(struct kvm *kvm, int channel) | |
219 | { | |
220 | struct kvm_kpit_channel_state *c = | |
221 | &kvm->arch.vpit->pit_state.channels[channel]; | |
222 | ||
223 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
224 | ||
225 | if (!c->status_latched) { | |
226 | /* TODO: Return NULL COUNT (bit 6). */ | |
227 | c->status = ((pit_get_out(kvm, channel) << 7) | | |
228 | (c->rw_mode << 4) | | |
229 | (c->mode << 1) | | |
230 | c->bcd); | |
231 | c->status_latched = 1; | |
232 | } | |
233 | } | |
234 | ||
3d80840d MT |
235 | int pit_has_pending_timer(struct kvm_vcpu *vcpu) |
236 | { | |
237 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
238 | ||
c5af89b6 | 239 | if (pit && kvm_vcpu_is_bsp(vcpu) && pit->pit_state.irq_ack) |
3d80840d | 240 | return atomic_read(&pit->pit_state.pit_timer.pending); |
3d80840d MT |
241 | return 0; |
242 | } | |
243 | ||
ee032c99 | 244 | static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian) |
3cf57fed MT |
245 | { |
246 | struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state, | |
247 | irq_ack_notifier); | |
33572ac0 CL |
248 | int value; |
249 | ||
250 | spin_lock(&ps->inject_lock); | |
251 | value = atomic_dec_return(&ps->pit_timer.pending); | |
252 | if (value < 0) | |
253 | /* spurious acks can be generated if, for example, the | |
254 | * PIC is being reset. Handle it gracefully here | |
255 | */ | |
dc7404ce | 256 | atomic_inc(&ps->pit_timer.pending); |
33572ac0 CL |
257 | else if (value > 0) |
258 | /* in this case, we had multiple outstanding pit interrupts | |
259 | * that we needed to inject. Reinject | |
260 | */ | |
261 | queue_work(ps->pit->wq, &ps->pit->expired); | |
3cf57fed | 262 | ps->irq_ack = 1; |
33572ac0 | 263 | spin_unlock(&ps->inject_lock); |
3cf57fed MT |
264 | } |
265 | ||
2f599714 MT |
266 | void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu) |
267 | { | |
268 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
269 | struct hrtimer *timer; | |
270 | ||
c5af89b6 | 271 | if (!kvm_vcpu_is_bsp(vcpu) || !pit) |
2f599714 MT |
272 | return; |
273 | ||
274 | timer = &pit->pit_state.pit_timer.timer; | |
275 | if (hrtimer_cancel(timer)) | |
beb20d52 | 276 | hrtimer_start_expires(timer, HRTIMER_MODE_ABS); |
2f599714 MT |
277 | } |
278 | ||
33572ac0 | 279 | static void destroy_pit_timer(struct kvm_pit *pit) |
7837699f | 280 | { |
33572ac0 CL |
281 | hrtimer_cancel(&pit->pit_state.pit_timer.timer); |
282 | cancel_work_sync(&pit->expired); | |
7837699f SY |
283 | } |
284 | ||
d3c7b77d MT |
285 | static bool kpit_is_periodic(struct kvm_timer *ktimer) |
286 | { | |
287 | struct kvm_kpit_state *ps = container_of(ktimer, struct kvm_kpit_state, | |
288 | pit_timer); | |
289 | return ps->is_periodic; | |
290 | } | |
291 | ||
386eb6e8 | 292 | static struct kvm_timer_ops kpit_ops = { |
d3c7b77d MT |
293 | .is_periodic = kpit_is_periodic, |
294 | }; | |
295 | ||
33572ac0 CL |
296 | static void pit_do_work(struct work_struct *work) |
297 | { | |
298 | struct kvm_pit *pit = container_of(work, struct kvm_pit, expired); | |
299 | struct kvm *kvm = pit->kvm; | |
300 | struct kvm_vcpu *vcpu; | |
301 | int i; | |
302 | struct kvm_kpit_state *ps = &pit->pit_state; | |
303 | int inject = 0; | |
304 | ||
305 | /* Try to inject pending interrupts when | |
306 | * last one has been acked. | |
307 | */ | |
308 | spin_lock(&ps->inject_lock); | |
309 | if (ps->irq_ack) { | |
310 | ps->irq_ack = 0; | |
311 | inject = 1; | |
312 | } | |
313 | spin_unlock(&ps->inject_lock); | |
314 | if (inject) { | |
315 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1); | |
316 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0); | |
317 | ||
318 | /* | |
319 | * Provides NMI watchdog support via Virtual Wire mode. | |
320 | * The route is: PIT -> PIC -> LVT0 in NMI mode. | |
321 | * | |
322 | * Note: Our Virtual Wire implementation is simplified, only | |
323 | * propagating PIT interrupts to all VCPUs when they have set | |
324 | * LVT0 to NMI delivery. Other PIC interrupts are just sent to | |
325 | * VCPU0, and only if its LVT0 is in EXTINT mode. | |
326 | */ | |
327 | if (kvm->arch.vapics_in_nmi_mode > 0) | |
328 | kvm_for_each_vcpu(i, vcpu, kvm) | |
329 | kvm_apic_nmi_wd_deliver(vcpu); | |
330 | } | |
331 | } | |
332 | ||
333 | static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) | |
334 | { | |
335 | struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer); | |
336 | struct kvm_pit *pt = ktimer->kvm->arch.vpit; | |
337 | ||
338 | if (ktimer->reinject || !atomic_read(&ktimer->pending)) { | |
339 | atomic_inc(&ktimer->pending); | |
340 | queue_work(pt->wq, &pt->expired); | |
341 | } | |
342 | ||
343 | if (ktimer->t_ops->is_periodic(ktimer)) { | |
344 | hrtimer_add_expires_ns(&ktimer->timer, ktimer->period); | |
345 | return HRTIMER_RESTART; | |
346 | } else | |
347 | return HRTIMER_NORESTART; | |
348 | } | |
349 | ||
3cf57fed | 350 | static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period) |
7837699f | 351 | { |
d3c7b77d | 352 | struct kvm_timer *pt = &ps->pit_timer; |
7837699f SY |
353 | s64 interval; |
354 | ||
355 | interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); | |
356 | ||
a78d9626 | 357 | pr_debug("create pit timer, interval is %llu nsec\n", interval); |
7837699f SY |
358 | |
359 | /* TODO The new value only affected after the retriggered */ | |
360 | hrtimer_cancel(&pt->timer); | |
33572ac0 | 361 | cancel_work_sync(&ps->pit->expired); |
ede2ccc5 | 362 | pt->period = interval; |
d3c7b77d MT |
363 | ps->is_periodic = is_period; |
364 | ||
33572ac0 | 365 | pt->timer.function = pit_timer_fn; |
d3c7b77d MT |
366 | pt->t_ops = &kpit_ops; |
367 | pt->kvm = ps->pit->kvm; | |
d3c7b77d | 368 | |
7837699f | 369 | atomic_set(&pt->pending, 0); |
3cf57fed | 370 | ps->irq_ack = 1; |
7837699f SY |
371 | |
372 | hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval), | |
373 | HRTIMER_MODE_ABS); | |
374 | } | |
375 | ||
376 | static void pit_load_count(struct kvm *kvm, int channel, u32 val) | |
377 | { | |
378 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
379 | ||
380 | WARN_ON(!mutex_is_locked(&ps->lock)); | |
381 | ||
a78d9626 | 382 | pr_debug("load_count val is %d, channel is %d\n", val, channel); |
7837699f SY |
383 | |
384 | /* | |
ede2ccc5 MT |
385 | * The largest possible initial count is 0; this is equivalent |
386 | * to 216 for binary counting and 104 for BCD counting. | |
7837699f SY |
387 | */ |
388 | if (val == 0) | |
389 | val = 0x10000; | |
390 | ||
7837699f SY |
391 | ps->channels[channel].count = val; |
392 | ||
fd668423 MT |
393 | if (channel != 0) { |
394 | ps->channels[channel].count_load_time = ktime_get(); | |
7837699f | 395 | return; |
fd668423 | 396 | } |
7837699f SY |
397 | |
398 | /* Two types of timer | |
399 | * mode 1 is one shot, mode 2 is period, otherwise del timer */ | |
400 | switch (ps->channels[0].mode) { | |
ede2ccc5 | 401 | case 0: |
7837699f | 402 | case 1: |
ece15bab MT |
403 | /* FIXME: enhance mode 4 precision */ |
404 | case 4: | |
e9f42757 BK |
405 | if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) { |
406 | create_pit_timer(ps, val, 0); | |
407 | } | |
7837699f SY |
408 | break; |
409 | case 2: | |
f6975545 | 410 | case 3: |
e9f42757 BK |
411 | if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){ |
412 | create_pit_timer(ps, val, 1); | |
413 | } | |
7837699f SY |
414 | break; |
415 | default: | |
33572ac0 | 416 | destroy_pit_timer(kvm->arch.vpit); |
7837699f SY |
417 | } |
418 | } | |
419 | ||
e9f42757 | 420 | void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start) |
e0f63cb9 | 421 | { |
e9f42757 BK |
422 | u8 saved_mode; |
423 | if (hpet_legacy_start) { | |
424 | /* save existing mode for later reenablement */ | |
425 | saved_mode = kvm->arch.vpit->pit_state.channels[0].mode; | |
426 | kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */ | |
427 | pit_load_count(kvm, channel, val); | |
428 | kvm->arch.vpit->pit_state.channels[0].mode = saved_mode; | |
429 | } else { | |
430 | pit_load_count(kvm, channel, val); | |
431 | } | |
e0f63cb9 SY |
432 | } |
433 | ||
d76685c4 GH |
434 | static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev) |
435 | { | |
436 | return container_of(dev, struct kvm_pit, dev); | |
437 | } | |
438 | ||
439 | static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev) | |
440 | { | |
441 | return container_of(dev, struct kvm_pit, speaker_dev); | |
442 | } | |
443 | ||
bda9020e MT |
444 | static inline int pit_in_range(gpa_t addr) |
445 | { | |
446 | return ((addr >= KVM_PIT_BASE_ADDRESS) && | |
447 | (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH)); | |
448 | } | |
449 | ||
450 | static int pit_ioport_write(struct kvm_io_device *this, | |
451 | gpa_t addr, int len, const void *data) | |
7837699f | 452 | { |
d76685c4 | 453 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f SY |
454 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
455 | struct kvm *kvm = pit->kvm; | |
456 | int channel, access; | |
457 | struct kvm_kpit_channel_state *s; | |
458 | u32 val = *(u32 *) data; | |
bda9020e MT |
459 | if (!pit_in_range(addr)) |
460 | return -EOPNOTSUPP; | |
7837699f SY |
461 | |
462 | val &= 0xff; | |
463 | addr &= KVM_PIT_CHANNEL_MASK; | |
464 | ||
465 | mutex_lock(&pit_state->lock); | |
466 | ||
467 | if (val != 0) | |
a78d9626 JP |
468 | pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n", |
469 | (unsigned int)addr, len, val); | |
7837699f SY |
470 | |
471 | if (addr == 3) { | |
472 | channel = val >> 6; | |
473 | if (channel == 3) { | |
474 | /* Read-Back Command. */ | |
475 | for (channel = 0; channel < 3; channel++) { | |
476 | s = &pit_state->channels[channel]; | |
477 | if (val & (2 << channel)) { | |
478 | if (!(val & 0x20)) | |
479 | pit_latch_count(kvm, channel); | |
480 | if (!(val & 0x10)) | |
481 | pit_latch_status(kvm, channel); | |
482 | } | |
483 | } | |
484 | } else { | |
485 | /* Select Counter <channel>. */ | |
486 | s = &pit_state->channels[channel]; | |
487 | access = (val >> 4) & KVM_PIT_CHANNEL_MASK; | |
488 | if (access == 0) { | |
489 | pit_latch_count(kvm, channel); | |
490 | } else { | |
491 | s->rw_mode = access; | |
492 | s->read_state = access; | |
493 | s->write_state = access; | |
494 | s->mode = (val >> 1) & 7; | |
495 | if (s->mode > 5) | |
496 | s->mode -= 4; | |
497 | s->bcd = val & 1; | |
498 | } | |
499 | } | |
500 | } else { | |
501 | /* Write Count. */ | |
502 | s = &pit_state->channels[addr]; | |
503 | switch (s->write_state) { | |
504 | default: | |
505 | case RW_STATE_LSB: | |
506 | pit_load_count(kvm, addr, val); | |
507 | break; | |
508 | case RW_STATE_MSB: | |
509 | pit_load_count(kvm, addr, val << 8); | |
510 | break; | |
511 | case RW_STATE_WORD0: | |
512 | s->write_latch = val; | |
513 | s->write_state = RW_STATE_WORD1; | |
514 | break; | |
515 | case RW_STATE_WORD1: | |
516 | pit_load_count(kvm, addr, s->write_latch | (val << 8)); | |
517 | s->write_state = RW_STATE_WORD0; | |
518 | break; | |
519 | } | |
520 | } | |
521 | ||
522 | mutex_unlock(&pit_state->lock); | |
bda9020e | 523 | return 0; |
7837699f SY |
524 | } |
525 | ||
bda9020e MT |
526 | static int pit_ioport_read(struct kvm_io_device *this, |
527 | gpa_t addr, int len, void *data) | |
7837699f | 528 | { |
d76685c4 | 529 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f SY |
530 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
531 | struct kvm *kvm = pit->kvm; | |
532 | int ret, count; | |
533 | struct kvm_kpit_channel_state *s; | |
bda9020e MT |
534 | if (!pit_in_range(addr)) |
535 | return -EOPNOTSUPP; | |
7837699f SY |
536 | |
537 | addr &= KVM_PIT_CHANNEL_MASK; | |
ee73f656 MT |
538 | if (addr == 3) |
539 | return 0; | |
540 | ||
7837699f SY |
541 | s = &pit_state->channels[addr]; |
542 | ||
543 | mutex_lock(&pit_state->lock); | |
544 | ||
545 | if (s->status_latched) { | |
546 | s->status_latched = 0; | |
547 | ret = s->status; | |
548 | } else if (s->count_latched) { | |
549 | switch (s->count_latched) { | |
550 | default: | |
551 | case RW_STATE_LSB: | |
552 | ret = s->latched_count & 0xff; | |
553 | s->count_latched = 0; | |
554 | break; | |
555 | case RW_STATE_MSB: | |
556 | ret = s->latched_count >> 8; | |
557 | s->count_latched = 0; | |
558 | break; | |
559 | case RW_STATE_WORD0: | |
560 | ret = s->latched_count & 0xff; | |
561 | s->count_latched = RW_STATE_MSB; | |
562 | break; | |
563 | } | |
564 | } else { | |
565 | switch (s->read_state) { | |
566 | default: | |
567 | case RW_STATE_LSB: | |
568 | count = pit_get_count(kvm, addr); | |
569 | ret = count & 0xff; | |
570 | break; | |
571 | case RW_STATE_MSB: | |
572 | count = pit_get_count(kvm, addr); | |
573 | ret = (count >> 8) & 0xff; | |
574 | break; | |
575 | case RW_STATE_WORD0: | |
576 | count = pit_get_count(kvm, addr); | |
577 | ret = count & 0xff; | |
578 | s->read_state = RW_STATE_WORD1; | |
579 | break; | |
580 | case RW_STATE_WORD1: | |
581 | count = pit_get_count(kvm, addr); | |
582 | ret = (count >> 8) & 0xff; | |
583 | s->read_state = RW_STATE_WORD0; | |
584 | break; | |
585 | } | |
586 | } | |
587 | ||
588 | if (len > sizeof(ret)) | |
589 | len = sizeof(ret); | |
590 | memcpy(data, (char *)&ret, len); | |
591 | ||
592 | mutex_unlock(&pit_state->lock); | |
bda9020e | 593 | return 0; |
7837699f SY |
594 | } |
595 | ||
bda9020e MT |
596 | static int speaker_ioport_write(struct kvm_io_device *this, |
597 | gpa_t addr, int len, const void *data) | |
7837699f | 598 | { |
d76685c4 | 599 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f SY |
600 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
601 | struct kvm *kvm = pit->kvm; | |
602 | u32 val = *(u32 *) data; | |
bda9020e MT |
603 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
604 | return -EOPNOTSUPP; | |
7837699f SY |
605 | |
606 | mutex_lock(&pit_state->lock); | |
607 | pit_state->speaker_data_on = (val >> 1) & 1; | |
608 | pit_set_gate(kvm, 2, val & 1); | |
609 | mutex_unlock(&pit_state->lock); | |
bda9020e | 610 | return 0; |
7837699f SY |
611 | } |
612 | ||
bda9020e MT |
613 | static int speaker_ioport_read(struct kvm_io_device *this, |
614 | gpa_t addr, int len, void *data) | |
7837699f | 615 | { |
d76685c4 | 616 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f SY |
617 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
618 | struct kvm *kvm = pit->kvm; | |
619 | unsigned int refresh_clock; | |
620 | int ret; | |
bda9020e MT |
621 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
622 | return -EOPNOTSUPP; | |
7837699f SY |
623 | |
624 | /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */ | |
625 | refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1; | |
626 | ||
627 | mutex_lock(&pit_state->lock); | |
628 | ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) | | |
629 | (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4)); | |
630 | if (len > sizeof(ret)) | |
631 | len = sizeof(ret); | |
632 | memcpy(data, (char *)&ret, len); | |
633 | mutex_unlock(&pit_state->lock); | |
bda9020e | 634 | return 0; |
7837699f SY |
635 | } |
636 | ||
308b0f23 | 637 | void kvm_pit_reset(struct kvm_pit *pit) |
7837699f SY |
638 | { |
639 | int i; | |
308b0f23 SY |
640 | struct kvm_kpit_channel_state *c; |
641 | ||
642 | mutex_lock(&pit->pit_state.lock); | |
e9f42757 | 643 | pit->pit_state.flags = 0; |
308b0f23 SY |
644 | for (i = 0; i < 3; i++) { |
645 | c = &pit->pit_state.channels[i]; | |
646 | c->mode = 0xff; | |
647 | c->gate = (i != 2); | |
648 | pit_load_count(pit->kvm, i, 0); | |
649 | } | |
650 | mutex_unlock(&pit->pit_state.lock); | |
651 | ||
652 | atomic_set(&pit->pit_state.pit_timer.pending, 0); | |
3cf57fed | 653 | pit->pit_state.irq_ack = 1; |
308b0f23 SY |
654 | } |
655 | ||
4780c659 AK |
656 | static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask) |
657 | { | |
658 | struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier); | |
659 | ||
660 | if (!mask) { | |
661 | atomic_set(&pit->pit_state.pit_timer.pending, 0); | |
662 | pit->pit_state.irq_ack = 1; | |
663 | } | |
664 | } | |
665 | ||
d76685c4 GH |
666 | static const struct kvm_io_device_ops pit_dev_ops = { |
667 | .read = pit_ioport_read, | |
668 | .write = pit_ioport_write, | |
d76685c4 GH |
669 | }; |
670 | ||
671 | static const struct kvm_io_device_ops speaker_dev_ops = { | |
672 | .read = speaker_ioport_read, | |
673 | .write = speaker_ioport_write, | |
d76685c4 GH |
674 | }; |
675 | ||
79fac95e | 676 | /* Caller must hold slots_lock */ |
c5ff41ce | 677 | struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags) |
308b0f23 | 678 | { |
7837699f SY |
679 | struct kvm_pit *pit; |
680 | struct kvm_kpit_state *pit_state; | |
090b7aff | 681 | int ret; |
7837699f SY |
682 | |
683 | pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL); | |
684 | if (!pit) | |
685 | return NULL; | |
686 | ||
5550af4d | 687 | pit->irq_source_id = kvm_request_irq_source_id(kvm); |
e17d1dc0 AK |
688 | if (pit->irq_source_id < 0) { |
689 | kfree(pit); | |
5550af4d | 690 | return NULL; |
e17d1dc0 | 691 | } |
5550af4d | 692 | |
7837699f SY |
693 | mutex_init(&pit->pit_state.lock); |
694 | mutex_lock(&pit->pit_state.lock); | |
33572ac0 CL |
695 | spin_lock_init(&pit->pit_state.inject_lock); |
696 | ||
697 | pit->wq = create_singlethread_workqueue("kvm-pit-wq"); | |
698 | if (!pit->wq) { | |
673813e8 | 699 | mutex_unlock(&pit->pit_state.lock); |
6b5d7a9f | 700 | kvm_free_irq_source_id(kvm, pit->irq_source_id); |
33572ac0 CL |
701 | kfree(pit); |
702 | return NULL; | |
703 | } | |
704 | INIT_WORK(&pit->expired, pit_do_work); | |
7837699f | 705 | |
7837699f SY |
706 | kvm->arch.vpit = pit; |
707 | pit->kvm = kvm; | |
708 | ||
709 | pit_state = &pit->pit_state; | |
710 | pit_state->pit = pit; | |
711 | hrtimer_init(&pit_state->pit_timer.timer, | |
712 | CLOCK_MONOTONIC, HRTIMER_MODE_ABS); | |
3cf57fed MT |
713 | pit_state->irq_ack_notifier.gsi = 0; |
714 | pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq; | |
715 | kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); | |
52d939a0 | 716 | pit_state->pit_timer.reinject = true; |
7837699f SY |
717 | mutex_unlock(&pit->pit_state.lock); |
718 | ||
308b0f23 | 719 | kvm_pit_reset(pit); |
7837699f | 720 | |
4780c659 AK |
721 | pit->mask_notifier.func = pit_mask_notifer; |
722 | kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier); | |
723 | ||
6b66ac1a | 724 | kvm_iodevice_init(&pit->dev, &pit_dev_ops); |
e93f8a0f | 725 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, &pit->dev); |
090b7aff GH |
726 | if (ret < 0) |
727 | goto fail; | |
6b66ac1a GH |
728 | |
729 | if (flags & KVM_PIT_SPEAKER_DUMMY) { | |
730 | kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops); | |
e93f8a0f | 731 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, |
090b7aff GH |
732 | &pit->speaker_dev); |
733 | if (ret < 0) | |
734 | goto fail_unregister; | |
6b66ac1a GH |
735 | } |
736 | ||
7837699f | 737 | return pit; |
090b7aff GH |
738 | |
739 | fail_unregister: | |
e93f8a0f | 740 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev); |
090b7aff GH |
741 | |
742 | fail: | |
d225f53b WY |
743 | kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier); |
744 | kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); | |
745 | kvm_free_irq_source_id(kvm, pit->irq_source_id); | |
3185bf8c | 746 | destroy_workqueue(pit->wq); |
090b7aff GH |
747 | kfree(pit); |
748 | return NULL; | |
7837699f SY |
749 | } |
750 | ||
751 | void kvm_free_pit(struct kvm *kvm) | |
752 | { | |
753 | struct hrtimer *timer; | |
754 | ||
755 | if (kvm->arch.vpit) { | |
aea924f6 XG |
756 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev); |
757 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, | |
758 | &kvm->arch.vpit->speaker_dev); | |
4780c659 AK |
759 | kvm_unregister_irq_mask_notifier(kvm, 0, |
760 | &kvm->arch.vpit->mask_notifier); | |
84fde248 GN |
761 | kvm_unregister_irq_ack_notifier(kvm, |
762 | &kvm->arch.vpit->pit_state.irq_ack_notifier); | |
7837699f SY |
763 | mutex_lock(&kvm->arch.vpit->pit_state.lock); |
764 | timer = &kvm->arch.vpit->pit_state.pit_timer.timer; | |
765 | hrtimer_cancel(timer); | |
33572ac0 | 766 | cancel_work_sync(&kvm->arch.vpit->expired); |
5550af4d | 767 | kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id); |
7837699f | 768 | mutex_unlock(&kvm->arch.vpit->pit_state.lock); |
33572ac0 | 769 | destroy_workqueue(kvm->arch.vpit->wq); |
7837699f SY |
770 | kfree(kvm->arch.vpit); |
771 | } | |
772 | } |