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x86, ptrace: Fix block-step
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1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
b5964405
IM
12#include <linux/interrupt.h>
13#include <linux/kallsyms.h>
14#include <linux/spinlock.h>
b5964405
IM
15#include <linux/kprobes.h>
16#include <linux/uaccess.h>
b5964405 17#include <linux/kdebug.h>
1da177e4 18#include <linux/kernel.h>
b5964405
IM
19#include <linux/module.h>
20#include <linux/ptrace.h>
1da177e4 21#include <linux/string.h>
b5964405 22#include <linux/delay.h>
1da177e4 23#include <linux/errno.h>
b5964405
IM
24#include <linux/kexec.h>
25#include <linux/sched.h>
1da177e4 26#include <linux/timer.h>
1da177e4 27#include <linux/init.h>
91768d6c 28#include <linux/bug.h>
b5964405
IM
29#include <linux/nmi.h>
30#include <linux/mm.h>
c1d518c8
AH
31#include <linux/smp.h>
32#include <linux/io.h>
1da177e4
LT
33
34#ifdef CONFIG_EISA
35#include <linux/ioport.h>
36#include <linux/eisa.h>
37#endif
38
39#ifdef CONFIG_MCA
40#include <linux/mca.h>
41#endif
42
c0d12172
DJ
43#if defined(CONFIG_EDAC)
44#include <linux/edac.h>
45#endif
46
f8561296 47#include <asm/kmemcheck.h>
b5964405 48#include <asm/stacktrace.h>
1da177e4 49#include <asm/processor.h>
1da177e4 50#include <asm/debugreg.h>
b5964405
IM
51#include <asm/atomic.h>
52#include <asm/system.h>
c1d518c8 53#include <asm/traps.h>
1da177e4
LT
54#include <asm/desc.h>
55#include <asm/i387.h>
9e55e44e 56#include <asm/mce.h>
c1d518c8 57
1164dd00 58#include <asm/mach_traps.h>
c1d518c8 59
081f75bb 60#ifdef CONFIG_X86_64
428cf902 61#include <asm/x86_init.h>
081f75bb
AH
62#include <asm/pgalloc.h>
63#include <asm/proto.h>
081f75bb 64#else
c1d518c8 65#include <asm/processor-flags.h>
8e6dafd6 66#include <asm/setup.h>
1da177e4 67
1da177e4
LT
68asmlinkage int system_call(void);
69
1da177e4 70/* Do we ignore FPU interrupts ? */
b5964405 71char ignore_fpu_irq;
1da177e4
LT
72
73/*
74 * The IDT has to be page-aligned to simplify the Pentium
07e81d61 75 * F0 0F bug workaround.
1da177e4 76 */
07e81d61 77gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
081f75bb 78#endif
1da177e4 79
b77b881f
YL
80DECLARE_BITMAP(used_vectors, NR_VECTORS);
81EXPORT_SYMBOL_GPL(used_vectors);
82
badc7652 83static int ignore_nmis;
e041c683 84
762db434
AH
85static inline void conditional_sti(struct pt_regs *regs)
86{
87 if (regs->flags & X86_EFLAGS_IF)
88 local_irq_enable();
89}
90
3d2a71a5
AH
91static inline void preempt_conditional_sti(struct pt_regs *regs)
92{
93 inc_preempt_count();
94 if (regs->flags & X86_EFLAGS_IF)
95 local_irq_enable();
96}
97
be716615
TG
98static inline void conditional_cli(struct pt_regs *regs)
99{
100 if (regs->flags & X86_EFLAGS_IF)
101 local_irq_disable();
102}
103
3d2a71a5
AH
104static inline void preempt_conditional_cli(struct pt_regs *regs)
105{
106 if (regs->flags & X86_EFLAGS_IF)
107 local_irq_disable();
108 dec_preempt_count();
109}
110
081f75bb 111#ifdef CONFIG_X86_32
b5964405
IM
112static inline void
113die_if_kernel(const char *str, struct pt_regs *regs, long err)
1da177e4 114{
717b594a 115 if (!user_mode_vm(regs))
1da177e4
LT
116 die(str, regs, err);
117}
081f75bb 118#endif
ae82157b 119
b5964405 120static void __kprobes
3c1326f8 121do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
b5964405 122 long error_code, siginfo_t *info)
1da177e4 123{
4f339ecb 124 struct task_struct *tsk = current;
4f339ecb 125
081f75bb 126#ifdef CONFIG_X86_32
6b6891f9 127 if (regs->flags & X86_VM_MASK) {
3c1326f8
AH
128 /*
129 * traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
130 * On nmi (interrupt 2), do_trap should not be called.
131 */
132 if (trapnr < 6)
1da177e4
LT
133 goto vm86_trap;
134 goto trap_signal;
135 }
081f75bb 136#endif
1da177e4 137
717b594a 138 if (!user_mode(regs))
1da177e4
LT
139 goto kernel_trap;
140
081f75bb 141#ifdef CONFIG_X86_32
b5964405 142trap_signal:
081f75bb 143#endif
b5964405
IM
144 /*
145 * We want error_code and trap_no set for userspace faults and
146 * kernelspace faults which result in die(), but not
147 * kernelspace faults which are fixed up. die() gives the
148 * process no chance to handle the signal and notice the
149 * kernel fault information, so that won't result in polluting
150 * the information about previously queued, but not yet
151 * delivered, faults. See also do_general_protection below.
152 */
153 tsk->thread.error_code = error_code;
154 tsk->thread.trap_no = trapnr;
d1895183 155
081f75bb
AH
156#ifdef CONFIG_X86_64
157 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
158 printk_ratelimit()) {
159 printk(KERN_INFO
160 "%s[%d] trap %s ip:%lx sp:%lx error:%lx",
161 tsk->comm, tsk->pid, str,
162 regs->ip, regs->sp, error_code);
163 print_vma_addr(" in ", regs->ip);
164 printk("\n");
165 }
166#endif
167
b5964405
IM
168 if (info)
169 force_sig_info(signr, info, tsk);
170 else
171 force_sig(signr, tsk);
172 return;
1da177e4 173
b5964405
IM
174kernel_trap:
175 if (!fixup_exception(regs)) {
176 tsk->thread.error_code = error_code;
177 tsk->thread.trap_no = trapnr;
178 die(str, regs, error_code);
1da177e4 179 }
b5964405 180 return;
1da177e4 181
081f75bb 182#ifdef CONFIG_X86_32
b5964405
IM
183vm86_trap:
184 if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
185 error_code, trapnr))
186 goto trap_signal;
187 return;
081f75bb 188#endif
1da177e4
LT
189}
190
b5964405 191#define DO_ERROR(trapnr, signr, str, name) \
e407d620 192dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
193{ \
194 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
a8c1be9d 195 == NOTIFY_STOP) \
b5964405 196 return; \
61aef7d2 197 conditional_sti(regs); \
3c1326f8 198 do_trap(trapnr, signr, str, regs, error_code, NULL); \
1da177e4
LT
199}
200
3c1326f8 201#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
e407d620 202dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
203{ \
204 siginfo_t info; \
205 info.si_signo = signr; \
206 info.si_errno = 0; \
207 info.si_code = sicode; \
208 info.si_addr = (void __user *)siaddr; \
b5964405 209 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
a8c1be9d 210 == NOTIFY_STOP) \
b5964405 211 return; \
61aef7d2 212 conditional_sti(regs); \
3c1326f8 213 do_trap(trapnr, signr, str, regs, error_code, &info); \
1da177e4
LT
214}
215
3c1326f8
AH
216DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
217DO_ERROR(4, SIGSEGV, "overflow", overflow)
218DO_ERROR(5, SIGSEGV, "bounds", bounds)
219DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
51bc1ed6 220DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
6bf77bf9 221DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
36d936c7 222DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
081f75bb 223#ifdef CONFIG_X86_32
f5ca8187 224DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
081f75bb 225#endif
3c1326f8 226DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
1da177e4 227
081f75bb
AH
228#ifdef CONFIG_X86_64
229/* Runs on IST stack */
230dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
231{
232 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
233 12, SIGBUS) == NOTIFY_STOP)
234 return;
235 preempt_conditional_sti(regs);
236 do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
237 preempt_conditional_cli(regs);
238}
239
240dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
241{
242 static const char str[] = "double fault";
243 struct task_struct *tsk = current;
244
245 /* Return not checked because double check cannot be ignored */
246 notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV);
247
248 tsk->thread.error_code = error_code;
249 tsk->thread.trap_no = 8;
250
bd8b96df
IM
251 /*
252 * This is always a kernel trap and never fixable (and thus must
253 * never return).
254 */
081f75bb
AH
255 for (;;)
256 die(str, regs, error_code);
257}
258#endif
259
e407d620 260dotraplinkage void __kprobes
13485ab5 261do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 262{
13485ab5 263 struct task_struct *tsk;
b5964405 264
c6df0d71
AH
265 conditional_sti(regs);
266
081f75bb 267#ifdef CONFIG_X86_32
6b6891f9 268 if (regs->flags & X86_VM_MASK)
1da177e4 269 goto gp_in_vm86;
081f75bb 270#endif
1da177e4 271
13485ab5 272 tsk = current;
717b594a 273 if (!user_mode(regs))
1da177e4
LT
274 goto gp_in_kernel;
275
13485ab5
AH
276 tsk->thread.error_code = error_code;
277 tsk->thread.trap_no = 13;
b5964405 278
13485ab5
AH
279 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
280 printk_ratelimit()) {
abd4f750 281 printk(KERN_INFO
13485ab5
AH
282 "%s[%d] general protection ip:%lx sp:%lx error:%lx",
283 tsk->comm, task_pid_nr(tsk),
284 regs->ip, regs->sp, error_code);
03252919
AK
285 print_vma_addr(" in ", regs->ip);
286 printk("\n");
287 }
abd4f750 288
13485ab5 289 force_sig(SIGSEGV, tsk);
1da177e4
LT
290 return;
291
081f75bb 292#ifdef CONFIG_X86_32
1da177e4
LT
293gp_in_vm86:
294 local_irq_enable();
295 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
296 return;
081f75bb 297#endif
1da177e4
LT
298
299gp_in_kernel:
13485ab5
AH
300 if (fixup_exception(regs))
301 return;
302
303 tsk->thread.error_code = error_code;
304 tsk->thread.trap_no = 13;
305 if (notify_die(DIE_GPF, "general protection fault", regs,
1da177e4 306 error_code, 13, SIGSEGV) == NOTIFY_STOP)
13485ab5
AH
307 return;
308 die("general protection fault", regs, error_code);
1da177e4
LT
309}
310
5deb45e3 311static notrace __kprobes void
b5964405 312mem_parity_error(unsigned char reason, struct pt_regs *regs)
1da177e4 313{
b5964405
IM
314 printk(KERN_EMERG
315 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
316 reason, smp_processor_id());
317
318 printk(KERN_EMERG
319 "You have some hardware problem, likely on the PCI bus.\n");
c0d12172
DJ
320
321#if defined(CONFIG_EDAC)
b5964405 322 if (edac_handler_set()) {
c0d12172
DJ
323 edac_atomic_assert_error();
324 return;
325 }
326#endif
327
8da5adda 328 if (panic_on_unrecovered_nmi)
b5964405 329 panic("NMI: Not continuing");
1da177e4 330
c41c5cd3 331 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
1da177e4
LT
332
333 /* Clear and disable the memory parity error line. */
7970479c
AH
334 reason = (reason & 0xf) | 4;
335 outb(reason, 0x61);
1da177e4
LT
336}
337
5deb45e3 338static notrace __kprobes void
b5964405 339io_check_error(unsigned char reason, struct pt_regs *regs)
1da177e4
LT
340{
341 unsigned long i;
342
9c107805 343 printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
1da177e4
LT
344 show_registers(regs);
345
5211a242
KG
346 if (panic_on_io_nmi)
347 panic("NMI IOCK error: Not continuing");
348
1da177e4
LT
349 /* Re-enable the IOCK line, wait for a few seconds */
350 reason = (reason & 0xf) | 8;
351 outb(reason, 0x61);
b5964405 352
1da177e4 353 i = 2000;
b5964405
IM
354 while (--i)
355 udelay(1000);
356
1da177e4
LT
357 reason &= ~8;
358 outb(reason, 0x61);
359}
360
5deb45e3 361static notrace __kprobes void
b5964405 362unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
1da177e4 363{
c1d518c8
AH
364 if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) ==
365 NOTIFY_STOP)
d3597524 366 return;
1da177e4 367#ifdef CONFIG_MCA
b5964405
IM
368 /*
369 * Might actually be able to figure out what the guilty party
370 * is:
371 */
372 if (MCA_bus) {
1da177e4
LT
373 mca_handle_nmi();
374 return;
375 }
376#endif
b5964405
IM
377 printk(KERN_EMERG
378 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
379 reason, smp_processor_id());
380
c41c5cd3 381 printk(KERN_EMERG "Do you have a strange power saving mode enabled?\n");
8da5adda 382 if (panic_on_unrecovered_nmi)
b5964405 383 panic("NMI: Not continuing");
8da5adda 384
c41c5cd3 385 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
1da177e4
LT
386}
387
5deb45e3 388static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
1da177e4
LT
389{
390 unsigned char reason = 0;
abd34807
AH
391 int cpu;
392
393 cpu = smp_processor_id();
1da177e4 394
abd34807
AH
395 /* Only the BSP gets external NMIs from the system. */
396 if (!cpu)
1da177e4 397 reason = get_nmi_reason();
b5964405 398
1da177e4 399 if (!(reason & 0xc0)) {
20c0d2d4 400 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT)
a8c1be9d 401 == NOTIFY_STOP)
1da177e4
LT
402 return;
403#ifdef CONFIG_X86_LOCAL_APIC
404 /*
405 * Ok, so this is none of the documented NMI sources,
406 * so it must be the NMI watchdog.
407 */
3adbbcce 408 if (nmi_watchdog_tick(regs, reason))
1da177e4 409 return;
abd34807 410 if (!do_nmi_callback(regs, cpu))
3adbbcce 411 unknown_nmi_error(reason, regs);
b5964405
IM
412#else
413 unknown_nmi_error(reason, regs);
414#endif
2fbe7b25 415
1da177e4
LT
416 return;
417 }
20c0d2d4 418 if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP)
1da177e4 419 return;
a8c1be9d
AH
420
421 /* AK: following checks seem to be broken on modern chipsets. FIXME */
1da177e4
LT
422 if (reason & 0x80)
423 mem_parity_error(reason, regs);
424 if (reason & 0x40)
425 io_check_error(reason, regs);
081f75bb 426#ifdef CONFIG_X86_32
1da177e4
LT
427 /*
428 * Reassert NMI in case it became active meanwhile
b5964405 429 * as it's edge-triggered:
1da177e4
LT
430 */
431 reassert_nmi();
081f75bb 432#endif
1da177e4
LT
433}
434
e407d620
AH
435dotraplinkage notrace __kprobes void
436do_nmi(struct pt_regs *regs, long error_code)
1da177e4 437{
1da177e4
LT
438 nmi_enter();
439
915b0d01 440 inc_irq_stat(__nmi_count);
1da177e4 441
8f4e956b
AK
442 if (!ignore_nmis)
443 default_do_nmi(regs);
1da177e4
LT
444
445 nmi_exit();
446}
447
8f4e956b
AK
448void stop_nmi(void)
449{
450 acpi_nmi_disable();
451 ignore_nmis++;
452}
453
454void restart_nmi(void)
455{
456 ignore_nmis--;
457 acpi_nmi_enable();
458}
459
c1d518c8 460/* May run on IST stack. */
e407d620 461dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
1da177e4 462{
b94da1e4 463#ifdef CONFIG_KPROBES
1da177e4
LT
464 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
465 == NOTIFY_STOP)
48c88211 466 return;
b94da1e4
AH
467#else
468 if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
469 == NOTIFY_STOP)
470 return;
471#endif
b5964405 472
4915a35e 473 preempt_conditional_sti(regs);
3c1326f8 474 do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
4915a35e 475 preempt_conditional_cli(regs);
1da177e4 476}
1da177e4 477
081f75bb 478#ifdef CONFIG_X86_64
bd8b96df
IM
479/*
480 * Help handler running on IST stack to switch back to user stack
481 * for scheduling or signal handling. The actual stack switch is done in
482 * entry.S
483 */
081f75bb
AH
484asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
485{
486 struct pt_regs *regs = eregs;
487 /* Did already sync */
488 if (eregs == (struct pt_regs *)eregs->sp)
489 ;
490 /* Exception from user space */
491 else if (user_mode(eregs))
492 regs = task_pt_regs(current);
bd8b96df
IM
493 /*
494 * Exception from kernel and interrupts are enabled. Move to
495 * kernel process stack.
496 */
081f75bb
AH
497 else if (eregs->flags & X86_EFLAGS_IF)
498 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
499 if (eregs != regs)
500 *regs = *eregs;
501 return regs;
502}
503#endif
504
1da177e4
LT
505/*
506 * Our handling of the processor debug registers is non-trivial.
507 * We do not clear them on entry and exit from the kernel. Therefore
508 * it is possible to get a watchpoint trap here from inside the kernel.
509 * However, the code in ./ptrace.c has ensured that the user can
510 * only set watchpoints on userspace addresses. Therefore the in-kernel
511 * watchpoint trap can only occur in code which is reading/writing
512 * from user space. Such code must not hold kernel locks (since it
513 * can equally take a page fault), therefore it is safe to call
514 * force_sig_info even though that claims and releases locks.
b5964405 515 *
1da177e4
LT
516 * Code in ./signal.c ensures that the debug control register
517 * is restored before we deliver any signal, and therefore that
518 * user code runs with the correct debug control register even though
519 * we clear it here.
520 *
521 * Being careful here means that we don't have to be as careful in a
522 * lot of more complicated places (task switching can be a bit lazy
523 * about restoring all the debug state, and ptrace doesn't have to
524 * find every occurrence of the TF bit that could be saved away even
525 * by user code)
c1d518c8
AH
526 *
527 * May run on IST stack.
1da177e4 528 */
e407d620 529dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
1da177e4 530{
1da177e4 531 struct task_struct *tsk = current;
08d68323 532 unsigned long dr6;
da654b74 533 int si_code;
1da177e4 534
08d68323 535 get_debugreg(dr6, 6);
1da177e4 536
40f9249a
P
537 /* Filter out all the reserved bits which are preset to 1 */
538 dr6 &= ~DR6_RESERVED;
539
f8561296 540 /* Catch kmemcheck conditions first of all! */
eadb8a09 541 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
f8561296
VN
542 return;
543
08d68323
P
544 /* DR6 may or may not be cleared by the CPU */
545 set_debugreg(0, 6);
10faa81e 546
ea8e61b7
PZ
547 /*
548 * The processor cleared BTF, so don't mark that we need it set.
549 */
550 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
551
08d68323
P
552 /* Store the virtualized DR6 value */
553 tsk->thread.debugreg6 = dr6;
554
62edab90
P
555 if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code,
556 SIGTRAP) == NOTIFY_STOP)
1da177e4 557 return;
3d2a71a5 558
1da177e4 559 /* It's safe to allow irq's after DR6 has been saved */
3d2a71a5 560 preempt_conditional_sti(regs);
1da177e4 561
08d68323
P
562 if (regs->flags & X86_VM_MASK) {
563 handle_vm86_trap((struct kernel_vm86_regs *) regs,
564 error_code, 1);
565 return;
1da177e4
LT
566 }
567
1da177e4 568 /*
08d68323
P
569 * Single-stepping through system calls: ignore any exceptions in
570 * kernel space, but re-enable TF when returning to user mode.
571 *
572 * We already checked v86 mode above, so we can check for kernel mode
573 * by just checking the CPL of CS.
1da177e4 574 */
08d68323
P
575 if ((dr6 & DR_STEP) && !user_mode(regs)) {
576 tsk->thread.debugreg6 &= ~DR_STEP;
577 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
578 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 579 }
08d68323
P
580 si_code = get_si_code(tsk->thread.debugreg6);
581 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS))
582 send_sigtrap(tsk, regs, error_code, si_code);
3d2a71a5 583 preempt_conditional_cli(regs);
1da177e4 584
1da177e4
LT
585 return;
586}
587
081f75bb
AH
588#ifdef CONFIG_X86_64
589static int kernel_math_error(struct pt_regs *regs, const char *str, int trapnr)
590{
591 if (fixup_exception(regs))
592 return 1;
593
594 notify_die(DIE_GPF, str, regs, 0, trapnr, SIGFPE);
595 /* Illegal floating point operation in the kernel */
596 current->thread.trap_no = trapnr;
597 die(str, regs, 0);
598 return 0;
599}
600#endif
601
1da177e4
LT
602/*
603 * Note that we play around with the 'TS' bit in an attempt to get
604 * the correct behaviour even in the presence of the asynchronous
605 * IRQ13 behaviour
606 */
65ea5b03 607void math_error(void __user *ip)
1da177e4 608{
b5964405 609 struct task_struct *task;
1da177e4 610 siginfo_t info;
adf77bac 611 unsigned short cwd, swd, err;
1da177e4
LT
612
613 /*
614 * Save the info for the exception handler and clear the error.
615 */
616 task = current;
617 save_init_fpu(task);
618 task->thread.trap_no = 16;
619 task->thread.error_code = 0;
620 info.si_signo = SIGFPE;
621 info.si_errno = 0;
65ea5b03 622 info.si_addr = ip;
1da177e4
LT
623 /*
624 * (~cwd & swd) will mask out exceptions that are not set to unmasked
625 * status. 0x3f is the exception bits in these regs, 0x200 is the
626 * C1 reg you need in case of a stack fault, 0x040 is the stack
627 * fault bit. We should only be taking one exception at a time,
628 * so if this combination doesn't produce any single exception,
a8c1be9d 629 * then we have a bad program that isn't synchronizing its FPU usage
1da177e4
LT
630 * and it will suffer the consequences since we won't be able to
631 * fully reproduce the context of the exception
632 */
633 cwd = get_fpu_cwd(task);
634 swd = get_fpu_swd(task);
adf77bac 635
a73ad333 636 err = swd & ~cwd;
adf77bac
PA
637
638 if (err & 0x001) { /* Invalid op */
b5964405
IM
639 /*
640 * swd & 0x240 == 0x040: Stack Underflow
641 * swd & 0x240 == 0x240: Stack Overflow
642 * User must clear the SF bit (0x40) if set
643 */
644 info.si_code = FPE_FLTINV;
adf77bac 645 } else if (err & 0x004) { /* Divide by Zero */
b5964405 646 info.si_code = FPE_FLTDIV;
adf77bac 647 } else if (err & 0x008) { /* Overflow */
b5964405 648 info.si_code = FPE_FLTOVF;
adf77bac
PA
649 } else if (err & 0x012) { /* Denormal, Underflow */
650 info.si_code = FPE_FLTUND;
651 } else if (err & 0x020) { /* Precision */
b5964405 652 info.si_code = FPE_FLTRES;
adf77bac 653 } else {
bd8b96df
IM
654 /*
655 * If we're using IRQ 13, or supposedly even some trap 16
656 * implementations, it's possible we get a spurious trap...
657 */
a73ad333 658 return; /* Spurious trap, no error */
1da177e4
LT
659 }
660 force_sig_info(SIGFPE, &info, task);
661}
662
e407d620 663dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 664{
252d28fe 665 conditional_sti(regs);
081f75bb
AH
666
667#ifdef CONFIG_X86_32
1da177e4 668 ignore_fpu_irq = 1;
081f75bb
AH
669#else
670 if (!user_mode(regs) &&
671 kernel_math_error(regs, "kernel x87 math error", 16))
672 return;
673#endif
674
65ea5b03 675 math_error((void __user *)regs->ip);
1da177e4
LT
676}
677
65ea5b03 678static void simd_math_error(void __user *ip)
1da177e4 679{
b5964405 680 struct task_struct *task;
b5964405 681 siginfo_t info;
7b4fd4bb 682 unsigned short mxcsr;
1da177e4
LT
683
684 /*
685 * Save the info for the exception handler and clear the error.
686 */
687 task = current;
688 save_init_fpu(task);
689 task->thread.trap_no = 19;
690 task->thread.error_code = 0;
691 info.si_signo = SIGFPE;
692 info.si_errno = 0;
693 info.si_code = __SI_FAULT;
65ea5b03 694 info.si_addr = ip;
1da177e4
LT
695 /*
696 * The SIMD FPU exceptions are handled a little differently, as there
697 * is only a single status/control register. Thus, to determine which
698 * unmasked exception was caught we must mask the exception mask bits
699 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
700 */
701 mxcsr = get_fpu_mxcsr(task);
702 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
b5964405
IM
703 case 0x000:
704 default:
705 break;
706 case 0x001: /* Invalid Op */
707 info.si_code = FPE_FLTINV;
708 break;
709 case 0x002: /* Denormalize */
710 case 0x010: /* Underflow */
711 info.si_code = FPE_FLTUND;
712 break;
713 case 0x004: /* Zero Divide */
714 info.si_code = FPE_FLTDIV;
715 break;
716 case 0x008: /* Overflow */
717 info.si_code = FPE_FLTOVF;
718 break;
719 case 0x020: /* Precision */
720 info.si_code = FPE_FLTRES;
721 break;
1da177e4
LT
722 }
723 force_sig_info(SIGFPE, &info, task);
724}
725
e407d620
AH
726dotraplinkage void
727do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 728{
b939bde2
AH
729 conditional_sti(regs);
730
081f75bb 731#ifdef CONFIG_X86_32
1da177e4
LT
732 if (cpu_has_xmm) {
733 /* Handle SIMD FPU exceptions on PIII+ processors. */
734 ignore_fpu_irq = 1;
65ea5b03 735 simd_math_error((void __user *)regs->ip);
b5964405
IM
736 return;
737 }
738 /*
739 * Handle strange cache flush from user space exception
740 * in all other cases. This is undocumented behaviour.
741 */
6b6891f9 742 if (regs->flags & X86_VM_MASK) {
b5964405
IM
743 handle_vm86_fault((struct kernel_vm86_regs *)regs, error_code);
744 return;
1da177e4 745 }
b5964405
IM
746 current->thread.trap_no = 19;
747 current->thread.error_code = error_code;
748 die_if_kernel("cache flush denied", regs, error_code);
749 force_sig(SIGSEGV, current);
081f75bb
AH
750#else
751 if (!user_mode(regs) &&
752 kernel_math_error(regs, "kernel simd math error", 19))
753 return;
754 simd_math_error((void __user *)regs->ip);
755#endif
1da177e4
LT
756}
757
e407d620
AH
758dotraplinkage void
759do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 760{
cf81978d 761 conditional_sti(regs);
1da177e4
LT
762#if 0
763 /* No need to warn about this any longer. */
b5964405 764 printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
1da177e4
LT
765#endif
766}
767
081f75bb 768asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
1da177e4 769{
1da177e4 770}
4efc0670 771
7856f6cc 772asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
081f75bb
AH
773{
774}
775
e6e9cac8
JF
776/*
777 * __math_state_restore assumes that cr0.TS is already clear and the
778 * fpu state is all ready for use. Used during context switch.
779 */
780void __math_state_restore(void)
081f75bb 781{
e6e9cac8
JF
782 struct thread_info *thread = current_thread_info();
783 struct task_struct *tsk = thread->task;
784
785 /*
786 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
787 */
788 if (unlikely(restore_fpu_checking(tsk))) {
789 stts();
790 force_sig(SIGSEGV, tsk);
791 return;
792 }
793
794 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
795 tsk->fpu_counter++;
081f75bb 796}
1da177e4
LT
797
798/*
b5964405 799 * 'math_state_restore()' saves the current math information in the
1da177e4
LT
800 * old math state array, and gets the new ones from the current task
801 *
802 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
803 * Don't touch unless you *really* know how it works.
804 *
805 * Must be called with kernel preemption disabled (in this case,
806 * local interrupts are disabled at the call-site in entry.S).
807 */
acc20761 808asmlinkage void math_state_restore(void)
1da177e4
LT
809{
810 struct thread_info *thread = current_thread_info();
811 struct task_struct *tsk = thread->task;
812
aa283f49
SS
813 if (!tsk_used_math(tsk)) {
814 local_irq_enable();
815 /*
816 * does a slab alloc which can sleep
817 */
818 if (init_fpu(tsk)) {
819 /*
820 * ran out of memory!
821 */
822 do_group_exit(SIGKILL);
823 return;
824 }
825 local_irq_disable();
826 }
827
b5964405 828 clts(); /* Allow maths ops (or we recurse) */
fcb2ac5b 829
e6e9cac8 830 __math_state_restore();
1da177e4 831}
5992b6da 832EXPORT_SYMBOL_GPL(math_state_restore);
1da177e4
LT
833
834#ifndef CONFIG_MATH_EMULATION
d315760f 835void math_emulate(struct math_emu_info *info)
1da177e4 836{
b5964405
IM
837 printk(KERN_EMERG
838 "math-emulation not enabled and no coprocessor found.\n");
839 printk(KERN_EMERG "killing %s.\n", current->comm);
840 force_sig(SIGFPE, current);
1da177e4
LT
841 schedule();
842}
1da177e4
LT
843#endif /* CONFIG_MATH_EMULATION */
844
e407d620 845dotraplinkage void __kprobes
aa78bcfa 846do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 847{
081f75bb 848#ifdef CONFIG_X86_32
7643e9b9 849 if (read_cr0() & X86_CR0_EM) {
d315760f
TH
850 struct math_emu_info info = { };
851
7643e9b9 852 conditional_sti(regs);
d315760f 853
aa78bcfa 854 info.regs = regs;
d315760f 855 math_emulate(&info);
7643e9b9
AH
856 } else {
857 math_state_restore(); /* interrupts still off */
858 conditional_sti(regs);
859 }
081f75bb
AH
860#else
861 math_state_restore();
862#endif
7643e9b9
AH
863}
864
081f75bb 865#ifdef CONFIG_X86_32
e407d620 866dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
867{
868 siginfo_t info;
869 local_irq_enable();
870
871 info.si_signo = SIGILL;
872 info.si_errno = 0;
873 info.si_code = ILL_BADSTK;
fc6fcdfb 874 info.si_addr = NULL;
f8e0870f
AH
875 if (notify_die(DIE_TRAP, "iret exception",
876 regs, error_code, 32, SIGILL) == NOTIFY_STOP)
877 return;
3c1326f8 878 do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
f8e0870f 879}
081f75bb 880#endif
f8e0870f 881
1da177e4
LT
882void __init trap_init(void)
883{
dbeb2be2
RR
884 int i;
885
1da177e4 886#ifdef CONFIG_EISA
927222b1 887 void __iomem *p = early_ioremap(0x0FFFD9, 4);
b5964405
IM
888
889 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
1da177e4 890 EISA_bus = 1;
927222b1 891 early_iounmap(p, 4);
1da177e4
LT
892#endif
893
976382dc 894 set_intr_gate(0, &divide_error);
699d2937
AH
895 set_intr_gate_ist(1, &debug, DEBUG_STACK);
896 set_intr_gate_ist(2, &nmi, NMI_STACK);
897 /* int3 can be called from all */
898 set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
899 /* int4 can be called from all */
900 set_system_intr_gate(4, &overflow);
64f644c0 901 set_intr_gate(5, &bounds);
12394cf5 902 set_intr_gate(6, &invalid_op);
7643e9b9 903 set_intr_gate(7, &device_not_available);
081f75bb 904#ifdef CONFIG_X86_32
a8c1be9d 905 set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
081f75bb
AH
906#else
907 set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK);
908#endif
51bc1ed6 909 set_intr_gate(9, &coprocessor_segment_overrun);
6bf77bf9 910 set_intr_gate(10, &invalid_TSS);
36d936c7 911 set_intr_gate(11, &segment_not_present);
699d2937 912 set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
c6df0d71 913 set_intr_gate(13, &general_protection);
b5964405 914 set_intr_gate(14, &page_fault);
cf81978d 915 set_intr_gate(15, &spurious_interrupt_bug);
252d28fe 916 set_intr_gate(16, &coprocessor_error);
5feedfd4 917 set_intr_gate(17, &alignment_check);
1da177e4 918#ifdef CONFIG_X86_MCE
699d2937 919 set_intr_gate_ist(18, &machine_check, MCE_STACK);
1da177e4 920#endif
b939bde2 921 set_intr_gate(19, &simd_coprocessor_error);
1da177e4 922
bb3f0b59
YL
923 /* Reserve all the builtin and the syscall vector: */
924 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
925 set_bit(i, used_vectors);
926
081f75bb
AH
927#ifdef CONFIG_IA32_EMULATION
928 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
bb3f0b59 929 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
081f75bb
AH
930#endif
931
932#ifdef CONFIG_X86_32
d43c6e80 933 if (cpu_has_fxsr) {
d43c6e80
JB
934 printk(KERN_INFO "Enabling fast FPU save and restore... ");
935 set_in_cr4(X86_CR4_OSFXSR);
936 printk("done.\n");
937 }
938 if (cpu_has_xmm) {
b5964405
IM
939 printk(KERN_INFO
940 "Enabling unmasked SIMD FPU exception support... ");
d43c6e80
JB
941 set_in_cr4(X86_CR4_OSXMMEXCPT);
942 printk("done.\n");
943 }
944
699d2937 945 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
dbeb2be2 946 set_bit(SYSCALL_VECTOR, used_vectors);
081f75bb 947#endif
bb3f0b59 948
1da177e4 949 /*
b5964405 950 * Should be a barrier for any external CPU state:
1da177e4
LT
951 */
952 cpu_init();
953
428cf902 954 x86_init.irqs.trap_init();
1da177e4 955}