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x86: Move get/set_wallclock to x86_platform_ops
[net-next-2.6.git] / arch / x86 / kernel / rtc.c
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1da177e4 1/*
fe599f9f 2 * RTC related functions
1da177e4 3 */
8383d821
JSR
4#include <linux/platform_device.h>
5#include <linux/mc146818rtc.h>
1122b134 6#include <linux/acpi.h>
fe599f9f 7#include <linux/bcd.h>
1da2e3d6 8#include <linux/pnp.h>
1da177e4 9
cdc7957d 10#include <asm/vsyscall.h>
7bd867df 11#include <asm/x86_init.h>
8383d821 12#include <asm/time.h>
1da177e4 13
1122b134 14#ifdef CONFIG_X86_32
1122b134
TG
15/*
16 * This is a special lock that is owned by the CPU and holds the index
17 * register we are working with. It is required for NMI access to the
18 * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
19 */
8383d821 20volatile unsigned long cmos_lock;
1122b134 21EXPORT_SYMBOL(cmos_lock);
8383d821 22#endif /* CONFIG_X86_32 */
1122b134 23
b62576a2
AK
24/* For two digit years assume time is always after that */
25#define CMOS_YEARS_OFFS 2000
26
1122b134
TG
27DEFINE_SPINLOCK(rtc_lock);
28EXPORT_SYMBOL(rtc_lock);
29
1da177e4
LT
30/*
31 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
32 * called 500 ms after the second nowtime has started, because when
33 * nowtime is written into the registers of the CMOS clock, it will
34 * jump to the next second precisely 500 ms later. Check the Motorola
35 * MC146818A or Dallas DS12887 data sheet for details.
36 *
37 * BUG: This routine does not handle hour overflow properly; it just
38 * sets the minutes. Usually you'll only notice that after reboot!
39 */
fe599f9f 40int mach_set_rtc_mmss(unsigned long nowtime)
1da177e4 41{
1da177e4
LT
42 int real_seconds, real_minutes, cmos_minutes;
43 unsigned char save_control, save_freq_select;
8383d821 44 int retval = 0;
1da177e4 45
1122b134
TG
46 /* tell the clock it's being set */
47 save_control = CMOS_READ(RTC_CONTROL);
1da177e4
LT
48 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
49
1122b134
TG
50 /* stop and reset prescaler */
51 save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
1da177e4
LT
52 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
53
54 cmos_minutes = CMOS_READ(RTC_MINUTES);
55 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
357c6e63 56 cmos_minutes = bcd2bin(cmos_minutes);
1da177e4
LT
57
58 /*
59 * since we're only adjusting minutes and seconds,
60 * don't interfere with hour overflow. This avoids
61 * messing with unknown time zones but requires your
62 * RTC not to be off by more than 15 minutes
63 */
64 real_seconds = nowtime % 60;
65 real_minutes = nowtime / 60;
1122b134 66 /* correct for half hour time zone */
1da177e4 67 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
1122b134 68 real_minutes += 30;
1da177e4
LT
69 real_minutes %= 60;
70
71 if (abs(real_minutes - cmos_minutes) < 30) {
72 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
357c6e63
AB
73 real_seconds = bin2bcd(real_seconds);
74 real_minutes = bin2bcd(real_minutes);
1da177e4 75 }
8383d821
JSR
76 CMOS_WRITE(real_seconds, RTC_SECONDS);
77 CMOS_WRITE(real_minutes, RTC_MINUTES);
1da177e4
LT
78 } else {
79 printk(KERN_WARNING
80 "set_rtc_mmss: can't update from %d to %d\n",
81 cmos_minutes, real_minutes);
82 retval = -1;
83 }
84
85 /* The following flags have to be released exactly in this order,
86 * otherwise the DS12887 (popular MC146818A clone with integrated
87 * battery and quartz) will not reset the oscillator and will not
88 * update precisely 500 ms later. You won't find this mentioned in
89 * the Dallas Semiconductor data sheets, but who believes data
90 * sheets anyway ... -- Markus Kuhn
91 */
92 CMOS_WRITE(save_control, RTC_CONTROL);
93 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
94
95 return retval;
96}
97
fe599f9f 98unsigned long mach_get_cmos_time(void)
1da177e4 99{
068c9222 100 unsigned int status, year, mon, day, hour, min, sec, century = 0;
1122b134
TG
101
102 /*
103 * If UIP is clear, then we have >= 244 microseconds before
104 * RTC registers will be updated. Spec sheet says that this
105 * is the reliable way to read RTC - registers. If UIP is set
106 * then the register access might be invalid.
107 */
108 while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
109 cpu_relax();
110
111 sec = CMOS_READ(RTC_SECONDS);
112 min = CMOS_READ(RTC_MINUTES);
113 hour = CMOS_READ(RTC_HOURS);
114 day = CMOS_READ(RTC_DAY_OF_MONTH);
115 mon = CMOS_READ(RTC_MONTH);
116 year = CMOS_READ(RTC_YEAR);
117
45de7079 118#ifdef CONFIG_ACPI
1122b134
TG
119 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
120 acpi_gbl_FADT.century)
121 century = CMOS_READ(acpi_gbl_FADT.century);
122#endif
123
068c9222 124 status = CMOS_READ(RTC_CONTROL);
45de7079 125 WARN_ON_ONCE(RTC_ALWAYS_BCD && (status & RTC_DM_BINARY));
068c9222
AK
126
127 if (RTC_ALWAYS_BCD || !(status & RTC_DM_BINARY)) {
357c6e63
AB
128 sec = bcd2bin(sec);
129 min = bcd2bin(min);
130 hour = bcd2bin(hour);
131 day = bcd2bin(day);
132 mon = bcd2bin(mon);
133 year = bcd2bin(year);
41623b06
MM
134 }
135
1122b134 136 if (century) {
357c6e63 137 century = bcd2bin(century);
1122b134
TG
138 year += century * 100;
139 printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
b62576a2 140 } else
1122b134 141 year += CMOS_YEARS_OFFS;
1da177e4
LT
142
143 return mktime(year, mon, day, hour, min, sec);
144}
145
fe599f9f
TG
146/* Routines for accessing the CMOS RAM/RTC. */
147unsigned char rtc_cmos_read(unsigned char addr)
148{
149 unsigned char val;
150
151 lock_cmos_prefix(addr);
04aaa7ba
DR
152 outb(addr, RTC_PORT(0));
153 val = inb(RTC_PORT(1));
fe599f9f 154 lock_cmos_suffix(addr);
8383d821 155
fe599f9f
TG
156 return val;
157}
158EXPORT_SYMBOL(rtc_cmos_read);
159
160void rtc_cmos_write(unsigned char val, unsigned char addr)
161{
162 lock_cmos_prefix(addr);
04aaa7ba
DR
163 outb(addr, RTC_PORT(0));
164 outb(val, RTC_PORT(1));
fe599f9f
TG
165 lock_cmos_suffix(addr);
166}
167EXPORT_SYMBOL(rtc_cmos_write);
168
7bd867df 169int update_persistent_clock(struct timespec now)
fe599f9f 170{
fe599f9f 171 unsigned long flags;
8383d821 172 int retval;
fe599f9f 173
fe599f9f 174 spin_lock_irqsave(&rtc_lock, flags);
7bd867df 175 retval = x86_platform.set_wallclock(now.tv_sec);
fe599f9f
TG
176 spin_unlock_irqrestore(&rtc_lock, flags);
177
178 return retval;
179}
180
181/* not static: needed by APM */
182unsigned long read_persistent_clock(void)
183{
1122b134 184 unsigned long retval, flags;
fe599f9f
TG
185
186 spin_lock_irqsave(&rtc_lock, flags);
7bd867df 187 retval = x86_platform.get_wallclock();
fe599f9f
TG
188 spin_unlock_irqrestore(&rtc_lock, flags);
189
190 return retval;
191}
192
92767af0 193unsigned long long native_read_tsc(void)
cdc7957d 194{
92767af0 195 return __native_read_tsc();
cdc7957d 196}
92767af0
IM
197EXPORT_SYMBOL(native_read_tsc);
198
1da2e3d6
SS
199
200static struct resource rtc_resources[] = {
201 [0] = {
202 .start = RTC_PORT(0),
203 .end = RTC_PORT(1),
204 .flags = IORESOURCE_IO,
205 },
206 [1] = {
207 .start = RTC_IRQ,
208 .end = RTC_IRQ,
209 .flags = IORESOURCE_IRQ,
210 }
211};
212
213static struct platform_device rtc_device = {
214 .name = "rtc_cmos",
215 .id = -1,
216 .resource = rtc_resources,
217 .num_resources = ARRAY_SIZE(rtc_resources),
218};
219
220static __init int add_rtc_cmos(void)
221{
222#ifdef CONFIG_PNP
758a7f7b
BH
223 static const char *ids[] __initconst =
224 { "PNP0b00", "PNP0b01", "PNP0b02", };
225 struct pnp_dev *dev;
226 struct pnp_id *id;
227 int i;
228
229 pnp_for_each_dev(dev) {
230 for (id = dev->id; id; id = id->next) {
231 for (i = 0; i < ARRAY_SIZE(ids); i++) {
232 if (compare_pnp_id(id, ids[i]) != 0)
233 return 0;
234 }
235 }
236 }
237#endif
238
1da2e3d6 239 platform_device_register(&rtc_device);
758a7f7b
BH
240 dev_info(&rtc_device.dev,
241 "registered platform RTC device (no PNP device found)\n");
8383d821 242
1da2e3d6
SS
243 return 0;
244}
245device_initcall(add_rtc_cmos);