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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * NMI watchdog support on APIC systems |
3 | * | |
4 | * Started by Ingo Molnar <mingo@redhat.com> | |
5 | * | |
6 | * Fixes: | |
7 | * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog. | |
8 | * Mikael Pettersson : Power Management for local APIC NMI watchdog. | |
1da177e4 | 9 | * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog. |
1da177e4 LT |
10 | * Pavel Machek and |
11 | * Mikael Pettersson : PM converted to driver model. Disable/enable API. | |
12 | */ | |
13 | ||
3d1ba1da IM |
14 | #include <asm/apic.h> |
15 | ||
bb81a09e | 16 | #include <linux/nmi.h> |
1da177e4 | 17 | #include <linux/mm.h> |
1da177e4 | 18 | #include <linux/delay.h> |
1da177e4 | 19 | #include <linux/interrupt.h> |
1da177e4 LT |
20 | #include <linux/module.h> |
21 | #include <linux/sysdev.h> | |
1da177e4 | 22 | #include <linux/sysctl.h> |
3e4ff115 | 23 | #include <linux/percpu.h> |
eddb6fb9 | 24 | #include <linux/kprobes.h> |
bb81a09e | 25 | #include <linux/cpumask.h> |
f8b5035b | 26 | #include <linux/kernel_stat.h> |
1eeb66a1 | 27 | #include <linux/kdebug.h> |
88ff0a47 | 28 | #include <linux/smp.h> |
1da177e4 | 29 | |
35542c5e MR |
30 | #include <asm/i8259.h> |
31 | #include <asm/io_apic.h> | |
1da177e4 | 32 | #include <asm/smp.h> |
1da177e4 | 33 | #include <asm/nmi.h> |
1da177e4 | 34 | #include <asm/proto.h> |
6e908947 | 35 | #include <asm/timer.h> |
1da177e4 | 36 | |
553f265f | 37 | #include <asm/mce.h> |
1da177e4 | 38 | |
e32ede19 GOC |
39 | #include <mach_traps.h> |
40 | ||
29cbc78b AK |
41 | int unknown_nmi_panic; |
42 | int nmi_watchdog_enabled; | |
29cbc78b | 43 | |
1714f9bf | 44 | static cpumask_t backtrace_mask = CPU_MASK_NONE; |
828f0afd | 45 | |
1da177e4 | 46 | /* nmi_active: |
f2802e7f DZ |
47 | * >0: the lapic NMI watchdog is active, but can be disabled |
48 | * <0: the lapic NMI watchdog has not been set up, and cannot | |
1da177e4 | 49 | * be enabled |
f2802e7f | 50 | * 0: the lapic NMI watchdog is disabled, but can be enabled |
1da177e4 | 51 | */ |
f2802e7f | 52 | atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ |
88ff0a47 | 53 | EXPORT_SYMBOL(nmi_active); |
1da177e4 | 54 | |
c376d454 | 55 | unsigned int nmi_watchdog = NMI_NONE; |
88ff0a47 HS |
56 | EXPORT_SYMBOL(nmi_watchdog); |
57 | ||
58 | static int panic_on_timeout; | |
1da177e4 | 59 | |
1798bc22 | 60 | static unsigned int nmi_hz = HZ; |
05cb007d | 61 | static DEFINE_PER_CPU(short, wd_enabled); |
88ff0a47 | 62 | static int endflag __initdata; |
92715e28 | 63 | |
fd5cea02 CG |
64 | static inline unsigned int get_nmi_count(int cpu) |
65 | { | |
1798bc22 CG |
66 | #ifdef CONFIG_X86_64 |
67 | return cpu_pda(cpu)->__nmi_count; | |
68 | #else | |
fd5cea02 | 69 | return nmi_count(cpu); |
1798bc22 | 70 | #endif |
fd5cea02 CG |
71 | } |
72 | ||
73 | static inline int mce_in_progress(void) | |
74 | { | |
b8e0418b | 75 | #if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE) |
1798bc22 CG |
76 | return atomic_read(&mce_entry) > 0; |
77 | #endif | |
fd5cea02 CG |
78 | return 0; |
79 | } | |
80 | ||
81 | /* | |
82 | * Take the local apic timer and PIT/HPET into account. We don't | |
83 | * know which one is active, when we have highres/dyntick on | |
84 | */ | |
85 | static inline unsigned int get_timer_irqs(int cpu) | |
86 | { | |
1798bc22 CG |
87 | #ifdef CONFIG_X86_64 |
88 | return read_pda(apic_timer_irqs) + read_pda(irq0_irqs); | |
89 | #else | |
fd5cea02 CG |
90 | return per_cpu(irq_stat, cpu).apic_timer_irqs + |
91 | per_cpu(irq_stat, cpu).irq0_irqs; | |
1798bc22 | 92 | #endif |
fd5cea02 | 93 | } |
1da177e4 | 94 | |
75152114 | 95 | #ifdef CONFIG_SMP |
1798bc22 CG |
96 | /* |
97 | * The performance counters used by NMI_LOCAL_APIC don't trigger when | |
75152114 AK |
98 | * the CPU is idle. To make sure the NMI watchdog really ticks on all |
99 | * CPUs during the test make them busy. | |
100 | */ | |
101 | static __init void nmi_cpu_busy(void *data) | |
1da177e4 | 102 | { |
366c7f55 | 103 | local_irq_enable_in_hardirq(); |
1798bc22 CG |
104 | /* |
105 | * Intentionally don't use cpu_relax here. This is | |
106 | * to make sure that the performance counter really ticks, | |
107 | * even if there is a simulator or similar that catches the | |
108 | * pause instruction. On a real HT machine this is fine because | |
109 | * all other CPUs are busy with "useless" delay loops and don't | |
110 | * care if they get somewhat less cycles. | |
111 | */ | |
92715e28 RT |
112 | while (endflag == 0) |
113 | mb(); | |
1da177e4 | 114 | } |
75152114 | 115 | #endif |
1da177e4 | 116 | |
8bb85190 IM |
117 | static void report_broken_nmi(int cpu, int *prev_nmi_count) |
118 | { | |
119 | printk(KERN_CONT "\n"); | |
120 | ||
121 | printk(KERN_WARNING | |
122 | "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n", | |
123 | cpu, prev_nmi_count[cpu], get_nmi_count(cpu)); | |
124 | ||
125 | printk(KERN_WARNING | |
126 | "Please report this to bugzilla.kernel.org,\n"); | |
127 | printk(KERN_WARNING | |
128 | "and attach the output of the 'dmesg' command.\n"); | |
129 | ||
130 | per_cpu(wd_enabled, cpu) = 0; | |
131 | atomic_dec(&nmi_active); | |
132 | } | |
133 | ||
416b7218 | 134 | int __init check_nmi_watchdog(void) |
1da177e4 | 135 | { |
29b70081 | 136 | unsigned int *prev_nmi_count; |
1da177e4 LT |
137 | int cpu; |
138 | ||
4de00436 | 139 | if (!nmi_watchdog_active() || !atomic_read(&nmi_active)) |
f2802e7f DZ |
140 | return 0; |
141 | ||
7496b606 | 142 | prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL); |
416b7218 | 143 | if (!prev_nmi_count) |
35542c5e | 144 | goto error; |
1da177e4 | 145 | |
416b7218 | 146 | printk(KERN_INFO "Testing NMI watchdog ... "); |
ac6b931c | 147 | |
7554c3f0 | 148 | #ifdef CONFIG_SMP |
75152114 | 149 | if (nmi_watchdog == NMI_LOCAL_APIC) |
8691e5a8 | 150 | smp_call_function(nmi_cpu_busy, (void *)&endflag, 0); |
7554c3f0 | 151 | #endif |
1da177e4 | 152 | |
c8912599 | 153 | for_each_possible_cpu(cpu) |
fd5cea02 | 154 | prev_nmi_count[cpu] = get_nmi_count(cpu); |
1da177e4 | 155 | local_irq_enable(); |
1798bc22 | 156 | mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */ |
1da177e4 | 157 | |
394e3902 | 158 | for_each_online_cpu(cpu) { |
05cb007d | 159 | if (!per_cpu(wd_enabled, cpu)) |
f2802e7f | 160 | continue; |
8bb85190 IM |
161 | if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) |
162 | report_broken_nmi(cpu, prev_nmi_count); | |
1da177e4 | 163 | } |
416b7218 | 164 | endflag = 1; |
f2802e7f | 165 | if (!atomic_read(&nmi_active)) { |
416b7218 | 166 | kfree(prev_nmi_count); |
f2802e7f | 167 | atomic_set(&nmi_active, -1); |
35542c5e | 168 | goto error; |
f2802e7f | 169 | } |
1da177e4 LT |
170 | printk("OK.\n"); |
171 | ||
1798bc22 CG |
172 | /* |
173 | * now that we know it works we can reduce NMI frequency to | |
174 | * something more reasonable; makes a difference in some configs | |
175 | */ | |
05cb007d AK |
176 | if (nmi_watchdog == NMI_LOCAL_APIC) |
177 | nmi_hz = lapic_adjust_nmi_hz(1); | |
1da177e4 | 178 | |
416b7218 | 179 | kfree(prev_nmi_count); |
1da177e4 | 180 | return 0; |
35542c5e MR |
181 | error: |
182 | if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259) | |
183 | disable_8259A_irq(0); | |
5b4d2386 MR |
184 | #ifdef CONFIG_X86_32 |
185 | timer_ack = 0; | |
186 | #endif | |
35542c5e | 187 | return -1; |
1da177e4 LT |
188 | } |
189 | ||
867ab545 | 190 | static int __init setup_nmi_watchdog(char *str) |
1da177e4 | 191 | { |
2b6addad | 192 | unsigned int nmi; |
1da177e4 | 193 | |
d1b946b9 | 194 | if (!strncmp(str, "panic", 5)) { |
1da177e4 LT |
195 | panic_on_timeout = 1; |
196 | str = strchr(str, ','); | |
197 | if (!str) | |
198 | return 1; | |
199 | ++str; | |
200 | } | |
201 | ||
202 | get_option(&str, &nmi); | |
203 | ||
2b6addad | 204 | if (nmi >= NMI_INVALID) |
1da177e4 | 205 | return 0; |
f2802e7f | 206 | |
75152114 | 207 | nmi_watchdog = nmi; |
1da177e4 LT |
208 | return 1; |
209 | } | |
1da177e4 LT |
210 | __setup("nmi_watchdog=", setup_nmi_watchdog); |
211 | ||
1798bc22 CG |
212 | /* |
213 | * Suspend/resume support | |
214 | */ | |
1da177e4 LT |
215 | #ifdef CONFIG_PM |
216 | ||
217 | static int nmi_pm_active; /* nmi_active before suspend */ | |
218 | ||
829ca9a3 | 219 | static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state) |
1da177e4 | 220 | { |
4038f901 | 221 | /* only CPU0 goes here, other CPUs should be offline */ |
f2802e7f | 222 | nmi_pm_active = atomic_read(&nmi_active); |
4038f901 SL |
223 | stop_apic_nmi_watchdog(NULL); |
224 | BUG_ON(atomic_read(&nmi_active) != 0); | |
1da177e4 LT |
225 | return 0; |
226 | } | |
227 | ||
228 | static int lapic_nmi_resume(struct sys_device *dev) | |
229 | { | |
4038f901 SL |
230 | /* only CPU0 goes here, other CPUs should be offline */ |
231 | if (nmi_pm_active > 0) { | |
232 | setup_apic_nmi_watchdog(NULL); | |
233 | touch_nmi_watchdog(); | |
234 | } | |
1da177e4 LT |
235 | return 0; |
236 | } | |
237 | ||
238 | static struct sysdev_class nmi_sysclass = { | |
af5ca3f4 | 239 | .name = "lapic_nmi", |
1da177e4 LT |
240 | .resume = lapic_nmi_resume, |
241 | .suspend = lapic_nmi_suspend, | |
242 | }; | |
243 | ||
244 | static struct sys_device device_lapic_nmi = { | |
416b7218 | 245 | .id = 0, |
1da177e4 LT |
246 | .cls = &nmi_sysclass, |
247 | }; | |
248 | ||
249 | static int __init init_lapic_nmi_sysfs(void) | |
250 | { | |
251 | int error; | |
252 | ||
1798bc22 CG |
253 | /* |
254 | * should really be a BUG_ON but b/c this is an | |
f2802e7f DZ |
255 | * init call, it just doesn't work. -dcz |
256 | */ | |
257 | if (nmi_watchdog != NMI_LOCAL_APIC) | |
258 | return 0; | |
259 | ||
416b7218 | 260 | if (atomic_read(&nmi_active) < 0) |
1da177e4 LT |
261 | return 0; |
262 | ||
263 | error = sysdev_class_register(&nmi_sysclass); | |
264 | if (!error) | |
265 | error = sysdev_register(&device_lapic_nmi); | |
266 | return error; | |
267 | } | |
1798bc22 | 268 | |
1da177e4 LT |
269 | /* must come after the local APIC's device_initcall() */ |
270 | late_initcall(init_lapic_nmi_sysfs); | |
271 | ||
272 | #endif /* CONFIG_PM */ | |
273 | ||
416b7218 HS |
274 | static void __acpi_nmi_enable(void *__unused) |
275 | { | |
593f4a78 | 276 | apic_write(APIC_LVT0, APIC_DM_NMI); |
416b7218 HS |
277 | } |
278 | ||
279 | /* | |
280 | * Enable timer based NMIs on all CPUs: | |
281 | */ | |
282 | void acpi_nmi_enable(void) | |
283 | { | |
284 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | |
15c8b6c1 | 285 | on_each_cpu(__acpi_nmi_enable, NULL, 1); |
416b7218 HS |
286 | } |
287 | ||
288 | static void __acpi_nmi_disable(void *__unused) | |
289 | { | |
593f4a78 | 290 | apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); |
416b7218 HS |
291 | } |
292 | ||
293 | /* | |
294 | * Disable timer based NMIs on all CPUs: | |
295 | */ | |
296 | void acpi_nmi_disable(void) | |
297 | { | |
298 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | |
15c8b6c1 | 299 | on_each_cpu(__acpi_nmi_disable, NULL, 1); |
416b7218 HS |
300 | } |
301 | ||
b3e15bde AR |
302 | /* |
303 | * This function is called as soon the LAPIC NMI watchdog driver has everything | |
304 | * in place and it's ready to check if the NMIs belong to the NMI watchdog | |
305 | */ | |
306 | void cpu_nmi_set_wd_enabled(void) | |
307 | { | |
308 | __get_cpu_var(wd_enabled) = 1; | |
309 | } | |
310 | ||
f2802e7f DZ |
311 | void setup_apic_nmi_watchdog(void *unused) |
312 | { | |
416b7218 | 313 | if (__get_cpu_var(wd_enabled)) |
4038f901 SL |
314 | return; |
315 | ||
316 | /* cheap hack to support suspend/resume */ | |
317 | /* if cpu0 is not active neither should the other cpus */ | |
1798bc22 | 318 | if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0) |
4038f901 SL |
319 | return; |
320 | ||
05cb007d AK |
321 | switch (nmi_watchdog) { |
322 | case NMI_LOCAL_APIC: | |
05cb007d AK |
323 | if (lapic_watchdog_init(nmi_hz) < 0) { |
324 | __get_cpu_var(wd_enabled) = 0; | |
75152114 | 325 | return; |
f2802e7f | 326 | } |
05cb007d AK |
327 | /* FALL THROUGH */ |
328 | case NMI_IO_APIC: | |
329 | __get_cpu_var(wd_enabled) = 1; | |
330 | atomic_inc(&nmi_active); | |
f2802e7f | 331 | } |
f2802e7f | 332 | } |
75152114 | 333 | |
4038f901 | 334 | void stop_apic_nmi_watchdog(void *unused) |
f2802e7f DZ |
335 | { |
336 | /* only support LOCAL and IO APICs for now */ | |
4de00436 | 337 | if (!nmi_watchdog_active()) |
1798bc22 | 338 | return; |
05cb007d | 339 | if (__get_cpu_var(wd_enabled) == 0) |
4038f901 | 340 | return; |
05cb007d AK |
341 | if (nmi_watchdog == NMI_LOCAL_APIC) |
342 | lapic_watchdog_stop(); | |
6f290b4e AR |
343 | else |
344 | __acpi_nmi_disable(NULL); | |
05cb007d | 345 | __get_cpu_var(wd_enabled) = 0; |
f2802e7f | 346 | atomic_dec(&nmi_active); |
1da177e4 LT |
347 | } |
348 | ||
349 | /* | |
350 | * the best way to detect whether a CPU has a 'hard lockup' problem | |
351 | * is to check it's local APIC timer IRQ counts. If they are not | |
352 | * changing then that CPU has some problem. | |
353 | * | |
354 | * as these watchdog NMI IRQs are generated on every CPU, we only | |
355 | * have to check the current processor. | |
1da177e4 LT |
356 | * |
357 | * since NMIs don't listen to _any_ locks, we have to be extremely | |
358 | * careful not to rely on unsafe variables. The printk might lock | |
359 | * up though, so we have to break up any console locks first ... | |
1798bc22 | 360 | * [when there will be more tty-related locks, break them up here too!] |
1da177e4 LT |
361 | */ |
362 | ||
75152114 AK |
363 | static DEFINE_PER_CPU(unsigned, last_irq_sum); |
364 | static DEFINE_PER_CPU(local_t, alert_counter); | |
365 | static DEFINE_PER_CPU(int, nmi_touch); | |
1da177e4 | 366 | |
567f3e42 | 367 | void touch_nmi_watchdog(void) |
1da177e4 | 368 | { |
4de00436 | 369 | if (nmi_watchdog_active()) { |
99019e91 | 370 | unsigned cpu; |
1da177e4 | 371 | |
99019e91 | 372 | /* |
f784946d | 373 | * Tell other CPUs to reset their alert counters. We cannot |
99019e91 JB |
374 | * do it ourselves because the alert count increase is not |
375 | * atomic. | |
376 | */ | |
567f3e42 AM |
377 | for_each_present_cpu(cpu) { |
378 | if (per_cpu(nmi_touch, cpu) != 1) | |
379 | per_cpu(nmi_touch, cpu) = 1; | |
380 | } | |
99019e91 | 381 | } |
8446f1d3 | 382 | |
8446f1d3 IM |
383 | /* |
384 | * Tickle the softlockup detector too: | |
385 | */ | |
416b7218 | 386 | touch_softlockup_watchdog(); |
1da177e4 | 387 | } |
416b7218 | 388 | EXPORT_SYMBOL(touch_nmi_watchdog); |
1da177e4 | 389 | |
5deb45e3 SR |
390 | notrace __kprobes int |
391 | nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) | |
1da177e4 | 392 | { |
1da177e4 LT |
393 | /* |
394 | * Since current_thread_info()-> is always on the stack, and we | |
395 | * always switch the stack NMI-atomically, it's safe to use | |
396 | * smp_processor_id(). | |
397 | */ | |
b791ccef | 398 | unsigned int sum; |
75152114 | 399 | int touched = 0; |
bb81a09e | 400 | int cpu = smp_processor_id(); |
05cb007d | 401 | int rc = 0; |
f2802e7f DZ |
402 | |
403 | /* check for other users first */ | |
404 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) | |
405 | == NOTIFY_STOP) { | |
3adbbcce | 406 | rc = 1; |
f2802e7f DZ |
407 | touched = 1; |
408 | } | |
1da177e4 | 409 | |
fd5cea02 CG |
410 | sum = get_timer_irqs(cpu); |
411 | ||
75152114 AK |
412 | if (__get_cpu_var(nmi_touch)) { |
413 | __get_cpu_var(nmi_touch) = 0; | |
414 | touched = 1; | |
415 | } | |
f2802e7f | 416 | |
bb81a09e AM |
417 | if (cpu_isset(cpu, backtrace_mask)) { |
418 | static DEFINE_SPINLOCK(lock); /* Serialise the printks */ | |
419 | ||
420 | spin_lock(&lock); | |
88ff0a47 | 421 | printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu); |
bb81a09e AM |
422 | dump_stack(); |
423 | spin_unlock(&lock); | |
424 | cpu_clear(cpu, backtrace_mask); | |
425 | } | |
426 | ||
fd5cea02 CG |
427 | /* Could check oops_in_progress here too, but it's safer not to */ |
428 | if (mce_in_progress()) | |
553f265f | 429 | touched = 1; |
1da177e4 | 430 | |
f8b5035b | 431 | /* if the none of the timers isn't firing, this cpu isn't doing much */ |
75152114 | 432 | if (!touched && __get_cpu_var(last_irq_sum) == sum) { |
1da177e4 LT |
433 | /* |
434 | * Ayiee, looks like this CPU is stuck ... | |
435 | * wait a few IRQs (5 seconds) before doing the oops ... | |
436 | */ | |
75152114 | 437 | local_inc(&__get_cpu_var(alert_counter)); |
1798bc22 | 438 | if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz) |
748f2edb GA |
439 | /* |
440 | * die_nmi will return ONLY if NOTIFY_STOP happens.. | |
441 | */ | |
ddca03c9 | 442 | die_nmi("BUG: NMI Watchdog detected LOCKUP", |
d1b946b9 | 443 | regs, panic_on_timeout); |
1da177e4 | 444 | } else { |
75152114 AK |
445 | __get_cpu_var(last_irq_sum) = sum; |
446 | local_set(&__get_cpu_var(alert_counter), 0); | |
1da177e4 | 447 | } |
f2802e7f DZ |
448 | |
449 | /* see if the nmi watchdog went off */ | |
05cb007d AK |
450 | if (!__get_cpu_var(wd_enabled)) |
451 | return rc; | |
452 | switch (nmi_watchdog) { | |
453 | case NMI_LOCAL_APIC: | |
454 | rc |= lapic_wd_event(nmi_hz); | |
455 | break; | |
456 | case NMI_IO_APIC: | |
1798bc22 CG |
457 | /* |
458 | * don't know how to accurately check for this. | |
05cb007d AK |
459 | * just assume it was a watchdog timer interrupt |
460 | * This matches the old behaviour. | |
461 | */ | |
462 | rc = 1; | |
463 | break; | |
75152114 | 464 | } |
3adbbcce | 465 | return rc; |
1da177e4 LT |
466 | } |
467 | ||
1da177e4 LT |
468 | #ifdef CONFIG_SYSCTL |
469 | ||
6f290b4e AR |
470 | static void enable_ioapic_nmi_watchdog_single(void *unused) |
471 | { | |
472 | __get_cpu_var(wd_enabled) = 1; | |
473 | atomic_inc(&nmi_active); | |
474 | __acpi_nmi_enable(NULL); | |
475 | } | |
476 | ||
477 | static void enable_ioapic_nmi_watchdog(void) | |
478 | { | |
479 | on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1); | |
480 | touch_nmi_watchdog(); | |
481 | } | |
482 | ||
483 | static void disable_ioapic_nmi_watchdog(void) | |
484 | { | |
485 | on_each_cpu(stop_apic_nmi_watchdog, NULL, 1); | |
486 | } | |
487 | ||
e3a61b0a | 488 | static int __init setup_unknown_nmi_panic(char *str) |
8f4e956b | 489 | { |
e3a61b0a SA |
490 | unknown_nmi_panic = 1; |
491 | return 1; | |
8f4e956b | 492 | } |
e3a61b0a | 493 | __setup("unknown_nmi_panic", setup_unknown_nmi_panic); |
1da177e4 LT |
494 | |
495 | static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu) | |
496 | { | |
497 | unsigned char reason = get_nmi_reason(); | |
498 | char buf[64]; | |
499 | ||
2fbe7b25 | 500 | sprintf(buf, "NMI received for unknown reason %02x\n", reason); |
6c8decdf | 501 | die_nmi(buf, regs, 1); /* Always panic here */ |
1da177e4 LT |
502 | return 0; |
503 | } | |
504 | ||
407984f1 DZ |
505 | /* |
506 | * proc handler for /proc/sys/kernel/nmi | |
507 | */ | |
508 | int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file, | |
509 | void __user *buffer, size_t *length, loff_t *ppos) | |
510 | { | |
511 | int old_state; | |
512 | ||
513 | nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0; | |
514 | old_state = nmi_watchdog_enabled; | |
515 | proc_dointvec(table, write, file, buffer, length, ppos); | |
516 | if (!!old_state == !!nmi_watchdog_enabled) | |
517 | return 0; | |
518 | ||
4de00436 | 519 | if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) { |
1798bc22 CG |
520 | printk(KERN_WARNING |
521 | "NMI watchdog is permanently disabled\n"); | |
e33e89ab | 522 | return -EIO; |
407984f1 DZ |
523 | } |
524 | ||
e33e89ab | 525 | if (nmi_watchdog == NMI_LOCAL_APIC) { |
407984f1 DZ |
526 | if (nmi_watchdog_enabled) |
527 | enable_lapic_nmi_watchdog(); | |
528 | else | |
529 | disable_lapic_nmi_watchdog(); | |
6f290b4e AR |
530 | } else if (nmi_watchdog == NMI_IO_APIC) { |
531 | if (nmi_watchdog_enabled) | |
532 | enable_ioapic_nmi_watchdog(); | |
533 | else | |
534 | disable_ioapic_nmi_watchdog(); | |
407984f1 | 535 | } else { |
1798bc22 | 536 | printk(KERN_WARNING |
407984f1 DZ |
537 | "NMI watchdog doesn't know what hardware to touch\n"); |
538 | return -EIO; | |
539 | } | |
540 | return 0; | |
541 | } | |
542 | ||
1798bc22 | 543 | #endif /* CONFIG_SYSCTL */ |
1da177e4 | 544 | |
a062bae9 LZ |
545 | int do_nmi_callback(struct pt_regs *regs, int cpu) |
546 | { | |
547 | #ifdef CONFIG_SYSCTL | |
548 | if (unknown_nmi_panic) | |
549 | return unknown_nmi_panic_callback(regs, cpu); | |
550 | #endif | |
551 | return 0; | |
552 | } | |
553 | ||
bb81a09e AM |
554 | void __trigger_all_cpu_backtrace(void) |
555 | { | |
556 | int i; | |
557 | ||
558 | backtrace_mask = cpu_online_map; | |
559 | /* Wait for up to 10 seconds for all CPUs to do the backtrace */ | |
560 | for (i = 0; i < 10 * 1000; i++) { | |
561 | if (cpus_empty(backtrace_mask)) | |
562 | break; | |
563 | mdelay(1); | |
564 | } | |
565 | } |