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3e135d88
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1/*
2 * Intel CPU Microcode Update Driver for Linux
3 *
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 *
7 * This driver allows to upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
14 *
50a23e6e 15 * http://developer.intel.com/Assets/PDF/manual/253668.pdf
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16 *
17 * For more information, go to http://www.urbanmyth.org/microcode
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
23 *
24 * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
25 * Initial release.
26 * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
27 * Added read() support + cleanups.
28 * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
29 * Added 'device trimming' support. open(O_WRONLY) zeroes
30 * and frees the saved copy of applied microcode.
31 * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
32 * Made to use devfs (/dev/cpu/microcode) + cleanups.
33 * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
34 * Added misc device support (now uses both devfs and misc).
35 * Added MICROCODE_IOCFREE ioctl to clear memory.
36 * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
37 * Messages for error cases (non Intel & no suitable microcode).
38 * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
39 * Removed ->release(). Removed exclusive open and status bitmap.
40 * Added microcode_rwsem to serialize read()/write()/ioctl().
41 * Removed global kernel lock usage.
42 * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
43 * Write 0 to 0x8B msr and then cpuid before reading revision,
44 * so that it works even if there were no update done by the
45 * BIOS. Otherwise, reading from 0x8B gives junk (which happened
46 * to be 0 on my machine which is why it worked even when I
47 * disabled update by the BIOS)
48 * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
49 * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
50 * Tigran Aivazian <tigran@veritas.com>
51 * Intel Pentium 4 processor support and bugfixes.
52 * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
53 * Bugfix for HT (Hyper-Threading) enabled processors
54 * whereby processor resources are shared by all logical processors
55 * in a single CPU package.
56 * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
57 * Tigran Aivazian <tigran@veritas.com>,
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58 * Serialize updates as required on HT processors due to
59 * speculative nature of implementation.
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60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
61 * Fix the panic when writing zero-length microcode chunk.
62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
63 * Jun Nakajima <jun.nakajima@intel.com>
64 * Support for the microcode updates in the new format.
65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
67 * because we no longer hold a copy of applied microcode
68 * in kernel memory.
69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
71 * Thanks to Stuart Swales for pointing out this bug.
72 */
f58e1f53
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73
74#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
75
4bae1967 76#include <linux/platform_device.h>
4bae1967 77#include <linux/miscdevice.h>
871b72dd 78#include <linux/capability.h>
4bae1967
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79#include <linux/kernel.h>
80#include <linux/module.h>
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81#include <linux/mutex.h>
82#include <linux/cpu.h>
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83#include <linux/fs.h>
84#include <linux/mm.h>
3e135d88 85
3e135d88 86#include <asm/microcode.h>
4bae1967 87#include <asm/processor.h>
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88
89MODULE_DESCRIPTION("Microcode Update Driver");
90MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
91MODULE_LICENSE("GPL");
92
4bae1967 93#define MICROCODE_VERSION "2.00"
3e135d88 94
4bae1967 95static struct microcode_ops *microcode_ops;
3e135d88 96
871b72dd
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97/*
98 * Synchronization.
99 *
100 * All non cpu-hotplug-callback call sites use:
101 *
102 * - microcode_mutex to synchronize with each other;
103 * - get/put_online_cpus() to synchronize with
104 * the cpu-hotplug-callback call sites.
105 *
106 * We guarantee that only a single cpu is being
107 * updated at any particular moment of time.
108 */
d45de409 109static DEFINE_MUTEX(microcode_mutex);
3e135d88 110
4bae1967 111struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
8d86f390 112EXPORT_SYMBOL_GPL(ucode_cpu_info);
3e135d88 113
871b72dd
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114/*
115 * Operations that are run on a target cpu:
116 */
117
118struct cpu_info_ctx {
119 struct cpu_signature *cpu_sig;
120 int err;
121};
122
123static void collect_cpu_info_local(void *arg)
124{
125 struct cpu_info_ctx *ctx = arg;
126
127 ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(),
128 ctx->cpu_sig);
129}
130
131static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig)
132{
133 struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 };
134 int ret;
135
136 ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1);
137 if (!ret)
138 ret = ctx.err;
139
140 return ret;
141}
142
143static int collect_cpu_info(int cpu)
144{
145 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
146 int ret;
147
148 memset(uci, 0, sizeof(*uci));
149
150 ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig);
151 if (!ret)
152 uci->valid = 1;
153
154 return ret;
155}
156
157struct apply_microcode_ctx {
158 int err;
159};
160
161static void apply_microcode_local(void *arg)
162{
163 struct apply_microcode_ctx *ctx = arg;
164
165 ctx->err = microcode_ops->apply_microcode(smp_processor_id());
166}
167
168static int apply_microcode_on_target(int cpu)
169{
170 struct apply_microcode_ctx ctx = { .err = 0 };
171 int ret;
172
173 ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1);
174 if (!ret)
175 ret = ctx.err;
176
177 return ret;
178}
179
3e135d88 180#ifdef CONFIG_MICROCODE_OLD_INTERFACE
a0a29b62 181static int do_microcode_update(const void __user *buf, size_t size)
3e135d88 182{
3e135d88 183 int error = 0;
3e135d88 184 int cpu;
6f66cbc6 185
a0a29b62
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186 for_each_online_cpu(cpu) {
187 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
871b72dd 188 enum ucode_state ustate;
a0a29b62
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189
190 if (!uci->valid)
191 continue;
6f66cbc6 192
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193 ustate = microcode_ops->request_microcode_user(cpu, buf, size);
194 if (ustate == UCODE_ERROR) {
195 error = -1;
196 break;
197 } else if (ustate == UCODE_OK)
198 apply_microcode_on_target(cpu);
3e135d88 199 }
871b72dd 200
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201 return error;
202}
203
3f10940e 204static int microcode_open(struct inode *inode, struct file *file)
3e135d88 205{
3f10940e 206 return capable(CAP_SYS_RAWIO) ? nonseekable_open(inode, file) : -EPERM;
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207}
208
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209static ssize_t microcode_write(struct file *file, const char __user *buf,
210 size_t len, loff_t *ppos)
3e135d88 211{
871b72dd 212 ssize_t ret = -EINVAL;
3e135d88 213
4481374c 214 if ((len >> PAGE_SHIFT) > totalram_pages) {
f58e1f53 215 pr_err("too much data (max %ld pages)\n", totalram_pages);
871b72dd 216 return ret;
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217 }
218
219 get_online_cpus();
220 mutex_lock(&microcode_mutex);
221
871b72dd 222 if (do_microcode_update(buf, len) == 0)
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223 ret = (ssize_t)len;
224
225 mutex_unlock(&microcode_mutex);
226 put_online_cpus();
227
228 return ret;
229}
230
231static const struct file_operations microcode_fops = {
871b72dd
DA
232 .owner = THIS_MODULE,
233 .write = microcode_write,
234 .open = microcode_open,
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235};
236
237static struct miscdevice microcode_dev = {
871b72dd
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238 .minor = MICROCODE_MINOR,
239 .name = "microcode",
e454cea2 240 .nodename = "cpu/microcode",
871b72dd 241 .fops = &microcode_fops,
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242};
243
d33dcb9e 244static int __init microcode_dev_init(void)
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245{
246 int error;
247
248 error = misc_register(&microcode_dev);
249 if (error) {
f58e1f53 250 pr_err("can't misc_register on minor=%d\n", MICROCODE_MINOR);
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251 return error;
252 }
253
254 return 0;
255}
256
d33dcb9e 257static void microcode_dev_exit(void)
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258{
259 misc_deregister(&microcode_dev);
260}
261
262MODULE_ALIAS_MISCDEV(MICROCODE_MINOR);
578454ff 263MODULE_ALIAS("devname:cpu/microcode");
3e135d88 264#else
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265#define microcode_dev_init() 0
266#define microcode_dev_exit() do { } while (0)
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267#endif
268
269/* fake device for request_firmware */
4bae1967 270static struct platform_device *microcode_pdev;
3e135d88 271
871b72dd 272static int reload_for_cpu(int cpu)
af5c820a 273{
871b72dd 274 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
af5c820a
RR
275 int err = 0;
276
277 mutex_lock(&microcode_mutex);
278 if (uci->valid) {
871b72dd
DA
279 enum ucode_state ustate;
280
281 ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev);
282 if (ustate == UCODE_OK)
283 apply_microcode_on_target(cpu);
284 else
285 if (ustate == UCODE_ERROR)
286 err = -EINVAL;
af5c820a
RR
287 }
288 mutex_unlock(&microcode_mutex);
871b72dd 289
af5c820a
RR
290 return err;
291}
292
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293static ssize_t reload_store(struct sys_device *dev,
294 struct sysdev_attribute *attr,
871b72dd 295 const char *buf, size_t size)
3e135d88 296{
871b72dd 297 unsigned long val;
3e135d88 298 int cpu = dev->id;
871b72dd
DA
299 int ret = 0;
300 char *end;
3e135d88 301
871b72dd 302 val = simple_strtoul(buf, &end, 0);
3e135d88
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303 if (end == buf)
304 return -EINVAL;
871b72dd 305
3e135d88 306 if (val == 1) {
3e135d88 307 get_online_cpus();
af5c820a 308 if (cpu_online(cpu))
871b72dd 309 ret = reload_for_cpu(cpu);
3e135d88 310 put_online_cpus();
3e135d88 311 }
871b72dd
DA
312
313 if (!ret)
314 ret = size;
315
316 return ret;
3e135d88
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317}
318
319static ssize_t version_show(struct sys_device *dev,
320 struct sysdev_attribute *attr, char *buf)
321{
322 struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
323
d45de409 324 return sprintf(buf, "0x%x\n", uci->cpu_sig.rev);
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325}
326
327static ssize_t pf_show(struct sys_device *dev,
328 struct sysdev_attribute *attr, char *buf)
329{
330 struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
331
d45de409 332 return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
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333}
334
335static SYSDEV_ATTR(reload, 0200, NULL, reload_store);
336static SYSDEV_ATTR(version, 0400, version_show, NULL);
337static SYSDEV_ATTR(processor_flags, 0400, pf_show, NULL);
338
339static struct attribute *mc_default_attrs[] = {
340 &attr_reload.attr,
341 &attr_version.attr,
342 &attr_processor_flags.attr,
343 NULL
344};
345
346static struct attribute_group mc_attr_group = {
871b72dd
DA
347 .attrs = mc_default_attrs,
348 .name = "microcode",
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349};
350
871b72dd 351static void microcode_fini_cpu(int cpu)
d45de409
DA
352{
353 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
354
d45de409
DA
355 microcode_ops->microcode_fini_cpu(cpu);
356 uci->valid = 0;
280a9ca5
DA
357}
358
871b72dd 359static enum ucode_state microcode_resume_cpu(int cpu)
d45de409
DA
360{
361 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
362
871b72dd
DA
363 if (!uci->mc)
364 return UCODE_NFOUND;
365
f58e1f53 366 pr_debug("CPU%d updated upon resume\n", cpu);
871b72dd
DA
367 apply_microcode_on_target(cpu);
368
369 return UCODE_OK;
d45de409
DA
370}
371
871b72dd 372static enum ucode_state microcode_init_cpu(int cpu)
d45de409 373{
871b72dd 374 enum ucode_state ustate;
d45de409 375
871b72dd
DA
376 if (collect_cpu_info(cpu))
377 return UCODE_ERROR;
d45de409 378
871b72dd
DA
379 /* --dimm. Trigger a delayed update? */
380 if (system_state != SYSTEM_RUNNING)
381 return UCODE_NFOUND;
d45de409 382
871b72dd 383 ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev);
d45de409 384
871b72dd 385 if (ustate == UCODE_OK) {
f58e1f53 386 pr_debug("CPU%d updated upon init\n", cpu);
871b72dd 387 apply_microcode_on_target(cpu);
d45de409
DA
388 }
389
871b72dd 390 return ustate;
d45de409
DA
391}
392
871b72dd 393static enum ucode_state microcode_update_cpu(int cpu)
d45de409 394{
871b72dd
DA
395 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
396 enum ucode_state ustate;
d45de409 397
2f99f5c8 398 if (uci->valid)
871b72dd
DA
399 ustate = microcode_resume_cpu(cpu);
400 else
401 ustate = microcode_init_cpu(cpu);
d45de409 402
871b72dd 403 return ustate;
d45de409
DA
404}
405
406static int mc_sysdev_add(struct sys_device *sys_dev)
3e135d88
PO
407{
408 int err, cpu = sys_dev->id;
3e135d88
PO
409
410 if (!cpu_online(cpu))
411 return 0;
412
f58e1f53 413 pr_debug("CPU%d added\n", cpu);
3e135d88
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414
415 err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group);
416 if (err)
417 return err;
418
871b72dd
DA
419 if (microcode_init_cpu(cpu) == UCODE_ERROR)
420 err = -EINVAL;
af5c820a
RR
421
422 return err;
3e135d88
PO
423}
424
3e135d88
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425static int mc_sysdev_remove(struct sys_device *sys_dev)
426{
427 int cpu = sys_dev->id;
428
429 if (!cpu_online(cpu))
430 return 0;
431
f58e1f53 432 pr_debug("CPU%d removed\n", cpu);
d45de409 433 microcode_fini_cpu(cpu);
3e135d88
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434 sysfs_remove_group(&sys_dev->kobj, &mc_attr_group);
435 return 0;
436}
437
438static int mc_sysdev_resume(struct sys_device *dev)
439{
440 int cpu = dev->id;
871b72dd 441 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
3e135d88
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442
443 if (!cpu_online(cpu))
444 return 0;
a1c75cc5 445
871b72dd
DA
446 /*
447 * All non-bootup cpus are still disabled,
448 * so only CPU 0 will apply ucode here.
449 *
450 * Moreover, there can be no concurrent
451 * updates from any other places at this point.
452 */
453 WARN_ON(cpu != 0);
454
455 if (uci->valid && uci->mc)
456 microcode_ops->apply_microcode(cpu);
457
3e135d88
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458 return 0;
459}
460
461static struct sysdev_driver mc_sysdev_driver = {
871b72dd
DA
462 .add = mc_sysdev_add,
463 .remove = mc_sysdev_remove,
464 .resume = mc_sysdev_resume,
3e135d88
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465};
466
467static __cpuinit int
468mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu)
469{
470 unsigned int cpu = (unsigned long)hcpu;
471 struct sys_device *sys_dev;
472
473 sys_dev = get_cpu_sysdev(cpu);
474 switch (action) {
3e135d88 475 case CPU_ONLINE:
3e135d88 476 case CPU_ONLINE_FROZEN:
871b72dd 477 microcode_update_cpu(cpu);
d45de409 478 case CPU_DOWN_FAILED:
3e135d88 479 case CPU_DOWN_FAILED_FROZEN:
f58e1f53 480 pr_debug("CPU%d added\n", cpu);
3e135d88 481 if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group))
f58e1f53 482 pr_err("Failed to create group for CPU%d\n", cpu);
3e135d88
PO
483 break;
484 case CPU_DOWN_PREPARE:
3e135d88
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485 case CPU_DOWN_PREPARE_FROZEN:
486 /* Suspend is in progress, only remove the interface */
487 sysfs_remove_group(&sys_dev->kobj, &mc_attr_group);
f58e1f53 488 pr_debug("CPU%d removed\n", cpu);
d45de409
DA
489 break;
490 case CPU_DEAD:
491 case CPU_UP_CANCELED_FROZEN:
492 /* The CPU refused to come up during a system resume */
493 microcode_fini_cpu(cpu);
3e135d88
PO
494 break;
495 }
496 return NOTIFY_OK;
497}
498
499static struct notifier_block __refdata mc_cpu_notifier = {
4bae1967 500 .notifier_call = mc_cpu_callback,
3e135d88
PO
501};
502
18dbc916 503static int __init microcode_init(void)
3e135d88 504{
18dbc916 505 struct cpuinfo_x86 *c = &cpu_data(0);
3e135d88
PO
506 int error;
507
18dbc916
DA
508 if (c->x86_vendor == X86_VENDOR_INTEL)
509 microcode_ops = init_intel_microcode();
82b07865 510 else if (c->x86_vendor == X86_VENDOR_AMD)
18dbc916 511 microcode_ops = init_amd_microcode();
8d86f390 512
18dbc916 513 if (!microcode_ops) {
f58e1f53 514 pr_err("no support for this CPU vendor\n");
18dbc916
DA
515 return -ENODEV;
516 }
3e135d88 517
3e135d88
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518 microcode_pdev = platform_device_register_simple("microcode", -1,
519 NULL, 0);
520 if (IS_ERR(microcode_pdev)) {
521 microcode_dev_exit();
522 return PTR_ERR(microcode_pdev);
523 }
524
525 get_online_cpus();
871b72dd
DA
526 mutex_lock(&microcode_mutex);
527
3e135d88 528 error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver);
871b72dd
DA
529
530 mutex_unlock(&microcode_mutex);
3e135d88 531 put_online_cpus();
871b72dd 532
3e135d88 533 if (error) {
3e135d88
PO
534 platform_device_unregister(microcode_pdev);
535 return error;
536 }
537
871b72dd
DA
538 error = microcode_dev_init();
539 if (error)
540 return error;
541
3e135d88 542 register_hotcpu_notifier(&mc_cpu_notifier);
8d86f390 543
871b72dd 544 pr_info("Microcode Update Driver: v" MICROCODE_VERSION
f58e1f53 545 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n");
8d86f390 546
3e135d88
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547 return 0;
548}
871b72dd 549module_init(microcode_init);
3e135d88 550
18dbc916 551static void __exit microcode_exit(void)
3e135d88
PO
552{
553 microcode_dev_exit();
554
555 unregister_hotcpu_notifier(&mc_cpu_notifier);
556
557 get_online_cpus();
871b72dd
DA
558 mutex_lock(&microcode_mutex);
559
3e135d88 560 sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver);
871b72dd
DA
561
562 mutex_unlock(&microcode_mutex);
3e135d88
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563 put_online_cpus();
564
565 platform_device_unregister(microcode_pdev);
3e135d88 566
8d86f390
PO
567 microcode_ops = NULL;
568
871b72dd 569 pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n");
8d86f390 570}
18dbc916 571module_exit(microcode_exit);