[net-next-2.6.git] / arch / x86 / kernel / cpu / mcheck / therm_throt.c

/*
 * Thermal throttle event support code (such as syslog messaging and rate
 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
 *
 * This allows consistent reporting of CPU thermal throttle events.
 *
 * Maintains a counter in /sys that keeps track of the number of thermal
 * events, such that the user knows how bad the thermal problem might be
 * (since the logging to syslog and mcelog is rate limited).
 *
 * Author: Dmitriy Zavin (dmitriyz@google.com)
 *
 * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
 *          Inspired by Ross Biro's and Al Borchers' counter code.
 */
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/percpu.h>
#include <linux/sysdev.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/cpu.h>

#include <asm/processor.h>
#include <asm/system.h>
#include <asm/apic.h>
#include <asm/idle.h>
#include <asm/mce.h>
#include <asm/msr.h>

/* How long to wait between reporting thermal events */
#define CHECK_INTERVAL		(300 * HZ)

#define THERMAL_THROTTLING_EVENT	0
#define POWER_LIMIT_EVENT		1

/*
 * Current thermal event state:
 */
struct _thermal_state {
	bool			new_event;
	int			event;
	u64			next_check;
	unsigned long		count;
	unsigned long		last_count;
};

struct thermal_state {
	struct _thermal_state core_throttle;
	struct _thermal_state core_power_limit;
	struct _thermal_state package_throttle;
	struct _thermal_state package_power_limit;
};

static DEFINE_PER_CPU(struct thermal_state, thermal_state);

static atomic_t therm_throt_en	= ATOMIC_INIT(0);

static u32 lvtthmr_init __read_mostly;

#ifdef CONFIG_SYSFS
#define define_therm_throt_sysdev_one_ro(_name)				\
	static SYSDEV_ATTR(_name, 0444,					\
			   therm_throt_sysdev_show_##_name,		\
				   NULL)				\

#define define_therm_throt_sysdev_show_func(event, name)		\
									\
static ssize_t therm_throt_sysdev_show_##event##_##name(		\
			struct sys_device *dev,				\
			struct sysdev_attribute *attr,			\
			char *buf)					\
{									\
	unsigned int cpu = dev->id;					\
	ssize_t ret;							\
									\
	preempt_disable();	/* CPU hotplug */			\
	if (cpu_online(cpu)) {						\
		ret = sprintf(buf, "%lu\n",				\
			      per_cpu(thermal_state, cpu).event.name);	\
	} else								\
		ret = 0;						\
	preempt_enable();						\
									\
	return ret;							\
}

define_therm_throt_sysdev_show_func(core_throttle, count);
define_therm_throt_sysdev_one_ro(core_throttle_count);

define_therm_throt_sysdev_show_func(core_power_limit, count);
define_therm_throt_sysdev_one_ro(core_power_limit_count);

define_therm_throt_sysdev_show_func(package_throttle, count);
define_therm_throt_sysdev_one_ro(package_throttle_count);

define_therm_throt_sysdev_show_func(package_power_limit, count);
define_therm_throt_sysdev_one_ro(package_power_limit_count);

static struct attribute *thermal_throttle_attrs[] = {
	&attr_core_throttle_count.attr,
	NULL
};

static struct attribute_group thermal_attr_group = {
	.attrs	= thermal_throttle_attrs,
	.name	= "thermal_throttle"
};
#endif /* CONFIG_SYSFS */

#define CORE_LEVEL	0
#define PACKAGE_LEVEL	1

/***
 * therm_throt_process - Process thermal throttling event from interrupt
 * @curr: Whether the condition is current or not (boolean), since the
 *        thermal interrupt normally gets called both when the thermal
 *        event begins and once the event has ended.
 *
 * This function is called by the thermal interrupt after the
 * IRQ has been acknowledged.
 *
 * It will take care of rate limiting and printing messages to the syslog.
 *
 * Returns: 0 : Event should NOT be further logged, i.e. still in
 *              "timeout" from previous log message.
 *          1 : Event should be logged further, and a message has been
 *              printed to the syslog.
 */
static int therm_throt_process(bool new_event, int event, int level)
{
	struct _thermal_state *state;
	unsigned int this_cpu = smp_processor_id();
	bool old_event;
	u64 now;
	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);

	now = get_jiffies_64();
	if (level == CORE_LEVEL) {
		if (event == THERMAL_THROTTLING_EVENT)
			state = &pstate->core_throttle;
		else if (event == POWER_LIMIT_EVENT)
			state = &pstate->core_power_limit;
		else
			 return 0;
	} else if (level == PACKAGE_LEVEL) {
		if (event == THERMAL_THROTTLING_EVENT)
			state = &pstate->package_throttle;
		else if (event == POWER_LIMIT_EVENT)
			state = &pstate->package_power_limit;
		else
			return 0;
	} else
		return 0;

	old_event = state->new_event;
	state->new_event = new_event;

	if (new_event)
		state->count++;

	if (time_before64(now, state->next_check) &&
			state->count != state->last_count)
		return 0;

	state->next_check = now + CHECK_INTERVAL;
	state->last_count = state->count;

	/* if we just entered the thermal event */
	if (new_event) {
		if (event == THERMAL_THROTTLING_EVENT)
			printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package",
				state->count);
		else
			printk(KERN_CRIT "CPU%d: %s power limit notification (total events = %lu)\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package",
				state->count);

		add_taint(TAINT_MACHINE_CHECK);
		return 1;
	}
	if (old_event) {
		if (event == THERMAL_THROTTLING_EVENT)
			printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package");
		else
			printk(KERN_INFO "CPU%d: %s power limit normal\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package");
		return 1;
	}

	return 0;
}

#ifdef CONFIG_SYSFS
/* Add/Remove thermal_throttle interface for CPU device: */
static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev,
				unsigned int cpu)
{
	int err;
	struct cpuinfo_x86 *c = &cpu_data(cpu);

	err = sysfs_create_group(&sys_dev->kobj, &thermal_attr_group);
	if (err)
		return err;

	if (cpu_has(c, X86_FEATURE_PLN))
		err = sysfs_add_file_to_group(&sys_dev->kobj,
					      &attr_core_power_limit_count.attr,
					      thermal_attr_group.name);
	if (cpu_has(c, X86_FEATURE_PTS))
		err = sysfs_add_file_to_group(&sys_dev->kobj,
					      &attr_package_throttle_count.attr,
					      thermal_attr_group.name);
		if (cpu_has(c, X86_FEATURE_PLN))
			err = sysfs_add_file_to_group(&sys_dev->kobj,
					&attr_package_power_limit_count.attr,
					thermal_attr_group.name);

	return err;
}

static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
{
	sysfs_remove_group(&sys_dev->kobj, &thermal_attr_group);
}

/* Mutex protecting device creation against CPU hotplug: */
static DEFINE_MUTEX(therm_cpu_lock);

/* Get notified when a cpu comes on/off. Be hotplug friendly. */
static __cpuinit int
thermal_throttle_cpu_callback(struct notifier_block *nfb,
			      unsigned long action,
			      void *hcpu)
{
	unsigned int cpu = (unsigned long)hcpu;
	struct sys_device *sys_dev;
	int err = 0;

	sys_dev = get_cpu_sysdev(cpu);

	switch (action) {
	case CPU_UP_PREPARE:
	case CPU_UP_PREPARE_FROZEN:
		mutex_lock(&therm_cpu_lock);
		err = thermal_throttle_add_dev(sys_dev, cpu);
		mutex_unlock(&therm_cpu_lock);
		WARN_ON(err);
		break;
	case CPU_UP_CANCELED:
	case CPU_UP_CANCELED_FROZEN:
	case CPU_DEAD:
	case CPU_DEAD_FROZEN:
		mutex_lock(&therm_cpu_lock);
		thermal_throttle_remove_dev(sys_dev);
		mutex_unlock(&therm_cpu_lock);
		break;
	}
	return notifier_from_errno(err);
}

static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
{
	.notifier_call = thermal_throttle_cpu_callback,
};

static __init int thermal_throttle_init_device(void)
{
	unsigned int cpu = 0;
	int err;

	if (!atomic_read(&therm_throt_en))
		return 0;

	register_hotcpu_notifier(&thermal_throttle_cpu_notifier);

#ifdef CONFIG_HOTPLUG_CPU
	mutex_lock(&therm_cpu_lock);
#endif
	/* connect live CPUs to sysfs */
	for_each_online_cpu(cpu) {
		err = thermal_throttle_add_dev(get_cpu_sysdev(cpu), cpu);
		WARN_ON(err);
	}
#ifdef CONFIG_HOTPLUG_CPU
	mutex_unlock(&therm_cpu_lock);
#endif

	return 0;
}
device_initcall(thermal_throttle_init_device);

#endif /* CONFIG_SYSFS */

/*
 * Set up the most two significant bit to notify mce log that this thermal
 * event type.
 * This is a temp solution. May be changed in the future with mce log
 * infrasture.
 */
#define CORE_THROTTLED		(0)
#define CORE_POWER_LIMIT	((__u64)1 << 62)
#define PACKAGE_THROTTLED	((__u64)2 << 62)
#define PACKAGE_POWER_LIMIT	((__u64)3 << 62)

/* Thermal transition interrupt handler */
static void intel_thermal_interrupt(void)
{
	__u64 msr_val;
	struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());

	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);

	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
				THERMAL_THROTTLING_EVENT,
				CORE_LEVEL) != 0)
		mce_log_therm_throt_event(CORE_THROTTLED | msr_val);

	if (cpu_has(c, X86_FEATURE_PLN))
		if (therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
					POWER_LIMIT_EVENT,
					CORE_LEVEL) != 0)
			mce_log_therm_throt_event(CORE_POWER_LIMIT | msr_val);

	if (cpu_has(c, X86_FEATURE_PTS)) {
		rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
		if (therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
					THERMAL_THROTTLING_EVENT,
					PACKAGE_LEVEL) != 0)
			mce_log_therm_throt_event(PACKAGE_THROTTLED | msr_val);
		if (cpu_has(c, X86_FEATURE_PLN))
			if (therm_throt_process(msr_val &
					PACKAGE_THERM_STATUS_POWER_LIMIT,
					POWER_LIMIT_EVENT,
					PACKAGE_LEVEL) != 0)
				mce_log_therm_throt_event(PACKAGE_POWER_LIMIT
							  | msr_val);
	}
}

static void unexpected_thermal_interrupt(void)
{
	printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",
			smp_processor_id());
	add_taint(TAINT_MACHINE_CHECK);
}

static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;

asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
{
	exit_idle();
	irq_enter();
	inc_irq_stat(irq_thermal_count);
	smp_thermal_vector();
	irq_exit();
	/* Ack only at the end to avoid potential reentry */
	ack_APIC_irq();
}

/* Thermal monitoring depends on APIC, ACPI and clock modulation */
static int intel_thermal_supported(struct cpuinfo_x86 *c)
{
	if (!cpu_has_apic)
		return 0;
	if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
		return 0;
	return 1;
}

void __init mcheck_intel_therm_init(void)
{
	/*
	 * This function is only called on boot CPU. Save the init thermal
	 * LVT value on BSP and use that value to restore APs' thermal LVT
	 * entry BIOS programmed later
	 */
	if (intel_thermal_supported(&boot_cpu_data))
		lvtthmr_init = apic_read(APIC_LVTTHMR);
}

void intel_init_thermal(struct cpuinfo_x86 *c)
{
	unsigned int cpu = smp_processor_id();
	int tm2 = 0;
	u32 l, h;

	if (!intel_thermal_supported(c))
		return;

	/*
	 * First check if its enabled already, in which case there might
	 * be some SMM goo which handles it, so we can't even put a handler
	 * since it might be delivered via SMI already:
	 */
	rdmsr(MSR_IA32_MISC_ENABLE, l, h);

	/*
	 * The initial value of thermal LVT entries on all APs always reads
	 * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
	 * sequence to them and LVT registers are reset to 0s except for
	 * the mask bits which are set to 1s when APs receive INIT IPI.
	 * Always restore the value that BIOS has programmed on AP based on
	 * BSP's info we saved since BIOS is always setting the same value
	 * for all threads/cores
	 */
	apic_write(APIC_LVTTHMR, lvtthmr_init);

	h = lvtthmr_init;

	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
		printk(KERN_DEBUG
		       "CPU%d: Thermal monitoring handled by SMI\n", cpu);
		return;
	}

	/* Check whether a vector already exists */
	if (h & APIC_VECTOR_MASK) {
		printk(KERN_DEBUG
		       "CPU%d: Thermal LVT vector (%#x) already installed\n",
		       cpu, (h & APIC_VECTOR_MASK));
		return;
	}

	/* early Pentium M models use different method for enabling TM2 */
	if (cpu_has(c, X86_FEATURE_TM2)) {
		if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
			rdmsr(MSR_THERM2_CTL, l, h);
			if (l & MSR_THERM2_CTL_TM_SELECT)
				tm2 = 1;
		} else if (l & MSR_IA32_MISC_ENABLE_TM2)
			tm2 = 1;
	}

	/* We'll mask the thermal vector in the lapic till we're ready: */
	h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
	apic_write(APIC_LVTTHMR, h);

	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
	if (cpu_has(c, X86_FEATURE_PLN))
		wrmsr(MSR_IA32_THERM_INTERRUPT,
		      l | (THERM_INT_LOW_ENABLE
			| THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
	else
		wrmsr(MSR_IA32_THERM_INTERRUPT,
		      l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);

	if (cpu_has(c, X86_FEATURE_PTS)) {
		rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
		if (cpu_has(c, X86_FEATURE_PLN))
			wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
			      l | (PACKAGE_THERM_INT_LOW_ENABLE
				| PACKAGE_THERM_INT_HIGH_ENABLE
				| PACKAGE_THERM_INT_PLN_ENABLE), h);
		else
			wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
			      l | (PACKAGE_THERM_INT_LOW_ENABLE
				| PACKAGE_THERM_INT_HIGH_ENABLE), h);
	}

	smp_thermal_vector = intel_thermal_interrupt;

	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);

	/* Unmask the thermal vector: */
	l = apic_read(APIC_LVTTHMR);
	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);

	printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
		       tm2 ? "TM2" : "TM1");

	/* enable thermal throttle processing */
	atomic_set(&therm_throt_en, 1);
}
Commit	Line	Data
15d5f839	1	/*
3222b36f DZ	2	* Thermal throttle event support code (such as syslog messaging and rate
3222b36f DZ	3	* limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
cb6f3c15	4	*
3222b36f DZ	5	* This allows consistent reporting of CPU thermal throttle events.
	6	*
	7	* Maintains a counter in /sys that keeps track of the number of thermal
	8	* events, such that the user knows how bad the thermal problem might be
	9	* (since the logging to syslog and mcelog is rate limited).
15d5f839 DZ	10	*
	11	* Author: Dmitriy Zavin (dmitriyz@google.com)
	12	*
	13	* Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
3222b36f	14	* Inspired by Ross Biro's and Al Borchers' counter code.
15d5f839	15	*/
a65c88dd	16	#include <linux/interrupt.h>
cb6f3c15 IM	17	#include <linux/notifier.h>
cb6f3c15 IM	18	#include <linux/jiffies.h>
895287c0	19	#include <linux/kernel.h>
15d5f839	20	#include <linux/percpu.h>
3222b36f	21	#include <linux/sysdev.h>
895287c0 HS	22	#include <linux/types.h>
	23	#include <linux/init.h>
	24	#include <linux/smp.h>
15d5f839	25	#include <linux/cpu.h>
cb6f3c15	26
895287c0 HS	27	#include <asm/processor.h>
	28	#include <asm/system.h>
	29	#include <asm/apic.h>
a65c88dd HS	30	#include <asm/idle.h>
a65c88dd HS	31	#include <asm/mce.h>
895287c0	32	#include <asm/msr.h>
15d5f839 DZ	33
15d5f839 DZ	34	/* How long to wait between reporting thermal events */
cb6f3c15	35	#define CHECK_INTERVAL (300 * HZ)
15d5f839	36
0199114c FY	37	#define THERMAL_THROTTLING_EVENT 0
	38	#define POWER_LIMIT_EVENT 1
	39
39676840	40	/*
0199114c	41	* Current thermal event state:
39676840	42	*/
55d435a2	43	struct _thermal_state {
0199114c FY	44	bool new_event;
0199114c FY	45	int event;
39676840	46	u64 next_check;
0199114c FY	47	unsigned long count;
0199114c FY	48	unsigned long last_count;
39676840	49	};
cb6f3c15	50
55d435a2	51	struct thermal_state {
0199114c FY	52	struct _thermal_state core_throttle;
	53	struct _thermal_state core_power_limit;
	54	struct _thermal_state package_throttle;
	55	struct _thermal_state package_power_limit;
55d435a2 FY	56	};
55d435a2 FY	57
39676840 IM	58	static DEFINE_PER_CPU(struct thermal_state, thermal_state);
	59
	60	static atomic_t therm_throt_en = ATOMIC_INIT(0);
3222b36f	61
a2202aa2 YW	62	static u32 lvtthmr_init __read_mostly;
a2202aa2 YW	63
3222b36f	64	#ifdef CONFIG_SYSFS
cb6f3c15	65	#define define_therm_throt_sysdev_one_ro(_name) \
55d435a2 FY	66	static SYSDEV_ATTR(_name, 0444, \
	67	therm_throt_sysdev_show_##_name, \
	68	NULL) \
cb6f3c15	69
0199114c	70	#define define_therm_throt_sysdev_show_func(event, name) \
39676840	71	\
0199114c	72	static ssize_t therm_throt_sysdev_show_##event##_##name( \
39676840 IM	73	struct sys_device *dev, \
	74	struct sysdev_attribute *attr, \
	75	char *buf) \
cb6f3c15 IM	76	{ \
	77	unsigned int cpu = dev->id; \
	78	ssize_t ret; \
	79	\
	80	preempt_disable(); /* CPU hotplug */ \
55d435a2	81	if (cpu_online(cpu)) { \
cb6f3c15	82	ret = sprintf(buf, "%lu\n", \
0199114c	83	per_cpu(thermal_state, cpu).event.name); \
55d435a2	84	} else \
cb6f3c15 IM	85	ret = 0; \
	86	preempt_enable(); \
	87	\
	88	return ret; \
3222b36f DZ	89	}
3222b36f DZ	90
0199114c	91	define_therm_throt_sysdev_show_func(core_throttle, count);
55d435a2 FY	92	define_therm_throt_sysdev_one_ro(core_throttle_count);
55d435a2 FY	93
0199114c FY	94	define_therm_throt_sysdev_show_func(core_power_limit, count);
	95	define_therm_throt_sysdev_one_ro(core_power_limit_count);
	96
	97	define_therm_throt_sysdev_show_func(package_throttle, count);
55d435a2	98	define_therm_throt_sysdev_one_ro(package_throttle_count);
3222b36f	99
0199114c FY	100	define_therm_throt_sysdev_show_func(package_power_limit, count);
	101	define_therm_throt_sysdev_one_ro(package_power_limit_count);
	102
3222b36f	103	static struct attribute *thermal_throttle_attrs[] = {
55d435a2	104	&attr_core_throttle_count.attr,
3222b36f DZ	105	NULL
	106	};
	107
0199114c	108	static struct attribute_group thermal_attr_group = {
cb6f3c15 IM	109	.attrs = thermal_throttle_attrs,
cb6f3c15 IM	110	.name = "thermal_throttle"
3222b36f DZ	111	};
3222b36f DZ	112	#endif /* CONFIG_SYSFS */
15d5f839	113
0199114c FY	114	#define CORE_LEVEL 0
	115	#define PACKAGE_LEVEL 1
	116
15d5f839	117	/***
3222b36f	118	* therm_throt_process - Process thermal throttling event from interrupt
15d5f839 DZ	119	* @curr: Whether the condition is current or not (boolean), since the
	120	* thermal interrupt normally gets called both when the thermal
	121	* event begins and once the event has ended.
	122	*
3222b36f	123	* This function is called by the thermal interrupt after the
15d5f839 DZ	124	* IRQ has been acknowledged.
	125	*
	126	* It will take care of rate limiting and printing messages to the syslog.
	127	*
	128	* Returns: 0 : Event should NOT be further logged, i.e. still in
	129	* "timeout" from previous log message.
	130	* 1 : Event should be logged further, and a message has been
	131	* printed to the syslog.
	132	*/
0199114c	133	static int therm_throt_process(bool new_event, int event, int level)
15d5f839	134	{
55d435a2	135	struct _thermal_state *state;
0199114c FY	136	unsigned int this_cpu = smp_processor_id();
0199114c FY	137	bool old_event;
39676840	138	u64 now;
0199114c	139	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
39676840	140
39676840	141	now = get_jiffies_64();
0199114c FY	142	if (level == CORE_LEVEL) {
	143	if (event == THERMAL_THROTTLING_EVENT)
	144	state = &pstate->core_throttle;
	145	else if (event == POWER_LIMIT_EVENT)
	146	state = &pstate->core_power_limit;
	147	else
	148	return 0;
	149	} else if (level == PACKAGE_LEVEL) {
	150	if (event == THERMAL_THROTTLING_EVENT)
	151	state = &pstate->package_throttle;
	152	else if (event == POWER_LIMIT_EVENT)
	153	state = &pstate->package_power_limit;
	154	else
	155	return 0;
	156	} else
	157	return 0;
39676840	158
0199114c FY	159	old_event = state->new_event;
0199114c FY	160	state->new_event = new_event;
15d5f839	161
0199114c FY	162	if (new_event)
0199114c FY	163	state->count++;
3222b36f	164
b417c9fd	165	if (time_before64(now, state->next_check) &&
0199114c	166	state->count != state->last_count)
15d5f839 DZ	167	return 0;
15d5f839 DZ	168
39676840	169	state->next_check = now + CHECK_INTERVAL;
0199114c	170	state->last_count = state->count;
15d5f839 DZ	171
15d5f839 DZ	172	/* if we just entered the thermal event */
0199114c FY	173	if (new_event) {
	174	if (event == THERMAL_THROTTLING_EVENT)
	175	printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
	176	this_cpu,
	177	level == CORE_LEVEL ? "Core" : "Package",
	178	state->count);
	179	else
	180	printk(KERN_CRIT "CPU%d: %s power limit notification (total events = %lu)\n",
	181	this_cpu,
	182	level == CORE_LEVEL ? "Core" : "Package",
	183	state->count);
3222b36f	184
15d5f839	185	add_taint(TAINT_MACHINE_CHECK);
4e5c25d4 HD	186	return 1;
4e5c25d4 HD	187	}
0199114c FY	188	if (old_event) {
	189	if (event == THERMAL_THROTTLING_EVENT)
	190	printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
	191	this_cpu,
	192	level == CORE_LEVEL ? "Core" : "Package");
	193	else
	194	printk(KERN_INFO "CPU%d: %s power limit normal\n",
	195	this_cpu,
	196	level == CORE_LEVEL ? "Core" : "Package");
4e5c25d4	197	return 1;
15d5f839 DZ	198	}
15d5f839 DZ	199
4e5c25d4	200	return 0;
15d5f839	201	}
3222b36f DZ	202
3222b36f DZ	203	#ifdef CONFIG_SYSFS
cb6f3c15	204	/* Add/Remove thermal_throttle interface for CPU device: */
51e3c1b5 SS	205	static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev,
51e3c1b5 SS	206	unsigned int cpu)
3222b36f	207	{
55d435a2	208	int err;
51e3c1b5	209	struct cpuinfo_x86 *c = &cpu_data(cpu);
55d435a2	210
0199114c	211	err = sysfs_create_group(&sys_dev->kobj, &thermal_attr_group);
55d435a2 FY	212	if (err)
	213	return err;
	214
0199114c FY	215	if (cpu_has(c, X86_FEATURE_PLN))
	216	err = sysfs_add_file_to_group(&sys_dev->kobj,
	217	&attr_core_power_limit_count.attr,
	218	thermal_attr_group.name);
55d435a2 FY	219	if (cpu_has(c, X86_FEATURE_PTS))
	220	err = sysfs_add_file_to_group(&sys_dev->kobj,
	221	&attr_package_throttle_count.attr,
0199114c FY	222	thermal_attr_group.name);
	223	if (cpu_has(c, X86_FEATURE_PLN))
	224	err = sysfs_add_file_to_group(&sys_dev->kobj,
	225	&attr_package_power_limit_count.attr,
	226	thermal_attr_group.name);
55d435a2 FY	227
55d435a2 FY	228	return err;
3222b36f DZ	229	}
3222b36f DZ	230
6569345a	231	static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
3222b36f	232	{
0199114c	233	sysfs_remove_group(&sys_dev->kobj, &thermal_attr_group);
3222b36f DZ	234	}
3222b36f DZ	235
cb6f3c15	236	/* Mutex protecting device creation against CPU hotplug: */
3222b36f DZ	237	static DEFINE_MUTEX(therm_cpu_lock);
	238
	239	/* Get notified when a cpu comes on/off. Be hotplug friendly. */
cb6f3c15 IM	240	static __cpuinit int
	241	thermal_throttle_cpu_callback(struct notifier_block *nfb,
	242	unsigned long action,
	243	void *hcpu)
3222b36f DZ	244	{
	245	unsigned int cpu = (unsigned long)hcpu;
	246	struct sys_device *sys_dev;
c7e38a9c	247	int err = 0;
3222b36f DZ	248
3222b36f DZ	249	sys_dev = get_cpu_sysdev(cpu);
cb6f3c15	250
3222b36f	251	switch (action) {
c7e38a9c AM	252	case CPU_UP_PREPARE:
c7e38a9c AM	253	case CPU_UP_PREPARE_FROZEN:
38ef6d19	254	mutex_lock(&therm_cpu_lock);
51e3c1b5	255	err = thermal_throttle_add_dev(sys_dev, cpu);
38ef6d19	256	mutex_unlock(&therm_cpu_lock);
6569345a	257	WARN_ON(err);
3222b36f	258	break;
c7e38a9c AM	259	case CPU_UP_CANCELED:
c7e38a9c AM	260	case CPU_UP_CANCELED_FROZEN:
3222b36f	261	case CPU_DEAD:
8bb78442	262	case CPU_DEAD_FROZEN:
38ef6d19	263	mutex_lock(&therm_cpu_lock);
3222b36f	264	thermal_throttle_remove_dev(sys_dev);
38ef6d19	265	mutex_unlock(&therm_cpu_lock);
3222b36f DZ	266	break;
3222b36f DZ	267	}
a94247e7	268	return notifier_from_errno(err);
3222b36f DZ	269	}
3222b36f DZ	270
25d1b516	271	static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
3222b36f DZ	272	{
	273	.notifier_call = thermal_throttle_cpu_callback,
	274	};
3222b36f DZ	275
	276	static __init int thermal_throttle_init_device(void)
	277	{
	278	unsigned int cpu = 0;
6569345a	279	int err;
3222b36f DZ	280
	281	if (!atomic_read(&therm_throt_en))
	282	return 0;
	283
	284	register_hotcpu_notifier(&thermal_throttle_cpu_notifier);
	285
	286	#ifdef CONFIG_HOTPLUG_CPU
	287	mutex_lock(&therm_cpu_lock);
	288	#endif
	289	/* connect live CPUs to sysfs */
6569345a	290	for_each_online_cpu(cpu) {
51e3c1b5	291	err = thermal_throttle_add_dev(get_cpu_sysdev(cpu), cpu);
6569345a SH	292	WARN_ON(err);
6569345a SH	293	}
3222b36f DZ	294	#ifdef CONFIG_HOTPLUG_CPU
	295	mutex_unlock(&therm_cpu_lock);
	296	#endif
	297
	298	return 0;
	299	}
3222b36f	300	device_initcall(thermal_throttle_init_device);
a65c88dd	301
3222b36f	302	#endif /* CONFIG_SYSFS */
a65c88dd	303
0199114c FY	304	/*
	305	* Set up the most two significant bit to notify mce log that this thermal
	306	* event type.
	307	* This is a temp solution. May be changed in the future with mce log
	308	* infrasture.
	309	*/
	310	#define CORE_THROTTLED (0)
	311	#define CORE_POWER_LIMIT ((__u64)1 << 62)
	312	#define PACKAGE_THROTTLED ((__u64)2 << 62)
	313	#define PACKAGE_POWER_LIMIT ((__u64)3 << 62)
	314
a65c88dd	315	/* Thermal transition interrupt handler */
8363fc82	316	static void intel_thermal_interrupt(void)
a65c88dd HS	317	{
a65c88dd HS	318	__u64 msr_val;
55d435a2	319	struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
a65c88dd HS	320
a65c88dd HS	321	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
0199114c	322
55d435a2	323	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
0199114c	324	THERMAL_THROTTLING_EVENT,
55d435a2	325	CORE_LEVEL) != 0)
0199114c FY	326	mce_log_therm_throt_event(CORE_THROTTLED \| msr_val);
	327
	328	if (cpu_has(c, X86_FEATURE_PLN))
	329	if (therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
	330	POWER_LIMIT_EVENT,
	331	CORE_LEVEL) != 0)
	332	mce_log_therm_throt_event(CORE_POWER_LIMIT \| msr_val);
55d435a2 FY	333
	334	if (cpu_has(c, X86_FEATURE_PTS)) {
	335	rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
	336	if (therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
0199114c	337	THERMAL_THROTTLING_EVENT,
55d435a2	338	PACKAGE_LEVEL) != 0)
0199114c FY	339	mce_log_therm_throt_event(PACKAGE_THROTTLED \| msr_val);
	340	if (cpu_has(c, X86_FEATURE_PLN))
	341	if (therm_throt_process(msr_val &
	342	PACKAGE_THERM_STATUS_POWER_LIMIT,
	343	POWER_LIMIT_EVENT,
	344	PACKAGE_LEVEL) != 0)
	345	mce_log_therm_throt_event(PACKAGE_POWER_LIMIT
	346	\| msr_val);
55d435a2	347	}
a65c88dd HS	348	}
	349
	350	static void unexpected_thermal_interrupt(void)
	351	{
	352	printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",
	353	smp_processor_id());
	354	add_taint(TAINT_MACHINE_CHECK);
	355	}
	356
	357	static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
	358
	359	asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
	360	{
	361	exit_idle();
	362	irq_enter();
	363	inc_irq_stat(irq_thermal_count);
	364	smp_thermal_vector();
	365	irq_exit();
	366	/* Ack only at the end to avoid potential reentry */
	367	ack_APIC_irq();
	368	}
	369
70fe4407 HS	370	/* Thermal monitoring depends on APIC, ACPI and clock modulation */
	371	static int intel_thermal_supported(struct cpuinfo_x86 *c)
	372	{
	373	if (!cpu_has_apic)
	374	return 0;
	375	if (!cpu_has(c, X86_FEATURE_ACPI) \|\| !cpu_has(c, X86_FEATURE_ACC))
	376	return 0;
	377	return 1;
	378	}
	379
ce6b5d76	380	void __init mcheck_intel_therm_init(void)
a2202aa2 YW	381	{
	382	/*
	383	* This function is only called on boot CPU. Save the init thermal
	384	* LVT value on BSP and use that value to restore APs' thermal LVT
	385	* entry BIOS programmed later
	386	*/
70fe4407	387	if (intel_thermal_supported(&boot_cpu_data))
a2202aa2 YW	388	lvtthmr_init = apic_read(APIC_LVTTHMR);
	389	}
	390
cffd377e	391	void intel_init_thermal(struct cpuinfo_x86 *c)
895287c0 HS	392	{
	393	unsigned int cpu = smp_processor_id();
	394	int tm2 = 0;
	395	u32 l, h;
	396
70fe4407	397	if (!intel_thermal_supported(c))
895287c0 HS	398	return;
	399
	400	/*
	401	* First check if its enabled already, in which case there might
	402	* be some SMM goo which handles it, so we can't even put a handler
	403	* since it might be delivered via SMI already:
	404	*/
	405	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
a2202aa2 YW	406
	407	/*
	408	* The initial value of thermal LVT entries on all APs always reads
	409	* 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
	410	* sequence to them and LVT registers are reset to 0s except for
	411	* the mask bits which are set to 1s when APs receive INIT IPI.
	412	* Always restore the value that BIOS has programmed on AP based on
	413	* BSP's info we saved since BIOS is always setting the same value
	414	* for all threads/cores
	415	*/
	416	apic_write(APIC_LVTTHMR, lvtthmr_init);
	417
	418	h = lvtthmr_init;
	419
895287c0 HS	420	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
	421	printk(KERN_DEBUG
	422	"CPU%d: Thermal monitoring handled by SMI\n", cpu);
	423	return;
	424	}
	425
895287c0 HS	426	/* Check whether a vector already exists */
	427	if (h & APIC_VECTOR_MASK) {
	428	printk(KERN_DEBUG
	429	"CPU%d: Thermal LVT vector (%#x) already installed\n",
	430	cpu, (h & APIC_VECTOR_MASK));
	431	return;
	432	}
	433
f3a0867b BZ	434	/* early Pentium M models use different method for enabling TM2 */
	435	if (cpu_has(c, X86_FEATURE_TM2)) {
	436	if (c->x86 == 6 && (c->x86_model == 9 \|\| c->x86_model == 13)) {
	437	rdmsr(MSR_THERM2_CTL, l, h);
	438	if (l & MSR_THERM2_CTL_TM_SELECT)
	439	tm2 = 1;
	440	} else if (l & MSR_IA32_MISC_ENABLE_TM2)
	441	tm2 = 1;
	442	}
	443
895287c0 HS	444	/* We'll mask the thermal vector in the lapic till we're ready: */
	445	h = THERMAL_APIC_VECTOR \| APIC_DM_FIXED \| APIC_LVT_MASKED;
	446	apic_write(APIC_LVTTHMR, h);
	447
	448	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
0199114c FY	449	if (cpu_has(c, X86_FEATURE_PLN))
	450	wrmsr(MSR_IA32_THERM_INTERRUPT,
	451	l \| (THERM_INT_LOW_ENABLE
	452	\| THERM_INT_HIGH_ENABLE \| THERM_INT_PLN_ENABLE), h);
	453	else
	454	wrmsr(MSR_IA32_THERM_INTERRUPT,
	455	l \| (THERM_INT_LOW_ENABLE \| THERM_INT_HIGH_ENABLE), h);
895287c0	456
55d435a2 FY	457	if (cpu_has(c, X86_FEATURE_PTS)) {
55d435a2 FY	458	rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
0199114c FY	459	if (cpu_has(c, X86_FEATURE_PLN))
	460	wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
	461	l \| (PACKAGE_THERM_INT_LOW_ENABLE
	462	\| PACKAGE_THERM_INT_HIGH_ENABLE
	463	\| PACKAGE_THERM_INT_PLN_ENABLE), h);
	464	else
	465	wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
	466	l \| (PACKAGE_THERM_INT_LOW_ENABLE
	467	\| PACKAGE_THERM_INT_HIGH_ENABLE), h);
55d435a2 FY	468	}
55d435a2 FY	469
8363fc82	470	smp_thermal_vector = intel_thermal_interrupt;
895287c0 HS	471
	472	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	473	wrmsr(MSR_IA32_MISC_ENABLE, l \| MSR_IA32_MISC_ENABLE_TM1, h);
	474
	475	/* Unmask the thermal vector: */
	476	l = apic_read(APIC_LVTTHMR);
	477	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
	478
2eaad1fd MT	479	printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
2eaad1fd MT	480	tm2 ? "TM2" : "TM1");
895287c0 HS	481
	482	/* enable thermal throttle processing */
	483	atomic_set(&therm_throt_en, 1);
	484	}