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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Non Fatal Machine Check Exception Reporting | |
3 | * | |
f4432c5c | 4 | * (C) Copyright 2002 Dave Jones. <davej@redhat.com> |
1da177e4 LT |
5 | * |
6 | * This file contains routines to check for non-fatal MCEs every 15s | |
7 | * | |
8 | */ | |
9 | ||
10 | #include <linux/init.h> | |
11 | #include <linux/types.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/jiffies.h> | |
1da177e4 LT |
14 | #include <linux/workqueue.h> |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/smp.h> | |
17 | #include <linux/module.h> | |
18 | ||
714a9ac2 | 19 | #include <asm/processor.h> |
1da177e4 LT |
20 | #include <asm/system.h> |
21 | #include <asm/msr.h> | |
22 | ||
23 | #include "mce.h" | |
24 | ||
25 | static int firstbank; | |
26 | ||
27 | #define MCE_RATE 15*HZ /* timer rate is 15s */ | |
28 | ||
714a9ac2 | 29 | static void mce_checkregs(void *info) |
1da177e4 LT |
30 | { |
31 | u32 low, high; | |
32 | int i; | |
33 | ||
714a9ac2 PC |
34 | for (i = firstbank; i < nr_mce_banks; i++) { |
35 | rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high); | |
1da177e4 LT |
36 | |
37 | if (high & (1<<31)) { | |
38 | printk(KERN_INFO "MCE: The hardware reports a non " | |
39 | "fatal, correctable incident occurred on " | |
40 | "CPU %d.\n", | |
41 | smp_processor_id()); | |
714a9ac2 | 42 | printk(KERN_INFO "Bank %d: %08x%08x\n", i, high, low); |
1da177e4 | 43 | |
714a9ac2 PC |
44 | /* |
45 | * Scrub the error so we don't pick it up in MCE_RATE | |
46 | * seconds time. | |
47 | */ | |
48 | wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL); | |
1da177e4 LT |
49 | |
50 | /* Serialize */ | |
51 | wmb(); | |
52 | add_taint(TAINT_MACHINE_CHECK); | |
53 | } | |
54 | } | |
55 | } | |
56 | ||
c4028958 DH |
57 | static void mce_work_fn(struct work_struct *work); |
58 | static DECLARE_DELAYED_WORK(mce_work, mce_work_fn); | |
1da177e4 | 59 | |
c4028958 | 60 | static void mce_work_fn(struct work_struct *work) |
714a9ac2 | 61 | { |
15c8b6c1 | 62 | on_each_cpu(mce_checkregs, NULL, 1); |
22293e58 | 63 | schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE)); |
714a9ac2 | 64 | } |
1da177e4 LT |
65 | |
66 | static int __init init_nonfatal_mce_checker(void) | |
67 | { | |
68 | struct cpuinfo_x86 *c = &boot_cpu_data; | |
69 | ||
70 | /* Check for MCE support */ | |
71 | if (!cpu_has(c, X86_FEATURE_MCE)) | |
72 | return -ENODEV; | |
73 | ||
74 | /* Check for PPro style MCA */ | |
75 | if (!cpu_has(c, X86_FEATURE_MCA)) | |
76 | return -ENODEV; | |
77 | ||
78 | /* Some Athlons misbehave when we frob bank 0 */ | |
79 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && | |
80 | boot_cpu_data.x86 == 6) | |
81 | firstbank = 1; | |
82 | else | |
83 | firstbank = 0; | |
84 | ||
85 | /* | |
86 | * Check for non-fatal errors every MCE_RATE s | |
87 | */ | |
22293e58 | 88 | schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE)); |
1da177e4 LT |
89 | printk(KERN_INFO "Machine check exception polling timer started.\n"); |
90 | return 0; | |
91 | } | |
92 | module_init(init_nonfatal_mce_checker); | |
93 | ||
94 | MODULE_LICENSE("GPL"); |