git://bbs.cooldavid.org / net-next-2.6.git / blame
| Commit | Line | Data |
|---|---|---|
| 2272b0e0 | 1 | /* |
| 2f0798a3 | 2 | * x86 TSC related functions |
| 2272b0e0 | 3 | */ |
| 1965aae3 PA |
4 | #ifndef _ASM_X86_TSC_H |
| 5 | #define _ASM_X86_TSC_H | |
| 2272b0e0 AS |
6 | |
| 7 | #include <asm/processor.h> | |
| 8 | ||
| 2f0798a3 TG |
9 | #define NS_SCALE 10 /* 2^10, carefully chosen */ |
| 10 | #define US_SCALE 32 /* 2^32, arbitralrily chosen */ | |
| 11 | ||
| 2272b0e0 AS |
12 | /* |
| 13 | * Standard way to access the cycle counter. | |
| 14 | */ | |
| 15 | typedef unsigned long long cycles_t; | |
| 16 | ||
| 17 | extern unsigned int cpu_khz; | |
| 18 | extern unsigned int tsc_khz; | |
| 73018a66 GOC |
19 | |
| 20 | extern void disable_TSC(void); | |
| 2272b0e0 AS |
21 | |
| 22 | static inline cycles_t get_cycles(void) | |
| 23 | { | |
| 24 | unsigned long long ret = 0; | |
| 25 | ||
| 26 | #ifndef CONFIG_X86_TSC | |
| 27 | if (!cpu_has_tsc) | |
| 28 | return 0; | |
| 29 | #endif | |
| 2272b0e0 | 30 | rdtscll(ret); |
| 75f2ce03 | 31 | |
| 2272b0e0 AS |
32 | return ret; |
| 33 | } | |
| 34 | ||
| 97520825 | 35 | static __always_inline cycles_t vget_cycles(void) |
| 2272b0e0 | 36 | { |
| c5bcb563 | 37 | /* |
| 6d63de8d AK |
38 | * We only do VDSOs on TSC capable CPUs, so this shouldnt |
| 39 | * access boot_cpu_data (which is not VDSO-safe): | |
| c5bcb563 | 40 | */ |
| 6d63de8d AK |
41 | #ifndef CONFIG_X86_TSC |
| 42 | if (!cpu_has_tsc) | |
| 43 | return 0; | |
| 4e87173e | 44 | #endif |
| cb9e35dc | 45 | return (cycles_t)__native_read_tsc(); |
| 6d63de8d | 46 | } |
| 4e87173e | 47 | |
| 2272b0e0 | 48 | extern void tsc_init(void); |
| 5a90cf20 | 49 | extern void mark_tsc_unstable(char *reason); |
| 2272b0e0 | 50 | extern int unsynchronized_tsc(void); |
| 2d826404 TG |
51 | extern int check_tsc_unstable(void); |
| 52 | extern unsigned long native_calibrate_tsc(void); | |
| 2272b0e0 AS |
53 | |
| 54 | /* | |
| 55 | * Boot-time check whether the TSCs are synchronized across | |
| 56 | * all CPUs/cores: | |
| 57 | */ | |
| 58 | extern void check_tsc_sync_source(int cpu); | |
| 59 | extern void check_tsc_sync_target(void); | |
| 60 | ||
| 80ca9c98 | 61 | extern int notsc_setup(char *); |
| cd7240c0 SS |
62 | extern void save_sched_clock_state(void); |
| 63 | extern void restore_sched_clock_state(void); | |
| d371698e | 64 | |
| 1965aae3 | 65 | #endif /* _ASM_X86_TSC_H */ |