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x86: consolidate __swp_XXX() macros
[net-next-2.6.git] / arch / x86 / include / asm / pgtable_64.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_64_H
2#define _ASM_X86_PGTABLE_64_H
1da177e4 3
6df95fd7 4#include <linux/const.h>
9d291e78
VG
5#ifndef __ASSEMBLY__
6
1da177e4
LT
7/*
8 * This file contains the functions and defines necessary to modify and use
9 * the x86-64 page table tree.
10 */
11#include <asm/processor.h>
1977f032 12#include <linux/bitops.h>
1da177e4
LT
13#include <linux/threads.h>
14#include <asm/pda.h>
15
16extern pud_t level3_kernel_pgt[512];
1da177e4
LT
17extern pud_t level3_ident_pgt[512];
18extern pmd_t level2_kernel_pgt[512];
084a2a4e
JF
19extern pmd_t level2_fixmap_pgt[512];
20extern pmd_t level2_ident_pgt[512];
1da177e4 21extern pgd_t init_level4_pgt[];
1da177e4 22
e3ebadd9 23#define swapper_pg_dir init_level4_pgt
1da177e4 24
1da177e4 25extern void paging_init(void);
1da177e4 26
9d291e78
VG
27#endif /* !__ASSEMBLY__ */
28
85958b46 29#define SHARED_KERNEL_PMD 0
e4b71dcf 30
1da177e4
LT
31/*
32 * PGDIR_SHIFT determines what a top-level page table entry can map
33 */
34#define PGDIR_SHIFT 39
35#define PTRS_PER_PGD 512
36
37/*
38 * 3rd level page
39 */
40#define PUD_SHIFT 30
41#define PTRS_PER_PUD 512
42
43/*
44 * PMD_SHIFT determines the size of the area a middle-level
45 * page table can map
46 */
47#define PMD_SHIFT 21
48#define PTRS_PER_PMD 512
49
50/*
51 * entries per page directory level
52 */
53#define PTRS_PER_PTE 512
54
9d291e78
VG
55#ifndef __ASSEMBLY__
56
7f94401e
JP
57#define pte_ERROR(e) \
58 printk("%s:%d: bad pte %p(%016lx).\n", \
59 __FILE__, __LINE__, &(e), pte_val(e))
60#define pmd_ERROR(e) \
61 printk("%s:%d: bad pmd %p(%016lx).\n", \
62 __FILE__, __LINE__, &(e), pmd_val(e))
63#define pud_ERROR(e) \
64 printk("%s:%d: bad pud %p(%016lx).\n", \
65 __FILE__, __LINE__, &(e), pud_val(e))
66#define pgd_ERROR(e) \
67 printk("%s:%d: bad pgd %p(%016lx).\n", \
68 __FILE__, __LINE__, &(e), pgd_val(e))
1da177e4
LT
69
70#define pgd_none(x) (!pgd_val(x))
71#define pud_none(x) (!pud_val(x))
72
4891645e
JF
73struct mm_struct;
74
0814e0ba
EH
75void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte);
76
77
4891645e
JF
78static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
79 pte_t *ptep)
1da177e4 80{
4891645e
JF
81 *ptep = native_make_pte(0);
82}
1da177e4 83
4891645e 84static inline void native_set_pte(pte_t *ptep, pte_t pte)
1da177e4 85{
4891645e
JF
86 *ptep = pte;
87}
1da177e4 88
b65e6390
IM
89static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
90{
91 native_set_pte(ptep, pte);
92}
93
4891645e 94static inline pte_t native_ptep_get_and_clear(pte_t *xp)
1da177e4 95{
4891645e
JF
96#ifdef CONFIG_SMP
97 return native_make_pte(xchg(&xp->pte, 0));
98#else
7f94401e
JP
99 /* native_local_ptep_get_and_clear,
100 but duplicated because of cyclic dependency */
4891645e
JF
101 pte_t ret = *xp;
102 native_pte_clear(NULL, 0, xp);
103 return ret;
104#endif
1da177e4
LT
105}
106
4891645e 107static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
1da177e4 108{
4891645e 109 *pmdp = pmd;
1da177e4
LT
110}
111
4891645e 112static inline void native_pmd_clear(pmd_t *pmd)
1da177e4 113{
4891645e
JF
114 native_set_pmd(pmd, native_make_pmd(0));
115}
1da177e4 116
4891645e 117static inline void native_set_pud(pud_t *pudp, pud_t pud)
1da177e4 118{
4891645e 119 *pudp = pud;
1da177e4
LT
120}
121
4891645e
JF
122static inline void native_pud_clear(pud_t *pud)
123{
124 native_set_pud(pud, native_make_pud(0));
125}
61e06037 126
4891645e
JF
127static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd)
128{
129 *pgdp = pgd;
130}
8c65b4a6 131
7f94401e 132static inline void native_pgd_clear(pgd_t *pgd)
61e06037 133{
4891645e 134 native_set_pgd(pgd, native_make_pgd(0));
61e06037
ZA
135}
136
1da177e4
LT
137#define pte_same(a, b) ((a).pte == (b).pte)
138
9d291e78
VG
139#endif /* !__ASSEMBLY__ */
140
7f94401e
JP
141#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
142#define PMD_MASK (~(PMD_SIZE - 1))
143#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
144#define PUD_MASK (~(PUD_SIZE - 1))
145#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
146#define PGDIR_MASK (~(PGDIR_SIZE - 1))
1da177e4 147
1da177e4 148
7f94401e 149#define MAXMEM _AC(0x00003fffffffffff, UL)
63f6564d
RD
150#define VMALLOC_START _AC(0xffffc20000000000, UL)
151#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
0889eba5 152#define VMEMMAP_START _AC(0xffffe20000000000, UL)
85eb69a1 153#define MODULES_VADDR _AC(0xffffffffa0000000, UL)
66d4bdf2 154#define MODULES_END _AC(0xffffffffff000000, UL)
1da177e4
LT
155#define MODULES_LEN (MODULES_END - MODULES_VADDR)
156
9d291e78
VG
157#ifndef __ASSEMBLY__
158
a8375bd8 159static inline int pgd_bad(pgd_t pgd)
eab724e5 160{
59438c9f 161 return (pgd_val(pgd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
eab724e5 162}
1da177e4 163
a8375bd8 164static inline int pud_bad(pud_t pud)
1da177e4 165{
59438c9f 166 return (pud_val(pud) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
eab724e5
JB
167}
168
a8375bd8 169static inline int pmd_bad(pmd_t pmd)
eab724e5 170{
59438c9f 171 return (pmd_val(pmd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
1da177e4
LT
172}
173
7f94401e
JP
174#define pte_none(x) (!pte_val((x)))
175#define pte_present(x) (pte_val((x)) & (_PAGE_PRESENT | _PAGE_PROTNONE))
1da177e4 176
7f94401e 177#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */
1da177e4 178
1da177e4
LT
179/*
180 * Macro to mark a page protection value as "uncacheable".
181 */
7f94401e
JP
182#define pgprot_noncached(prot) \
183 (__pgprot(pgprot_val((prot)) | _PAGE_PCD | _PAGE_PWT))
1da177e4
LT
184
185/*
186 * Conversion functions: convert a page and protection to a page entry,
187 * and a page entry and page directory to the page they refer to.
188 */
189
1da177e4
LT
190/*
191 * Level 4 access.
192 */
7f94401e 193#define pgd_page_vaddr(pgd) \
59438c9f 194 ((unsigned long)__va((unsigned long)pgd_val((pgd)) & PTE_PFN_MASK))
7f94401e 195#define pgd_page(pgd) (pfn_to_page(pgd_val((pgd)) >> PAGE_SHIFT))
1da177e4 196#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
e00fc542 197static inline int pgd_large(pgd_t pgd) { return 0; }
e7a9b0b3 198#define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)
1da177e4
LT
199
200/* PUD - Level3 access */
201/* to find an entry in a page-table-directory. */
7f94401e
JP
202#define pud_page_vaddr(pud) \
203 ((unsigned long)__va(pud_val((pud)) & PHYSICAL_PAGE_MASK))
204#define pud_page(pud) (pfn_to_page(pud_val((pud)) >> PAGE_SHIFT))
205#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
206#define pud_offset(pgd, address) \
207 ((pud_t *)pgd_page_vaddr(*(pgd)) + pud_index((address)))
208#define pud_present(pud) (pud_val((pud)) & _PAGE_PRESENT)
1da177e4 209
61e19a34
AK
210static inline int pud_large(pud_t pte)
211{
7f94401e
JP
212 return (pud_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
213 (_PAGE_PSE | _PAGE_PRESENT);
61e19a34
AK
214}
215
1da177e4 216/* PMD - Level 2 access */
59438c9f 217#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val((pmd)) & PTE_PFN_MASK))
7f94401e
JP
218#define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
219
220#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
221#define pmd_offset(dir, address) ((pmd_t *)pud_page_vaddr(*(dir)) + \
222 pmd_index(address))
223#define pmd_none(x) (!pmd_val((x)))
224#define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT)
225#define pfn_pmd(nr, prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val((prot))))
226#define pmd_pfn(x) ((pmd_val((x)) & __PHYSICAL_MASK) >> PAGE_SHIFT)
227
228#define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
229#define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | \
230 _PAGE_FILE })
1da177e4
LT
231#define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
232
233/* PTE - Level 1 access. */
234
235/* page, protection -> pte */
7f94401e
JP
236#define mk_pte(page, pgprot) pfn_pte(page_to_pfn((page)), (pgprot))
237
238#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
46a82b2d 239#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
7f94401e 240 pte_index((address)))
1da177e4
LT
241
242/* x86-64 always has all page tables mapped. */
7f94401e
JP
243#define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
244#define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address))
1da177e4 245#define pte_unmap(pte) /* NOP */
7f94401e 246#define pte_unmap_nested(pte) /* NOP */
1da177e4 247
7f94401e 248#define update_mmu_cache(vma, address, pte) do { } while (0)
1da177e4 249
00d1c5e0
IM
250extern int direct_gbpages;
251
1da177e4 252/* Encode and de-code a swap entry */
1796316a
JB
253#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
254#define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1)
255#define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1)
256#else
257#define SWP_TYPE_BITS (_PAGE_BIT_PROTNONE - _PAGE_BIT_PRESENT - 1)
258#define SWP_OFFSET_SHIFT (_PAGE_BIT_FILE + 1)
259#endif
260
261#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
262
263#define __swp_type(x) (((x).val >> (_PAGE_BIT_PRESENT + 1)) \
264 & ((1U << SWP_TYPE_BITS) - 1))
265#define __swp_offset(x) ((x).val >> SWP_OFFSET_SHIFT)
266#define __swp_entry(type, offset) ((swp_entry_t) { \
267 ((type) << (_PAGE_BIT_PRESENT + 1)) \
268 | ((offset) << SWP_OFFSET_SHIFT) })
7f94401e 269#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
c8e5393a 270#define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val })
1da177e4 271
7f94401e 272extern int kern_addr_valid(unsigned long addr);
31eedd82 273extern void cleanup_highmap(void);
1da177e4 274
7f94401e
JP
275#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
276 remap_pfn_range(vma, vaddr, pfn, size, prot)
1da177e4 277
1da177e4 278#define HAVE_ARCH_UNMAPPED_AREA
cc503c1b 279#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1da177e4
LT
280
281#define pgtable_cache_init() do { } while (0)
da8f153e 282#define check_pgt_cache() do { } while (0)
1da177e4
LT
283
284#define PAGE_AGP PAGE_KERNEL_NOCACHE
285#define HAVE_PAGE_AGP 1
286
287/* fs/proc/kcore.c */
288#define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
7f94401e
JP
289#define kc_offset_to_vaddr(o) \
290 (((o) & (1UL << (__VIRTUAL_MASK_SHIFT - 1))) \
291 ? ((o) | ~__VIRTUAL_MASK) \
292 : (o))
1da177e4 293
1da177e4 294#define __HAVE_ARCH_PTE_SAME
9d291e78 295#endif /* !__ASSEMBLY__ */
1da177e4 296
1965aae3 297#endif /* _ASM_X86_PGTABLE_64_H */