[net-next-2.6.git] / arch / x86 / include / asm / kexec.h

#ifndef _ASM_X86_KEXEC_H
#define _ASM_X86_KEXEC_H

#ifdef CONFIG_X86_32
# define PA_CONTROL_PAGE	0
# define VA_CONTROL_PAGE	1
# define PA_PGD			2
# define PA_SWAP_PAGE		3
# define PAGES_NR		4
#else
# define PA_CONTROL_PAGE	0
# define VA_CONTROL_PAGE	1
# define PA_TABLE_PAGE		2
# define PA_SWAP_PAGE		3
# define PAGES_NR		4
#endif

# define KEXEC_CONTROL_CODE_MAX_SIZE	2048

#ifndef __ASSEMBLY__

#include <linux/string.h>

#include <asm/page.h>
#include <asm/ptrace.h>

/*
 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
 * I.e. Maximum page that is mapped directly into kernel memory,
 * and kmap is not required.
 *
 * So far x86_64 is limited to 40 physical address bits.
 */
#ifdef CONFIG_X86_32
/* Maximum physical address we can use pages from */
# define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
/* Maximum address we can reach in physical address mode */
# define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
/* Maximum address we can use for the control code buffer */
# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE

# define KEXEC_CONTROL_PAGE_SIZE	4096

/* The native architecture */
# define KEXEC_ARCH KEXEC_ARCH_386

/* We can also handle crash dumps from 64 bit kernel. */
# define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
#else
/* Maximum physical address we can use pages from */
# define KEXEC_SOURCE_MEMORY_LIMIT      (0xFFFFFFFFFFUL)
/* Maximum address we can reach in physical address mode */
# define KEXEC_DESTINATION_MEMORY_LIMIT (0xFFFFFFFFFFUL)
/* Maximum address we can use for the control pages */
# define KEXEC_CONTROL_MEMORY_LIMIT     (0xFFFFFFFFFFUL)

/* Allocate one page for the pdp and the second for the code */
# define KEXEC_CONTROL_PAGE_SIZE  (4096UL + 4096UL)

/* The native architecture */
# define KEXEC_ARCH KEXEC_ARCH_X86_64
#endif

/*
 * CPU does not save ss and sp on stack if execution is already
 * running in kernel mode at the time of NMI occurrence. This code
 * fixes it.
 */
static inline void crash_fixup_ss_esp(struct pt_regs *newregs,
				      struct pt_regs *oldregs)
{
#ifdef CONFIG_X86_32
	newregs->sp = (unsigned long)&(oldregs->sp);
	asm volatile("xorl %%eax, %%eax\n\t"
		     "movw %%ss, %%ax\n\t"
		     :"=a"(newregs->ss));
#endif
}

/*
 * This function is responsible for capturing register states if coming
 * via panic otherwise just fix up the ss and sp if coming via kernel
 * mode exception.
 */
static inline void crash_setup_regs(struct pt_regs *newregs,
				    struct pt_regs *oldregs)
{
	if (oldregs) {
		memcpy(newregs, oldregs, sizeof(*newregs));
		crash_fixup_ss_esp(newregs, oldregs);
	} else {
#ifdef CONFIG_X86_32
		asm volatile("movl %%ebx,%0" : "=m"(newregs->bx));
		asm volatile("movl %%ecx,%0" : "=m"(newregs->cx));
		asm volatile("movl %%edx,%0" : "=m"(newregs->dx));
		asm volatile("movl %%esi,%0" : "=m"(newregs->si));
		asm volatile("movl %%edi,%0" : "=m"(newregs->di));
		asm volatile("movl %%ebp,%0" : "=m"(newregs->bp));
		asm volatile("movl %%eax,%0" : "=m"(newregs->ax));
		asm volatile("movl %%esp,%0" : "=m"(newregs->sp));
		asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
		asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
		asm volatile("movl %%ds, %%eax;" :"=a"(newregs->ds));
		asm volatile("movl %%es, %%eax;" :"=a"(newregs->es));
		asm volatile("pushfl; popl %0" :"=m"(newregs->flags));
#else
		asm volatile("movq %%rbx,%0" : "=m"(newregs->bx));
		asm volatile("movq %%rcx,%0" : "=m"(newregs->cx));
		asm volatile("movq %%rdx,%0" : "=m"(newregs->dx));
		asm volatile("movq %%rsi,%0" : "=m"(newregs->si));
		asm volatile("movq %%rdi,%0" : "=m"(newregs->di));
		asm volatile("movq %%rbp,%0" : "=m"(newregs->bp));
		asm volatile("movq %%rax,%0" : "=m"(newregs->ax));
		asm volatile("movq %%rsp,%0" : "=m"(newregs->sp));
		asm volatile("movq %%r8,%0" : "=m"(newregs->r8));
		asm volatile("movq %%r9,%0" : "=m"(newregs->r9));
		asm volatile("movq %%r10,%0" : "=m"(newregs->r10));
		asm volatile("movq %%r11,%0" : "=m"(newregs->r11));
		asm volatile("movq %%r12,%0" : "=m"(newregs->r12));
		asm volatile("movq %%r13,%0" : "=m"(newregs->r13));
		asm volatile("movq %%r14,%0" : "=m"(newregs->r14));
		asm volatile("movq %%r15,%0" : "=m"(newregs->r15));
		asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
		asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
		asm volatile("pushfq; popq %0" :"=m"(newregs->flags));
#endif
		newregs->ip = (unsigned long)current_text_addr();
	}
}

#ifdef CONFIG_X86_32
asmlinkage unsigned long
relocate_kernel(unsigned long indirection_page,
		unsigned long control_page,
		unsigned long start_address,
		unsigned int has_pae,
		unsigned int preserve_context);
#else
unsigned long
relocate_kernel(unsigned long indirection_page,
		unsigned long page_list,
		unsigned long start_address,
		unsigned int preserve_context);
#endif

#define ARCH_HAS_KIMAGE_ARCH

#ifdef CONFIG_X86_32
struct kimage_arch {
	pgd_t *pgd;
#ifdef CONFIG_X86_PAE
	pmd_t *pmd0;
	pmd_t *pmd1;
#endif
	pte_t *pte0;
	pte_t *pte1;
};
#else
struct kimage_arch {
	pud_t *pud;
	pmd_t *pmd;
	pte_t *pte;
};
#endif

#endif /* __ASSEMBLY__ */

#endif /* _ASM_X86_KEXEC_H */
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_KEXEC_H
1965aae3 PA	2	#define _ASM_X86_KEXEC_H
3c233d13	3
96a388de	4	#ifdef CONFIG_X86_32
3c233d13 HH	5	# define PA_CONTROL_PAGE 0
	6	# define VA_CONTROL_PAGE 1
	7	# define PA_PGD 2
9868ee63 HY	8	# define PA_SWAP_PAGE 3
9868ee63 HY	9	# define PAGES_NR 4
96a388de	10	#else
3c233d13	11	# define PA_CONTROL_PAGE 0
fee7b0d8 HY	12	# define VA_CONTROL_PAGE 1
	13	# define PA_TABLE_PAGE 2
	14	# define PA_SWAP_PAGE 3
	15	# define PAGES_NR 4
96a388de	16	#endif
3c233d13	17
fb45daa6	18	# define KEXEC_CONTROL_CODE_MAX_SIZE 2048
fb45daa6	19
3c233d13 HH	20	#ifndef __ASSEMBLY__
	21
	22	#include <linux/string.h>
	23
	24	#include <asm/page.h>
	25	#include <asm/ptrace.h>
	26
	27	/*
	28	* KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
	29	* I.e. Maximum page that is mapped directly into kernel memory,
	30	* and kmap is not required.
	31	*
	32	* So far x86_64 is limited to 40 physical address bits.
	33	*/
	34	#ifdef CONFIG_X86_32
	35	/* Maximum physical address we can use pages from */
	36	# define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
	37	/* Maximum address we can reach in physical address mode */
	38	# define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
	39	/* Maximum address we can use for the control code buffer */
	40	# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
	41
163f6876	42	# define KEXEC_CONTROL_PAGE_SIZE 4096
3c233d13 HH	43
	44	/* The native architecture */
	45	# define KEXEC_ARCH KEXEC_ARCH_386
	46
	47	/* We can also handle crash dumps from 64 bit kernel. */
	48	# define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
	49	#else
	50	/* Maximum physical address we can use pages from */
	51	# define KEXEC_SOURCE_MEMORY_LIMIT (0xFFFFFFFFFFUL)
	52	/* Maximum address we can reach in physical address mode */
	53	# define KEXEC_DESTINATION_MEMORY_LIMIT (0xFFFFFFFFFFUL)
	54	/* Maximum address we can use for the control pages */
	55	# define KEXEC_CONTROL_MEMORY_LIMIT (0xFFFFFFFFFFUL)
	56
	57	/* Allocate one page for the pdp and the second for the code */
163f6876	58	# define KEXEC_CONTROL_PAGE_SIZE (4096UL + 4096UL)
3c233d13 HH	59
	60	/* The native architecture */
	61	# define KEXEC_ARCH KEXEC_ARCH_X86_64
	62	#endif
	63
	64	/*
	65	* CPU does not save ss and sp on stack if execution is already
	66	* running in kernel mode at the time of NMI occurrence. This code
	67	* fixes it.
	68	*/
	69	static inline void crash_fixup_ss_esp(struct pt_regs *newregs,
	70	struct pt_regs *oldregs)
	71	{
	72	#ifdef CONFIG_X86_32
	73	newregs->sp = (unsigned long)&(oldregs->sp);
b69a3f9d JP	74	asm volatile("xorl %%eax, %%eax\n\t"
	75	"movw %%ss, %%ax\n\t"
	76	:"=a"(newregs->ss));
3c233d13 HH	77	#endif
	78	}
	79
	80	/*
	81	* This function is responsible for capturing register states if coming
	82	* via panic otherwise just fix up the ss and sp if coming via kernel
	83	* mode exception.
	84	*/
	85	static inline void crash_setup_regs(struct pt_regs *newregs,
	86	struct pt_regs *oldregs)
	87	{
	88	if (oldregs) {
	89	memcpy(newregs, oldregs, sizeof(*newregs));
	90	crash_fixup_ss_esp(newregs, oldregs);
	91	} else {
	92	#ifdef CONFIG_X86_32
b69a3f9d JP	93	asm volatile("movl %%ebx,%0" : "=m"(newregs->bx));
	94	asm volatile("movl %%ecx,%0" : "=m"(newregs->cx));
	95	asm volatile("movl %%edx,%0" : "=m"(newregs->dx));
	96	asm volatile("movl %%esi,%0" : "=m"(newregs->si));
	97	asm volatile("movl %%edi,%0" : "=m"(newregs->di));
	98	asm volatile("movl %%ebp,%0" : "=m"(newregs->bp));
	99	asm volatile("movl %%eax,%0" : "=m"(newregs->ax));
	100	asm volatile("movl %%esp,%0" : "=m"(newregs->sp));
	101	asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
	102	asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
	103	asm volatile("movl %%ds, %%eax;" :"=a"(newregs->ds));
	104	asm volatile("movl %%es, %%eax;" :"=a"(newregs->es));
	105	asm volatile("pushfl; popl %0" :"=m"(newregs->flags));
3c233d13	106	#else
b69a3f9d JP	107	asm volatile("movq %%rbx,%0" : "=m"(newregs->bx));
	108	asm volatile("movq %%rcx,%0" : "=m"(newregs->cx));
	109	asm volatile("movq %%rdx,%0" : "=m"(newregs->dx));
	110	asm volatile("movq %%rsi,%0" : "=m"(newregs->si));
	111	asm volatile("movq %%rdi,%0" : "=m"(newregs->di));
	112	asm volatile("movq %%rbp,%0" : "=m"(newregs->bp));
	113	asm volatile("movq %%rax,%0" : "=m"(newregs->ax));
	114	asm volatile("movq %%rsp,%0" : "=m"(newregs->sp));
	115	asm volatile("movq %%r8,%0" : "=m"(newregs->r8));
	116	asm volatile("movq %%r9,%0" : "=m"(newregs->r9));
	117	asm volatile("movq %%r10,%0" : "=m"(newregs->r10));
	118	asm volatile("movq %%r11,%0" : "=m"(newregs->r11));
	119	asm volatile("movq %%r12,%0" : "=m"(newregs->r12));
	120	asm volatile("movq %%r13,%0" : "=m"(newregs->r13));
	121	asm volatile("movq %%r14,%0" : "=m"(newregs->r14));
	122	asm volatile("movq %%r15,%0" : "=m"(newregs->r15));
	123	asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
	124	asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
	125	asm volatile("pushfq; popq %0" :"=m"(newregs->flags));
3c233d13 HH	126	#endif
	127	newregs->ip = (unsigned long)current_text_addr();
	128	}
	129	}
	130
	131	#ifdef CONFIG_X86_32
3ab83521	132	asmlinkage unsigned long
3c233d13 HH	133	relocate_kernel(unsigned long indirection_page,
	134	unsigned long control_page,
	135	unsigned long start_address,
3ab83521 HY	136	unsigned int has_pae,
3ab83521 HY	137	unsigned int preserve_context);
3c233d13	138	#else
fee7b0d8	139	unsigned long
3c233d13 HH	140	relocate_kernel(unsigned long indirection_page,
3c233d13 HH	141	unsigned long page_list,
fee7b0d8 HY	142	unsigned long start_address,
fee7b0d8 HY	143	unsigned int preserve_context);
3c233d13 HH	144	#endif
3c233d13 HH	145
92be3d6b HY	146	#define ARCH_HAS_KIMAGE_ARCH
92be3d6b HY	147
f5deb796	148	#ifdef CONFIG_X86_32
92be3d6b HY	149	struct kimage_arch {
	150	pgd_t *pgd;
	151	#ifdef CONFIG_X86_PAE
	152	pmd_t *pmd0;
	153	pmd_t *pmd1;
	154	#endif
	155	pte_t *pte0;
	156	pte_t *pte1;
	157	};
f5deb796 HY	158	#else
	159	struct kimage_arch {
	160	pud_t *pud;
	161	pmd_t *pmd;
	162	pte_t *pte;
	163	};
92be3d6b HY	164	#endif
92be3d6b HY	165
3c233d13 HH	166	#endif /* __ASSEMBLY__ */
3c233d13 HH	167
1965aae3	168	#endif /* _ASM_X86_KEXEC_H */