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[net-next-2.6.git] / arch / sh / kernel / io_generic.c
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1/*
2 * arch/sh/kernel/io_generic.c
1da177e4
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3 *
4 * Copyright (C) 2000 Niibe Yutaka
9c57548f 5 * Copyright (C) 2005 - 2007 Paul Mundt
1da177e4
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6 *
7 * Generic I/O routine. These can be used where a machine specific version
8 * is not required.
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
1da177e4 13 */
b66c1a39 14#include <linux/module.h>
9c57548f 15#include <linux/io.h>
1da177e4 16#include <asm/machvec.h>
1da177e4 17
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18#ifdef CONFIG_CPU_SH3
19/* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a
20 * workaround. */
1da177e4 21/* I'm not sure SH7709 has this kind of bug */
14866543 22#define dummy_read() __raw_readb(0xba000000)
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23#else
24#define dummy_read()
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25#endif
26
e9c58fc5 27unsigned long generic_io_base = 0;
1da177e4 28
b66c1a39 29u8 generic_inb(unsigned long port)
1da177e4 30{
14866543 31 return __raw_readb(__ioport_map(port, 1));
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32}
33
b66c1a39 34u16 generic_inw(unsigned long port)
1da177e4 35{
14866543 36 return __raw_readw(__ioport_map(port, 2));
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37}
38
b66c1a39 39u32 generic_inl(unsigned long port)
1da177e4 40{
14866543 41 return __raw_readl(__ioport_map(port, 4));
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42}
43
b66c1a39 44u8 generic_inb_p(unsigned long port)
1da177e4 45{
b66c1a39 46 unsigned long v = generic_inb(port);
1da177e4 47
14866543 48 ctrl_delay();
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49 return v;
50}
51
b66c1a39 52u16 generic_inw_p(unsigned long port)
1da177e4 53{
b66c1a39 54 unsigned long v = generic_inw(port);
1da177e4 55
14866543 56 ctrl_delay();
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57 return v;
58}
59
b66c1a39 60u32 generic_inl_p(unsigned long port)
1da177e4 61{
b66c1a39 62 unsigned long v = generic_inl(port);
1da177e4 63
14866543 64 ctrl_delay();
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65 return v;
66}
67
68/*
69 * insb/w/l all read a series of bytes/words/longs from a fixed port
70 * address. However as the port address doesn't change we only need to
71 * convert the port address to real address once.
72 */
73
b66c1a39 74void generic_insb(unsigned long port, void *dst, unsigned long count)
1da177e4 75{
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76 __raw_readsb(__ioport_map(port, 1), dst, count);
77 dummy_read();
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78}
79
b66c1a39 80void generic_insw(unsigned long port, void *dst, unsigned long count)
1da177e4 81{
8af57f8b 82 __raw_readsw(__ioport_map(port, 2), dst, count);
b66c1a39 83 dummy_read();
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84}
85
b66c1a39 86void generic_insl(unsigned long port, void *dst, unsigned long count)
1da177e4 87{
8af57f8b 88 __raw_readsl(__ioport_map(port, 4), dst, count);
b66c1a39 89 dummy_read();
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90}
91
b66c1a39 92void generic_outb(u8 b, unsigned long port)
1da177e4 93{
14866543 94 __raw_writeb(b, __ioport_map(port, 1));
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95}
96
b66c1a39 97void generic_outw(u16 b, unsigned long port)
1da177e4 98{
14866543 99 __raw_writew(b, __ioport_map(port, 2));
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100}
101
b66c1a39 102void generic_outl(u32 b, unsigned long port)
1da177e4 103{
14866543 104 __raw_writel(b, __ioport_map(port, 4));
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105}
106
b66c1a39 107void generic_outb_p(u8 b, unsigned long port)
1da177e4 108{
b66c1a39 109 generic_outb(b, port);
14866543 110 ctrl_delay();
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111}
112
b66c1a39 113void generic_outw_p(u16 b, unsigned long port)
1da177e4 114{
b66c1a39 115 generic_outw(b, port);
14866543 116 ctrl_delay();
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117}
118
b66c1a39 119void generic_outl_p(u32 b, unsigned long port)
1da177e4 120{
b66c1a39 121 generic_outl(b, port);
14866543 122 ctrl_delay();
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123}
124
125/*
126 * outsb/w/l all write a series of bytes/words/longs to a fixed port
127 * address. However as the port address doesn't change we only need to
128 * convert the port address to real address once.
129 */
b66c1a39 130void generic_outsb(unsigned long port, const void *src, unsigned long count)
1da177e4 131{
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132 __raw_writesb(__ioport_map(port, 1), src, count);
133 dummy_read();
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134}
135
b66c1a39 136void generic_outsw(unsigned long port, const void *src, unsigned long count)
1da177e4 137{
8af57f8b 138 __raw_writesw(__ioport_map(port, 2), src, count);
b66c1a39 139 dummy_read();
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140}
141
b66c1a39 142void generic_outsl(unsigned long port, const void *src, unsigned long count)
1da177e4 143{
8af57f8b 144 __raw_writesl(__ioport_map(port, 4), src, count);
b66c1a39 145 dummy_read();
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146}
147
b66c1a39 148void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
1da177e4 149{
e9c58fc5 150#ifdef P1SEG
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151 if (PXSEG(addr) >= P1SEG)
152 return (void __iomem *)addr;
e9c58fc5 153#endif
48ff3e04 154
b66c1a39 155 return (void __iomem *)(addr + generic_io_base);
1da177e4 156}
1da177e4 157
b66c1a39 158void generic_ioport_unmap(void __iomem *addr)
1da177e4 159{
1da177e4 160}
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161
162#ifndef CONFIG_GENERIC_IOMAP
163void __iomem *ioport_map(unsigned long port, unsigned int nr)
164{
165 void __iomem *ret;
166
167 ret = __ioport_map_trapped(port, nr);
168 if (ret)
169 return ret;
170
171 return __ioport_map(port, nr);
172}
173EXPORT_SYMBOL(ioport_map);
174
175void ioport_unmap(void __iomem *addr)
176{
177 sh_mv.mv_ioport_unmap(addr);
178}
179EXPORT_SYMBOL(ioport_unmap);
180#endif /* CONFIG_GENERIC_IOMAP */