]>
Commit | Line | Data |
---|---|---|
36ddf31b PM |
1 | /* |
2 | * arch/sh/kernel/cpu/clock.c - SuperH clock framework | |
3 | * | |
b1f6cfe4 | 4 | * Copyright (C) 2005 - 2009 Paul Mundt |
36ddf31b PM |
5 | * |
6 | * This clock framework is derived from the OMAP version by: | |
7 | * | |
b1f6cfe4 | 8 | * Copyright (C) 2004 - 2008 Nokia Corporation |
36ddf31b PM |
9 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> |
10 | * | |
1d118562 PM |
11 | * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> |
12 | * | |
36ddf31b PM |
13 | * This file is subject to the terms and conditions of the GNU General Public |
14 | * License. See the file "COPYING" in the main directory of this archive | |
15 | * for more details. | |
16 | */ | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/module.h> | |
237b98f6 | 20 | #include <linux/mutex.h> |
36ddf31b | 21 | #include <linux/list.h> |
4a55026f FV |
22 | #include <linux/kobject.h> |
23 | #include <linux/sysdev.h> | |
36ddf31b PM |
24 | #include <linux/seq_file.h> |
25 | #include <linux/err.h> | |
1d118562 | 26 | #include <linux/platform_device.h> |
cedcf336 | 27 | #include <linux/debugfs.h> |
c94a8574 | 28 | #include <linux/cpufreq.h> |
51a5006a | 29 | #include <linux/clk.h> |
36ddf31b | 30 | #include <asm/clock.h> |
253b0887 | 31 | #include <asm/machvec.h> |
36ddf31b PM |
32 | |
33 | static LIST_HEAD(clock_list); | |
34 | static DEFINE_SPINLOCK(clock_lock); | |
237b98f6 | 35 | static DEFINE_MUTEX(clock_list_sem); |
36ddf31b | 36 | |
c94a8574 MD |
37 | void clk_rate_table_build(struct clk *clk, |
38 | struct cpufreq_frequency_table *freq_table, | |
39 | int nr_freqs, | |
40 | struct clk_div_mult_table *src_table, | |
41 | unsigned long *bitmap) | |
42 | { | |
43 | unsigned long mult, div; | |
44 | unsigned long freq; | |
45 | int i; | |
46 | ||
47 | for (i = 0; i < nr_freqs; i++) { | |
48 | div = 1; | |
49 | mult = 1; | |
50 | ||
51 | if (src_table->divisors && i < src_table->nr_divisors) | |
52 | div = src_table->divisors[i]; | |
53 | ||
54 | if (src_table->multipliers && i < src_table->nr_multipliers) | |
55 | mult = src_table->multipliers[i]; | |
56 | ||
57 | if (!div || !mult || (bitmap && !test_bit(i, bitmap))) | |
58 | freq = CPUFREQ_ENTRY_INVALID; | |
59 | else | |
60 | freq = clk->parent->rate * mult / div; | |
61 | ||
62 | freq_table[i].index = i; | |
63 | freq_table[i].frequency = freq; | |
64 | } | |
65 | ||
66 | /* Termination entry */ | |
67 | freq_table[i].index = i; | |
68 | freq_table[i].frequency = CPUFREQ_TABLE_END; | |
69 | } | |
70 | ||
71 | long clk_rate_table_round(struct clk *clk, | |
72 | struct cpufreq_frequency_table *freq_table, | |
73 | unsigned long rate) | |
74 | { | |
75 | unsigned long rate_error, rate_error_prev = ~0UL; | |
76 | unsigned long rate_best_fit = rate; | |
77 | unsigned long highest, lowest; | |
78 | int i; | |
79 | ||
80 | highest = lowest = 0; | |
81 | ||
82 | for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { | |
83 | unsigned long freq = freq_table[i].frequency; | |
84 | ||
85 | if (freq == CPUFREQ_ENTRY_INVALID) | |
86 | continue; | |
87 | ||
88 | if (freq > highest) | |
89 | highest = freq; | |
90 | if (freq < lowest) | |
91 | lowest = freq; | |
92 | ||
93 | rate_error = abs(freq - rate); | |
94 | if (rate_error < rate_error_prev) { | |
95 | rate_best_fit = freq; | |
96 | rate_error_prev = rate_error; | |
97 | } | |
98 | ||
99 | if (rate_error == 0) | |
100 | break; | |
101 | } | |
102 | ||
103 | if (rate >= highest) | |
104 | rate_best_fit = highest; | |
105 | if (rate <= lowest) | |
106 | rate_best_fit = lowest; | |
107 | ||
108 | return rate_best_fit; | |
109 | } | |
110 | ||
098dee99 MD |
111 | int clk_rate_table_find(struct clk *clk, |
112 | struct cpufreq_frequency_table *freq_table, | |
113 | unsigned long rate) | |
114 | { | |
115 | int i; | |
116 | ||
117 | for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { | |
118 | unsigned long freq = freq_table[i].frequency; | |
119 | ||
120 | if (freq == CPUFREQ_ENTRY_INVALID) | |
121 | continue; | |
122 | ||
123 | if (freq == rate) | |
124 | return i; | |
125 | } | |
126 | ||
127 | return -ENOENT; | |
128 | } | |
129 | ||
b1f6cfe4 PM |
130 | /* Used for clocks that always have same value as the parent clock */ |
131 | unsigned long followparent_recalc(struct clk *clk) | |
132 | { | |
549b5e35 | 133 | return clk->parent ? clk->parent->rate : 0; |
b1f6cfe4 PM |
134 | } |
135 | ||
aa87aa34 PM |
136 | int clk_reparent(struct clk *child, struct clk *parent) |
137 | { | |
138 | list_del_init(&child->sibling); | |
139 | if (parent) | |
140 | list_add(&child->sibling, &parent->children); | |
141 | child->parent = parent; | |
142 | ||
143 | /* now do the debugfs renaming to reattach the child | |
144 | to the proper parent */ | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
b68d8201 | 149 | /* Propagate rate to children */ |
b1f6cfe4 | 150 | void propagate_rate(struct clk *tclk) |
36ddf31b PM |
151 | { |
152 | struct clk *clkp; | |
153 | ||
b1f6cfe4 | 154 | list_for_each_entry(clkp, &tclk->children, sibling) { |
d672fef0 | 155 | if (clkp->ops && clkp->ops->recalc) |
b68d8201 | 156 | clkp->rate = clkp->ops->recalc(clkp); |
cc96eace | 157 | |
b1f6cfe4 | 158 | propagate_rate(clkp); |
36ddf31b PM |
159 | } |
160 | } | |
161 | ||
ae891a42 | 162 | static void __clk_disable(struct clk *clk) |
4f5ecaa0 | 163 | { |
ae891a42 PM |
164 | if (clk->usecount == 0) { |
165 | printk(KERN_ERR "Trying disable clock %s with 0 usecount\n", | |
166 | clk->name); | |
167 | WARN_ON(1); | |
168 | return; | |
4f5ecaa0 | 169 | } |
36ddf31b | 170 | |
ae891a42 PM |
171 | if (!(--clk->usecount)) { |
172 | if (likely(clk->ops && clk->ops->disable)) | |
173 | clk->ops->disable(clk); | |
174 | if (likely(clk->parent)) | |
175 | __clk_disable(clk->parent); | |
176 | } | |
36ddf31b PM |
177 | } |
178 | ||
ae891a42 | 179 | void clk_disable(struct clk *clk) |
36ddf31b PM |
180 | { |
181 | unsigned long flags; | |
36ddf31b | 182 | |
4ff29ff8 | 183 | if (!clk) |
ae891a42 | 184 | return; |
4ff29ff8 | 185 | |
36ddf31b | 186 | spin_lock_irqsave(&clock_lock, flags); |
ae891a42 | 187 | __clk_disable(clk); |
36ddf31b | 188 | spin_unlock_irqrestore(&clock_lock, flags); |
36ddf31b | 189 | } |
ae891a42 | 190 | EXPORT_SYMBOL_GPL(clk_disable); |
36ddf31b | 191 | |
ae891a42 | 192 | static int __clk_enable(struct clk *clk) |
36ddf31b | 193 | { |
ae891a42 PM |
194 | int ret = 0; |
195 | ||
196 | if (clk->usecount++ == 0) { | |
197 | if (clk->parent) { | |
198 | ret = __clk_enable(clk->parent); | |
199 | if (unlikely(ret)) | |
200 | goto err; | |
201 | } | |
202 | ||
203 | if (clk->ops && clk->ops->enable) { | |
204 | ret = clk->ops->enable(clk); | |
205 | if (ret) { | |
206 | if (clk->parent) | |
207 | __clk_disable(clk->parent); | |
208 | goto err; | |
209 | } | |
210 | } | |
1929cb34 | 211 | } |
ae891a42 PM |
212 | |
213 | return ret; | |
214 | err: | |
215 | clk->usecount--; | |
216 | return ret; | |
36ddf31b PM |
217 | } |
218 | ||
ae891a42 | 219 | int clk_enable(struct clk *clk) |
36ddf31b PM |
220 | { |
221 | unsigned long flags; | |
ae891a42 | 222 | int ret; |
36ddf31b | 223 | |
4ff29ff8 | 224 | if (!clk) |
ae891a42 | 225 | return -EINVAL; |
4ff29ff8 | 226 | |
36ddf31b | 227 | spin_lock_irqsave(&clock_lock, flags); |
ae891a42 | 228 | ret = __clk_enable(clk); |
36ddf31b | 229 | spin_unlock_irqrestore(&clock_lock, flags); |
ae891a42 PM |
230 | |
231 | return ret; | |
36ddf31b | 232 | } |
ae891a42 | 233 | EXPORT_SYMBOL_GPL(clk_enable); |
36ddf31b | 234 | |
b1f6cfe4 PM |
235 | static LIST_HEAD(root_clks); |
236 | ||
237 | /** | |
238 | * recalculate_root_clocks - recalculate and propagate all root clocks | |
239 | * | |
240 | * Recalculates all root clocks (clocks with no parent), which if the | |
241 | * clock's .recalc is set correctly, should also propagate their rates. | |
242 | * Called at init. | |
243 | */ | |
244 | void recalculate_root_clocks(void) | |
245 | { | |
246 | struct clk *clkp; | |
247 | ||
248 | list_for_each_entry(clkp, &root_clks, sibling) { | |
d672fef0 | 249 | if (clkp->ops && clkp->ops->recalc) |
b1f6cfe4 PM |
250 | clkp->rate = clkp->ops->recalc(clkp); |
251 | propagate_rate(clkp); | |
252 | } | |
253 | } | |
254 | ||
36ddf31b PM |
255 | int clk_register(struct clk *clk) |
256 | { | |
b1f6cfe4 PM |
257 | if (clk == NULL || IS_ERR(clk)) |
258 | return -EINVAL; | |
259 | ||
260 | /* | |
261 | * trap out already registered clocks | |
262 | */ | |
263 | if (clk->node.next || clk->node.prev) | |
264 | return 0; | |
265 | ||
237b98f6 | 266 | mutex_lock(&clock_list_sem); |
36ddf31b | 267 | |
b1f6cfe4 | 268 | INIT_LIST_HEAD(&clk->children); |
4ff29ff8 | 269 | clk->usecount = 0; |
b1f6cfe4 PM |
270 | |
271 | if (clk->parent) | |
272 | list_add(&clk->sibling, &clk->parent->children); | |
273 | else | |
274 | list_add(&clk->sibling, &root_clks); | |
275 | ||
36ddf31b | 276 | list_add(&clk->node, &clock_list); |
d672fef0 | 277 | if (clk->ops && clk->ops->init) |
4ff29ff8 | 278 | clk->ops->init(clk); |
237b98f6 | 279 | mutex_unlock(&clock_list_sem); |
36ddf31b PM |
280 | |
281 | return 0; | |
282 | } | |
db62e5bd | 283 | EXPORT_SYMBOL_GPL(clk_register); |
36ddf31b PM |
284 | |
285 | void clk_unregister(struct clk *clk) | |
286 | { | |
237b98f6 | 287 | mutex_lock(&clock_list_sem); |
b1f6cfe4 | 288 | list_del(&clk->sibling); |
36ddf31b | 289 | list_del(&clk->node); |
237b98f6 | 290 | mutex_unlock(&clock_list_sem); |
36ddf31b | 291 | } |
db62e5bd | 292 | EXPORT_SYMBOL_GPL(clk_unregister); |
36ddf31b | 293 | |
4ff29ff8 PM |
294 | static void clk_enable_init_clocks(void) |
295 | { | |
296 | struct clk *clkp; | |
297 | ||
298 | list_for_each_entry(clkp, &clock_list, node) | |
299 | if (clkp->flags & CLK_ENABLE_ON_INIT) | |
300 | clk_enable(clkp); | |
301 | } | |
302 | ||
db62e5bd | 303 | unsigned long clk_get_rate(struct clk *clk) |
36ddf31b PM |
304 | { |
305 | return clk->rate; | |
306 | } | |
db62e5bd | 307 | EXPORT_SYMBOL_GPL(clk_get_rate); |
36ddf31b PM |
308 | |
309 | int clk_set_rate(struct clk *clk, unsigned long rate) | |
1929cb34 | 310 | { |
311 | return clk_set_rate_ex(clk, rate, 0); | |
312 | } | |
db62e5bd | 313 | EXPORT_SYMBOL_GPL(clk_set_rate); |
1929cb34 | 314 | |
315 | int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id) | |
36ddf31b PM |
316 | { |
317 | int ret = -EOPNOTSUPP; | |
100890c5 | 318 | unsigned long flags; |
36ddf31b | 319 | |
100890c5 | 320 | spin_lock_irqsave(&clock_lock, flags); |
36ddf31b | 321 | |
100890c5 | 322 | if (likely(clk->ops && clk->ops->set_rate)) { |
1929cb34 | 323 | ret = clk->ops->set_rate(clk, rate, algo_id); |
100890c5 PM |
324 | if (ret != 0) |
325 | goto out_unlock; | |
326 | } else { | |
327 | clk->rate = rate; | |
328 | ret = 0; | |
36ddf31b PM |
329 | } |
330 | ||
100890c5 PM |
331 | if (clk->ops && clk->ops->recalc) |
332 | clk->rate = clk->ops->recalc(clk); | |
333 | ||
334 | propagate_rate(clk); | |
335 | ||
336 | out_unlock: | |
337 | spin_unlock_irqrestore(&clock_lock, flags); | |
338 | ||
36ddf31b PM |
339 | return ret; |
340 | } | |
db62e5bd | 341 | EXPORT_SYMBOL_GPL(clk_set_rate_ex); |
36ddf31b | 342 | |
d680c76e FV |
343 | int clk_set_parent(struct clk *clk, struct clk *parent) |
344 | { | |
b1f6cfe4 | 345 | unsigned long flags; |
d680c76e | 346 | int ret = -EINVAL; |
d680c76e FV |
347 | |
348 | if (!parent || !clk) | |
349 | return ret; | |
aa87aa34 PM |
350 | if (clk->parent == parent) |
351 | return 0; | |
d680c76e | 352 | |
b1f6cfe4 PM |
353 | spin_lock_irqsave(&clock_lock, flags); |
354 | if (clk->usecount == 0) { | |
355 | if (clk->ops->set_parent) | |
356 | ret = clk->ops->set_parent(clk, parent); | |
aa87aa34 PM |
357 | else |
358 | ret = clk_reparent(clk, parent); | |
359 | ||
b1f6cfe4 | 360 | if (ret == 0) { |
aa87aa34 PM |
361 | pr_debug("clock: set parent of %s to %s (new rate %ld)\n", |
362 | clk->name, clk->parent->name, clk->rate); | |
b1f6cfe4 PM |
363 | if (clk->ops->recalc) |
364 | clk->rate = clk->ops->recalc(clk); | |
365 | propagate_rate(clk); | |
366 | } | |
367 | } else | |
368 | ret = -EBUSY; | |
369 | spin_unlock_irqrestore(&clock_lock, flags); | |
d680c76e | 370 | |
d680c76e FV |
371 | return ret; |
372 | } | |
373 | EXPORT_SYMBOL_GPL(clk_set_parent); | |
374 | ||
375 | struct clk *clk_get_parent(struct clk *clk) | |
376 | { | |
377 | return clk->parent; | |
378 | } | |
379 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
380 | ||
f6991b04 PM |
381 | long clk_round_rate(struct clk *clk, unsigned long rate) |
382 | { | |
383 | if (likely(clk->ops && clk->ops->round_rate)) { | |
384 | unsigned long flags, rounded; | |
385 | ||
386 | spin_lock_irqsave(&clock_lock, flags); | |
387 | rounded = clk->ops->round_rate(clk, rate); | |
388 | spin_unlock_irqrestore(&clock_lock, flags); | |
389 | ||
390 | return rounded; | |
391 | } | |
392 | ||
393 | return clk_get_rate(clk); | |
394 | } | |
395 | EXPORT_SYMBOL_GPL(clk_round_rate); | |
396 | ||
1d118562 PM |
397 | /* |
398 | * Returns a clock. Note that we first try to use device id on the bus | |
399 | * and clock name. If this fails, we try to use clock name only. | |
400 | */ | |
401 | struct clk *clk_get(struct device *dev, const char *id) | |
36ddf31b | 402 | { |
0dae8957 | 403 | const char *dev_id = dev ? dev_name(dev) : NULL; |
36ddf31b | 404 | struct clk *p, *clk = ERR_PTR(-ENOENT); |
1d118562 PM |
405 | int idno; |
406 | ||
0dae8957 | 407 | clk = clk_get_sys(dev_id, id); |
f3f8290c | 408 | if (clk && !IS_ERR(clk)) |
0dae8957 PM |
409 | return clk; |
410 | ||
1d118562 PM |
411 | if (dev == NULL || dev->bus != &platform_bus_type) |
412 | idno = -1; | |
413 | else | |
414 | idno = to_platform_device(dev)->id; | |
36ddf31b | 415 | |
237b98f6 | 416 | mutex_lock(&clock_list_sem); |
1d118562 | 417 | list_for_each_entry(p, &clock_list, node) { |
d97432f1 | 418 | if (p->name && p->id == idno && |
1d118562 PM |
419 | strcmp(id, p->name) == 0 && try_module_get(p->owner)) { |
420 | clk = p; | |
421 | goto found; | |
422 | } | |
423 | } | |
424 | ||
36ddf31b | 425 | list_for_each_entry(p, &clock_list, node) { |
d97432f1 MD |
426 | if (p->name && |
427 | strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | |
36ddf31b PM |
428 | clk = p; |
429 | break; | |
430 | } | |
431 | } | |
1d118562 PM |
432 | |
433 | found: | |
237b98f6 | 434 | mutex_unlock(&clock_list_sem); |
36ddf31b PM |
435 | |
436 | return clk; | |
437 | } | |
db62e5bd | 438 | EXPORT_SYMBOL_GPL(clk_get); |
36ddf31b PM |
439 | |
440 | void clk_put(struct clk *clk) | |
441 | { | |
442 | if (clk && !IS_ERR(clk)) | |
443 | module_put(clk->owner); | |
444 | } | |
db62e5bd | 445 | EXPORT_SYMBOL_GPL(clk_put); |
36ddf31b | 446 | |
4a55026f FV |
447 | #ifdef CONFIG_PM |
448 | static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state) | |
449 | { | |
450 | static pm_message_t prev_state; | |
451 | struct clk *clkp; | |
452 | ||
453 | switch (state.event) { | |
454 | case PM_EVENT_ON: | |
455 | /* Resumeing from hibernation */ | |
b68d8201 PM |
456 | if (prev_state.event != PM_EVENT_FREEZE) |
457 | break; | |
458 | ||
459 | list_for_each_entry(clkp, &clock_list, node) { | |
460 | if (likely(clkp->ops)) { | |
461 | unsigned long rate = clkp->rate; | |
462 | ||
463 | if (likely(clkp->ops->set_parent)) | |
464 | clkp->ops->set_parent(clkp, | |
465 | clkp->parent); | |
466 | if (likely(clkp->ops->set_rate)) | |
467 | clkp->ops->set_rate(clkp, | |
468 | rate, NO_CHANGE); | |
469 | else if (likely(clkp->ops->recalc)) | |
470 | clkp->rate = clkp->ops->recalc(clkp); | |
471 | } | |
4a55026f FV |
472 | } |
473 | break; | |
474 | case PM_EVENT_FREEZE: | |
475 | break; | |
476 | case PM_EVENT_SUSPEND: | |
477 | break; | |
478 | } | |
479 | ||
480 | prev_state = state; | |
481 | return 0; | |
482 | } | |
483 | ||
484 | static int clks_sysdev_resume(struct sys_device *dev) | |
485 | { | |
486 | return clks_sysdev_suspend(dev, PMSG_ON); | |
487 | } | |
488 | ||
489 | static struct sysdev_class clks_sysdev_class = { | |
490 | .name = "clks", | |
491 | }; | |
492 | ||
493 | static struct sysdev_driver clks_sysdev_driver = { | |
494 | .suspend = clks_sysdev_suspend, | |
495 | .resume = clks_sysdev_resume, | |
496 | }; | |
497 | ||
498 | static struct sys_device clks_sysdev_dev = { | |
499 | .cls = &clks_sysdev_class, | |
500 | }; | |
501 | ||
502 | static int __init clk_sysdev_init(void) | |
503 | { | |
504 | sysdev_class_register(&clks_sysdev_class); | |
505 | sysdev_driver_register(&clks_sysdev_class, &clks_sysdev_driver); | |
506 | sysdev_register(&clks_sysdev_dev); | |
507 | ||
508 | return 0; | |
509 | } | |
510 | subsys_initcall(clk_sysdev_init); | |
511 | #endif | |
512 | ||
36ddf31b PM |
513 | int __init clk_init(void) |
514 | { | |
253b0887 | 515 | int ret; |
36ddf31b | 516 | |
253b0887 PM |
517 | ret = arch_clk_init(); |
518 | if (unlikely(ret)) { | |
519 | pr_err("%s: CPU clock registration failed.\n", __func__); | |
520 | return ret; | |
36ddf31b PM |
521 | } |
522 | ||
253b0887 PM |
523 | if (sh_mv.mv_clk_init) { |
524 | ret = sh_mv.mv_clk_init(); | |
525 | if (unlikely(ret)) { | |
526 | pr_err("%s: machvec clock initialization failed.\n", | |
527 | __func__); | |
528 | return ret; | |
529 | } | |
530 | } | |
dfbbbe92 | 531 | |
36ddf31b | 532 | /* Kick the child clocks.. */ |
b1f6cfe4 | 533 | recalculate_root_clocks(); |
36ddf31b | 534 | |
4ff29ff8 PM |
535 | /* Enable the necessary init clocks */ |
536 | clk_enable_init_clocks(); | |
537 | ||
36ddf31b PM |
538 | return ret; |
539 | } | |
540 | ||
cedcf336 PM |
541 | /* |
542 | * debugfs support to trace clock tree hierarchy and attributes | |
543 | */ | |
544 | static struct dentry *clk_debugfs_root; | |
545 | ||
546 | static int clk_debugfs_register_one(struct clk *c) | |
36ddf31b | 547 | { |
cedcf336 | 548 | int err; |
bc10e875 | 549 | struct dentry *d, *child, *child_tmp; |
cedcf336 PM |
550 | struct clk *pa = c->parent; |
551 | char s[255]; | |
552 | char *p = s; | |
553 | ||
554 | p += sprintf(p, "%s", c->name); | |
549b5e35 | 555 | if (c->id >= 0) |
cedcf336 PM |
556 | sprintf(p, ":%d", c->id); |
557 | d = debugfs_create_dir(s, pa ? pa->dentry : clk_debugfs_root); | |
558 | if (!d) | |
559 | return -ENOMEM; | |
560 | c->dentry = d; | |
561 | ||
562 | d = debugfs_create_u8("usecount", S_IRUGO, c->dentry, (u8 *)&c->usecount); | |
563 | if (!d) { | |
564 | err = -ENOMEM; | |
565 | goto err_out; | |
566 | } | |
567 | d = debugfs_create_u32("rate", S_IRUGO, c->dentry, (u32 *)&c->rate); | |
568 | if (!d) { | |
569 | err = -ENOMEM; | |
570 | goto err_out; | |
571 | } | |
572 | d = debugfs_create_x32("flags", S_IRUGO, c->dentry, (u32 *)&c->flags); | |
573 | if (!d) { | |
574 | err = -ENOMEM; | |
575 | goto err_out; | |
576 | } | |
577 | return 0; | |
578 | ||
579 | err_out: | |
580 | d = c->dentry; | |
bc10e875 | 581 | list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child) |
cedcf336 PM |
582 | debugfs_remove(child); |
583 | debugfs_remove(c->dentry); | |
584 | return err; | |
585 | } | |
586 | ||
587 | static int clk_debugfs_register(struct clk *c) | |
588 | { | |
589 | int err; | |
590 | struct clk *pa = c->parent; | |
591 | ||
592 | if (pa && !pa->dentry) { | |
593 | err = clk_debugfs_register(pa); | |
594 | if (err) | |
595 | return err; | |
596 | } | |
36ddf31b | 597 | |
d97432f1 | 598 | if (!c->dentry && c->name) { |
cedcf336 PM |
599 | err = clk_debugfs_register_one(c); |
600 | if (err) | |
601 | return err; | |
602 | } | |
603 | return 0; | |
604 | } | |
605 | ||
606 | static int __init clk_debugfs_init(void) | |
607 | { | |
608 | struct clk *c; | |
609 | struct dentry *d; | |
610 | int err; | |
611 | ||
612 | d = debugfs_create_dir("clock", NULL); | |
613 | if (!d) | |
614 | return -ENOMEM; | |
615 | clk_debugfs_root = d; | |
616 | ||
617 | list_for_each_entry(c, &clock_list, node) { | |
618 | err = clk_debugfs_register(c); | |
619 | if (err) | |
620 | goto err_out; | |
621 | } | |
36ddf31b | 622 | return 0; |
cedcf336 PM |
623 | err_out: |
624 | debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */ | |
625 | return err; | |
36ddf31b | 626 | } |
cedcf336 | 627 | late_initcall(clk_debugfs_init); |