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Commit | Line | Data |
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1da177e4 | 1 | /* |
26ff6c11 PM |
2 | * This file contains the functions and defines necessary to modify and |
3 | * use the SuperH page table tree. | |
4 | * | |
1da177e4 | 5 | * Copyright (C) 1999 Niibe Yutaka |
249cfea9 | 6 | * Copyright (C) 2002 - 2007 Paul Mundt |
26ff6c11 PM |
7 | * |
8 | * This file is subject to the terms and conditions of the GNU General | |
9 | * Public License. See the file "COPYING" in the main directory of this | |
10 | * archive for more details. | |
1da177e4 | 11 | */ |
26ff6c11 PM |
12 | #ifndef __ASM_SH_PGTABLE_H |
13 | #define __ASM_SH_PGTABLE_H | |
1da177e4 | 14 | |
782bb5a5 | 15 | #ifdef CONFIG_X2TLB |
e44d6c40 | 16 | #include <asm/pgtable-3level.h> |
5d9b4b19 | 17 | #else |
e44d6c40 | 18 | #include <asm/pgtable-2level.h> |
5d9b4b19 | 19 | #endif |
26ff6c11 PM |
20 | #include <asm/page.h> |
21 | ||
1da177e4 | 22 | #ifndef __ASSEMBLY__ |
1da177e4 LT |
23 | #include <asm/addrspace.h> |
24 | #include <asm/fixmap.h> | |
1da177e4 | 25 | |
1da177e4 LT |
26 | /* |
27 | * ZERO_PAGE is a global shared page that is always zero: used | |
28 | * for zero-mapped memory areas etc.. | |
29 | */ | |
26ff6c11 | 30 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; |
1da177e4 LT |
31 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
32 | ||
33 | #endif /* !__ASSEMBLY__ */ | |
34 | ||
36bcd39d PM |
35 | /* |
36 | * Effective and physical address definitions, to aid with sign | |
37 | * extension. | |
38 | */ | |
39 | #define NEFF 32 | |
40 | #define NEFF_SIGN (1LL << (NEFF - 1)) | |
41 | #define NEFF_MASK (-1LL << NEFF) | |
42 | ||
c7914834 PM |
43 | static inline unsigned long long neff_sign_extend(unsigned long val) |
44 | { | |
45 | unsigned long long extended = val; | |
46 | return (extended & NEFF_SIGN) ? (extended | NEFF_MASK) : extended; | |
47 | } | |
48 | ||
36bcd39d PM |
49 | #ifdef CONFIG_29BIT |
50 | #define NPHYS 29 | |
51 | #else | |
52 | #define NPHYS 32 | |
53 | #endif | |
54 | ||
55 | #define NPHYS_SIGN (1LL << (NPHYS - 1)) | |
56 | #define NPHYS_MASK (-1LL << NPHYS) | |
57 | ||
db2e1fa3 | 58 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) |
1da177e4 LT |
59 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) |
60 | ||
21440cf0 | 61 | /* Entries per level */ |
7a847f81 | 62 | #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) |
21440cf0 | 63 | |
d455a369 | 64 | #define FIRST_USER_ADDRESS 0 |
1da177e4 | 65 | |
1f69b6af MF |
66 | #define PHYS_ADDR_MASK29 0x1fffffff |
67 | #define PHYS_ADDR_MASK32 0xffffffff | |
68 | ||
69 | #ifdef CONFIG_PMB | |
70 | static inline unsigned long phys_addr_mask(void) | |
71 | { | |
72 | /* Is the MMU in 29bit mode? */ | |
73 | if (__in_29bit_mode()) | |
74 | return PHYS_ADDR_MASK29; | |
75 | ||
76 | return PHYS_ADDR_MASK32; | |
77 | } | |
2a8bc923 | 78 | #elif defined(CONFIG_32BIT) |
1f69b6af MF |
79 | static inline unsigned long phys_addr_mask(void) |
80 | { | |
81 | return PHYS_ADDR_MASK32; | |
82 | } | |
d02b08f6 | 83 | #else |
1f69b6af MF |
84 | static inline unsigned long phys_addr_mask(void) |
85 | { | |
86 | return PHYS_ADDR_MASK29; | |
87 | } | |
d02b08f6 SM |
88 | #endif |
89 | ||
1f69b6af | 90 | #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) |
cb700aa4 | 91 | #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) |
1da177e4 | 92 | |
0468b4bb | 93 | #ifdef CONFIG_SUPERH32 |
f0b859e3 | 94 | #define VMALLOC_START (P3SEG) |
0468b4bb PM |
95 | #else |
96 | #define VMALLOC_START (0xf0000000) | |
97 | #endif | |
1da177e4 LT |
98 | #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) |
99 | ||
249cfea9 PM |
100 | #if defined(CONFIG_SUPERH32) |
101 | #include <asm/pgtable_32.h> | |
21440cf0 | 102 | #else |
249cfea9 | 103 | #include <asm/pgtable_64.h> |
1da177e4 LT |
104 | #endif |
105 | ||
106 | /* | |
21440cf0 PM |
107 | * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page |
108 | * protection for execute, and considers it the same as a read. Also, write | |
109 | * permission implies read permission. This is the closest we can get.. | |
110 | * | |
111 | * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme, | |
112 | * not only supporting separate execute, read, and write bits, but having | |
113 | * completely separate permission bits for user and kernel space. | |
1da177e4 | 114 | */ |
21440cf0 | 115 | /*xwr*/ |
1da177e4 LT |
116 | #define __P000 PAGE_NONE |
117 | #define __P001 PAGE_READONLY | |
118 | #define __P010 PAGE_COPY | |
119 | #define __P011 PAGE_COPY | |
21440cf0 PM |
120 | #define __P100 PAGE_EXECREAD |
121 | #define __P101 PAGE_EXECREAD | |
1da177e4 LT |
122 | #define __P110 PAGE_COPY |
123 | #define __P111 PAGE_COPY | |
124 | ||
125 | #define __S000 PAGE_NONE | |
126 | #define __S001 PAGE_READONLY | |
21440cf0 | 127 | #define __S010 PAGE_WRITEONLY |
1da177e4 | 128 | #define __S011 PAGE_SHARED |
21440cf0 PM |
129 | #define __S100 PAGE_EXECREAD |
130 | #define __S101 PAGE_EXECREAD | |
131 | #define __S110 PAGE_RWX | |
132 | #define __S111 PAGE_RWX | |
1da177e4 | 133 | |
1da177e4 LT |
134 | typedef pte_t *pte_addr_t; |
135 | ||
1da177e4 LT |
136 | #define kern_addr_valid(addr) (1) |
137 | ||
1da177e4 LT |
138 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ |
139 | remap_pfn_range(vma, vaddr, pfn, size, prot) | |
140 | ||
249cfea9 | 141 | #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) |
8c65b4a6 | 142 | |
1da177e4 | 143 | /* |
2a5eacca | 144 | * Initialise the page table caches |
1da177e4 | 145 | */ |
2a5eacca | 146 | extern void pgtable_cache_init(void); |
1da177e4 | 147 | |
249cfea9 | 148 | struct vm_area_struct; |
9cef7492 PM |
149 | |
150 | extern void __update_cache(struct vm_area_struct *vma, | |
151 | unsigned long address, pte_t pte); | |
152 | extern void __update_tlb(struct vm_area_struct *vma, | |
153 | unsigned long address, pte_t pte); | |
154 | ||
155 | static inline void | |
4b3073e1 | 156 | update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) |
9cef7492 | 157 | { |
4b3073e1 | 158 | pte_t pte = *ptep; |
9cef7492 PM |
159 | __update_cache(vma, address, pte); |
160 | __update_tlb(vma, address, pte); | |
161 | } | |
162 | ||
21440cf0 PM |
163 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; |
164 | extern void paging_init(void); | |
9acb98fb PM |
165 | extern void page_table_range_init(unsigned long start, unsigned long end, |
166 | pgd_t *pgd); | |
21440cf0 | 167 | |
ee1acbfa PM |
168 | /* arch/sh/mm/mmap.c */ |
169 | #define HAVE_ARCH_UNMAPPED_AREA | |
170 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN | |
171 | ||
a16382ce PM |
172 | #define __HAVE_ARCH_PTE_SPECIAL |
173 | ||
1da177e4 LT |
174 | #include <asm-generic/pgtable.h> |
175 | ||
249cfea9 | 176 | #endif /* __ASM_SH_PGTABLE_H */ |