[net-next-2.6.git] / arch / sh / include / asm / cache.h

/* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $
 *
 * include/asm-sh/cache.h
 *
 * Copyright 1999 (C) Niibe Yutaka
 * Copyright 2002, 2003 (C) Paul Mundt
 */
#ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H
#ifdef __KERNEL__

#include <linux/init.h>
#include <cpu/cache.h>

#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)

#define __read_mostly __attribute__((__section__(".data..read_mostly")))

#ifndef __ASSEMBLY__
struct cache_info {
	unsigned int ways;		/* Number of cache ways */
	unsigned int sets;		/* Number of cache sets */
	unsigned int linesz;		/* Cache line size (bytes) */

	unsigned int way_size;		/* sets * line size */

	/*
	 * way_incr is the address offset for accessing the next way
	 * in memory mapped cache array ops.
	 */
	unsigned int way_incr;
	unsigned int entry_shift;
	unsigned int entry_mask;

	/*
	 * Compute a mask which selects the address bits which overlap between
	 * 1. those used to select the cache set during indexing
	 * 2. those in the physical page number.
	 */
	unsigned int alias_mask;
	unsigned int n_aliases;		/* Number of aliases */

	unsigned long flags;
};
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* __ASM_SH_CACHE_H */
Commit	Line	Data
1da177e4 LT	1	/* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $
	2	*
	3	* include/asm-sh/cache.h
	4	*
	5	* Copyright 1999 (C) Niibe Yutaka
	6	* Copyright 2002, 2003 (C) Paul Mundt
	7	*/
	8	#ifndef __ASM_SH_CACHE_H
	9	#define __ASM_SH_CACHE_H
	10	#ifdef __KERNEL__
	11
357d5946	12	#include <linux/init.h>
f15cbe6f	13	#include <cpu/cache.h>
1da177e4	14
1da177e4	15	#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
1da177e4	16
54cb27a7	17	#define __read_mostly __attribute__((__section__(".data..read_mostly")))
121fc47d	18
87e29cac	19	#ifndef __ASSEMBLY__
1da177e4	20	struct cache_info {
b638d0b9 RC	21	unsigned int ways; /* Number of cache ways */
	22	unsigned int sets; /* Number of cache sets */
	23	unsigned int linesz; /* Cache line size (bytes) */
1da177e4	24
b638d0b9	25	unsigned int way_size; /* sets * line size */
1da177e4	26
b638d0b9 RC	27	/*
	28	* way_incr is the address offset for accessing the next way
	29	* in memory mapped cache array ops.
	30	*/
	31	unsigned int way_incr;
1da177e4 LT	32	unsigned int entry_shift;
	33	unsigned int entry_mask;
	34
b638d0b9 RC	35	/*
	36	* Compute a mask which selects the address bits which overlap between
	37	* 1. those used to select the cache set during indexing
	38	* 2. those in the physical page number.
	39	*/
	40	unsigned int alias_mask;
b638d0b9 RC	41	unsigned int n_aliases; /* Number of aliases */
b638d0b9 RC	42
1da177e4 LT	43	unsigned long flags;
1da177e4 LT	44	};
87e29cac	45	#endif /* __ASSEMBLY__ */
1da177e4 LT	46	#endif /* __KERNEL__ */
1da177e4 LT	47	#endif /* __ASM_SH_CACHE_H */