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1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/physmap.h>
15#include <linux/gpio.h>
16#include <linux/interrupt.h>
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17#include <linux/io.h>
18#include <linux/delay.h>
907050a3 19#include <linux/usb/r8a66597.h>
4907d57f 20#include <linux/i2c.h>
8810e055 21#include <linux/i2c/tsc2007.h>
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22#include <linux/spi/spi.h>
23#include <linux/spi/sh_msiof.h>
24#include <linux/spi/mmc_spi.h>
25#include <linux/mmc/host.h>
e9103e74 26#include <linux/input.h>
fc1d003d 27#include <linux/input/sh_keysc.h>
98779ad8 28#include <linux/mfd/sh_mobile_sdhi.h>
fa3ba51b 29#include <video/sh_mobile_lcdc.h>
1980fdc4 30#include <sound/sh_fsi.h>
2153ad32 31#include <media/sh_mobile_ceu.h>
207efd07 32#include <media/tw9910.h>
9aa25d64 33#include <media/mt9t112.h>
4138b740 34#include <asm/heartbeat.h>
35a35408 35#include <asm/sh_eth.h>
a991801a 36#include <asm/clock.h>
eb0cd9e8 37#include <asm/suspend.h>
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38#include <cpu/sh7724.h>
39
40/*
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41 * Address Interface BusWidth
42 *-----------------------------------------
43 * 0x0000_0000 uboot 16bit
44 * 0x0004_0000 Linux romImage 16bit
45 * 0x0014_0000 MTD for Linux 16bit
46 * 0x0400_0000 Internal I/O 16/32bit
47 * 0x0800_0000 DRAM 32bit
48 * 0x1800_0000 MFI 16bit
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49 */
50
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51/* SWITCH
52 *------------------------------
53 * DS2[1] = FlashROM write protect ON : write protect
54 * OFF : No write protect
55 * DS2[2] = RMII / TS, SCIF ON : RMII
56 * OFF : TS, SCIF3
57 * DS2[3] = Camera / Video ON : Camera
58 * OFF : NTSC/PAL (IN)
59 * DS2[5] = NTSC_OUT Clock ON : On board OSC
60 * OFF : SH7724 DV_CLK
61 * DS2[6-7] = MMC / SD ON-OFF : SD
62 * OFF-ON : MMC
63 */
64
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65/* Heartbeat */
66static unsigned char led_pos[] = { 0, 1, 2, 3 };
67static struct heartbeat_data heartbeat_data = {
68 .regsize = 8,
69 .nr_bits = 4,
70 .bit_pos = led_pos,
71};
72
73static struct resource heartbeat_resources[] = {
74 [0] = {
75 .start = 0xA405012C, /* PTG */
76 .end = 0xA405012E - 1,
77 .flags = IORESOURCE_MEM,
78 },
79};
80
81static struct platform_device heartbeat_device = {
82 .name = "heartbeat",
83 .id = -1,
84 .dev = {
85 .platform_data = &heartbeat_data,
86 },
87 .num_resources = ARRAY_SIZE(heartbeat_resources),
88 .resource = heartbeat_resources,
89};
90
91/* MTD */
92static struct mtd_partition nor_flash_partitions[] = {
93 {
b7056bc1 94 .name = "boot loader",
4138b740 95 .offset = 0,
b7056bc1 96 .size = (5 * 1024 * 1024),
d5ce010c 97 .mask_flags = MTD_WRITEABLE, /* force read-only */
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98 }, {
99 .name = "free-area",
100 .offset = MTDPART_OFS_APPEND,
101 .size = MTDPART_SIZ_FULL,
102 },
103};
104
105static struct physmap_flash_data nor_flash_data = {
106 .width = 2,
107 .parts = nor_flash_partitions,
108 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
109};
110
111static struct resource nor_flash_resources[] = {
112 [0] = {
113 .name = "NOR Flash",
114 .start = 0x00000000,
115 .end = 0x03ffffff,
116 .flags = IORESOURCE_MEM,
117 }
118};
119
120static struct platform_device nor_flash_device = {
121 .name = "physmap-flash",
122 .resource = nor_flash_resources,
123 .num_resources = ARRAY_SIZE(nor_flash_resources),
124 .dev = {
125 .platform_data = &nor_flash_data,
126 },
127};
128
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129/* SH Eth */
130#define SH_ETH_ADDR (0xA4600000)
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131static struct resource sh_eth_resources[] = {
132 [0] = {
133 .start = SH_ETH_ADDR,
134 .end = SH_ETH_ADDR + 0x1FC,
135 .flags = IORESOURCE_MEM,
136 },
137 [1] = {
138 .start = 91,
139 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
140 },
141};
142
143struct sh_eth_plat_data sh_eth_plat = {
144 .phy = 0x1f, /* SMSC LAN8700 */
145 .edmac_endian = EDMAC_LITTLE_ENDIAN,
acf3cc28 146 .ether_link_active_low = 1
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147};
148
149static struct platform_device sh_eth_device = {
150 .name = "sh-eth",
151 .id = 0,
152 .dev = {
153 .platform_data = &sh_eth_plat,
154 },
155 .num_resources = ARRAY_SIZE(sh_eth_resources),
156 .resource = sh_eth_resources,
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157 .archdata = {
158 .hwblk_id = HWBLK_ETHER,
159 },
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160};
161
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162/* USB0 host */
163void usb0_port_power(int port, int power)
164{
165 gpio_set_value(GPIO_PTB4, power);
166}
167
168static struct r8a66597_platdata usb0_host_data = {
169 .on_chip = 1,
170 .port_power = usb0_port_power,
171};
172
173static struct resource usb0_host_resources[] = {
174 [0] = {
175 .start = 0xa4d80000,
176 .end = 0xa4d80124 - 1,
177 .flags = IORESOURCE_MEM,
178 },
179 [1] = {
180 .start = 65,
181 .end = 65,
182 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
183 },
184};
185
186static struct platform_device usb0_host_device = {
187 .name = "r8a66597_hcd",
188 .id = 0,
189 .dev = {
190 .dma_mask = NULL, /* not use dma */
191 .coherent_dma_mask = 0xffffffff,
192 .platform_data = &usb0_host_data,
193 },
194 .num_resources = ARRAY_SIZE(usb0_host_resources),
195 .resource = usb0_host_resources,
196};
197
3714a9a0 198/* USB1 host/function */
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199void usb1_port_power(int port, int power)
200{
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201 gpio_set_value(GPIO_PTB5, power);
202}
203
3714a9a0 204static struct r8a66597_platdata usb1_common_data = {
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205 .on_chip = 1,
206 .port_power = usb1_port_power,
207};
208
3714a9a0 209static struct resource usb1_common_resources[] = {
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210 [0] = {
211 .start = 0xa4d90000,
212 .end = 0xa4d90124 - 1,
213 .flags = IORESOURCE_MEM,
214 },
215 [1] = {
216 .start = 66,
217 .end = 66,
218 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
219 },
220};
221
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222static struct platform_device usb1_common_device = {
223 /* .name will be added in arch_setup */
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224 .id = 1,
225 .dev = {
226 .dma_mask = NULL, /* not use dma */
227 .coherent_dma_mask = 0xffffffff,
3714a9a0 228 .platform_data = &usb1_common_data,
907050a3 229 },
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230 .num_resources = ARRAY_SIZE(usb1_common_resources),
231 .resource = usb1_common_resources,
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232};
233
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234/* LCDC */
235static struct sh_mobile_lcdc_info lcdc_info = {
236 .ch[0] = {
237 .interface_type = RGB18,
238 .chan = LCDC_CHAN_MAINLCD,
239 .bpp = 16,
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240 .lcd_cfg = {
241 .sync = 0, /* hsync and vsync are active low */
242 },
243 .lcd_size_cfg = { /* 7.0 inch */
244 .width = 152,
245 .height = 91,
246 },
247 .board_cfg = {
248 },
249 }
250};
251
252static struct resource lcdc_resources[] = {
253 [0] = {
254 .name = "LCDC",
255 .start = 0xfe940000,
a6f15ade 256 .end = 0xfe942fff,
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257 .flags = IORESOURCE_MEM,
258 },
259 [1] = {
260 .start = 106,
261 .flags = IORESOURCE_IRQ,
262 },
263};
264
265static struct platform_device lcdc_device = {
266 .name = "sh_mobile_lcdc_fb",
267 .num_resources = ARRAY_SIZE(lcdc_resources),
268 .resource = lcdc_resources,
269 .dev = {
270 .platform_data = &lcdc_info,
271 },
272 .archdata = {
273 .hwblk_id = HWBLK_LCDC,
274 },
275};
276
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277/* CEU0 */
278static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
279 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
280};
281
282static struct resource ceu0_resources[] = {
283 [0] = {
284 .name = "CEU0",
285 .start = 0xfe910000,
286 .end = 0xfe91009f,
287 .flags = IORESOURCE_MEM,
288 },
289 [1] = {
290 .start = 52,
291 .flags = IORESOURCE_IRQ,
292 },
293 [2] = {
294 /* place holder for contiguous memory */
295 },
296};
297
298static struct platform_device ceu0_device = {
299 .name = "sh_mobile_ceu",
300 .id = 0, /* "ceu0" clock */
301 .num_resources = ARRAY_SIZE(ceu0_resources),
302 .resource = ceu0_resources,
303 .dev = {
304 .platform_data = &sh_mobile_ceu0_info,
305 },
306 .archdata = {
307 .hwblk_id = HWBLK_CEU0,
308 },
309};
310
311/* CEU1 */
312static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
313 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
314};
315
316static struct resource ceu1_resources[] = {
317 [0] = {
318 .name = "CEU1",
319 .start = 0xfe914000,
320 .end = 0xfe91409f,
321 .flags = IORESOURCE_MEM,
322 },
323 [1] = {
324 .start = 63,
325 .flags = IORESOURCE_IRQ,
326 },
327 [2] = {
328 /* place holder for contiguous memory */
329 },
330};
331
332static struct platform_device ceu1_device = {
333 .name = "sh_mobile_ceu",
334 .id = 1, /* "ceu1" clock */
335 .num_resources = ARRAY_SIZE(ceu1_resources),
336 .resource = ceu1_resources,
337 .dev = {
338 .platform_data = &sh_mobile_ceu1_info,
339 },
340 .archdata = {
341 .hwblk_id = HWBLK_CEU1,
342 },
343};
344
125ecce6 345/* I2C device */
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346static struct i2c_board_info i2c0_devices[] = {
347 {
348 I2C_BOARD_INFO("da7210", 0x1a),
349 },
350};
351
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352static struct i2c_board_info i2c1_devices[] = {
353 {
354 I2C_BOARD_INFO("r2025sd", 0x32),
355 },
356};
357
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358/* KEYSC */
359static struct sh_keysc_info keysc_info = {
360 .mode = SH_KEYSC_MODE_1,
361 .scan_timing = 3,
362 .delay = 50,
363 .kycr2_delay = 100,
364 .keycodes = { KEY_1, 0, 0, 0, 0,
365 KEY_2, 0, 0, 0, 0,
366 KEY_3, 0, 0, 0, 0,
367 KEY_4, 0, 0, 0, 0,
368 KEY_5, 0, 0, 0, 0,
369 KEY_6, 0, 0, 0, 0, },
370};
371
372static struct resource keysc_resources[] = {
373 [0] = {
374 .name = "KEYSC",
375 .start = 0x044b0000,
376 .end = 0x044b000f,
377 .flags = IORESOURCE_MEM,
378 },
379 [1] = {
380 .start = 79,
381 .flags = IORESOURCE_IRQ,
382 },
383};
384
385static struct platform_device keysc_device = {
386 .name = "sh_keysc",
387 .id = 0, /* keysc0 clock */
388 .num_resources = ARRAY_SIZE(keysc_resources),
389 .resource = keysc_resources,
390 .dev = {
391 .platform_data = &keysc_info,
392 },
393 .archdata = {
394 .hwblk_id = HWBLK_KEYSC,
395 },
396};
397
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398/* TouchScreen */
399#define IRQ0 32
400static int ts_get_pendown_state(void)
401{
402 int val = 0;
403 gpio_free(GPIO_FN_INTC_IRQ0);
404 gpio_request(GPIO_PTZ0, NULL);
405 gpio_direction_input(GPIO_PTZ0);
406
407 val = gpio_get_value(GPIO_PTZ0);
408
409 gpio_free(GPIO_PTZ0);
410 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
411
412 return val ? 0 : 1;
413}
414
415static int ts_init(void)
416{
417 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
418 return 0;
419}
420
421struct tsc2007_platform_data tsc2007_info = {
422 .model = 2007,
423 .x_plate_ohms = 180,
424 .get_pendown_state = ts_get_pendown_state,
425 .init_platform_hw = ts_init,
426};
427
428static struct i2c_board_info ts_i2c_clients = {
429 I2C_BOARD_INFO("tsc2007", 0x48),
430 .type = "tsc2007",
431 .platform_data = &tsc2007_info,
432 .irq = IRQ0,
433};
434
1ce4da7a 435#ifdef CONFIG_MFD_SH_MOBILE_SDHI
96987d96 436/* SHDI0 */
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437static void sdhi0_set_pwr(struct platform_device *pdev, int state)
438{
439 gpio_set_value(GPIO_PTB6, state);
440}
441
442static struct sh_mobile_sdhi_info sdhi0_info = {
443 .set_pwr = sdhi0_set_pwr,
444};
445
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446static struct resource sdhi0_resources[] = {
447 [0] = {
448 .name = "SDHI0",
449 .start = 0x04ce0000,
450 .end = 0x04ce01ff,
451 .flags = IORESOURCE_MEM,
452 },
453 [1] = {
454 .start = 101,
455 .flags = IORESOURCE_IRQ,
456 },
457};
458
459static struct platform_device sdhi0_device = {
460 .name = "sh_mobile_sdhi",
461 .num_resources = ARRAY_SIZE(sdhi0_resources),
462 .resource = sdhi0_resources,
463 .id = 0,
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464 .dev = {
465 .platform_data = &sdhi0_info,
466 },
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467 .archdata = {
468 .hwblk_id = HWBLK_SDHI0,
469 },
470};
471
472/* SHDI1 */
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473static void sdhi1_set_pwr(struct platform_device *pdev, int state)
474{
475 gpio_set_value(GPIO_PTB7, state);
476}
477
478static struct sh_mobile_sdhi_info sdhi1_info = {
479 .set_pwr = sdhi1_set_pwr,
480};
481
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482static struct resource sdhi1_resources[] = {
483 [0] = {
484 .name = "SDHI1",
485 .start = 0x04cf0000,
486 .end = 0x04cf01ff,
487 .flags = IORESOURCE_MEM,
488 },
489 [1] = {
490 .start = 24,
491 .flags = IORESOURCE_IRQ,
492 },
493};
494
495static struct platform_device sdhi1_device = {
496 .name = "sh_mobile_sdhi",
497 .num_resources = ARRAY_SIZE(sdhi1_resources),
498 .resource = sdhi1_resources,
499 .id = 1,
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500 .dev = {
501 .platform_data = &sdhi1_info,
502 },
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503 .archdata = {
504 .hwblk_id = HWBLK_SDHI1,
505 },
506};
507
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508#else
509
9503e891 510/* MMC SPI */
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511static int mmc_spi_get_ro(struct device *dev)
512{
513 return gpio_get_value(GPIO_PTY6);
514}
515
516static int mmc_spi_get_cd(struct device *dev)
517{
518 return !gpio_get_value(GPIO_PTY7);
519}
520
521static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
522{
523 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
524}
525
526static struct mmc_spi_platform_data mmc_spi_info = {
527 .get_ro = mmc_spi_get_ro,
528 .get_cd = mmc_spi_get_cd,
529 .caps = MMC_CAP_NEEDS_POLL,
530 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
531 .setpower = mmc_spi_setpower,
532};
533
534static struct spi_board_info spi_bus[] = {
535 {
536 .modalias = "mmc_spi",
537 .platform_data = &mmc_spi_info,
538 .max_speed_hz = 5000000,
539 .mode = SPI_MODE_0,
540 .controller_data = (void *) GPIO_PTM4,
541 },
542};
543
9503e891 544/* MSIOF0 */
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545static struct sh_msiof_spi_info msiof0_data = {
546 .num_chipselect = 1,
547};
548
549static struct resource msiof0_resources[] = {
550 [0] = {
551 .name = "MSIOF0",
552 .start = 0xa4c40000,
553 .end = 0xa4c40063,
554 .flags = IORESOURCE_MEM,
555 },
556 [1] = {
557 .start = 84,
558 .flags = IORESOURCE_IRQ,
559 },
560};
561
562static struct platform_device msiof0_device = {
563 .name = "spi_sh_msiof",
564 .id = 0, /* MSIOF0 */
565 .dev = {
566 .platform_data = &msiof0_data,
567 },
568 .num_resources = ARRAY_SIZE(msiof0_resources),
569 .resource = msiof0_resources,
570 .archdata = {
571 .hwblk_id = HWBLK_MSIOF0,
572 },
573};
574
575#endif
576
9aa25d64 577/* I2C Video/Camera */
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578static struct i2c_board_info i2c_camera[] = {
579 {
580 I2C_BOARD_INFO("tw9910", 0x45),
581 },
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582 {
583 /* 1st camera */
584 I2C_BOARD_INFO("mt9t112", 0x3c),
585 },
586 {
587 /* 2nd camera */
588 I2C_BOARD_INFO("mt9t112", 0x3c),
589 },
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590};
591
592/* tw9910 */
593static int tw9910_power(struct device *dev, int mode)
594{
595 int val = mode ? 0 : 1;
596
597 gpio_set_value(GPIO_PTU2, val);
598 if (mode)
599 mdelay(100);
600
601 return 0;
602}
603
604static struct tw9910_video_info tw9910_info = {
605 .buswidth = SOCAM_DATAWIDTH_8,
606 .mpout = TW9910_MPO_FIELD,
607};
608
609static struct soc_camera_link tw9910_link = {
610 .i2c_adapter_id = 0,
611 .bus_id = 1,
612 .power = tw9910_power,
613 .board_info = &i2c_camera[0],
614 .module_name = "tw9910",
615 .priv = &tw9910_info,
616};
617
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618/* mt9t112 */
619static int mt9t112_power1(struct device *dev, int mode)
620{
621 gpio_set_value(GPIO_PTA3, mode);
622 if (mode)
623 mdelay(100);
624
625 return 0;
626}
627
628static struct mt9t112_camera_info mt9t112_info1 = {
629 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
630 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
631};
632
633static struct soc_camera_link mt9t112_link1 = {
634 .i2c_adapter_id = 0,
635 .power = mt9t112_power1,
636 .bus_id = 0,
637 .board_info = &i2c_camera[1],
638 .module_name = "mt9t112",
639 .priv = &mt9t112_info1,
640};
641
642static int mt9t112_power2(struct device *dev, int mode)
643{
644 gpio_set_value(GPIO_PTA4, mode);
645 if (mode)
646 mdelay(100);
647
648 return 0;
649}
650
651static struct mt9t112_camera_info mt9t112_info2 = {
652 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
653 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
654};
655
656static struct soc_camera_link mt9t112_link2 = {
657 .i2c_adapter_id = 1,
658 .power = mt9t112_power2,
659 .bus_id = 1,
660 .board_info = &i2c_camera[2],
661 .module_name = "mt9t112",
662 .priv = &mt9t112_info2,
663};
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664
665static struct platform_device camera_devices[] = {
666 {
667 .name = "soc-camera-pdrv",
668 .id = 0,
669 .dev = {
670 .platform_data = &tw9910_link,
671 },
672 },
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673 {
674 .name = "soc-camera-pdrv",
675 .id = 1,
676 .dev = {
677 .platform_data = &mt9t112_link1,
678 },
679 },
680 {
681 .name = "soc-camera-pdrv",
682 .id = 2,
683 .dev = {
684 .platform_data = &mt9t112_link2,
685 },
686 },
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687};
688
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689/* FSI */
690/*
691 * FSI-B use external clock which came from da7210.
692 * So, we should change parent of fsi
693 */
694#define FCLKBCR 0xa415000c
695static void fsimck_init(struct clk *clk)
696{
697 u32 status = ctrl_inl(clk->enable_reg);
698
699 /* use external clock */
700 status &= ~0x000000ff;
701 status |= 0x00000080;
702
703 ctrl_outl(status, clk->enable_reg);
704}
705
706static struct clk_ops fsimck_clk_ops = {
707 .init = fsimck_init,
708};
709
710static struct clk fsimckb_clk = {
711 .name = "fsimckb_clk",
712 .id = -1,
713 .ops = &fsimck_clk_ops,
714 .enable_reg = (void __iomem *)FCLKBCR,
715 .rate = 0, /* unknown */
716};
717
718struct sh_fsi_platform_info fsi_info = {
719 .portb_flags = SH_FSI_BRS_INV |
720 SH_FSI_OUT_SLAVE_MODE |
721 SH_FSI_IN_SLAVE_MODE |
722 SH_FSI_OFMT(I2S) |
723 SH_FSI_IFMT(I2S),
724};
725
726static struct resource fsi_resources[] = {
727 [0] = {
728 .name = "FSI",
729 .start = 0xFE3C0000,
730 .end = 0xFE3C021d,
731 .flags = IORESOURCE_MEM,
732 },
733 [1] = {
734 .start = 108,
735 .flags = IORESOURCE_IRQ,
736 },
737};
738
739static struct platform_device fsi_device = {
740 .name = "sh_fsi",
741 .id = 0,
742 .num_resources = ARRAY_SIZE(fsi_resources),
743 .resource = fsi_resources,
744 .dev = {
745 .platform_data = &fsi_info,
746 },
747 .archdata = {
748 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
749 },
750};
751
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752static struct platform_device *ecovec_devices[] __initdata = {
753 &heartbeat_device,
754 &nor_flash_device,
35a35408 755 &sh_eth_device,
907050a3 756 &usb0_host_device,
3714a9a0 757 &usb1_common_device,
fa3ba51b 758 &lcdc_device,
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759 &ceu0_device,
760 &ceu1_device,
e9103e74 761 &keysc_device,
1ce4da7a 762#ifdef CONFIG_MFD_SH_MOBILE_SDHI
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763 &sdhi0_device,
764 &sdhi1_device,
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765#else
766 &msiof0_device,
767#endif
207efd07 768 &camera_devices[0],
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769 &camera_devices[1],
770 &camera_devices[2],
1980fdc4 771 &fsi_device,
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772};
773
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774#define EEPROM_ADDR 0x50
775static u8 mac_read(struct i2c_adapter *a, u8 command)
776{
777 struct i2c_msg msg[2];
778 u8 buf;
779 int ret;
780
781 msg[0].addr = EEPROM_ADDR;
782 msg[0].flags = 0;
783 msg[0].len = 1;
784 msg[0].buf = &command;
785
786 msg[1].addr = EEPROM_ADDR;
787 msg[1].flags = I2C_M_RD;
788 msg[1].len = 1;
789 msg[1].buf = &buf;
790
791 ret = i2c_transfer(a, msg, 2);
792 if (ret < 0) {
793 printk(KERN_ERR "error %d\n", ret);
794 buf = 0xff;
795 }
796
797 return buf;
798}
799
376abbb4 800static void __init sh_eth_init(struct sh_eth_plat_data *pd)
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801{
802 struct i2c_adapter *a = i2c_get_adapter(1);
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803 int i;
804
805 if (!a) {
806 pr_err("can not get I2C 1\n");
807 return;
808 }
809
4907d57f 810 /* read MAC address frome EEPROM */
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811 for (i = 0; i < sizeof(pd->mac_addr); i++) {
812 pd->mac_addr[i] = mac_read(a, 0x10 + i);
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813 msleep(10);
814 }
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815}
816
fa3ba51b 817#define PORT_HIZA 0xA4050158
ea15edb2 818#define IODRIVEA 0xA405018A
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819
820extern char ecovec24_sdram_enter_start;
821extern char ecovec24_sdram_enter_end;
822extern char ecovec24_sdram_leave_start;
823extern char ecovec24_sdram_leave_end;
824
4907d57f 825static int __init arch_setup(void)
4138b740 826{
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827 struct clk *clk;
828
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829 /* register board specific self-refresh code */
830 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
831 &ecovec24_sdram_enter_start,
832 &ecovec24_sdram_enter_end,
833 &ecovec24_sdram_leave_start,
834 &ecovec24_sdram_leave_end);
835
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836 /* enable STATUS0, STATUS2 and PDSTATUS */
837 gpio_request(GPIO_FN_STATUS0, NULL);
838 gpio_request(GPIO_FN_STATUS2, NULL);
839 gpio_request(GPIO_FN_PDSTATUS, NULL);
840
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841 /* enable SCIFA0 */
842 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
843 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
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844
845 /* enable debug LED */
846 gpio_request(GPIO_PTG0, NULL);
847 gpio_request(GPIO_PTG1, NULL);
848 gpio_request(GPIO_PTG2, NULL);
849 gpio_request(GPIO_PTG3, NULL);
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850 gpio_direction_output(GPIO_PTG0, 0);
851 gpio_direction_output(GPIO_PTG1, 0);
852 gpio_direction_output(GPIO_PTG2, 0);
853 gpio_direction_output(GPIO_PTG3, 0);
643e9d10 854 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 855
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856 /* enable SH-Eth */
857 gpio_request(GPIO_PTA1, NULL);
858 gpio_direction_output(GPIO_PTA1, 1);
859 mdelay(20);
860
861 gpio_request(GPIO_FN_RMII_RXD0, NULL);
862 gpio_request(GPIO_FN_RMII_RXD1, NULL);
863 gpio_request(GPIO_FN_RMII_TXD0, NULL);
864 gpio_request(GPIO_FN_RMII_TXD1, NULL);
865 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
866 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
867 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
868 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
869 gpio_request(GPIO_FN_MDIO, NULL);
870 gpio_request(GPIO_FN_MDC, NULL);
871 gpio_request(GPIO_FN_LNKSTA, NULL);
872
907050a3 873 /* enable USB */
be4ebf99 874 ctrl_outw(0x0000, 0xA4D80000);
147df2d6 875 ctrl_outw(0x0000, 0xA4D90000);
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876 gpio_request(GPIO_PTB3, NULL);
877 gpio_request(GPIO_PTB4, NULL);
878 gpio_request(GPIO_PTB5, NULL);
879 gpio_direction_input(GPIO_PTB3);
880 gpio_direction_output(GPIO_PTB4, 0);
881 gpio_direction_output(GPIO_PTB5, 0);
882 ctrl_outw(0x0600, 0xa40501d4);
883 ctrl_outw(0x0600, 0xa4050192);
884
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885 if (gpio_get_value(GPIO_PTB3)) {
886 printk(KERN_INFO "USB1 function is selected\n");
887 usb1_common_device.name = "r8a66597_udc";
888 } else {
889 printk(KERN_INFO "USB1 host is selected\n");
890 usb1_common_device.name = "r8a66597_hcd";
891 }
892
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893 /* enable LCDC */
894 gpio_request(GPIO_FN_LCDD23, NULL);
895 gpio_request(GPIO_FN_LCDD22, NULL);
896 gpio_request(GPIO_FN_LCDD21, NULL);
897 gpio_request(GPIO_FN_LCDD20, NULL);
898 gpio_request(GPIO_FN_LCDD19, NULL);
899 gpio_request(GPIO_FN_LCDD18, NULL);
900 gpio_request(GPIO_FN_LCDD17, NULL);
901 gpio_request(GPIO_FN_LCDD16, NULL);
902 gpio_request(GPIO_FN_LCDD15, NULL);
903 gpio_request(GPIO_FN_LCDD14, NULL);
904 gpio_request(GPIO_FN_LCDD13, NULL);
905 gpio_request(GPIO_FN_LCDD12, NULL);
906 gpio_request(GPIO_FN_LCDD11, NULL);
907 gpio_request(GPIO_FN_LCDD10, NULL);
908 gpio_request(GPIO_FN_LCDD9, NULL);
909 gpio_request(GPIO_FN_LCDD8, NULL);
910 gpio_request(GPIO_FN_LCDD7, NULL);
911 gpio_request(GPIO_FN_LCDD6, NULL);
912 gpio_request(GPIO_FN_LCDD5, NULL);
913 gpio_request(GPIO_FN_LCDD4, NULL);
914 gpio_request(GPIO_FN_LCDD3, NULL);
915 gpio_request(GPIO_FN_LCDD2, NULL);
916 gpio_request(GPIO_FN_LCDD1, NULL);
917 gpio_request(GPIO_FN_LCDD0, NULL);
918 gpio_request(GPIO_FN_LCDDISP, NULL);
919 gpio_request(GPIO_FN_LCDHSYN, NULL);
920 gpio_request(GPIO_FN_LCDDCK, NULL);
921 gpio_request(GPIO_FN_LCDVSYN, NULL);
922 gpio_request(GPIO_FN_LCDDON, NULL);
923 gpio_request(GPIO_FN_LCDLCLK, NULL);
924 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
925
926 gpio_request(GPIO_PTE6, NULL);
927 gpio_request(GPIO_PTU1, NULL);
928 gpio_request(GPIO_PTR1, NULL);
929 gpio_request(GPIO_PTA2, NULL);
930 gpio_direction_input(GPIO_PTE6);
931 gpio_direction_output(GPIO_PTU1, 0);
932 gpio_direction_output(GPIO_PTR1, 0);
933 gpio_direction_output(GPIO_PTA2, 0);
934
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935 /* I/O buffer drive ability is high */
936 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
ea15edb2 937
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938 if (gpio_get_value(GPIO_PTE6)) {
939 /* DVI */
940 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
ea15edb2 941 lcdc_info.ch[0].clock_divider = 1,
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942 lcdc_info.ch[0].lcd_cfg.name = "DVI";
943 lcdc_info.ch[0].lcd_cfg.xres = 1280;
944 lcdc_info.ch[0].lcd_cfg.yres = 720;
945 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
946 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
947 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
948 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
949 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
950 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
951
952 gpio_set_value(GPIO_PTA2, 1);
953 gpio_set_value(GPIO_PTU1, 1);
954 } else {
955 /* Panel */
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956
957 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
958 lcdc_info.ch[0].clock_divider = 2,
959 lcdc_info.ch[0].lcd_cfg.name = "Panel";
960 lcdc_info.ch[0].lcd_cfg.xres = 800;
961 lcdc_info.ch[0].lcd_cfg.yres = 480;
962 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
963 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
964 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
965 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
966 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
967 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
968
969 gpio_set_value(GPIO_PTR1, 1);
970
971 /* FIXME
972 *
973 * LCDDON control is needed for Panel,
974 * but current sh_mobile_lcdc driver doesn't control it.
975 * It is temporary correspondence
976 */
977 gpio_request(GPIO_PTF4, NULL);
978 gpio_direction_output(GPIO_PTF4, 1);
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979
980 /* enable TouchScreen */
981 i2c_register_board_info(0, &ts_i2c_clients, 1);
982 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
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KM
983 }
984
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985 /* enable CEU0 */
986 gpio_request(GPIO_FN_VIO0_D15, NULL);
987 gpio_request(GPIO_FN_VIO0_D14, NULL);
988 gpio_request(GPIO_FN_VIO0_D13, NULL);
989 gpio_request(GPIO_FN_VIO0_D12, NULL);
990 gpio_request(GPIO_FN_VIO0_D11, NULL);
991 gpio_request(GPIO_FN_VIO0_D10, NULL);
992 gpio_request(GPIO_FN_VIO0_D9, NULL);
993 gpio_request(GPIO_FN_VIO0_D8, NULL);
994 gpio_request(GPIO_FN_VIO0_D7, NULL);
995 gpio_request(GPIO_FN_VIO0_D6, NULL);
996 gpio_request(GPIO_FN_VIO0_D5, NULL);
997 gpio_request(GPIO_FN_VIO0_D4, NULL);
998 gpio_request(GPIO_FN_VIO0_D3, NULL);
999 gpio_request(GPIO_FN_VIO0_D2, NULL);
1000 gpio_request(GPIO_FN_VIO0_D1, NULL);
1001 gpio_request(GPIO_FN_VIO0_D0, NULL);
1002 gpio_request(GPIO_FN_VIO0_VD, NULL);
1003 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1004 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1005 gpio_request(GPIO_FN_VIO0_HD, NULL);
1006 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1007
1008 /* enable CEU1 */
1009 gpio_request(GPIO_FN_VIO1_D7, NULL);
1010 gpio_request(GPIO_FN_VIO1_D6, NULL);
1011 gpio_request(GPIO_FN_VIO1_D5, NULL);
1012 gpio_request(GPIO_FN_VIO1_D4, NULL);
1013 gpio_request(GPIO_FN_VIO1_D3, NULL);
1014 gpio_request(GPIO_FN_VIO1_D2, NULL);
1015 gpio_request(GPIO_FN_VIO1_D1, NULL);
1016 gpio_request(GPIO_FN_VIO1_D0, NULL);
1017 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1018 gpio_request(GPIO_FN_VIO1_HD, NULL);
1019 gpio_request(GPIO_FN_VIO1_VD, NULL);
1020 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1021 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1022
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KM
1023 /* enable KEYSC */
1024 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1025 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1026 gpio_request(GPIO_FN_KEYOUT3, NULL);
1027 gpio_request(GPIO_FN_KEYOUT2, NULL);
1028 gpio_request(GPIO_FN_KEYOUT1, NULL);
1029 gpio_request(GPIO_FN_KEYOUT0, NULL);
1030 gpio_request(GPIO_FN_KEYIN0, NULL);
1031
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KM
1032 /* enable user debug switch */
1033 gpio_request(GPIO_PTR0, NULL);
1034 gpio_request(GPIO_PTR4, NULL);
1035 gpio_request(GPIO_PTR5, NULL);
1036 gpio_request(GPIO_PTR6, NULL);
1037 gpio_direction_input(GPIO_PTR0);
1038 gpio_direction_input(GPIO_PTR4);
1039 gpio_direction_input(GPIO_PTR5);
1040 gpio_direction_input(GPIO_PTR6);
1041
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MD
1042#ifdef CONFIG_MFD_SH_MOBILE_SDHI
1043 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
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KM
1044 gpio_request(GPIO_FN_SDHI0CD, NULL);
1045 gpio_request(GPIO_FN_SDHI0WP, NULL);
1046 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1047 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1048 gpio_request(GPIO_FN_SDHI0D3, NULL);
1049 gpio_request(GPIO_FN_SDHI0D2, NULL);
1050 gpio_request(GPIO_FN_SDHI0D1, NULL);
1051 gpio_request(GPIO_FN_SDHI0D0, NULL);
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MD
1052 gpio_request(GPIO_PTB6, NULL);
1053 gpio_direction_output(GPIO_PTB6, 0);
96987d96 1054
1ce4da7a 1055 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
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KM
1056 gpio_request(GPIO_FN_SDHI1CD, NULL);
1057 gpio_request(GPIO_FN_SDHI1WP, NULL);
1058 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1059 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1060 gpio_request(GPIO_FN_SDHI1D3, NULL);
1061 gpio_request(GPIO_FN_SDHI1D2, NULL);
1062 gpio_request(GPIO_FN_SDHI1D1, NULL);
1063 gpio_request(GPIO_FN_SDHI1D0, NULL);
96987d96 1064 gpio_request(GPIO_PTB7, NULL);
98779ad8 1065 gpio_direction_output(GPIO_PTB7, 0);
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KM
1066
1067 /* I/O buffer drive ability is high for SDHI1 */
1068 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
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MD
1069#else
1070 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1071 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1072 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1073 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1074 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1075 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1076 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1077 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1078 gpio_request(GPIO_PTY6, NULL); /* write protect */
1079 gpio_direction_input(GPIO_PTY6);
1080 gpio_request(GPIO_PTY7, NULL); /* card detect */
1081 gpio_direction_input(GPIO_PTY7);
1082
1083 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1084#endif
96987d96 1085
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KM
1086 /* enable Video */
1087 gpio_request(GPIO_PTU2, NULL);
1088 gpio_direction_output(GPIO_PTU2, 1);
1089
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KM
1090 /* enable Camera */
1091 gpio_request(GPIO_PTA3, NULL);
1092 gpio_request(GPIO_PTA4, NULL);
1093 gpio_direction_output(GPIO_PTA3, 0);
1094 gpio_direction_output(GPIO_PTA4, 0);
1095
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KM
1096 /* enable FSI */
1097 gpio_request(GPIO_FN_FSIMCKB, NULL);
1098 gpio_request(GPIO_FN_FSIIBSD, NULL);
1099 gpio_request(GPIO_FN_FSIOBSD, NULL);
1100 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1101 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1102 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1103 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1104 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1105
1106 /* change parent of FSI B */
1107 clk = clk_get(NULL, "fsib_clk");
1108 clk_register(&fsimckb_clk);
1109 clk_set_parent(clk, &fsimckb_clk);
1110 clk_set_rate(clk, 11000);
1111 clk_set_rate(&fsimckb_clk, 11000);
1112 clk_put(clk);
1113
1114 gpio_request(GPIO_PTU0, NULL);
1115 gpio_direction_output(GPIO_PTU0, 0);
1116 mdelay(20);
1117
125ecce6 1118 /* enable I2C device */
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KM
1119 i2c_register_board_info(0, i2c0_devices,
1120 ARRAY_SIZE(i2c0_devices));
1121
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KM
1122 i2c_register_board_info(1, i2c1_devices,
1123 ARRAY_SIZE(i2c1_devices));
1124
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KM
1125 return platform_add_devices(ecovec_devices,
1126 ARRAY_SIZE(ecovec_devices));
1127}
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KM
1128arch_initcall(arch_setup);
1129
1130static int __init devices_setup(void)
1131{
376abbb4 1132 sh_eth_init(&sh_eth_plat);
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KM
1133 return 0;
1134}
1135device_initcall(devices_setup);
1136
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KM
1137static struct sh_machine_vector mv_ecovec __initmv = {
1138 .mv_name = "R0P7724 (EcoVec)",
1139};