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[net-next-2.6.git] / arch / s390 / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/smp.c
3 *
155af2f9 4 * Copyright IBM Corp. 1999, 2009
1da177e4 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
39ce010d
HC
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com)
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * We work with logical cpu numbering everywhere we can. The only
14 * functions using the real cpu address (got from STAP) are the sigp
15 * functions. For all other functions we use the identity mapping.
16 * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
17 * used e.g. to find the idle task belonging to a logical cpu. Every array
18 * in the kernel is sorted by the logical cpu number and not by the physical
19 * one which is causing all the confusion with __cpu_logical_map and
20 * cpu_number_map in other architectures.
21 */
22
395d31d4
MS
23#define KMSG_COMPONENT "cpu"
24#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
25
1da177e4
LT
26#include <linux/module.h>
27#include <linux/init.h>
1da177e4 28#include <linux/mm.h>
4e950f6f 29#include <linux/err.h>
1da177e4
LT
30#include <linux/spinlock.h>
31#include <linux/kernel_stat.h>
1da177e4
LT
32#include <linux/delay.h>
33#include <linux/cache.h>
34#include <linux/interrupt.h>
3324e60a 35#include <linux/irqflags.h>
1da177e4 36#include <linux/cpu.h>
2b67fc46 37#include <linux/timex.h>
411ed322 38#include <linux/bootmem.h>
cbb870c8 39#include <asm/asm-offsets.h>
46b05d26 40#include <asm/ipl.h>
2b67fc46 41#include <asm/setup.h>
1da177e4
LT
42#include <asm/sigp.h>
43#include <asm/pgalloc.h>
44#include <asm/irq.h>
45#include <asm/s390_ext.h>
46#include <asm/cpcmd.h>
47#include <asm/tlbflush.h>
2b67fc46 48#include <asm/timer.h>
411ed322 49#include <asm/lowcore.h>
08d07968 50#include <asm/sclp.h>
76d4e00a 51#include <asm/cputime.h>
c742b31c 52#include <asm/vdso.h>
4bb5e07b 53#include <asm/cpu.h>
a806170e 54#include "entry.h"
1da177e4 55
fb380aad 56/* logical cpu to cpu address */
a93b8ec1 57unsigned short __cpu_logical_map[NR_CPUS];
fb380aad 58
1da177e4
LT
59static struct task_struct *current_set[NR_CPUS];
60
08d07968
HC
61static u8 smp_cpu_type;
62static int smp_use_sigp_detection;
63
64enum s390_cpu_state {
65 CPU_STATE_STANDBY,
66 CPU_STATE_CONFIGURED,
67};
68
dbd70fb4 69DEFINE_MUTEX(smp_cpu_state_mutex);
c10fde0d 70int smp_cpu_polarization[NR_CPUS];
08d07968 71static int smp_cpu_state[NR_CPUS];
c10fde0d 72static int cpu_management;
08d07968
HC
73
74static DEFINE_PER_CPU(struct cpu, cpu_devices);
08d07968 75
a93b8ec1 76static void smp_ext_bitcall(int, int);
1da177e4 77
a93b8ec1 78static int raw_cpu_stopped(int cpu)
5c0b912e 79{
a93b8ec1 80 u32 status;
5c0b912e 81
a93b8ec1 82 switch (raw_sigp_ps(&status, 0, cpu, sigp_sense)) {
5c0b912e
HC
83 case sigp_status_stored:
84 /* Check for stopped and check stop state */
85 if (status & 0x50)
86 return 1;
87 break;
88 default:
89 break;
90 }
91 return 0;
92}
93
a93b8ec1
HC
94static inline int cpu_stopped(int cpu)
95{
96 return raw_cpu_stopped(cpu_logical_map(cpu));
97}
98
2c2df118
HC
99void smp_switch_to_ipl_cpu(void (*func)(void *), void *data)
100{
101 struct _lowcore *lc, *current_lc;
102 struct stack_frame *sf;
103 struct pt_regs *regs;
104 unsigned long sp;
105
106 if (smp_processor_id() == 0)
107 func(data);
108 __load_psw_mask(PSW_BASE_BITS | PSW_DEFAULT_KEY);
109 /* Disable lowcore protection */
110 __ctl_clear_bit(0, 28);
111 current_lc = lowcore_ptr[smp_processor_id()];
112 lc = lowcore_ptr[0];
113 if (!lc)
114 lc = current_lc;
115 lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
116 lc->restart_psw.addr = PSW_ADDR_AMODE | (unsigned long) smp_restart_cpu;
117 if (!cpu_online(0))
118 smp_switch_to_cpu(func, data, 0, stap(), __cpu_logical_map[0]);
a93b8ec1 119 while (sigp(0, sigp_stop_and_store_status) == sigp_busy)
2c2df118
HC
120 cpu_relax();
121 sp = lc->panic_stack;
122 sp -= sizeof(struct pt_regs);
123 regs = (struct pt_regs *) sp;
124 memcpy(&regs->gprs, &current_lc->gpregs_save_area, sizeof(regs->gprs));
cbb870c8 125 regs->psw = lc->psw_save_area;
2c2df118
HC
126 sp -= STACK_FRAME_OVERHEAD;
127 sf = (struct stack_frame *) sp;
128 sf->back_chain = regs->gprs[15];
129 smp_switch_to_cpu(func, data, sp, stap(), __cpu_logical_map[0]);
130}
131
677d7623 132void smp_send_stop(void)
1da177e4 133{
39ce010d 134 int cpu, rc;
1da177e4 135
677d7623
HC
136 /* Disable all interrupts/machine checks */
137 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
3324e60a 138 trace_hardirqs_off();
1da177e4 139
677d7623 140 /* stop all processors */
1da177e4
LT
141 for_each_online_cpu(cpu) {
142 if (cpu == smp_processor_id())
143 continue;
144 do {
a93b8ec1 145 rc = sigp(cpu, sigp_stop);
39ce010d 146 } while (rc == sigp_busy);
1da177e4 147
5c0b912e 148 while (!cpu_stopped(cpu))
c6b5b847
HC
149 cpu_relax();
150 }
151}
152
1da177e4
LT
153/*
154 * This is the main routine where commands issued by other
155 * cpus are handled.
156 */
157
2b67fc46 158static void do_ext_call_interrupt(__u16 code)
1da177e4 159{
39ce010d 160 unsigned long bits;
1da177e4 161
39ce010d
HC
162 /*
163 * handle bit signal external calls
164 *
165 * For the ec_schedule signal we have to do nothing. All the work
166 * is done automatically when we return from the interrupt.
167 */
1da177e4
LT
168 bits = xchg(&S390_lowcore.ext_call_fast, 0);
169
39ce010d 170 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
171 generic_smp_call_function_interrupt();
172
173 if (test_bit(ec_call_function_single, &bits))
174 generic_smp_call_function_single_interrupt();
1da177e4
LT
175}
176
177/*
178 * Send an external call sigp to another cpu and return without waiting
179 * for its completion.
180 */
a93b8ec1 181static void smp_ext_bitcall(int cpu, int sig)
1da177e4 182{
39ce010d
HC
183 /*
184 * Set signaling bit in lowcore of target cpu and kick it
185 */
1da177e4 186 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
a93b8ec1 187 while (sigp(cpu, sigp_emergency_signal) == sigp_busy)
1da177e4
LT
188 udelay(10);
189}
190
630cd046 191void arch_send_call_function_ipi_mask(const struct cpumask *mask)
ca9fc75a
HC
192{
193 int cpu;
194
630cd046 195 for_each_cpu(cpu, mask)
ca9fc75a
HC
196 smp_ext_bitcall(cpu, ec_call_function);
197}
198
199void arch_send_call_function_single_ipi(int cpu)
200{
201 smp_ext_bitcall(cpu, ec_call_function_single);
202}
203
347a8dc3 204#ifndef CONFIG_64BIT
1da177e4
LT
205/*
206 * this function sends a 'purge tlb' signal to another CPU.
207 */
a806170e 208static void smp_ptlb_callback(void *info)
1da177e4 209{
ba8a9229 210 __tlb_flush_local();
1da177e4
LT
211}
212
213void smp_ptlb_all(void)
214{
15c8b6c1 215 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
216}
217EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 218#endif /* ! CONFIG_64BIT */
1da177e4
LT
219
220/*
221 * this function sends a 'reschedule' IPI to another CPU.
222 * it goes straight through and wastes no time serializing
223 * anything. Worst case is that we lose a reschedule ...
224 */
225void smp_send_reschedule(int cpu)
226{
39ce010d 227 smp_ext_bitcall(cpu, ec_schedule);
1da177e4
LT
228}
229
230/*
231 * parameter area for the set/clear control bit callbacks
232 */
94c12cc7 233struct ec_creg_mask_parms {
1da177e4
LT
234 unsigned long orvals[16];
235 unsigned long andvals[16];
94c12cc7 236};
1da177e4
LT
237
238/*
239 * callback for setting/clearing control bits
240 */
39ce010d
HC
241static void smp_ctl_bit_callback(void *info)
242{
94c12cc7 243 struct ec_creg_mask_parms *pp = info;
1da177e4
LT
244 unsigned long cregs[16];
245 int i;
39ce010d 246
94c12cc7
MS
247 __ctl_store(cregs, 0, 15);
248 for (i = 0; i <= 15; i++)
1da177e4 249 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
94c12cc7 250 __ctl_load(cregs, 0, 15);
1da177e4
LT
251}
252
253/*
254 * Set a bit in a control register of all cpus
255 */
94c12cc7
MS
256void smp_ctl_set_bit(int cr, int bit)
257{
258 struct ec_creg_mask_parms parms;
1da177e4 259
94c12cc7
MS
260 memset(&parms.orvals, 0, sizeof(parms.orvals));
261 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 262 parms.orvals[cr] = 1 << bit;
15c8b6c1 263 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 264}
39ce010d 265EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
266
267/*
268 * Clear a bit in a control register of all cpus
269 */
94c12cc7
MS
270void smp_ctl_clear_bit(int cr, int bit)
271{
272 struct ec_creg_mask_parms parms;
1da177e4 273
94c12cc7
MS
274 memset(&parms.orvals, 0, sizeof(parms.orvals));
275 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 276 parms.andvals[cr] = ~(1L << bit);
15c8b6c1 277 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 278}
39ce010d 279EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 280
59f2e69d 281#ifdef CONFIG_ZFCPDUMP
411ed322 282
285f6722 283static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
411ed322 284{
411ed322
MH
285 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
286 return;
285f6722 287 if (cpu >= NR_CPUS) {
395d31d4
MS
288 pr_warning("CPU %i exceeds the maximum %i and is excluded from "
289 "the dump\n", cpu, NR_CPUS - 1);
285f6722 290 return;
411ed322 291 }
f64ca217 292 zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL);
a93b8ec1 293 while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy)
285f6722
HC
294 cpu_relax();
295 memcpy(zfcpdump_save_areas[cpu],
296 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
f64ca217 297 sizeof(struct save_area));
411ed322
MH
298}
299
f64ca217 300struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
411ed322
MH
301EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
302
303#else
285f6722
HC
304
305static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
306
59f2e69d 307#endif /* CONFIG_ZFCPDUMP */
411ed322 308
08d07968
HC
309static int cpu_known(int cpu_id)
310{
311 int cpu;
312
313 for_each_present_cpu(cpu) {
314 if (__cpu_logical_map[cpu] == cpu_id)
315 return 1;
316 }
317 return 0;
318}
319
320static int smp_rescan_cpus_sigp(cpumask_t avail)
321{
322 int cpu_id, logical_cpu;
323
93632d1b
RR
324 logical_cpu = cpumask_first(&avail);
325 if (logical_cpu >= nr_cpu_ids)
08d07968 326 return 0;
4bb5e07b 327 for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) {
08d07968
HC
328 if (cpu_known(cpu_id))
329 continue;
330 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 331 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
332 if (!cpu_stopped(logical_cpu))
333 continue;
334 cpu_set(logical_cpu, cpu_present_map);
335 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
336 logical_cpu = cpumask_next(logical_cpu, &avail);
337 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
338 break;
339 }
340 return 0;
341}
342
48483b32 343static int smp_rescan_cpus_sclp(cpumask_t avail)
08d07968
HC
344{
345 struct sclp_cpu_info *info;
346 int cpu_id, logical_cpu, cpu;
347 int rc;
348
93632d1b
RR
349 logical_cpu = cpumask_first(&avail);
350 if (logical_cpu >= nr_cpu_ids)
08d07968 351 return 0;
48483b32 352 info = kmalloc(sizeof(*info), GFP_KERNEL);
08d07968
HC
353 if (!info)
354 return -ENOMEM;
355 rc = sclp_get_cpu_info(info);
356 if (rc)
357 goto out;
358 for (cpu = 0; cpu < info->combined; cpu++) {
359 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
360 continue;
361 cpu_id = info->cpu[cpu].address;
362 if (cpu_known(cpu_id))
363 continue;
364 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 365 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
366 cpu_set(logical_cpu, cpu_present_map);
367 if (cpu >= info->configured)
368 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
369 else
370 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
371 logical_cpu = cpumask_next(logical_cpu, &avail);
372 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
373 break;
374 }
375out:
48483b32 376 kfree(info);
08d07968
HC
377 return rc;
378}
379
1e489518 380static int __smp_rescan_cpus(void)
08d07968
HC
381{
382 cpumask_t avail;
383
48483b32 384 cpus_xor(avail, cpu_possible_map, cpu_present_map);
08d07968
HC
385 if (smp_use_sigp_detection)
386 return smp_rescan_cpus_sigp(avail);
387 else
388 return smp_rescan_cpus_sclp(avail);
1da177e4
LT
389}
390
48483b32
HC
391static void __init smp_detect_cpus(void)
392{
393 unsigned int cpu, c_cpus, s_cpus;
394 struct sclp_cpu_info *info;
395 u16 boot_cpu_addr, cpu_addr;
396
397 c_cpus = 1;
398 s_cpus = 0;
7b468488 399 boot_cpu_addr = __cpu_logical_map[0];
48483b32
HC
400 info = kmalloc(sizeof(*info), GFP_KERNEL);
401 if (!info)
402 panic("smp_detect_cpus failed to allocate memory\n");
403 /* Use sigp detection algorithm if sclp doesn't work. */
404 if (sclp_get_cpu_info(info)) {
405 smp_use_sigp_detection = 1;
4bb5e07b 406 for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) {
48483b32
HC
407 if (cpu == boot_cpu_addr)
408 continue;
a93b8ec1 409 if (!raw_cpu_stopped(cpu))
48483b32
HC
410 continue;
411 smp_get_save_area(c_cpus, cpu);
412 c_cpus++;
413 }
414 goto out;
415 }
416
417 if (info->has_cpu_type) {
418 for (cpu = 0; cpu < info->combined; cpu++) {
419 if (info->cpu[cpu].address == boot_cpu_addr) {
420 smp_cpu_type = info->cpu[cpu].type;
421 break;
422 }
423 }
424 }
425
426 for (cpu = 0; cpu < info->combined; cpu++) {
427 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
428 continue;
429 cpu_addr = info->cpu[cpu].address;
430 if (cpu_addr == boot_cpu_addr)
431 continue;
a93b8ec1 432 if (!raw_cpu_stopped(cpu_addr)) {
48483b32
HC
433 s_cpus++;
434 continue;
435 }
436 smp_get_save_area(c_cpus, cpu_addr);
437 c_cpus++;
438 }
439out:
440 kfree(info);
395d31d4 441 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 442 get_online_cpus();
1e489518 443 __smp_rescan_cpus();
9d40d2e3 444 put_online_cpus();
48483b32
HC
445}
446
1da177e4 447/*
39ce010d 448 * Activate a secondary processor.
1da177e4 449 */
ea1f4eec 450int __cpuinit start_secondary(void *cpuvoid)
1da177e4 451{
39ce010d
HC
452 /* Setup the cpu */
453 cpu_init();
5bfb5d69 454 preempt_disable();
d54853ef 455 /* Enable TOD clock interrupts on the secondary cpu. */
39ce010d 456 init_cpu_timer();
d54853ef 457 /* Enable cpu timer interrupts on the secondary cpu. */
39ce010d 458 init_cpu_vtimer();
1da177e4 459 /* Enable pfault pseudo page faults on this cpu. */
29b08d2b
HC
460 pfault_init();
461
e545a614
MS
462 /* call cpu notifiers */
463 notify_cpu_starting(smp_processor_id());
1da177e4 464 /* Mark this cpu as online */
ca9fc75a 465 ipi_call_lock();
1da177e4 466 cpu_set(smp_processor_id(), cpu_online_map);
ca9fc75a 467 ipi_call_unlock();
1da177e4
LT
468 /* Switch on interrupts */
469 local_irq_enable();
39ce010d 470 /* Print info about this processor */
7b468488 471 print_cpu_info();
39ce010d
HC
472 /* cpu_idle will call schedule for us */
473 cpu_idle();
474 return 0;
1da177e4
LT
475}
476
477static void __init smp_create_idle(unsigned int cpu)
478{
479 struct task_struct *p;
480
481 /*
482 * don't care about the psw and regs settings since we'll never
483 * reschedule the forked task.
484 */
485 p = fork_idle(cpu);
486 if (IS_ERR(p))
487 panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
488 current_set[cpu] = p;
489}
490
1cb6bb4b
HC
491static int __cpuinit smp_alloc_lowcore(int cpu)
492{
493 unsigned long async_stack, panic_stack;
494 struct _lowcore *lowcore;
1cb6bb4b 495
3fd26a77 496 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1cb6bb4b
HC
497 if (!lowcore)
498 return -ENOMEM;
499 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
1cb6bb4b 500 panic_stack = __get_free_page(GFP_KERNEL);
591bb4f6
HC
501 if (!panic_stack || !async_stack)
502 goto out;
98c7b388
HC
503 memcpy(lowcore, &S390_lowcore, 512);
504 memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
1cb6bb4b
HC
505 lowcore->async_stack = async_stack + ASYNC_SIZE;
506 lowcore->panic_stack = panic_stack + PAGE_SIZE;
507
508#ifndef CONFIG_64BIT
509 if (MACHINE_HAS_IEEE) {
510 unsigned long save_area;
511
512 save_area = get_zeroed_page(GFP_KERNEL);
513 if (!save_area)
33b1d09e 514 goto out;
1cb6bb4b
HC
515 lowcore->extended_save_area_addr = (u32) save_area;
516 }
c742b31c
MS
517#else
518 if (vdso_alloc_per_cpu(cpu, lowcore))
519 goto out;
1cb6bb4b
HC
520#endif
521 lowcore_ptr[cpu] = lowcore;
522 return 0;
523
591bb4f6 524out:
33b1d09e 525 free_page(panic_stack);
1cb6bb4b 526 free_pages(async_stack, ASYNC_ORDER);
3fd26a77 527 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
528 return -ENOMEM;
529}
530
1cb6bb4b
HC
531static void smp_free_lowcore(int cpu)
532{
533 struct _lowcore *lowcore;
1cb6bb4b 534
1cb6bb4b
HC
535 lowcore = lowcore_ptr[cpu];
536#ifndef CONFIG_64BIT
537 if (MACHINE_HAS_IEEE)
538 free_page((unsigned long) lowcore->extended_save_area_addr);
c742b31c
MS
539#else
540 vdso_free_per_cpu(cpu, lowcore);
1cb6bb4b
HC
541#endif
542 free_page(lowcore->panic_stack - PAGE_SIZE);
543 free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
3fd26a77 544 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
545 lowcore_ptr[cpu] = NULL;
546}
1cb6bb4b 547
1da177e4 548/* Upping and downing of CPUs */
1cb6bb4b 549int __cpuinit __cpu_up(unsigned int cpu)
1da177e4 550{
39ce010d 551 struct _lowcore *cpu_lowcore;
a93b8ec1 552 struct task_struct *idle;
1da177e4 553 struct stack_frame *sf;
d0d3cdf4 554 u32 lowcore;
a93b8ec1 555 int ccode;
1da177e4 556
08d07968
HC
557 if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
558 return -EIO;
1cb6bb4b
HC
559 if (smp_alloc_lowcore(cpu))
560 return -ENOMEM;
d0d3cdf4 561 do {
a93b8ec1 562 ccode = sigp(cpu, sigp_initial_cpu_reset);
d0d3cdf4
HC
563 if (ccode == sigp_busy)
564 udelay(10);
565 if (ccode == sigp_not_operational)
566 goto err_out;
567 } while (ccode == sigp_busy);
568
569 lowcore = (u32)(unsigned long)lowcore_ptr[cpu];
a93b8ec1 570 while (sigp_p(lowcore, cpu, sigp_set_prefix) == sigp_busy)
d0d3cdf4 571 udelay(10);
1da177e4
LT
572
573 idle = current_set[cpu];
39ce010d 574 cpu_lowcore = lowcore_ptr[cpu];
1da177e4 575 cpu_lowcore->kernel_stack = (unsigned long)
39ce010d 576 task_stack_page(idle) + THREAD_SIZE;
1cb6bb4b 577 cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
1da177e4
LT
578 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
579 - sizeof(struct pt_regs)
580 - sizeof(struct stack_frame));
581 memset(sf, 0, sizeof(struct stack_frame));
582 sf->gprs[9] = (unsigned long) sf;
583 cpu_lowcore->save_area[15] = (unsigned long) sf;
24d3e210 584 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
94c12cc7
MS
585 asm volatile(
586 " stam 0,15,0(%0)"
587 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
1da177e4 588 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
39ce010d 589 cpu_lowcore->current_task = (unsigned long) idle;
7b468488 590 cpu_lowcore->cpu_nr = cpu;
591bb4f6 591 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
25097bf1 592 cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
dfd9f7ab 593 cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func;
1da177e4 594 eieio();
699ff13f 595
a93b8ec1 596 while (sigp(cpu, sigp_restart) == sigp_busy)
699ff13f 597 udelay(10);
1da177e4
LT
598
599 while (!cpu_online(cpu))
600 cpu_relax();
601 return 0;
d0d3cdf4
HC
602
603err_out:
604 smp_free_lowcore(cpu);
605 return -EIO;
1da177e4
LT
606}
607
48483b32 608static int __init setup_possible_cpus(char *s)
255acee7 609{
48483b32 610 int pcpus, cpu;
255acee7 611
48483b32 612 pcpus = simple_strtoul(s, NULL, 0);
88e01285
HC
613 init_cpu_possible(cpumask_of(0));
614 for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
def6cfb7 615 set_cpu_possible(cpu, true);
37a33026
HC
616 return 0;
617}
618early_param("possible_cpus", setup_possible_cpus);
619
48483b32
HC
620#ifdef CONFIG_HOTPLUG_CPU
621
39ce010d 622int __cpu_disable(void)
1da177e4 623{
94c12cc7 624 struct ec_creg_mask_parms cr_parms;
f3705136 625 int cpu = smp_processor_id();
1da177e4 626
f3705136 627 cpu_clear(cpu, cpu_online_map);
1da177e4 628
1da177e4 629 /* Disable pfault pseudo page faults on this cpu. */
29b08d2b 630 pfault_fini();
1da177e4 631
94c12cc7
MS
632 memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
633 memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
1da177e4 634
94c12cc7 635 /* disable all external interrupts */
1da177e4 636 cr_parms.orvals[0] = 0;
39ce010d
HC
637 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 |
638 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4);
1da177e4 639 /* disable all I/O interrupts */
1da177e4 640 cr_parms.orvals[6] = 0;
39ce010d
HC
641 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
642 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
1da177e4 643 /* disable most machine checks */
1da177e4 644 cr_parms.orvals[14] = 0;
39ce010d
HC
645 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
646 1 << 25 | 1 << 24);
94c12cc7 647
1da177e4
LT
648 smp_ctl_bit_callback(&cr_parms);
649
1da177e4
LT
650 return 0;
651}
652
39ce010d 653void __cpu_die(unsigned int cpu)
1da177e4
LT
654{
655 /* Wait until target cpu is down */
5c0b912e 656 while (!cpu_stopped(cpu))
1da177e4 657 cpu_relax();
a93b8ec1 658 while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy)
4f8048ee 659 udelay(10);
1cb6bb4b 660 smp_free_lowcore(cpu);
395d31d4 661 pr_info("Processor %d stopped\n", cpu);
1da177e4
LT
662}
663
39ce010d 664void cpu_die(void)
1da177e4
LT
665{
666 idle_task_exit();
a93b8ec1 667 while (sigp(smp_processor_id(), sigp_stop) == sigp_busy)
f8501ba7 668 cpu_relax();
39ce010d 669 for (;;);
1da177e4
LT
670}
671
255acee7
HC
672#endif /* CONFIG_HOTPLUG_CPU */
673
1da177e4
LT
674void __init smp_prepare_cpus(unsigned int max_cpus)
675{
591bb4f6
HC
676#ifndef CONFIG_64BIT
677 unsigned long save_area = 0;
678#endif
679 unsigned long async_stack, panic_stack;
680 struct _lowcore *lowcore;
1da177e4 681 unsigned int cpu;
39ce010d 682
48483b32
HC
683 smp_detect_cpus();
684
39ce010d
HC
685 /* request the 0x1201 emergency signal external interrupt */
686 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
687 panic("Couldn't request external interrupt 0x1201");
7b468488 688 print_cpu_info();
1da177e4 689
591bb4f6 690 /* Reallocate current lowcore, but keep its contents. */
3fd26a77 691 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
591bb4f6
HC
692 panic_stack = __get_free_page(GFP_KERNEL);
693 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
c742b31c 694 BUG_ON(!lowcore || !panic_stack || !async_stack);
347a8dc3 695#ifndef CONFIG_64BIT
77fa2245 696 if (MACHINE_HAS_IEEE)
591bb4f6 697 save_area = get_zeroed_page(GFP_KERNEL);
77fa2245 698#endif
591bb4f6
HC
699 local_irq_disable();
700 local_mcck_disable();
701 lowcore_ptr[smp_processor_id()] = lowcore;
702 *lowcore = S390_lowcore;
703 lowcore->panic_stack = panic_stack + PAGE_SIZE;
704 lowcore->async_stack = async_stack + ASYNC_SIZE;
705#ifndef CONFIG_64BIT
706 if (MACHINE_HAS_IEEE)
707 lowcore->extended_save_area_addr = (u32) save_area;
708#endif
709 set_prefix((u32)(unsigned long) lowcore);
710 local_mcck_enable();
711 local_irq_enable();
3a6ba460
HC
712#ifdef CONFIG_64BIT
713 if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore))
714 BUG();
715#endif
97db7fbf 716 for_each_possible_cpu(cpu)
1da177e4
LT
717 if (cpu != smp_processor_id())
718 smp_create_idle(cpu);
719}
720
ea1f4eec 721void __init smp_prepare_boot_cpu(void)
1da177e4
LT
722{
723 BUG_ON(smp_processor_id() != 0);
724
48483b32
HC
725 current_thread_info()->cpu = 0;
726 cpu_set(0, cpu_present_map);
1da177e4 727 cpu_set(0, cpu_online_map);
1da177e4
LT
728 S390_lowcore.percpu_offset = __per_cpu_offset[0];
729 current_set[0] = current;
08d07968 730 smp_cpu_state[0] = CPU_STATE_CONFIGURED;
c10fde0d 731 smp_cpu_polarization[0] = POLARIZATION_UNKNWN;
1da177e4
LT
732}
733
ea1f4eec 734void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 735{
1da177e4
LT
736}
737
02beaccc
HC
738void __init smp_setup_processor_id(void)
739{
740 S390_lowcore.cpu_nr = 0;
741 __cpu_logical_map[0] = stap();
742}
743
1da177e4
LT
744/*
745 * the frequency of the profiling timer can be changed
746 * by writing a multiplier value into /proc/profile.
747 *
748 * usually you want to run this on all CPUs ;)
749 */
750int setup_profiling_timer(unsigned int multiplier)
751{
39ce010d 752 return 0;
1da177e4
LT
753}
754
08d07968 755#ifdef CONFIG_HOTPLUG_CPU
4a0b2b4d
AK
756static ssize_t cpu_configure_show(struct sys_device *dev,
757 struct sysdev_attribute *attr, char *buf)
08d07968
HC
758{
759 ssize_t count;
760
761 mutex_lock(&smp_cpu_state_mutex);
762 count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
763 mutex_unlock(&smp_cpu_state_mutex);
764 return count;
765}
766
4a0b2b4d
AK
767static ssize_t cpu_configure_store(struct sys_device *dev,
768 struct sysdev_attribute *attr,
769 const char *buf, size_t count)
08d07968
HC
770{
771 int cpu = dev->id;
772 int val, rc;
773 char delim;
774
775 if (sscanf(buf, "%d %c", &val, &delim) != 1)
776 return -EINVAL;
777 if (val != 0 && val != 1)
778 return -EINVAL;
779
9d40d2e3 780 get_online_cpus();
0b18d318 781 mutex_lock(&smp_cpu_state_mutex);
08d07968 782 rc = -EBUSY;
2c2df118
HC
783 /* disallow configuration changes of online cpus and cpu 0 */
784 if (cpu_online(cpu) || cpu == 0)
08d07968
HC
785 goto out;
786 rc = 0;
787 switch (val) {
788 case 0:
789 if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
790 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
c10fde0d 791 if (!rc) {
08d07968 792 smp_cpu_state[cpu] = CPU_STATE_STANDBY;
c10fde0d
HC
793 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
794 }
08d07968
HC
795 }
796 break;
797 case 1:
798 if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
799 rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
c10fde0d 800 if (!rc) {
08d07968 801 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
c10fde0d
HC
802 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
803 }
08d07968
HC
804 }
805 break;
806 default:
807 break;
808 }
809out:
08d07968 810 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 811 put_online_cpus();
08d07968
HC
812 return rc ? rc : count;
813}
814static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
815#endif /* CONFIG_HOTPLUG_CPU */
816
4a0b2b4d
AK
817static ssize_t cpu_polarization_show(struct sys_device *dev,
818 struct sysdev_attribute *attr, char *buf)
c10fde0d
HC
819{
820 int cpu = dev->id;
821 ssize_t count;
822
823 mutex_lock(&smp_cpu_state_mutex);
824 switch (smp_cpu_polarization[cpu]) {
825 case POLARIZATION_HRZ:
826 count = sprintf(buf, "horizontal\n");
827 break;
828 case POLARIZATION_VL:
829 count = sprintf(buf, "vertical:low\n");
830 break;
831 case POLARIZATION_VM:
832 count = sprintf(buf, "vertical:medium\n");
833 break;
834 case POLARIZATION_VH:
835 count = sprintf(buf, "vertical:high\n");
836 break;
837 default:
838 count = sprintf(buf, "unknown\n");
839 break;
840 }
841 mutex_unlock(&smp_cpu_state_mutex);
842 return count;
843}
844static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
845
4a0b2b4d
AK
846static ssize_t show_cpu_address(struct sys_device *dev,
847 struct sysdev_attribute *attr, char *buf)
08d07968
HC
848{
849 return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
850}
851static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
852
853
854static struct attribute *cpu_common_attrs[] = {
855#ifdef CONFIG_HOTPLUG_CPU
856 &attr_configure.attr,
857#endif
858 &attr_address.attr,
c10fde0d 859 &attr_polarization.attr,
08d07968
HC
860 NULL,
861};
862
863static struct attribute_group cpu_common_attr_group = {
864 .attrs = cpu_common_attrs,
865};
1da177e4 866
4a0b2b4d
AK
867static ssize_t show_capability(struct sys_device *dev,
868 struct sysdev_attribute *attr, char *buf)
2fc2d1e9
HC
869{
870 unsigned int capability;
871 int rc;
872
873 rc = get_cpu_capability(&capability);
874 if (rc)
875 return rc;
876 return sprintf(buf, "%u\n", capability);
877}
878static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
879
4a0b2b4d
AK
880static ssize_t show_idle_count(struct sys_device *dev,
881 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
882{
883 struct s390_idle_data *idle;
884 unsigned long long idle_count;
e98bbaaf 885 unsigned int sequence;
fae8b22d
HC
886
887 idle = &per_cpu(s390_idle, dev->id);
e98bbaaf
MS
888repeat:
889 sequence = idle->sequence;
890 smp_rmb();
891 if (sequence & 1)
892 goto repeat;
fae8b22d 893 idle_count = idle->idle_count;
6f430924
MS
894 if (idle->idle_enter)
895 idle_count++;
e98bbaaf
MS
896 smp_rmb();
897 if (idle->sequence != sequence)
898 goto repeat;
fae8b22d
HC
899 return sprintf(buf, "%llu\n", idle_count);
900}
901static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
902
4a0b2b4d
AK
903static ssize_t show_idle_time(struct sys_device *dev,
904 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
905{
906 struct s390_idle_data *idle;
6f430924 907 unsigned long long now, idle_time, idle_enter;
e98bbaaf 908 unsigned int sequence;
fae8b22d
HC
909
910 idle = &per_cpu(s390_idle, dev->id);
6f430924 911 now = get_clock();
e98bbaaf
MS
912repeat:
913 sequence = idle->sequence;
914 smp_rmb();
915 if (sequence & 1)
916 goto repeat;
6f430924
MS
917 idle_time = idle->idle_time;
918 idle_enter = idle->idle_enter;
919 if (idle_enter != 0ULL && idle_enter < now)
920 idle_time += now - idle_enter;
e98bbaaf
MS
921 smp_rmb();
922 if (idle->sequence != sequence)
923 goto repeat;
6f430924 924 return sprintf(buf, "%llu\n", idle_time >> 12);
fae8b22d 925}
69d39d66 926static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 927
08d07968 928static struct attribute *cpu_online_attrs[] = {
fae8b22d
HC
929 &attr_capability.attr,
930 &attr_idle_count.attr,
69d39d66 931 &attr_idle_time_us.attr,
fae8b22d
HC
932 NULL,
933};
934
08d07968
HC
935static struct attribute_group cpu_online_attr_group = {
936 .attrs = cpu_online_attrs,
fae8b22d
HC
937};
938
2fc2d1e9
HC
939static int __cpuinit smp_cpu_notify(struct notifier_block *self,
940 unsigned long action, void *hcpu)
941{
942 unsigned int cpu = (unsigned int)(long)hcpu;
943 struct cpu *c = &per_cpu(cpu_devices, cpu);
944 struct sys_device *s = &c->sysdev;
fae8b22d 945 struct s390_idle_data *idle;
2fc2d1e9
HC
946
947 switch (action) {
948 case CPU_ONLINE:
8bb78442 949 case CPU_ONLINE_FROZEN:
fae8b22d 950 idle = &per_cpu(s390_idle, cpu);
e98bbaaf 951 memset(idle, 0, sizeof(struct s390_idle_data));
08d07968 952 if (sysfs_create_group(&s->kobj, &cpu_online_attr_group))
2fc2d1e9
HC
953 return NOTIFY_BAD;
954 break;
955 case CPU_DEAD:
8bb78442 956 case CPU_DEAD_FROZEN:
08d07968 957 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
958 break;
959 }
960 return NOTIFY_OK;
961}
962
963static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 964 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
965};
966
2bc89b5e 967static int __devinit smp_add_present_cpu(int cpu)
08d07968
HC
968{
969 struct cpu *c = &per_cpu(cpu_devices, cpu);
970 struct sys_device *s = &c->sysdev;
971 int rc;
972
973 c->hotpluggable = 1;
974 rc = register_cpu(c, cpu);
975 if (rc)
976 goto out;
977 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
978 if (rc)
979 goto out_cpu;
980 if (!cpu_online(cpu))
981 goto out;
982 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
983 if (!rc)
984 return 0;
985 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
986out_cpu:
987#ifdef CONFIG_HOTPLUG_CPU
988 unregister_cpu(c);
989#endif
990out:
991 return rc;
992}
993
994#ifdef CONFIG_HOTPLUG_CPU
1e489518 995
67060d9c 996int __ref smp_rescan_cpus(void)
08d07968
HC
997{
998 cpumask_t newcpus;
999 int cpu;
1000 int rc;
1001
9d40d2e3 1002 get_online_cpus();
0b18d318 1003 mutex_lock(&smp_cpu_state_mutex);
08d07968 1004 newcpus = cpu_present_map;
1e489518 1005 rc = __smp_rescan_cpus();
08d07968
HC
1006 if (rc)
1007 goto out;
1008 cpus_andnot(newcpus, cpu_present_map, newcpus);
1009 for_each_cpu_mask(cpu, newcpus) {
1010 rc = smp_add_present_cpu(cpu);
1011 if (rc)
1012 cpu_clear(cpu, cpu_present_map);
1013 }
1014 rc = 0;
1015out:
08d07968 1016 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1017 put_online_cpus();
c10fde0d
HC
1018 if (!cpus_empty(newcpus))
1019 topology_schedule_update();
1e489518
HC
1020 return rc;
1021}
1022
c9be0a36
AK
1023static ssize_t __ref rescan_store(struct sysdev_class *class,
1024 struct sysdev_class_attribute *attr,
1025 const char *buf,
1e489518
HC
1026 size_t count)
1027{
1028 int rc;
1029
1030 rc = smp_rescan_cpus();
08d07968
HC
1031 return rc ? rc : count;
1032}
da5aae70 1033static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
1034#endif /* CONFIG_HOTPLUG_CPU */
1035
da5aae70 1036static ssize_t dispatching_show(struct sysdev_class *class, char *buf)
c10fde0d
HC
1037{
1038 ssize_t count;
1039
1040 mutex_lock(&smp_cpu_state_mutex);
1041 count = sprintf(buf, "%d\n", cpu_management);
1042 mutex_unlock(&smp_cpu_state_mutex);
1043 return count;
1044}
1045
c9be0a36
AK
1046static ssize_t dispatching_store(struct sysdev_class *dev,
1047 struct sysdev_class_attribute *attr,
1048 const char *buf,
da5aae70 1049 size_t count)
c10fde0d
HC
1050{
1051 int val, rc;
1052 char delim;
1053
1054 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1055 return -EINVAL;
1056 if (val != 0 && val != 1)
1057 return -EINVAL;
1058 rc = 0;
c10fde0d 1059 get_online_cpus();
0b18d318 1060 mutex_lock(&smp_cpu_state_mutex);
c10fde0d
HC
1061 if (cpu_management == val)
1062 goto out;
1063 rc = topology_set_cpu_management(val);
1064 if (!rc)
1065 cpu_management = val;
1066out:
c10fde0d 1067 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1068 put_online_cpus();
c10fde0d
HC
1069 return rc ? rc : count;
1070}
da5aae70
HC
1071static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
1072 dispatching_store);
c10fde0d 1073
1da177e4
LT
1074static int __init topology_init(void)
1075{
1076 int cpu;
fae8b22d 1077 int rc;
2fc2d1e9
HC
1078
1079 register_cpu_notifier(&smp_cpu_nb);
1da177e4 1080
08d07968 1081#ifdef CONFIG_HOTPLUG_CPU
da5aae70 1082 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
08d07968
HC
1083 if (rc)
1084 return rc;
1085#endif
da5aae70 1086 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
c10fde0d
HC
1087 if (rc)
1088 return rc;
08d07968
HC
1089 for_each_present_cpu(cpu) {
1090 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1091 if (rc)
1092 return rc;
1da177e4
LT
1093 }
1094 return 0;
1095}
1da177e4 1096subsys_initcall(topology_init);