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[S390] smp: fix memory leak on __cpu_up
[net-next-2.6.git] / arch / s390 / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/smp.c
3 *
39ce010d 4 * Copyright IBM Corp. 1999,2007
1da177e4 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
39ce010d
HC
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com)
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * We work with logical cpu numbering everywhere we can. The only
14 * functions using the real cpu address (got from STAP) are the sigp
15 * functions. For all other functions we use the identity mapping.
16 * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
17 * used e.g. to find the idle task belonging to a logical cpu. Every array
18 * in the kernel is sorted by the logical cpu number and not by the physical
19 * one which is causing all the confusion with __cpu_logical_map and
20 * cpu_number_map in other architectures.
21 */
22
395d31d4
MS
23#define KMSG_COMPONENT "cpu"
24#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
25
1da177e4
LT
26#include <linux/module.h>
27#include <linux/init.h>
1da177e4 28#include <linux/mm.h>
4e950f6f 29#include <linux/err.h>
1da177e4
LT
30#include <linux/spinlock.h>
31#include <linux/kernel_stat.h>
1da177e4
LT
32#include <linux/delay.h>
33#include <linux/cache.h>
34#include <linux/interrupt.h>
3324e60a 35#include <linux/irqflags.h>
1da177e4 36#include <linux/cpu.h>
2b67fc46 37#include <linux/timex.h>
411ed322 38#include <linux/bootmem.h>
46b05d26 39#include <asm/ipl.h>
2b67fc46 40#include <asm/setup.h>
1da177e4
LT
41#include <asm/sigp.h>
42#include <asm/pgalloc.h>
43#include <asm/irq.h>
44#include <asm/s390_ext.h>
45#include <asm/cpcmd.h>
46#include <asm/tlbflush.h>
2b67fc46 47#include <asm/timer.h>
411ed322 48#include <asm/lowcore.h>
08d07968 49#include <asm/sclp.h>
fae8b22d 50#include <asm/cpu.h>
c742b31c 51#include <asm/vdso.h>
a806170e 52#include "entry.h"
1da177e4 53
1da177e4
LT
54static struct task_struct *current_set[NR_CPUS];
55
08d07968
HC
56static u8 smp_cpu_type;
57static int smp_use_sigp_detection;
58
59enum s390_cpu_state {
60 CPU_STATE_STANDBY,
61 CPU_STATE_CONFIGURED,
62};
63
dbd70fb4 64DEFINE_MUTEX(smp_cpu_state_mutex);
c10fde0d 65int smp_cpu_polarization[NR_CPUS];
08d07968 66static int smp_cpu_state[NR_CPUS];
c10fde0d 67static int cpu_management;
08d07968
HC
68
69static DEFINE_PER_CPU(struct cpu, cpu_devices);
08d07968 70
1da177e4 71static void smp_ext_bitcall(int, ec_bit_sig);
1da177e4 72
677d7623 73void smp_send_stop(void)
1da177e4 74{
39ce010d 75 int cpu, rc;
1da177e4 76
677d7623
HC
77 /* Disable all interrupts/machine checks */
78 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
3324e60a 79 trace_hardirqs_off();
1da177e4 80
677d7623 81 /* stop all processors */
1da177e4
LT
82 for_each_online_cpu(cpu) {
83 if (cpu == smp_processor_id())
84 continue;
85 do {
677d7623 86 rc = signal_processor(cpu, sigp_stop);
39ce010d 87 } while (rc == sigp_busy);
1da177e4 88
39ce010d 89 while (!smp_cpu_not_running(cpu))
c6b5b847
HC
90 cpu_relax();
91 }
92}
93
1da177e4
LT
94/*
95 * This is the main routine where commands issued by other
96 * cpus are handled.
97 */
98
2b67fc46 99static void do_ext_call_interrupt(__u16 code)
1da177e4 100{
39ce010d 101 unsigned long bits;
1da177e4 102
39ce010d
HC
103 /*
104 * handle bit signal external calls
105 *
106 * For the ec_schedule signal we have to do nothing. All the work
107 * is done automatically when we return from the interrupt.
108 */
1da177e4
LT
109 bits = xchg(&S390_lowcore.ext_call_fast, 0);
110
39ce010d 111 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
112 generic_smp_call_function_interrupt();
113
114 if (test_bit(ec_call_function_single, &bits))
115 generic_smp_call_function_single_interrupt();
1da177e4
LT
116}
117
118/*
119 * Send an external call sigp to another cpu and return without waiting
120 * for its completion.
121 */
122static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
123{
39ce010d
HC
124 /*
125 * Set signaling bit in lowcore of target cpu and kick it
126 */
1da177e4 127 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
39ce010d 128 while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy)
1da177e4
LT
129 udelay(10);
130}
131
ca9fc75a
HC
132void arch_send_call_function_ipi(cpumask_t mask)
133{
134 int cpu;
135
136 for_each_cpu_mask(cpu, mask)
137 smp_ext_bitcall(cpu, ec_call_function);
138}
139
140void arch_send_call_function_single_ipi(int cpu)
141{
142 smp_ext_bitcall(cpu, ec_call_function_single);
143}
144
347a8dc3 145#ifndef CONFIG_64BIT
1da177e4
LT
146/*
147 * this function sends a 'purge tlb' signal to another CPU.
148 */
a806170e 149static void smp_ptlb_callback(void *info)
1da177e4 150{
ba8a9229 151 __tlb_flush_local();
1da177e4
LT
152}
153
154void smp_ptlb_all(void)
155{
15c8b6c1 156 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
157}
158EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 159#endif /* ! CONFIG_64BIT */
1da177e4
LT
160
161/*
162 * this function sends a 'reschedule' IPI to another CPU.
163 * it goes straight through and wastes no time serializing
164 * anything. Worst case is that we lose a reschedule ...
165 */
166void smp_send_reschedule(int cpu)
167{
39ce010d 168 smp_ext_bitcall(cpu, ec_schedule);
1da177e4
LT
169}
170
171/*
172 * parameter area for the set/clear control bit callbacks
173 */
94c12cc7 174struct ec_creg_mask_parms {
1da177e4
LT
175 unsigned long orvals[16];
176 unsigned long andvals[16];
94c12cc7 177};
1da177e4
LT
178
179/*
180 * callback for setting/clearing control bits
181 */
39ce010d
HC
182static void smp_ctl_bit_callback(void *info)
183{
94c12cc7 184 struct ec_creg_mask_parms *pp = info;
1da177e4
LT
185 unsigned long cregs[16];
186 int i;
39ce010d 187
94c12cc7
MS
188 __ctl_store(cregs, 0, 15);
189 for (i = 0; i <= 15; i++)
1da177e4 190 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
94c12cc7 191 __ctl_load(cregs, 0, 15);
1da177e4
LT
192}
193
194/*
195 * Set a bit in a control register of all cpus
196 */
94c12cc7
MS
197void smp_ctl_set_bit(int cr, int bit)
198{
199 struct ec_creg_mask_parms parms;
1da177e4 200
94c12cc7
MS
201 memset(&parms.orvals, 0, sizeof(parms.orvals));
202 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 203 parms.orvals[cr] = 1 << bit;
15c8b6c1 204 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 205}
39ce010d 206EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
207
208/*
209 * Clear a bit in a control register of all cpus
210 */
94c12cc7
MS
211void smp_ctl_clear_bit(int cr, int bit)
212{
213 struct ec_creg_mask_parms parms;
1da177e4 214
94c12cc7
MS
215 memset(&parms.orvals, 0, sizeof(parms.orvals));
216 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 217 parms.andvals[cr] = ~(1L << bit);
15c8b6c1 218 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 219}
39ce010d 220EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 221
08d07968
HC
222/*
223 * In early ipl state a temp. logically cpu number is needed, so the sigp
224 * functions can be used to sense other cpus. Since NR_CPUS is >= 2 on
225 * CONFIG_SMP and the ipl cpu is logical cpu 0, it must be 1.
226 */
227#define CPU_INIT_NO 1
228
59f2e69d 229#ifdef CONFIG_ZFCPDUMP
411ed322
MH
230
231/*
232 * zfcpdump_prefix_array holds prefix registers for the following scenario:
233 * 64 bit zfcpdump kernel and 31 bit kernel which is to be dumped. We have to
234 * save its prefix registers, since they get lost, when switching from 31 bit
235 * to 64 bit.
236 */
237unsigned int zfcpdump_prefix_array[NR_CPUS + 1] \
238 __attribute__((__section__(".data")));
239
285f6722 240static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
411ed322 241{
411ed322
MH
242 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
243 return;
285f6722 244 if (cpu >= NR_CPUS) {
395d31d4
MS
245 pr_warning("CPU %i exceeds the maximum %i and is excluded from "
246 "the dump\n", cpu, NR_CPUS - 1);
285f6722 247 return;
411ed322 248 }
48483b32 249 zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL);
08d07968
HC
250 __cpu_logical_map[CPU_INIT_NO] = (__u16) phy_cpu;
251 while (signal_processor(CPU_INIT_NO, sigp_stop_and_store_status) ==
252 sigp_busy)
285f6722
HC
253 cpu_relax();
254 memcpy(zfcpdump_save_areas[cpu],
255 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
256 SAVE_AREA_SIZE);
257#ifdef CONFIG_64BIT
258 /* copy original prefix register */
259 zfcpdump_save_areas[cpu]->s390x.pref_reg = zfcpdump_prefix_array[cpu];
260#endif
411ed322
MH
261}
262
263union save_area *zfcpdump_save_areas[NR_CPUS + 1];
264EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
265
266#else
285f6722
HC
267
268static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
269
59f2e69d 270#endif /* CONFIG_ZFCPDUMP */
411ed322 271
08d07968
HC
272static int cpu_stopped(int cpu)
273{
274 __u32 status;
275
276 /* Check for stopped state */
277 if (signal_processor_ps(&status, 0, cpu, sigp_sense) ==
278 sigp_status_stored) {
279 if (status & 0x40)
280 return 1;
281 }
282 return 0;
283}
284
08d07968
HC
285static int cpu_known(int cpu_id)
286{
287 int cpu;
288
289 for_each_present_cpu(cpu) {
290 if (__cpu_logical_map[cpu] == cpu_id)
291 return 1;
292 }
293 return 0;
294}
295
296static int smp_rescan_cpus_sigp(cpumask_t avail)
297{
298 int cpu_id, logical_cpu;
299
300 logical_cpu = first_cpu(avail);
301 if (logical_cpu == NR_CPUS)
302 return 0;
303 for (cpu_id = 0; cpu_id <= 65535; cpu_id++) {
304 if (cpu_known(cpu_id))
305 continue;
306 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 307 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
308 if (!cpu_stopped(logical_cpu))
309 continue;
310 cpu_set(logical_cpu, cpu_present_map);
311 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
312 logical_cpu = next_cpu(logical_cpu, avail);
313 if (logical_cpu == NR_CPUS)
314 break;
315 }
316 return 0;
317}
318
48483b32 319static int smp_rescan_cpus_sclp(cpumask_t avail)
08d07968
HC
320{
321 struct sclp_cpu_info *info;
322 int cpu_id, logical_cpu, cpu;
323 int rc;
324
325 logical_cpu = first_cpu(avail);
326 if (logical_cpu == NR_CPUS)
327 return 0;
48483b32 328 info = kmalloc(sizeof(*info), GFP_KERNEL);
08d07968
HC
329 if (!info)
330 return -ENOMEM;
331 rc = sclp_get_cpu_info(info);
332 if (rc)
333 goto out;
334 for (cpu = 0; cpu < info->combined; cpu++) {
335 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
336 continue;
337 cpu_id = info->cpu[cpu].address;
338 if (cpu_known(cpu_id))
339 continue;
340 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 341 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
342 cpu_set(logical_cpu, cpu_present_map);
343 if (cpu >= info->configured)
344 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
345 else
346 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
347 logical_cpu = next_cpu(logical_cpu, avail);
348 if (logical_cpu == NR_CPUS)
349 break;
350 }
351out:
48483b32 352 kfree(info);
08d07968
HC
353 return rc;
354}
355
1e489518 356static int __smp_rescan_cpus(void)
08d07968
HC
357{
358 cpumask_t avail;
359
48483b32 360 cpus_xor(avail, cpu_possible_map, cpu_present_map);
08d07968
HC
361 if (smp_use_sigp_detection)
362 return smp_rescan_cpus_sigp(avail);
363 else
364 return smp_rescan_cpus_sclp(avail);
1da177e4
LT
365}
366
48483b32
HC
367static void __init smp_detect_cpus(void)
368{
369 unsigned int cpu, c_cpus, s_cpus;
370 struct sclp_cpu_info *info;
371 u16 boot_cpu_addr, cpu_addr;
372
373 c_cpus = 1;
374 s_cpus = 0;
7b468488 375 boot_cpu_addr = __cpu_logical_map[0];
48483b32
HC
376 info = kmalloc(sizeof(*info), GFP_KERNEL);
377 if (!info)
378 panic("smp_detect_cpus failed to allocate memory\n");
379 /* Use sigp detection algorithm if sclp doesn't work. */
380 if (sclp_get_cpu_info(info)) {
381 smp_use_sigp_detection = 1;
382 for (cpu = 0; cpu <= 65535; cpu++) {
383 if (cpu == boot_cpu_addr)
384 continue;
385 __cpu_logical_map[CPU_INIT_NO] = cpu;
386 if (!cpu_stopped(CPU_INIT_NO))
387 continue;
388 smp_get_save_area(c_cpus, cpu);
389 c_cpus++;
390 }
391 goto out;
392 }
393
394 if (info->has_cpu_type) {
395 for (cpu = 0; cpu < info->combined; cpu++) {
396 if (info->cpu[cpu].address == boot_cpu_addr) {
397 smp_cpu_type = info->cpu[cpu].type;
398 break;
399 }
400 }
401 }
402
403 for (cpu = 0; cpu < info->combined; cpu++) {
404 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
405 continue;
406 cpu_addr = info->cpu[cpu].address;
407 if (cpu_addr == boot_cpu_addr)
408 continue;
409 __cpu_logical_map[CPU_INIT_NO] = cpu_addr;
410 if (!cpu_stopped(CPU_INIT_NO)) {
411 s_cpus++;
412 continue;
413 }
414 smp_get_save_area(c_cpus, cpu_addr);
415 c_cpus++;
416 }
417out:
418 kfree(info);
395d31d4 419 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 420 get_online_cpus();
1e489518 421 __smp_rescan_cpus();
9d40d2e3 422 put_online_cpus();
48483b32
HC
423}
424
1da177e4 425/*
39ce010d 426 * Activate a secondary processor.
1da177e4 427 */
ea1f4eec 428int __cpuinit start_secondary(void *cpuvoid)
1da177e4 429{
39ce010d
HC
430 /* Setup the cpu */
431 cpu_init();
5bfb5d69 432 preempt_disable();
d54853ef 433 /* Enable TOD clock interrupts on the secondary cpu. */
39ce010d 434 init_cpu_timer();
d54853ef 435 /* Enable cpu timer interrupts on the secondary cpu. */
39ce010d 436 init_cpu_vtimer();
1da177e4 437 /* Enable pfault pseudo page faults on this cpu. */
29b08d2b
HC
438 pfault_init();
439
e545a614
MS
440 /* call cpu notifiers */
441 notify_cpu_starting(smp_processor_id());
1da177e4 442 /* Mark this cpu as online */
ca9fc75a 443 ipi_call_lock();
1da177e4 444 cpu_set(smp_processor_id(), cpu_online_map);
ca9fc75a 445 ipi_call_unlock();
1da177e4
LT
446 /* Switch on interrupts */
447 local_irq_enable();
39ce010d 448 /* Print info about this processor */
7b468488 449 print_cpu_info();
39ce010d
HC
450 /* cpu_idle will call schedule for us */
451 cpu_idle();
452 return 0;
1da177e4
LT
453}
454
455static void __init smp_create_idle(unsigned int cpu)
456{
457 struct task_struct *p;
458
459 /*
460 * don't care about the psw and regs settings since we'll never
461 * reschedule the forked task.
462 */
463 p = fork_idle(cpu);
464 if (IS_ERR(p))
465 panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
466 current_set[cpu] = p;
467}
468
1cb6bb4b
HC
469static int __cpuinit smp_alloc_lowcore(int cpu)
470{
471 unsigned long async_stack, panic_stack;
472 struct _lowcore *lowcore;
473 int lc_order;
474
475 lc_order = sizeof(long) == 8 ? 1 : 0;
476 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order);
477 if (!lowcore)
478 return -ENOMEM;
479 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
1cb6bb4b 480 panic_stack = __get_free_page(GFP_KERNEL);
591bb4f6
HC
481 if (!panic_stack || !async_stack)
482 goto out;
98c7b388
HC
483 memcpy(lowcore, &S390_lowcore, 512);
484 memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
1cb6bb4b
HC
485 lowcore->async_stack = async_stack + ASYNC_SIZE;
486 lowcore->panic_stack = panic_stack + PAGE_SIZE;
487
488#ifndef CONFIG_64BIT
489 if (MACHINE_HAS_IEEE) {
490 unsigned long save_area;
491
492 save_area = get_zeroed_page(GFP_KERNEL);
493 if (!save_area)
33b1d09e 494 goto out;
1cb6bb4b
HC
495 lowcore->extended_save_area_addr = (u32) save_area;
496 }
c742b31c
MS
497#else
498 if (vdso_alloc_per_cpu(cpu, lowcore))
499 goto out;
1cb6bb4b
HC
500#endif
501 lowcore_ptr[cpu] = lowcore;
502 return 0;
503
591bb4f6 504out:
33b1d09e 505 free_page(panic_stack);
1cb6bb4b 506 free_pages(async_stack, ASYNC_ORDER);
1cb6bb4b
HC
507 free_pages((unsigned long) lowcore, lc_order);
508 return -ENOMEM;
509}
510
1cb6bb4b
HC
511static void smp_free_lowcore(int cpu)
512{
513 struct _lowcore *lowcore;
514 int lc_order;
515
516 lc_order = sizeof(long) == 8 ? 1 : 0;
517 lowcore = lowcore_ptr[cpu];
518#ifndef CONFIG_64BIT
519 if (MACHINE_HAS_IEEE)
520 free_page((unsigned long) lowcore->extended_save_area_addr);
c742b31c
MS
521#else
522 vdso_free_per_cpu(cpu, lowcore);
1cb6bb4b
HC
523#endif
524 free_page(lowcore->panic_stack - PAGE_SIZE);
525 free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
526 free_pages((unsigned long) lowcore, lc_order);
527 lowcore_ptr[cpu] = NULL;
528}
1cb6bb4b 529
1da177e4 530/* Upping and downing of CPUs */
1cb6bb4b 531int __cpuinit __cpu_up(unsigned int cpu)
1da177e4
LT
532{
533 struct task_struct *idle;
39ce010d 534 struct _lowcore *cpu_lowcore;
1da177e4 535 struct stack_frame *sf;
39ce010d 536 sigp_ccode ccode;
1da177e4 537
08d07968
HC
538 if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
539 return -EIO;
1cb6bb4b
HC
540 if (smp_alloc_lowcore(cpu))
541 return -ENOMEM;
1da177e4
LT
542
543 ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
544 cpu, sigp_set_prefix);
6d54c5a3
HC
545 if (ccode) {
546 smp_free_lowcore(cpu);
1da177e4 547 return -EIO;
6d54c5a3 548 }
1da177e4
LT
549
550 idle = current_set[cpu];
39ce010d 551 cpu_lowcore = lowcore_ptr[cpu];
1da177e4 552 cpu_lowcore->kernel_stack = (unsigned long)
39ce010d 553 task_stack_page(idle) + THREAD_SIZE;
1cb6bb4b 554 cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
1da177e4
LT
555 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
556 - sizeof(struct pt_regs)
557 - sizeof(struct stack_frame));
558 memset(sf, 0, sizeof(struct stack_frame));
559 sf->gprs[9] = (unsigned long) sf;
560 cpu_lowcore->save_area[15] = (unsigned long) sf;
24d3e210 561 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
94c12cc7
MS
562 asm volatile(
563 " stam 0,15,0(%0)"
564 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
1da177e4 565 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
39ce010d 566 cpu_lowcore->current_task = (unsigned long) idle;
7b468488 567 cpu_lowcore->cpu_nr = cpu;
591bb4f6 568 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
1da177e4 569 eieio();
699ff13f 570
39ce010d 571 while (signal_processor(cpu, sigp_restart) == sigp_busy)
699ff13f 572 udelay(10);
1da177e4
LT
573
574 while (!cpu_online(cpu))
575 cpu_relax();
576 return 0;
577}
578
48483b32 579static int __init setup_possible_cpus(char *s)
255acee7 580{
48483b32 581 int pcpus, cpu;
255acee7 582
48483b32
HC
583 pcpus = simple_strtoul(s, NULL, 0);
584 cpu_possible_map = cpumask_of_cpu(0);
585 for (cpu = 1; cpu < pcpus && cpu < NR_CPUS; cpu++)
255acee7 586 cpu_set(cpu, cpu_possible_map);
37a33026
HC
587 return 0;
588}
589early_param("possible_cpus", setup_possible_cpus);
590
48483b32
HC
591#ifdef CONFIG_HOTPLUG_CPU
592
39ce010d 593int __cpu_disable(void)
1da177e4 594{
94c12cc7 595 struct ec_creg_mask_parms cr_parms;
f3705136 596 int cpu = smp_processor_id();
1da177e4 597
f3705136 598 cpu_clear(cpu, cpu_online_map);
1da177e4 599
1da177e4 600 /* Disable pfault pseudo page faults on this cpu. */
29b08d2b 601 pfault_fini();
1da177e4 602
94c12cc7
MS
603 memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
604 memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
1da177e4 605
94c12cc7 606 /* disable all external interrupts */
1da177e4 607 cr_parms.orvals[0] = 0;
39ce010d
HC
608 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 |
609 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4);
1da177e4 610 /* disable all I/O interrupts */
1da177e4 611 cr_parms.orvals[6] = 0;
39ce010d
HC
612 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
613 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
1da177e4 614 /* disable most machine checks */
1da177e4 615 cr_parms.orvals[14] = 0;
39ce010d
HC
616 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
617 1 << 25 | 1 << 24);
94c12cc7 618
1da177e4
LT
619 smp_ctl_bit_callback(&cr_parms);
620
1da177e4
LT
621 return 0;
622}
623
39ce010d 624void __cpu_die(unsigned int cpu)
1da177e4
LT
625{
626 /* Wait until target cpu is down */
627 while (!smp_cpu_not_running(cpu))
628 cpu_relax();
1cb6bb4b 629 smp_free_lowcore(cpu);
395d31d4 630 pr_info("Processor %d stopped\n", cpu);
1da177e4
LT
631}
632
39ce010d 633void cpu_die(void)
1da177e4
LT
634{
635 idle_task_exit();
636 signal_processor(smp_processor_id(), sigp_stop);
637 BUG();
39ce010d 638 for (;;);
1da177e4
LT
639}
640
255acee7
HC
641#endif /* CONFIG_HOTPLUG_CPU */
642
1da177e4
LT
643void __init smp_prepare_cpus(unsigned int max_cpus)
644{
591bb4f6
HC
645#ifndef CONFIG_64BIT
646 unsigned long save_area = 0;
647#endif
648 unsigned long async_stack, panic_stack;
649 struct _lowcore *lowcore;
1da177e4 650 unsigned int cpu;
591bb4f6 651 int lc_order;
39ce010d 652
48483b32
HC
653 smp_detect_cpus();
654
39ce010d
HC
655 /* request the 0x1201 emergency signal external interrupt */
656 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
657 panic("Couldn't request external interrupt 0x1201");
7b468488 658 print_cpu_info();
1da177e4 659
591bb4f6
HC
660 /* Reallocate current lowcore, but keep its contents. */
661 lc_order = sizeof(long) == 8 ? 1 : 0;
662 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order);
663 panic_stack = __get_free_page(GFP_KERNEL);
664 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
c742b31c 665 BUG_ON(!lowcore || !panic_stack || !async_stack);
347a8dc3 666#ifndef CONFIG_64BIT
77fa2245 667 if (MACHINE_HAS_IEEE)
591bb4f6 668 save_area = get_zeroed_page(GFP_KERNEL);
77fa2245 669#endif
591bb4f6
HC
670 local_irq_disable();
671 local_mcck_disable();
672 lowcore_ptr[smp_processor_id()] = lowcore;
673 *lowcore = S390_lowcore;
674 lowcore->panic_stack = panic_stack + PAGE_SIZE;
675 lowcore->async_stack = async_stack + ASYNC_SIZE;
676#ifndef CONFIG_64BIT
677 if (MACHINE_HAS_IEEE)
678 lowcore->extended_save_area_addr = (u32) save_area;
c742b31c 679#else
81ffa041
HC
680 if (vdso_alloc_per_cpu(smp_processor_id(), lowcore))
681 BUG();
591bb4f6
HC
682#endif
683 set_prefix((u32)(unsigned long) lowcore);
684 local_mcck_enable();
685 local_irq_enable();
97db7fbf 686 for_each_possible_cpu(cpu)
1da177e4
LT
687 if (cpu != smp_processor_id())
688 smp_create_idle(cpu);
689}
690
ea1f4eec 691void __init smp_prepare_boot_cpu(void)
1da177e4
LT
692{
693 BUG_ON(smp_processor_id() != 0);
694
48483b32
HC
695 current_thread_info()->cpu = 0;
696 cpu_set(0, cpu_present_map);
1da177e4 697 cpu_set(0, cpu_online_map);
1da177e4
LT
698 S390_lowcore.percpu_offset = __per_cpu_offset[0];
699 current_set[0] = current;
08d07968 700 smp_cpu_state[0] = CPU_STATE_CONFIGURED;
c10fde0d 701 smp_cpu_polarization[0] = POLARIZATION_UNKNWN;
1da177e4
LT
702}
703
ea1f4eec 704void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 705{
1da177e4
LT
706}
707
708/*
709 * the frequency of the profiling timer can be changed
710 * by writing a multiplier value into /proc/profile.
711 *
712 * usually you want to run this on all CPUs ;)
713 */
714int setup_profiling_timer(unsigned int multiplier)
715{
39ce010d 716 return 0;
1da177e4
LT
717}
718
08d07968 719#ifdef CONFIG_HOTPLUG_CPU
4a0b2b4d
AK
720static ssize_t cpu_configure_show(struct sys_device *dev,
721 struct sysdev_attribute *attr, char *buf)
08d07968
HC
722{
723 ssize_t count;
724
725 mutex_lock(&smp_cpu_state_mutex);
726 count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
727 mutex_unlock(&smp_cpu_state_mutex);
728 return count;
729}
730
4a0b2b4d
AK
731static ssize_t cpu_configure_store(struct sys_device *dev,
732 struct sysdev_attribute *attr,
733 const char *buf, size_t count)
08d07968
HC
734{
735 int cpu = dev->id;
736 int val, rc;
737 char delim;
738
739 if (sscanf(buf, "%d %c", &val, &delim) != 1)
740 return -EINVAL;
741 if (val != 0 && val != 1)
742 return -EINVAL;
743
9d40d2e3 744 get_online_cpus();
0b18d318 745 mutex_lock(&smp_cpu_state_mutex);
08d07968
HC
746 rc = -EBUSY;
747 if (cpu_online(cpu))
748 goto out;
749 rc = 0;
750 switch (val) {
751 case 0:
752 if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
753 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
c10fde0d 754 if (!rc) {
08d07968 755 smp_cpu_state[cpu] = CPU_STATE_STANDBY;
c10fde0d
HC
756 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
757 }
08d07968
HC
758 }
759 break;
760 case 1:
761 if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
762 rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
c10fde0d 763 if (!rc) {
08d07968 764 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
c10fde0d
HC
765 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
766 }
08d07968
HC
767 }
768 break;
769 default:
770 break;
771 }
772out:
08d07968 773 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 774 put_online_cpus();
08d07968
HC
775 return rc ? rc : count;
776}
777static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
778#endif /* CONFIG_HOTPLUG_CPU */
779
4a0b2b4d
AK
780static ssize_t cpu_polarization_show(struct sys_device *dev,
781 struct sysdev_attribute *attr, char *buf)
c10fde0d
HC
782{
783 int cpu = dev->id;
784 ssize_t count;
785
786 mutex_lock(&smp_cpu_state_mutex);
787 switch (smp_cpu_polarization[cpu]) {
788 case POLARIZATION_HRZ:
789 count = sprintf(buf, "horizontal\n");
790 break;
791 case POLARIZATION_VL:
792 count = sprintf(buf, "vertical:low\n");
793 break;
794 case POLARIZATION_VM:
795 count = sprintf(buf, "vertical:medium\n");
796 break;
797 case POLARIZATION_VH:
798 count = sprintf(buf, "vertical:high\n");
799 break;
800 default:
801 count = sprintf(buf, "unknown\n");
802 break;
803 }
804 mutex_unlock(&smp_cpu_state_mutex);
805 return count;
806}
807static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
808
4a0b2b4d
AK
809static ssize_t show_cpu_address(struct sys_device *dev,
810 struct sysdev_attribute *attr, char *buf)
08d07968
HC
811{
812 return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
813}
814static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
815
816
817static struct attribute *cpu_common_attrs[] = {
818#ifdef CONFIG_HOTPLUG_CPU
819 &attr_configure.attr,
820#endif
821 &attr_address.attr,
c10fde0d 822 &attr_polarization.attr,
08d07968
HC
823 NULL,
824};
825
826static struct attribute_group cpu_common_attr_group = {
827 .attrs = cpu_common_attrs,
828};
1da177e4 829
4a0b2b4d
AK
830static ssize_t show_capability(struct sys_device *dev,
831 struct sysdev_attribute *attr, char *buf)
2fc2d1e9
HC
832{
833 unsigned int capability;
834 int rc;
835
836 rc = get_cpu_capability(&capability);
837 if (rc)
838 return rc;
839 return sprintf(buf, "%u\n", capability);
840}
841static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
842
4a0b2b4d
AK
843static ssize_t show_idle_count(struct sys_device *dev,
844 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
845{
846 struct s390_idle_data *idle;
847 unsigned long long idle_count;
848
849 idle = &per_cpu(s390_idle, dev->id);
6f430924 850 spin_lock(&idle->lock);
fae8b22d 851 idle_count = idle->idle_count;
6f430924
MS
852 if (idle->idle_enter)
853 idle_count++;
854 spin_unlock(&idle->lock);
fae8b22d
HC
855 return sprintf(buf, "%llu\n", idle_count);
856}
857static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
858
4a0b2b4d
AK
859static ssize_t show_idle_time(struct sys_device *dev,
860 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
861{
862 struct s390_idle_data *idle;
6f430924 863 unsigned long long now, idle_time, idle_enter;
fae8b22d
HC
864
865 idle = &per_cpu(s390_idle, dev->id);
6f430924
MS
866 spin_lock(&idle->lock);
867 now = get_clock();
868 idle_time = idle->idle_time;
869 idle_enter = idle->idle_enter;
870 if (idle_enter != 0ULL && idle_enter < now)
871 idle_time += now - idle_enter;
872 spin_unlock(&idle->lock);
873 return sprintf(buf, "%llu\n", idle_time >> 12);
fae8b22d 874}
69d39d66 875static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 876
08d07968 877static struct attribute *cpu_online_attrs[] = {
fae8b22d
HC
878 &attr_capability.attr,
879 &attr_idle_count.attr,
69d39d66 880 &attr_idle_time_us.attr,
fae8b22d
HC
881 NULL,
882};
883
08d07968
HC
884static struct attribute_group cpu_online_attr_group = {
885 .attrs = cpu_online_attrs,
fae8b22d
HC
886};
887
2fc2d1e9
HC
888static int __cpuinit smp_cpu_notify(struct notifier_block *self,
889 unsigned long action, void *hcpu)
890{
891 unsigned int cpu = (unsigned int)(long)hcpu;
892 struct cpu *c = &per_cpu(cpu_devices, cpu);
893 struct sys_device *s = &c->sysdev;
fae8b22d 894 struct s390_idle_data *idle;
2fc2d1e9
HC
895
896 switch (action) {
897 case CPU_ONLINE:
8bb78442 898 case CPU_ONLINE_FROZEN:
fae8b22d
HC
899 idle = &per_cpu(s390_idle, cpu);
900 spin_lock_irq(&idle->lock);
901 idle->idle_enter = 0;
902 idle->idle_time = 0;
903 idle->idle_count = 0;
904 spin_unlock_irq(&idle->lock);
08d07968 905 if (sysfs_create_group(&s->kobj, &cpu_online_attr_group))
2fc2d1e9
HC
906 return NOTIFY_BAD;
907 break;
908 case CPU_DEAD:
8bb78442 909 case CPU_DEAD_FROZEN:
08d07968 910 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
911 break;
912 }
913 return NOTIFY_OK;
914}
915
916static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 917 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
918};
919
2bc89b5e 920static int __devinit smp_add_present_cpu(int cpu)
08d07968
HC
921{
922 struct cpu *c = &per_cpu(cpu_devices, cpu);
923 struct sys_device *s = &c->sysdev;
924 int rc;
925
926 c->hotpluggable = 1;
927 rc = register_cpu(c, cpu);
928 if (rc)
929 goto out;
930 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
931 if (rc)
932 goto out_cpu;
933 if (!cpu_online(cpu))
934 goto out;
935 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
936 if (!rc)
937 return 0;
938 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
939out_cpu:
940#ifdef CONFIG_HOTPLUG_CPU
941 unregister_cpu(c);
942#endif
943out:
944 return rc;
945}
946
947#ifdef CONFIG_HOTPLUG_CPU
1e489518 948
67060d9c 949int __ref smp_rescan_cpus(void)
08d07968
HC
950{
951 cpumask_t newcpus;
952 int cpu;
953 int rc;
954
9d40d2e3 955 get_online_cpus();
0b18d318 956 mutex_lock(&smp_cpu_state_mutex);
08d07968 957 newcpus = cpu_present_map;
1e489518 958 rc = __smp_rescan_cpus();
08d07968
HC
959 if (rc)
960 goto out;
961 cpus_andnot(newcpus, cpu_present_map, newcpus);
962 for_each_cpu_mask(cpu, newcpus) {
963 rc = smp_add_present_cpu(cpu);
964 if (rc)
965 cpu_clear(cpu, cpu_present_map);
966 }
967 rc = 0;
968out:
08d07968 969 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 970 put_online_cpus();
c10fde0d
HC
971 if (!cpus_empty(newcpus))
972 topology_schedule_update();
1e489518
HC
973 return rc;
974}
975
da5aae70 976static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf,
1e489518
HC
977 size_t count)
978{
979 int rc;
980
981 rc = smp_rescan_cpus();
08d07968
HC
982 return rc ? rc : count;
983}
da5aae70 984static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
985#endif /* CONFIG_HOTPLUG_CPU */
986
da5aae70 987static ssize_t dispatching_show(struct sysdev_class *class, char *buf)
c10fde0d
HC
988{
989 ssize_t count;
990
991 mutex_lock(&smp_cpu_state_mutex);
992 count = sprintf(buf, "%d\n", cpu_management);
993 mutex_unlock(&smp_cpu_state_mutex);
994 return count;
995}
996
da5aae70
HC
997static ssize_t dispatching_store(struct sysdev_class *dev, const char *buf,
998 size_t count)
c10fde0d
HC
999{
1000 int val, rc;
1001 char delim;
1002
1003 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1004 return -EINVAL;
1005 if (val != 0 && val != 1)
1006 return -EINVAL;
1007 rc = 0;
c10fde0d 1008 get_online_cpus();
0b18d318 1009 mutex_lock(&smp_cpu_state_mutex);
c10fde0d
HC
1010 if (cpu_management == val)
1011 goto out;
1012 rc = topology_set_cpu_management(val);
1013 if (!rc)
1014 cpu_management = val;
1015out:
c10fde0d 1016 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1017 put_online_cpus();
c10fde0d
HC
1018 return rc ? rc : count;
1019}
da5aae70
HC
1020static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
1021 dispatching_store);
c10fde0d 1022
1da177e4
LT
1023static int __init topology_init(void)
1024{
1025 int cpu;
fae8b22d 1026 int rc;
2fc2d1e9
HC
1027
1028 register_cpu_notifier(&smp_cpu_nb);
1da177e4 1029
08d07968 1030#ifdef CONFIG_HOTPLUG_CPU
da5aae70 1031 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
08d07968
HC
1032 if (rc)
1033 return rc;
1034#endif
da5aae70 1035 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
c10fde0d
HC
1036 if (rc)
1037 return rc;
08d07968
HC
1038 for_each_present_cpu(cpu) {
1039 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1040 if (rc)
1041 return rc;
1da177e4
LT
1042 }
1043 return 0;
1044}
1da177e4 1045subsys_initcall(topology_init);