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1da177e4 1/*
54dfe5dd 2 * arch/s390/kernel/entry64.S
1da177e4
LT
3 * S390 low-level entry points.
4 *
cd3b70f5 5 * Copyright (C) IBM Corp. 1999,2010
1da177e4 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
25d83cbf
HC
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
77fa2245 9 * Heiko Carstens <heiko.carstens@de.ibm.com>
1da177e4
LT
10 */
11
1da177e4 12#include <linux/linkage.h>
2bc89b5e 13#include <linux/init.h>
1da177e4 14#include <asm/cache.h>
1da177e4
LT
15#include <asm/errno.h>
16#include <asm/ptrace.h>
17#include <asm/thread_info.h>
0013a854 18#include <asm/asm-offsets.h>
1da177e4
LT
19#include <asm/unistd.h>
20#include <asm/page.h>
21
22/*
23 * Stack layout for the system_call stack entry.
24 * The first few entries are identical to the user_regs_struct.
25 */
25d83cbf
HC
26SP_PTREGS = STACK_FRAME_OVERHEAD
27SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
28SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
29SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
30SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
31SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
32SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
33SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
34SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
35SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
36SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
37SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
38SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
39SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
40SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
41SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
42SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
43SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
44SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
45SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
46SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
59da2139 47SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
25d83cbf 48SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
1da177e4
LT
49
50STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
51STACK_SIZE = 1 << STACK_SHIFT
52
753c4dd6 53_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54dfe5dd 54 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
753c4dd6 55_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54dfe5dd 56 _TIF_MCCK_PENDING)
9bf1226b 57_TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
66700001 58 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
1da177e4
LT
59
60#define BASED(name) name-system_call(%r13)
61
cd3b70f5
CO
62 .macro HANDLE_SIE_INTERCEPT
63#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
64 lg %r3,__LC_SIE_HOOK
65 ltgr %r3,%r3
66 jz 0f
67 basr %r14,%r3
2ffbb3f6 680:
cd3b70f5
CO
69#endif
70 .endm
71
1f194a4c
HC
72#ifdef CONFIG_TRACE_IRQFLAGS
73 .macro TRACE_IRQS_ON
6a2df3a8
MS
74 basr %r2,%r0
75 brasl %r14,trace_hardirqs_on_caller
1f194a4c
HC
76 .endm
77
78 .macro TRACE_IRQS_OFF
6a2df3a8
MS
79 basr %r2,%r0
80 brasl %r14,trace_hardirqs_off_caller
1f194a4c 81 .endm
523b44cf 82
6a2df3a8 83 .macro TRACE_IRQS_CHECK_ON
411788ea
HC
84 tm SP_PSW(%r15),0x03 # irqs enabled?
85 jz 0f
6a2df3a8
MS
86 TRACE_IRQS_ON
870:
88 .endm
89
90 .macro TRACE_IRQS_CHECK_OFF
91 tm SP_PSW(%r15),0x03 # irqs enabled?
92 jz 0f
93 TRACE_IRQS_OFF
940:
523b44cf 95 .endm
1f194a4c
HC
96#else
97#define TRACE_IRQS_ON
98#define TRACE_IRQS_OFF
6a2df3a8
MS
99#define TRACE_IRQS_CHECK_ON
100#define TRACE_IRQS_CHECK_OFF
411788ea
HC
101#endif
102
103#ifdef CONFIG_LOCKDEP
104 .macro LOCKDEP_SYS_EXIT
105 tm SP_PSW+1(%r15),0x01 # returning to user ?
106 jz 0f
107 brasl %r14,lockdep_sys_exit
1080:
109 .endm
110#else
523b44cf 111#define LOCKDEP_SYS_EXIT
1f194a4c
HC
112#endif
113
25d83cbf 114 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
1da177e4
LT
115 lg %r10,\lc_from
116 slg %r10,\lc_to
117 alg %r10,\lc_sum
118 stg %r10,\lc_sum
119 .endm
1da177e4
LT
120
121/*
122 * Register usage in interrupt handlers:
123 * R9 - pointer to current task structure
124 * R13 - pointer to literal pool
125 * R14 - return register for function calls
126 * R15 - kernel stack pointer
127 */
128
987ad70a 129 .macro SAVE_ALL_SVC psworg,savearea
86f2552b 130 stmg %r11,%r15,\savearea
987ad70a 131 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
86f2552b
MS
132 aghi %r15,-SP_SIZE # make room for registers & psw
133 lg %r11,__LC_LAST_BREAK
987ad70a
MS
134 .endm
135
86f2552b
MS
136 .macro SAVE_ALL_PGM psworg,savearea
137 stmg %r11,%r15,\savearea
1da177e4 138 tm \psworg+1,0x01 # test problem state bit
63b12246 139#ifdef CONFIG_CHECK_STACK
86f2552b
MS
140 jnz 1f
141 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
142 jnz 2f
143 la %r12,\psworg
144 j stack_overflow
145#else
146 jz 2f
63b12246 147#endif
86f2552b
MS
1481: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
1492: aghi %r15,-SP_SIZE # make room for registers & psw
150 larl %r13,system_call
151 lg %r11,__LC_LAST_BREAK
63b12246
MS
152 .endm
153
154 .macro SAVE_ALL_ASYNC psworg,savearea
86f2552b
MS
155 stmg %r11,%r15,\savearea
156 larl %r13,system_call
157 lg %r11,__LC_LAST_BREAK
63b12246 158 la %r12,\psworg
1da177e4
LT
159 tm \psworg+1,0x01 # test problem state bit
160 jnz 1f # from user -> load kernel stack
161 clc \psworg+8(8),BASED(.Lcritical_end)
162 jhe 0f
163 clc \psworg+8(8),BASED(.Lcritical_start)
164 jl 0f
165 brasl %r14,cleanup_critical
6add9f7f 166 tm 1(%r12),0x01 # retest problem state after cleanup
1da177e4
LT
167 jnz 1f
1680: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
169 slgr %r14,%r15
170 srag %r14,%r14,STACK_SHIFT
1da177e4 171#ifdef CONFIG_CHECK_STACK
86f2552b
MS
172 jnz 1f
173 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
174 jnz 2f
175 j stack_overflow
176#else
177 jz 2f
1da177e4 178#endif
86f2552b
MS
1791: lg %r15,__LC_ASYNC_STACK # load async stack
1802: aghi %r15,-SP_SIZE # make room for registers & psw
77fa2245
HC
181 .endm
182
86f2552b
MS
183 .macro CREATE_STACK_FRAME savearea
184 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1da177e4 185 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
86f2552b
MS
186 mvc SP_R11(40,%r15),\savearea # move %r11-%r15 to stack
187 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
25d83cbf 188 .endm
1da177e4 189
ae6aa2ea
MS
190 .macro RESTORE_ALL psworg,sync
191 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
1da177e4 192 .if !\sync
ae6aa2ea 193 ni \psworg+1,0xfd # clear wait state bit
1da177e4 194 .endif
c742b31c
MS
195 lg %r14,__LC_VDSO_PER_CPU
196 lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user
c185b783 197 stpt __LC_EXIT_TIMER
c742b31c
MS
198 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
199 lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user
ae6aa2ea 200 lpswe \psworg # back to caller
1da177e4
LT
201 .endm
202
86f2552b
MS
203 .macro LAST_BREAK
204 srag %r10,%r11,23
205 jz 0f
206 stg %r11,__TI_last_break(%r12)
2070:
208 .endm
209
1da177e4
LT
210/*
211 * Scheduler resume function, called by switch_to
212 * gpr2 = (task_struct *) prev
213 * gpr3 = (task_struct *) next
214 * Returns:
215 * gpr2 = prev
216 */
25d83cbf 217 .globl __switch_to
1da177e4
LT
218__switch_to:
219 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
220 jz __switch_to_noper # if not we're fine
25d83cbf
HC
221 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
222 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
223 je __switch_to_noper # we got away without bashing TLB's
224 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
1da177e4 225__switch_to_noper:
25d83cbf 226 lg %r4,__THREAD_info(%r2) # get thread_info of prev
77fa2245
HC
227 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
228 jz __switch_to_no_mcck
229 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
230 lg %r4,__THREAD_info(%r3) # get thread_info of next
231 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
232__switch_to_no_mcck:
25d83cbf 233 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
1da177e4
LT
234 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
235 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
25d83cbf 236 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
1da177e4
LT
237 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
238 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
25d83cbf 239 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
1da177e4
LT
240 stg %r3,__LC_THREAD_INFO
241 aghi %r3,STACK_SIZE
242 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
243 br %r14
244
245__critical_start:
246/*
247 * SVC interrupt handler routine. System calls are synchronous events and
248 * are executed with interrupts enabled.
249 */
250
25d83cbf 251 .globl system_call
1da177e4 252system_call:
c185b783 253 stpt __LC_SYNC_ENTER_TIMER
1da177e4 254sysc_saveall:
987ad70a 255 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
86f2552b
MS
256 CREATE_STACK_FRAME __LC_SAVE_AREA
257 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
258 mvc SP_ILC(4,%r15),__LC_SVC_ILC
259 stg %r7,SP_ARGS(%r15)
260 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
1da177e4 261sysc_vtime:
1da177e4
LT
262 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
263sysc_stime:
264 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
265sysc_update:
266 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
86f2552b 267 LAST_BREAK
1da177e4 268sysc_do_svc:
86f2552b
MS
269 llgh %r7,SP_SVCNR(%r15)
270 slag %r7,%r7,2 # shift and test for svc 0
1da177e4
LT
271 jnz sysc_nr_ok
272 # svc 0: system call number in %r1
86f2552b
MS
273 llgfr %r1,%r1 # clear high word in r1
274 cghi %r1,NR_syscalls
1da177e4 275 jnl sysc_nr_ok
86f2552b
MS
276 sth %r1,SP_SVCNR(%r15)
277 slag %r7,%r1,2 # shift and test for svc 0
1da177e4 278sysc_nr_ok:
25d83cbf 279 larl %r10,sys_call_table
347a8dc3 280#ifdef CONFIG_COMPAT
86f2552b 281 tm __TI_flags+5(%r12),(_TIF_31BIT>>16) # running in 31 bit mode ?
c563077e 282 jno sysc_noemu
25d83cbf 283 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
1da177e4
LT
284sysc_noemu:
285#endif
86f2552b 286 tm __TI_flags+6(%r12),_TIF_SYSCALL
25d83cbf
HC
287 lgf %r8,0(%r7,%r10) # load address of system call routine
288 jnz sysc_tracesys
289 basr %r14,%r8 # call sys_xxxx
290 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
1da177e4
LT
291
292sysc_return:
6a2df3a8
MS
293 LOCKDEP_SYS_EXIT
294sysc_tif:
86f2552b 295 tm __TI_flags+7(%r12),_TIF_WORK_SVC
25d83cbf 296 jnz sysc_work # there is work to do (signals etc.)
411788ea 297sysc_restore:
25d83cbf 298 RESTORE_ALL __LC_RETURN_PSW,1
411788ea
HC
299sysc_done:
300
1da177e4 301#
43d399d2 302# There is work to do, but first we need to check if we return to userspace.
1da177e4
LT
303#
304sysc_work:
2688905e
MS
305 tm SP_PSW+1(%r15),0x01 # returning to user ?
306 jno sysc_restore
43d399d2
MS
307
308#
309# One of the work bits is on. Find out which one.
310#
6a2df3a8 311sysc_work_tif:
86f2552b 312 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
77fa2245 313 jo sysc_mcck_pending
86f2552b 314 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
1da177e4 315 jo sysc_reschedule
86f2552b 316 tm __TI_flags+7(%r12),_TIF_SIGPENDING
43d399d2 317 jo sysc_sigpending
86f2552b 318 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
43d399d2 319 jo sysc_notify_resume
86f2552b 320 tm __TI_flags+7(%r12),_TIF_RESTART_SVC
1da177e4 321 jo sysc_restart
86f2552b 322 tm __TI_flags+7(%r12),_TIF_SINGLE_STEP
1da177e4 323 jo sysc_singlestep
43d399d2 324 j sysc_return # beware of critical section cleanup
1da177e4
LT
325
326#
327# _TIF_NEED_RESCHED is set, call schedule
25d83cbf
HC
328#
329sysc_reschedule:
6a2df3a8
MS
330 larl %r14,sysc_return
331 jg schedule # return point is sysc_return
1da177e4 332
77fa2245
HC
333#
334# _TIF_MCCK_PENDING is set, call handler
335#
336sysc_mcck_pending:
6a2df3a8 337 larl %r14,sysc_return
25d83cbf 338 jg s390_handle_mcck # TIF bit will be cleared by handler
77fa2245 339
1da177e4 340#
02a029b3 341# _TIF_SIGPENDING is set, call do_signal
1da177e4 342#
25d83cbf 343sysc_sigpending:
86f2552b 344 ni __TI_flags+7(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
25d83cbf
HC
345 la %r2,SP_PTREGS(%r15) # load pt_regs
346 brasl %r14,do_signal # call do_signal
86f2552b 347 tm __TI_flags+7(%r12),_TIF_RESTART_SVC
1da177e4 348 jo sysc_restart
86f2552b 349 tm __TI_flags+7(%r12),_TIF_SINGLE_STEP
1da177e4 350 jo sysc_singlestep
6a2df3a8 351 j sysc_return
1da177e4 352
753c4dd6
MS
353#
354# _TIF_NOTIFY_RESUME is set, call do_notify_resume
355#
356sysc_notify_resume:
357 la %r2,SP_PTREGS(%r15) # load pt_regs
6a2df3a8 358 larl %r14,sysc_return
753c4dd6
MS
359 jg do_notify_resume # call do_notify_resume
360
1da177e4
LT
361#
362# _TIF_RESTART_SVC is set, set up registers and restart svc
363#
364sysc_restart:
86f2552b 365 ni __TI_flags+7(%r12),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
25d83cbf 366 lg %r7,SP_R2(%r15) # load new svc number
1da177e4 367 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
25d83cbf 368 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
86f2552b
MS
369 sth %r7,SP_SVCNR(%r15)
370 slag %r7,%r7,2
371 j sysc_nr_ok # restart svc
1da177e4
LT
372
373#
374# _TIF_SINGLE_STEP is set, call do_single_step
375#
376sysc_singlestep:
86f2552b 377 ni __TI_flags+7(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
59da2139 378 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
1da177e4 379 la %r2,SP_PTREGS(%r15) # address of register-save area
6a2df3a8 380 larl %r14,sysc_return # load adr. of system return
1da177e4
LT
381 jg do_single_step # branch to do_sigtrap
382
1da177e4 383#
753c4dd6
MS
384# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
385# and after the system call
1da177e4
LT
386#
387sysc_tracesys:
25d83cbf 388 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4 389 la %r3,0
86f2552b
MS
390 llgh %r0,SP_SVCNR(%r15)
391 stg %r0,SP_R2(%r15)
753c4dd6 392 brasl %r14,do_syscall_trace_enter
1da177e4 393 lghi %r0,NR_syscalls
753c4dd6 394 clgr %r0,%r2
1da177e4 395 jnh sysc_tracenogo
59da2139 396 sllg %r7,%r2,2 # svc number *4
1da177e4
LT
397 lgf %r8,0(%r7,%r10)
398sysc_tracego:
25d83cbf
HC
399 lmg %r3,%r6,SP_R3(%r15)
400 lg %r2,SP_ORIG_R2(%r15)
401 basr %r14,%r8 # call sys_xxx
402 stg %r2,SP_R2(%r15) # store return value
1da177e4 403sysc_tracenogo:
86f2552b 404 tm __TI_flags+6(%r12),_TIF_SYSCALL
25d83cbf
HC
405 jz sysc_return
406 la %r2,SP_PTREGS(%r15) # load pt_regs
25d83cbf 407 larl %r14,sysc_return # return point is sysc_return
753c4dd6 408 jg do_syscall_trace_exit
1da177e4
LT
409
410#
411# a new process exits the kernel with ret_from_fork
412#
25d83cbf 413 .globl ret_from_fork
1da177e4
LT
414ret_from_fork:
415 lg %r13,__LC_SVC_NEW_PSW+8
86f2552b 416 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
1da177e4
LT
417 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
418 jo 0f
419 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
25d83cbf 4200: brasl %r14,schedule_tail
1f194a4c 421 TRACE_IRQS_ON
25d83cbf 422 stosm 24(%r15),0x03 # reenable interrupts
8f2961c3 423 j sysc_tracenogo
1da177e4
LT
424
425#
03ff9a23
MS
426# kernel_execve function needs to deal with pt_regs that is not
427# at the usual place
1da177e4 428#
03ff9a23
MS
429 .globl kernel_execve
430kernel_execve:
431 stmg %r12,%r15,96(%r15)
432 lgr %r14,%r15
433 aghi %r15,-SP_SIZE
434 stg %r14,__SF_BACKCHAIN(%r15)
435 la %r12,SP_PTREGS(%r15)
436 xc 0(__PT_SIZE,%r12),0(%r12)
437 lgr %r5,%r12
438 brasl %r14,do_execve
439 ltgfr %r2,%r2
440 je 0f
441 aghi %r15,SP_SIZE
442 lmg %r12,%r15,96(%r15)
443 br %r14
444 # execve succeeded.
4450: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
6a2df3a8 446# TRACE_IRQS_OFF
03ff9a23
MS
447 lg %r15,__LC_KERNEL_STACK # load ksp
448 aghi %r15,-SP_SIZE # make room for registers & psw
449 lg %r13,__LC_SVC_NEW_PSW+8
03ff9a23 450 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
86f2552b 451 lg %r12,__LC_THREAD_INFO
03ff9a23 452 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
6a2df3a8 453# TRACE_IRQS_ON
03ff9a23
MS
454 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
455 brasl %r14,execve_tail
456 j sysc_return
1da177e4
LT
457
458/*
459 * Program check handler routine
460 */
461
25d83cbf 462 .globl pgm_check_handler
1da177e4
LT
463pgm_check_handler:
464/*
465 * First we need to check for a special case:
466 * Single stepping an instruction that disables the PER event mask will
467 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
468 * For a single stepped SVC the program check handler gets control after
469 * the SVC new PSW has been loaded. But we want to execute the SVC first and
470 * then handle the PER event. Therefore we update the SVC old PSW to point
471 * to the pgm_check_handler and branch to the SVC handler after we checked
472 * if we have to load the kernel stack register.
473 * For every other possible cause for PER event without the PER mask set
474 * we just ignore the PER event (FIXME: is there anything we have to do
475 * for LPSW?).
476 */
c185b783 477 stpt __LC_SYNC_ENTER_TIMER
25d83cbf
HC
478 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
479 jnz pgm_per # got per exception -> special case
86f2552b
MS
480 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
481 CREATE_STACK_FRAME __LC_SAVE_AREA
482 xc SP_ILC(4,%r15),SP_ILC(%r15)
483 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
484 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
1da177e4
LT
485 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
486 jz pgm_no_vtime
487 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
488 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
489 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
86f2552b 490 LAST_BREAK
1da177e4 491pgm_no_vtime:
cd3b70f5 492 HANDLE_SIE_INTERCEPT
6a2df3a8 493 TRACE_IRQS_CHECK_OFF
86f2552b 494 stg %r11,SP_ARGS(%r15)
25d83cbf 495 lgf %r3,__LC_PGM_ILC # load program interruption code
1da177e4
LT
496 lghi %r8,0x7f
497 ngr %r8,%r3
498pgm_do_call:
25d83cbf
HC
499 sll %r8,3
500 larl %r1,pgm_check_table
501 lg %r1,0(%r8,%r1) # load address of handler routine
502 la %r2,SP_PTREGS(%r15) # address of register-save area
6a2df3a8
MS
503 basr %r14,%r1 # branch to interrupt-handler
504pgm_exit:
505 TRACE_IRQS_CHECK_ON
506 j sysc_return
1da177e4
LT
507
508#
509# handle per exception
510#
511pgm_per:
25d83cbf
HC
512 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
513 jnz pgm_per_std # ok, normal per event from user space
1da177e4 514# ok its one of the special cases, now we need to find out which one
25d83cbf
HC
515 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
516 je pgm_svcper
1da177e4 517# no interesting special case, ignore PER event
25d83cbf 518 lpswe __LC_PGM_OLD_PSW
1da177e4
LT
519
520#
521# Normal per exception
522#
523pgm_per_std:
86f2552b
MS
524 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
525 CREATE_STACK_FRAME __LC_SAVE_AREA
526 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
527 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
1da177e4
LT
528 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
529 jz pgm_no_vtime2
530 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
531 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
532 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
86f2552b 533 LAST_BREAK
1da177e4 534pgm_no_vtime2:
cd3b70f5 535 HANDLE_SIE_INTERCEPT
6a2df3a8 536 TRACE_IRQS_CHECK_OFF
86f2552b 537 lg %r1,__TI_task(%r12)
4ba069b8
MG
538 tm SP_PSW+1(%r15),0x01 # kernel per event ?
539 jz kernel_per
1da177e4
LT
540 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
541 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
542 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
86f2552b 543 oi __TI_flags+7(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
25d83cbf 544 lgf %r3,__LC_PGM_ILC # load program interruption code
1da177e4 545 lghi %r8,0x7f
25d83cbf 546 ngr %r8,%r3 # clear per-event-bit and ilc
6a2df3a8 547 je pgm_exit
1da177e4
LT
548 j pgm_do_call
549
550#
551# it was a single stepped SVC that is causing all the trouble
552#
553pgm_svcper:
86f2552b
MS
554 SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA
555 CREATE_STACK_FRAME __LC_SAVE_AREA
556 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
557 mvc SP_ILC(4,%r15),__LC_SVC_ILC
558 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
1da177e4
LT
559 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
560 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
561 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
86f2552b 562 LAST_BREAK
6a2df3a8 563 TRACE_IRQS_OFF
86f2552b 564 lg %r8,__TI_task(%r12)
bcc6525f
CB
565 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
566 mvc __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS
567 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
86f2552b 568 oi __TI_flags+7(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
1f194a4c 569 TRACE_IRQS_ON
1da177e4 570 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
6a2df3a8 571 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
1da177e4
LT
572 j sysc_do_svc
573
4ba069b8
MG
574#
575# per was called from kernel, must be kprobes
576#
577kernel_per:
59da2139 578 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
4ba069b8 579 la %r2,SP_PTREGS(%r15) # address of register-save area
6a2df3a8
MS
580 brasl %r14,do_single_step
581 j pgm_exit
4ba069b8 582
1da177e4
LT
583/*
584 * IO interrupt handler routine
585 */
25d83cbf 586 .globl io_int_handler
1da177e4 587io_int_handler:
1da177e4 588 stck __LC_INT_CLOCK
9cfb9b3c 589 stpt __LC_ASYNC_ENTER_TIMER
86f2552b
MS
590 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+40
591 CREATE_STACK_FRAME __LC_SAVE_AREA+40
592 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
593 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
1da177e4
LT
594 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
595 jz io_no_vtime
596 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
597 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
598 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
86f2552b 599 LAST_BREAK
1da177e4 600io_no_vtime:
cd3b70f5 601 HANDLE_SIE_INTERCEPT
1f194a4c 602 TRACE_IRQS_OFF
25d83cbf
HC
603 la %r2,SP_PTREGS(%r15) # address of register-save area
604 brasl %r14,do_IRQ # call standard irq handler
1da177e4 605io_return:
6a2df3a8
MS
606 LOCKDEP_SYS_EXIT
607 TRACE_IRQS_ON
608io_tif:
86f2552b 609 tm __TI_flags+7(%r12),_TIF_WORK_INT
25d83cbf 610 jnz io_work # there is work to do (signals etc.)
411788ea 611io_restore:
25d83cbf 612 RESTORE_ALL __LC_RETURN_PSW,0
ae6aa2ea 613io_done:
1da177e4 614
2688905e 615#
43d399d2
MS
616# There is work todo, find out in which context we have been interrupted:
617# 1) if we return to user space we can do all _TIF_WORK_INT work
618# 2) if we return to kernel code and kvm is enabled check if we need to
619# modify the psw to leave SIE
620# 3) if we return to kernel code and preemptive scheduling is enabled check
621# the preemption counter and if it is zero call preempt_schedule_irq
622# Before any work can be done, a switch to the kernel stack is required.
2688905e
MS
623#
624io_work:
625 tm SP_PSW+1(%r15),0x01 # returning to user ?
43d399d2 626 jo io_work_user # yes -> do resched & signal
43d399d2 627#ifdef CONFIG_PREEMPT
2688905e 628 # check for preemptive scheduling
86f2552b 629 icm %r0,15,__TI_precount(%r12)
2688905e 630 jnz io_restore # preemption is disabled
6a2df3a8
MS
631 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
632 jno io_restore
1da177e4
LT
633 # switch to kernel stack
634 lg %r1,SP_R15(%r15)
635 aghi %r1,-SP_SIZE
636 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
25d83cbf 637 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
1da177e4 638 lgr %r15,%r1
6a2df3a8
MS
639 # TRACE_IRQS_ON already done at io_return, call
640 # TRACE_IRQS_OFF to keep things symmetrical
641 TRACE_IRQS_OFF
642 brasl %r14,preempt_schedule_irq
643 j io_return
644#else
43d399d2 645 j io_restore
6a2df3a8 646#endif
1da177e4 647
43d399d2
MS
648#
649# Need to do work before returning to userspace, switch to kernel stack
650#
2688905e 651io_work_user:
1da177e4
LT
652 lg %r1,__LC_KERNEL_STACK
653 aghi %r1,-SP_SIZE
654 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
25d83cbf 655 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
1da177e4 656 lgr %r15,%r1
43d399d2 657
1da177e4
LT
658#
659# One of the work bits is on. Find out which one.
43d399d2 660# Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
54dfe5dd 661# and _TIF_MCCK_PENDING
1da177e4 662#
6a2df3a8 663io_work_tif:
86f2552b 664 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
77fa2245 665 jo io_mcck_pending
86f2552b 666 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
1da177e4 667 jo io_reschedule
86f2552b 668 tm __TI_flags+7(%r12),_TIF_SIGPENDING
43d399d2 669 jo io_sigpending
86f2552b 670 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
43d399d2
MS
671 jo io_notify_resume
672 j io_return # beware of critical section cleanup
0eaeafa1 673
77fa2245
HC
674#
675# _TIF_MCCK_PENDING is set, call handler
676#
677io_mcck_pending:
6a2df3a8 678 # TRACE_IRQS_ON already done at io_return
b771aeac 679 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
6a2df3a8
MS
680 TRACE_IRQS_OFF
681 j io_return
77fa2245 682
1da177e4
LT
683#
684# _TIF_NEED_RESCHED is set, call schedule
25d83cbf
HC
685#
686io_reschedule:
6a2df3a8 687 # TRACE_IRQS_ON already done at io_return
25d83cbf
HC
688 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
689 brasl %r14,schedule # call scheduler
690 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
411788ea 691 TRACE_IRQS_OFF
6a2df3a8 692 j io_return
1da177e4
LT
693
694#
02a029b3 695# _TIF_SIGPENDING or is set, call do_signal
1da177e4 696#
25d83cbf 697io_sigpending:
6a2df3a8 698 # TRACE_IRQS_ON already done at io_return
25d83cbf
HC
699 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
700 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4 701 brasl %r14,do_signal # call do_signal
25d83cbf 702 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
411788ea 703 TRACE_IRQS_OFF
6a2df3a8 704 j io_return
1da177e4 705
753c4dd6
MS
706#
707# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
708#
709io_notify_resume:
6a2df3a8 710 # TRACE_IRQS_ON already done at io_return
753c4dd6
MS
711 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
712 la %r2,SP_PTREGS(%r15) # load pt_regs
713 brasl %r14,do_notify_resume # call do_notify_resume
714 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
715 TRACE_IRQS_OFF
6a2df3a8 716 j io_return
753c4dd6 717
1da177e4
LT
718/*
719 * External interrupt handler routine
720 */
25d83cbf 721 .globl ext_int_handler
1da177e4 722ext_int_handler:
1da177e4 723 stck __LC_INT_CLOCK
9cfb9b3c 724 stpt __LC_ASYNC_ENTER_TIMER
86f2552b
MS
725 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+40
726 CREATE_STACK_FRAME __LC_SAVE_AREA+40
727 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
728 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
1da177e4
LT
729 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
730 jz ext_no_vtime
731 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
732 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
733 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
86f2552b 734 LAST_BREAK
1da177e4 735ext_no_vtime:
cd3b70f5 736 HANDLE_SIE_INTERCEPT
1f194a4c 737 TRACE_IRQS_OFF
25d83cbf
HC
738 la %r2,SP_PTREGS(%r15) # address of register-save area
739 llgh %r3,__LC_EXT_INT_CODE # get interruption code
740 brasl %r14,do_extint
1da177e4
LT
741 j io_return
742
ae6aa2ea
MS
743__critical_end:
744
1da177e4
LT
745/*
746 * Machine check handler routines
747 */
25d83cbf 748 .globl mcck_int_handler
1da177e4 749mcck_int_handler:
6377981f 750 stck __LC_MCCK_CLOCK
77fa2245
HC
751 la %r1,4095 # revalidate r1
752 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
25d83cbf 753 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
86f2552b
MS
754 stmg %r11,%r15,__LC_SAVE_AREA+80
755 larl %r13,system_call
756 lg %r11,__LC_LAST_BREAK
77fa2245 757 la %r12,__LC_MCK_OLD_PSW
25d83cbf 758 tm __LC_MCCK_CODE,0x80 # system damage?
77fa2245 759 jo mcck_int_main # yes -> rest of mcck code invalid
63b12246 760 la %r14,4095
6377981f 761 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
63b12246
MS
762 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
763 jo 1f
764 la %r14,__LC_SYNC_ENTER_TIMER
765 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
766 jl 0f
767 la %r14,__LC_ASYNC_ENTER_TIMER
7680: clc 0(8,%r14),__LC_EXIT_TIMER
769 jl 0f
770 la %r14,__LC_EXIT_TIMER
7710: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
772 jl 0f
773 la %r14,__LC_LAST_UPDATE_TIMER
7740: spt 0(%r14)
6377981f 775 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
c185b783 7761: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
77fa2245 777 jno mcck_int_main # no -> skip cleanup critical
25d83cbf 778 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
77fa2245
HC
779 jnz mcck_int_main # from user -> load kernel stack
780 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
781 jhe mcck_int_main
25d83cbf 782 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
77fa2245 783 jl mcck_int_main
25d83cbf 784 brasl %r14,cleanup_critical
77fa2245 785mcck_int_main:
25d83cbf 786 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
77fa2245
HC
787 slgr %r14,%r15
788 srag %r14,%r14,PAGE_SHIFT
789 jz 0f
25d83cbf 790 lg %r15,__LC_PANIC_STACK # load panic stack
86f2552b
MS
7910: aghi %r15,-SP_SIZE # make room for registers & psw
792 CREATE_STACK_FRAME __LC_SAVE_AREA+80
793 mvc SP_PSW(16,%r15),0(%r12)
794 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
ae6aa2ea
MS
795 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
796 jno mcck_no_vtime # no -> no timer update
63b12246 797 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
ae6aa2ea 798 jz mcck_no_vtime
6377981f 799 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
ae6aa2ea 800 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
6377981f 801 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
86f2552b 802 LAST_BREAK
ae6aa2ea 803mcck_no_vtime:
77fa2245
HC
804 la %r2,SP_PTREGS(%r15) # load pt_regs
805 brasl %r14,s390_do_machine_check
25d83cbf 806 tm SP_PSW+1(%r15),0x01 # returning to user ?
77fa2245
HC
807 jno mcck_return
808 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
809 aghi %r1,-SP_SIZE
810 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
811 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
812 lgr %r15,%r1
813 stosm __SF_EMPTY(%r15),0x04 # turn dat on
86f2552b 814 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
77fa2245 815 jno mcck_return
cd3b70f5 816 HANDLE_SIE_INTERCEPT
1f194a4c 817 TRACE_IRQS_OFF
77fa2245 818 brasl %r14,s390_handle_mcck
1f194a4c 819 TRACE_IRQS_ON
1da177e4 820mcck_return:
63b12246
MS
821 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
822 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
823 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
63b12246
MS
824 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
825 jno 0f
826 stpt __LC_EXIT_TIMER
c185b783 8270: lpswe __LC_RETURN_MCCK_PSW # back to caller
86f2552b 828mcck_done:
1da177e4 829
1da177e4
LT
830/*
831 * Restart interruption handler, kick starter for additional CPUs
832 */
84b36a8e 833#ifdef CONFIG_SMP
2bc89b5e 834 __CPUINIT
25d83cbf 835 .globl restart_int_handler
1da177e4 836restart_int_handler:
5b409ed1
MS
837 basr %r1,0
838restart_base:
839 spt restart_vtime-restart_base(%r1)
840 stck __LC_LAST_UPDATE_CLOCK
841 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
842 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
25d83cbf
HC
843 lg %r15,__LC_SAVE_AREA+120 # load ksp
844 lghi %r10,__LC_CREGS_SAVE_AREA
845 lctlg %c0,%c15,0(%r10) # get new ctl regs
846 lghi %r10,__LC_AREGS_SAVE_AREA
847 lam %a0,%a15,0(%r10)
848 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
5b409ed1
MS
849 lg %r1,__LC_THREAD_INFO
850 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
851 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
852 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
25d83cbf
HC
853 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
854 jg start_secondary
5b409ed1
MS
855 .align 8
856restart_vtime:
857 .long 0x7fffffff,0xffffffff
84b36a8e 858 .previous
1da177e4
LT
859#else
860/*
861 * If we do not run with SMP enabled, let the new CPU crash ...
862 */
25d83cbf 863 .globl restart_int_handler
1da177e4 864restart_int_handler:
25d83cbf 865 basr %r1,0
1da177e4 866restart_base:
25d83cbf
HC
867 lpswe restart_crash-restart_base(%r1)
868 .align 8
1da177e4 869restart_crash:
25d83cbf 870 .long 0x000a0000,0x00000000,0x00000000,0x00000000
1da177e4
LT
871restart_go:
872#endif
873
874#ifdef CONFIG_CHECK_STACK
875/*
876 * The synchronous or the asynchronous stack overflowed. We are dead.
877 * No need to properly save the registers, we are going to panic anyway.
878 * Setup a pt_regs so that show_trace can provide a good call trace.
879 */
880stack_overflow:
881 lg %r15,__LC_PANIC_STACK # change to panic stack
9514e231 882 aghi %r15,-SP_SIZE
1da177e4 883 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
86f2552b 884 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
1da177e4
LT
885 la %r1,__LC_SAVE_AREA
886 chi %r12,__LC_SVC_OLD_PSW
887 je 0f
888 chi %r12,__LC_PGM_OLD_PSW
889 je 0f
86f2552b
MS
890 la %r1,__LC_SAVE_AREA+40
8910: mvc SP_R11(40,%r15),0(%r1) # move %r11-%r15 to stack
9e74a6b8 892 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
25d83cbf
HC
893 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
894 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT
895 jg kernel_stack_overflow
896#endif
897
898cleanup_table_system_call:
899 .quad system_call, sysc_do_svc
6a2df3a8
MS
900cleanup_table_sysc_tif:
901 .quad sysc_tif, sysc_restore
902cleanup_table_sysc_restore:
903 .quad sysc_restore, sysc_done
904cleanup_table_io_tif:
905 .quad io_tif, io_restore
906cleanup_table_io_restore:
907 .quad io_restore, io_done
1da177e4
LT
908
909cleanup_critical:
910 clc 8(8,%r12),BASED(cleanup_table_system_call)
911 jl 0f
912 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
913 jl cleanup_system_call
9140:
6a2df3a8 915 clc 8(8,%r12),BASED(cleanup_table_sysc_tif)
1da177e4 916 jl 0f
6a2df3a8
MS
917 clc 8(8,%r12),BASED(cleanup_table_sysc_tif+8)
918 jl cleanup_sysc_tif
1da177e4 9190:
6a2df3a8 920 clc 8(8,%r12),BASED(cleanup_table_sysc_restore)
1da177e4 921 jl 0f
6a2df3a8
MS
922 clc 8(8,%r12),BASED(cleanup_table_sysc_restore+8)
923 jl cleanup_sysc_restore
63b12246 9240:
6a2df3a8 925 clc 8(8,%r12),BASED(cleanup_table_io_tif)
63b12246 926 jl 0f
6a2df3a8
MS
927 clc 8(8,%r12),BASED(cleanup_table_io_tif+8)
928 jl cleanup_io_tif
ae6aa2ea 9290:
6a2df3a8 930 clc 8(8,%r12),BASED(cleanup_table_io_restore)
ae6aa2ea 931 jl 0f
6a2df3a8
MS
932 clc 8(8,%r12),BASED(cleanup_table_io_restore+8)
933 jl cleanup_io_restore
1da177e4
LT
9340:
935 br %r14
936
937cleanup_system_call:
938 mvc __LC_RETURN_PSW(16),0(%r12)
1da177e4
LT
939 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
940 jh 0f
6377981f
MS
941 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
942 cghi %r12,__LC_MCK_OLD_PSW
943 je 0f
1da177e4 944 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
6377981f 9450: cghi %r12,__LC_MCK_OLD_PSW
86f2552b 946 la %r12,__LC_SAVE_AREA+80
6377981f 947 je 0f
86f2552b 948 la %r12,__LC_SAVE_AREA+40
1da177e4
LT
9490: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
950 jhe cleanup_vtime
1da177e4
LT
951 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
952 jh 0f
86f2552b
MS
953 mvc __LC_SAVE_AREA(40),0(%r12)
9540: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
955 aghi %r15,-SP_SIZE # make room for registers & psw
956 stg %r15,32(%r12)
957 stg %r11,0(%r12)
958 CREATE_STACK_FRAME __LC_SAVE_AREA
959 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
960 mvc SP_ILC(4,%r15),__LC_SVC_ILC
961 stg %r7,SP_ARGS(%r15)
962 mvc 8(8,%r12),__LC_THREAD_INFO
1da177e4
LT
963cleanup_vtime:
964 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
965 jhe cleanup_stime
1da177e4
LT
966 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
967cleanup_stime:
968 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
969 jh cleanup_update
970 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
971cleanup_update:
972 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
86f2552b
MS
973 srag %r12,%r11,23
974 lg %r12,__LC_THREAD_INFO
975 jz 0f
976 stg %r11,__TI_last_break(%r12)
9770: mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
1da177e4
LT
978 la %r12,__LC_RETURN_PSW
979 br %r14
980cleanup_system_call_insn:
981 .quad sysc_saveall
25d83cbf
HC
982 .quad system_call
983 .quad sysc_vtime
984 .quad sysc_stime
985 .quad sysc_update
1da177e4 986
6a2df3a8 987cleanup_sysc_tif:
1da177e4 988 mvc __LC_RETURN_PSW(8),0(%r12)
6a2df3a8 989 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_tif)
1da177e4
LT
990 la %r12,__LC_RETURN_PSW
991 br %r14
992
6a2df3a8
MS
993cleanup_sysc_restore:
994 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn)
6377981f 995 je 2f
6a2df3a8 996 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn+8)
c742b31c 997 jhe 0f
6377981f
MS
998 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
999 cghi %r12,__LC_MCK_OLD_PSW
1000 je 0f
c742b31c
MS
1001 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
10020: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
ae6aa2ea 1003 cghi %r12,__LC_MCK_OLD_PSW
86f2552b 1004 la %r12,__LC_SAVE_AREA+80
6377981f 1005 je 1f
86f2552b
MS
1006 la %r12,__LC_SAVE_AREA+40
10071: mvc 0(40,%r12),SP_R11(%r15)
1008 lmg %r0,%r10,SP_R0(%r15)
1da177e4 1009 lg %r15,SP_R15(%r15)
6377981f 10102: la %r12,__LC_RETURN_PSW
1da177e4 1011 br %r14
6a2df3a8 1012cleanup_sysc_restore_insn:
411788ea 1013 .quad sysc_done - 4
c742b31c 1014 .quad sysc_done - 16
1da177e4 1015
6a2df3a8 1016cleanup_io_tif:
176b1803 1017 mvc __LC_RETURN_PSW(8),0(%r12)
6a2df3a8 1018 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_tif)
176b1803
MS
1019 la %r12,__LC_RETURN_PSW
1020 br %r14
1021
6a2df3a8
MS
1022cleanup_io_restore:
1023 clc 8(8,%r12),BASED(cleanup_io_restore_insn)
6377981f 1024 je 1f
6a2df3a8 1025 clc 8(8,%r12),BASED(cleanup_io_restore_insn+8)
c742b31c 1026 jhe 0f
6377981f 1027 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
c742b31c 10280: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
86f2552b
MS
1029 mvc __LC_SAVE_AREA+80(40),SP_R11(%r15)
1030 lmg %r0,%r10,SP_R0(%r15)
ae6aa2ea 1031 lg %r15,SP_R15(%r15)
6377981f 10321: la %r12,__LC_RETURN_PSW
ae6aa2ea 1033 br %r14
6a2df3a8 1034cleanup_io_restore_insn:
411788ea 1035 .quad io_done - 4
c742b31c 1036 .quad io_done - 16
ae6aa2ea 1037
1da177e4
LT
1038/*
1039 * Integer constants
1040 */
25d83cbf 1041 .align 4
1da177e4 1042.Lcritical_start:
25d83cbf 1043 .quad __critical_start
1da177e4 1044.Lcritical_end:
25d83cbf 1045 .quad __critical_end
1da177e4 1046
25d83cbf 1047 .section .rodata, "a"
1da177e4 1048#define SYSCALL(esa,esame,emu) .long esame
9bf1226b 1049 .globl sys_call_table
1da177e4
LT
1050sys_call_table:
1051#include "syscalls.S"
1052#undef SYSCALL
1053
347a8dc3 1054#ifdef CONFIG_COMPAT
1da177e4
LT
1055
1056#define SYSCALL(esa,esame,emu) .long emu
1da177e4
LT
1057sys_call_table_emu:
1058#include "syscalls.S"
1059#undef SYSCALL
1060#endif