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[PATCH] lockdep: irqtrace cleanup of include/asm-x86_64/irqflags.h
[net-next-2.6.git] / arch / s390 / kernel / entry64.S
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1da177e4 1/*
54dfe5dd 2 * arch/s390/kernel/entry64.S
1da177e4
LT		 3 * S390 low-level entry points.
4 *
54dfe5dd 5 * Copyright (C) IBM Corp. 1999,2006
1da177e4
LT		 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
77fa2245 9 * Heiko Carstens <heiko.carstens@de.ibm.com>
1da177e4
LT		 10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
1da177e4
LT		 14#include <asm/cache.h>
15#include <asm/lowcore.h>
16#include <asm/errno.h>
17#include <asm/ptrace.h>
18#include <asm/thread_info.h>
0013a854 19#include <asm/asm-offsets.h>
1da177e4
LT		 20#include <asm/unistd.h>
21#include <asm/page.h>
22
23/*
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
26 */
27SP_PTREGS = STACK_FRAME_OVERHEAD
28SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
32SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
33SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
34SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
35SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
36SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
37SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
38SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
39SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
40SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
41SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
42SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
43SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
44SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
45SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
46SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
49SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
50
51STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
52STACK_SIZE = 1 << STACK_SHIFT
53
54dfe5dd
HC		 54_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
55 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
56_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
57 _TIF_MCCK_PENDING)
1da177e4
LT		 58
59#define BASED(name) name-system_call(%r13)
60
61 .macro STORE_TIMER lc_offset
62#ifdef CONFIG_VIRT_CPU_ACCOUNTING
63 stpt \lc_offset
64#endif
65 .endm
66
67#ifdef CONFIG_VIRT_CPU_ACCOUNTING
68 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
69 lg %r10,\lc_from
70 slg %r10,\lc_to
71 alg %r10,\lc_sum
72 stg %r10,\lc_sum
73 .endm
74#endif
75
76/*
77 * Register usage in interrupt handlers:
78 * R9 - pointer to current task structure
79 * R13 - pointer to literal pool
80 * R14 - return register for function calls
81 * R15 - kernel stack pointer
82 */
83
84 .macro SAVE_ALL_BASE savearea
85 stmg %r12,%r15,\savearea
86 larl %r13,system_call
87 .endm
88
63b12246 89 .macro SAVE_ALL_SYNC psworg,savearea
1da177e4 90 la %r12,\psworg
1da177e4
LT		 91 tm \psworg+1,0x01 # test problem state bit
92 jz 2f # skip stack setup save
93 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
63b12246
MS		 94#ifdef CONFIG_CHECK_STACK
95 j 3f
962: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
97 jz stack_overflow
983:
99#endif
1002:
101 .endm
102
103 .macro SAVE_ALL_ASYNC psworg,savearea
104 la %r12,\psworg
1da177e4
LT		 105 tm \psworg+1,0x01 # test problem state bit
106 jnz 1f # from user -> load kernel stack
107 clc \psworg+8(8),BASED(.Lcritical_end)
108 jhe 0f
109 clc \psworg+8(8),BASED(.Lcritical_start)
110 jl 0f
111 brasl %r14,cleanup_critical
6add9f7f 112 tm 1(%r12),0x01 # retest problem state after cleanup
1da177e4
LT		 113 jnz 1f
1140: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
115 slgr %r14,%r15
116 srag %r14,%r14,STACK_SHIFT
117 jz 2f
1181: lg %r15,__LC_ASYNC_STACK # load async stack
1da177e4
LT		 119#ifdef CONFIG_CHECK_STACK
120 j 3f
1212: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
122 jz stack_overflow
1233:
124#endif
77fa2245
HC		 1252:
126 .endm
127
128 .macro CREATE_STACK_FRAME psworg,savearea
129 aghi %r15,-SP_SIZE # make room for registers & psw
1da177e4
LT		 130 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
131 la %r12,\psworg
132 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
133 icm %r12,12,__LC_SVC_ILC
134 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
135 st %r12,SP_ILC(%r15)
136 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
137 la %r12,0
138 stg %r12,__SF_BACKCHAIN(%r15)
139 .endm
140
ae6aa2ea
MS		 141 .macro RESTORE_ALL psworg,sync
142 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
1da177e4 143 .if !\sync
ae6aa2ea 144 ni \psworg+1,0xfd # clear wait state bit
1da177e4
LT		 145 .endif
146 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
147 STORE_TIMER __LC_EXIT_TIMER
ae6aa2ea 148 lpswe \psworg # back to caller
1da177e4
LT		 149 .endm
150
151/*
152 * Scheduler resume function, called by switch_to
153 * gpr2 = (task_struct *) prev
154 * gpr3 = (task_struct *) next
155 * Returns:
156 * gpr2 = prev
157 */
158 .globl __switch_to
159__switch_to:
160 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
161 jz __switch_to_noper # if not we're fine
162 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
163 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
164 je __switch_to_noper # we got away without bashing TLB's
165 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
166__switch_to_noper:
77fa2245
HC		 167 lg %r4,__THREAD_info(%r2) # get thread_info of prev
168 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
169 jz __switch_to_no_mcck
170 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
171 lg %r4,__THREAD_info(%r3) # get thread_info of next
172 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
173__switch_to_no_mcck:
1da177e4
LT		 174 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
175 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
176 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
177 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
178 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
179 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
180 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
181 stg %r3,__LC_THREAD_INFO
182 aghi %r3,STACK_SIZE
183 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
184 br %r14
185
186__critical_start:
187/*
188 * SVC interrupt handler routine. System calls are synchronous events and
189 * are executed with interrupts enabled.
190 */
191
192 .globl system_call
193system_call:
194 STORE_TIMER __LC_SYNC_ENTER_TIMER
195sysc_saveall:
196 SAVE_ALL_BASE __LC_SAVE_AREA
63b12246 197 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 198 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 199 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
200#ifdef CONFIG_VIRT_CPU_ACCOUNTING
201sysc_vtime:
202 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
203 jz sysc_do_svc
204 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
205sysc_stime:
206 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
207sysc_update:
208 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
209#endif
210sysc_do_svc:
211 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
212 slag %r7,%r7,2 # *4 and test for svc 0
213 jnz sysc_nr_ok
214 # svc 0: system call number in %r1
215 cl %r1,BASED(.Lnr_syscalls)
216 jnl sysc_nr_ok
217 lgfr %r7,%r1 # clear high word in r1
218 slag %r7,%r7,2 # svc 0: system call number in %r1
219sysc_nr_ok:
220 mvc SP_ARGS(8,%r15),SP_R7(%r15)
221sysc_do_restart:
222 larl %r10,sys_call_table
347a8dc3 223#ifdef CONFIG_COMPAT
c563077e
HC		 224 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
225 jno sysc_noemu
1da177e4
LT		 226 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
227sysc_noemu:
228#endif
229 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
230 lgf %r8,0(%r7,%r10) # load address of system call routine
231 jnz sysc_tracesys
232 basr %r14,%r8 # call sys_xxxx
233 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
234 # ATTENTION: check sys_execve_glue before
235 # changing anything here !!
236
237sysc_return:
238 tm SP_PSW+1(%r15),0x01 # returning to user ?
239 jno sysc_leave
240 tm __TI_flags+7(%r9),_TIF_WORK_SVC
241 jnz sysc_work # there is work to do (signals etc.)
242sysc_leave:
ae6aa2ea 243 RESTORE_ALL __LC_RETURN_PSW,1
1da177e4
LT		 244
245#
246# recheck if there is more work to do
247#
248sysc_work_loop:
249 tm __TI_flags+7(%r9),_TIF_WORK_SVC
250 jz sysc_leave # there is no work to do
251#
252# One of the work bits is on. Find out which one.
253#
254sysc_work:
77fa2245
HC		 255 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
256 jo sysc_mcck_pending
1da177e4
LT		 257 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
258 jo sysc_reschedule
54dfe5dd
HC		 259 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
260 jnz sysc_sigpending
1da177e4
LT		 261 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
262 jo sysc_restart
263 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
264 jo sysc_singlestep
265 j sysc_leave
266
267#
268# _TIF_NEED_RESCHED is set, call schedule
269#
270sysc_reschedule:
271 larl %r14,sysc_work_loop
272 jg schedule # return point is sysc_return
273
77fa2245
HC		 274#
275# _TIF_MCCK_PENDING is set, call handler
276#
277sysc_mcck_pending:
278 larl %r14,sysc_work_loop
279 jg s390_handle_mcck # TIF bit will be cleared by handler
280
1da177e4 281#
54dfe5dd 282# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
1da177e4
LT		 283#
284sysc_sigpending:
285 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
286 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 287 brasl %r14,do_signal # call do_signal
288 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
289 jo sysc_restart
290 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
291 jo sysc_singlestep
e1c3ad96 292 j sysc_work_loop
1da177e4
LT		 293
294#
295# _TIF_RESTART_SVC is set, set up registers and restart svc
296#
297sysc_restart:
298 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
299 lg %r7,SP_R2(%r15) # load new svc number
300 slag %r7,%r7,2 # *4
301 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
302 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
303 j sysc_do_restart # restart svc
304
305#
306# _TIF_SINGLE_STEP is set, call do_single_step
307#
308sysc_singlestep:
309 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
310 lhi %r0,__LC_PGM_OLD_PSW
311 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
312 la %r2,SP_PTREGS(%r15) # address of register-save area
313 larl %r14,sysc_return # load adr. of system return
314 jg do_single_step # branch to do_sigtrap
315
316
1da177e4
LT		 317#
318# call syscall_trace before and after system call
319# special linkage: %r12 contains the return address for trace_svc
320#
321sysc_tracesys:
322 la %r2,SP_PTREGS(%r15) # load pt_regs
323 la %r3,0
324 srl %r7,2
325 stg %r7,SP_R2(%r15)
326 brasl %r14,syscall_trace
327 lghi %r0,NR_syscalls
328 clg %r0,SP_R2(%r15)
329 jnh sysc_tracenogo
330 lg %r7,SP_R2(%r15) # strace might have changed the
331 sll %r7,2 # system call
332 lgf %r8,0(%r7,%r10)
333sysc_tracego:
334 lmg %r3,%r6,SP_R3(%r15)
335 lg %r2,SP_ORIG_R2(%r15)
336 basr %r14,%r8 # call sys_xxx
337 stg %r2,SP_R2(%r15) # store return value
338sysc_tracenogo:
339 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
340 jz sysc_return
341 la %r2,SP_PTREGS(%r15) # load pt_regs
342 la %r3,1
343 larl %r14,sysc_return # return point is sysc_return
344 jg syscall_trace
345
346#
347# a new process exits the kernel with ret_from_fork
348#
349 .globl ret_from_fork
350ret_from_fork:
351 lg %r13,__LC_SVC_NEW_PSW+8
352 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
353 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
354 jo 0f
355 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
3560: brasl %r14,schedule_tail
357 stosm 24(%r15),0x03 # reenable interrupts
358 j sysc_return
359
360#
361# clone, fork, vfork, exec and sigreturn need glue,
362# because they all expect pt_regs as parameter,
363# but are called with different parameter.
364# return-address is set up above
365#
366sys_clone_glue:
367 la %r2,SP_PTREGS(%r15) # load pt_regs
368 jg sys_clone # branch to sys_clone
369
347a8dc3 370#ifdef CONFIG_COMPAT
1da177e4
LT		 371sys32_clone_glue:
372 la %r2,SP_PTREGS(%r15) # load pt_regs
373 jg sys32_clone # branch to sys32_clone
374#endif
375
376sys_fork_glue:
377 la %r2,SP_PTREGS(%r15) # load pt_regs
378 jg sys_fork # branch to sys_fork
379
380sys_vfork_glue:
381 la %r2,SP_PTREGS(%r15) # load pt_regs
382 jg sys_vfork # branch to sys_vfork
383
384sys_execve_glue:
385 la %r2,SP_PTREGS(%r15) # load pt_regs
386 lgr %r12,%r14 # save return address
387 brasl %r14,sys_execve # call sys_execve
388 ltgr %r2,%r2 # check if execve failed
389 bnz 0(%r12) # it did fail -> store result in gpr2
390 b 6(%r12) # SKIP STG 2,SP_R2(15) in
391 # system_call/sysc_tracesys
347a8dc3 392#ifdef CONFIG_COMPAT
1da177e4
LT		 393sys32_execve_glue:
394 la %r2,SP_PTREGS(%r15) # load pt_regs
395 lgr %r12,%r14 # save return address
396 brasl %r14,sys32_execve # call sys32_execve
397 ltgr %r2,%r2 # check if execve failed
398 bnz 0(%r12) # it did fail -> store result in gpr2
399 b 6(%r12) # SKIP STG 2,SP_R2(15) in
400 # system_call/sysc_tracesys
401#endif
402
403sys_sigreturn_glue:
404 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
405 jg sys_sigreturn # branch to sys_sigreturn
406
347a8dc3 407#ifdef CONFIG_COMPAT
1da177e4
LT		 408sys32_sigreturn_glue:
409 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
410 jg sys32_sigreturn # branch to sys32_sigreturn
411#endif
412
413sys_rt_sigreturn_glue:
414 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
415 jg sys_rt_sigreturn # branch to sys_sigreturn
416
347a8dc3 417#ifdef CONFIG_COMPAT
1da177e4
LT		 418sys32_rt_sigreturn_glue:
419 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
420 jg sys32_rt_sigreturn # branch to sys32_sigreturn
421#endif
422
1da177e4
LT		 423sys_sigaltstack_glue:
424 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
425 jg sys_sigaltstack # branch to sys_sigreturn
426
347a8dc3 427#ifdef CONFIG_COMPAT
1da177e4
LT		 428sys32_sigaltstack_glue:
429 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
430 jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
431#endif
432
433/*
434 * Program check handler routine
435 */
436
437 .globl pgm_check_handler
438pgm_check_handler:
439/*
440 * First we need to check for a special case:
441 * Single stepping an instruction that disables the PER event mask will
442 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
443 * For a single stepped SVC the program check handler gets control after
444 * the SVC new PSW has been loaded. But we want to execute the SVC first and
445 * then handle the PER event. Therefore we update the SVC old PSW to point
446 * to the pgm_check_handler and branch to the SVC handler after we checked
447 * if we have to load the kernel stack register.
448 * For every other possible cause for PER event without the PER mask set
449 * we just ignore the PER event (FIXME: is there anything we have to do
450 * for LPSW?).
451 */
452 STORE_TIMER __LC_SYNC_ENTER_TIMER
453 SAVE_ALL_BASE __LC_SAVE_AREA
454 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
455 jnz pgm_per # got per exception -> special case
63b12246 456 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 457 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 458#ifdef CONFIG_VIRT_CPU_ACCOUNTING
459 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
460 jz pgm_no_vtime
461 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
462 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
463 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
464pgm_no_vtime:
465#endif
466 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
467 lgf %r3,__LC_PGM_ILC # load program interruption code
468 lghi %r8,0x7f
469 ngr %r8,%r3
470pgm_do_call:
471 sll %r8,3
472 larl %r1,pgm_check_table
473 lg %r1,0(%r8,%r1) # load address of handler routine
474 la %r2,SP_PTREGS(%r15) # address of register-save area
475 larl %r14,sysc_return
476 br %r1 # branch to interrupt-handler
477
478#
479# handle per exception
480#
481pgm_per:
482 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
483 jnz pgm_per_std # ok, normal per event from user space
484# ok its one of the special cases, now we need to find out which one
485 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
486 je pgm_svcper
487# no interesting special case, ignore PER event
488 lmg %r12,%r15,__LC_SAVE_AREA
489 lpswe __LC_PGM_OLD_PSW
490
491#
492# Normal per exception
493#
494pgm_per_std:
63b12246 495 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 496 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 497#ifdef CONFIG_VIRT_CPU_ACCOUNTING
498 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
499 jz pgm_no_vtime2
500 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
501 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
502 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
503pgm_no_vtime2:
504#endif
505 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
506 lg %r1,__TI_task(%r9)
507 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
508 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
509 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
510 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
511 lgf %r3,__LC_PGM_ILC # load program interruption code
512 lghi %r8,0x7f
513 ngr %r8,%r3 # clear per-event-bit and ilc
514 je sysc_return
515 j pgm_do_call
516
517#
518# it was a single stepped SVC that is causing all the trouble
519#
520pgm_svcper:
63b12246 521 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 522 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 523#ifdef CONFIG_VIRT_CPU_ACCOUNTING
524 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
525 jz pgm_no_vtime3
526 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
527 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
528 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
529pgm_no_vtime3:
530#endif
531 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
532 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
533 lg %r1,__TI_task(%r9)
534 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
535 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
536 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
537 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
538 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
539 j sysc_do_svc
540
541/*
542 * IO interrupt handler routine
543 */
544 .globl io_int_handler
545io_int_handler:
546 STORE_TIMER __LC_ASYNC_ENTER_TIMER
547 stck __LC_INT_CLOCK
548 SAVE_ALL_BASE __LC_SAVE_AREA+32
63b12246 549 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
77fa2245 550 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 551#ifdef CONFIG_VIRT_CPU_ACCOUNTING
552 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
553 jz io_no_vtime
554 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
555 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
556 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
557io_no_vtime:
558#endif
559 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
560 la %r2,SP_PTREGS(%r15) # address of register-save area
561 brasl %r14,do_IRQ # call standard irq handler
562
563io_return:
564 tm SP_PSW+1(%r15),0x01 # returning to user ?
565#ifdef CONFIG_PREEMPT
566 jno io_preempt # no -> check for preemptive scheduling
567#else
568 jno io_leave # no-> skip resched & signal
569#endif
570 tm __TI_flags+7(%r9),_TIF_WORK_INT
571 jnz io_work # there is work to do (signals etc.)
572io_leave:
ae6aa2ea
MS		 573 RESTORE_ALL __LC_RETURN_PSW,0
574io_done:
1da177e4
LT		 575
576#ifdef CONFIG_PREEMPT
577io_preempt:
578 icm %r0,15,__TI_precount(%r9)
579 jnz io_leave
580 # switch to kernel stack
581 lg %r1,SP_R15(%r15)
582 aghi %r1,-SP_SIZE
583 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
584 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
585 lgr %r15,%r1
586io_resume_loop:
587 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
588 jno io_leave
589 larl %r1,.Lc_pactive
590 mvc __TI_precount(4,%r9),0(%r1)
591 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
592 brasl %r14,schedule # call schedule
593 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
594 xc __TI_precount(4,%r9),__TI_precount(%r9)
595 j io_resume_loop
596#endif
597
598#
599# switch to kernel stack, then check TIF bits
600#
601io_work:
602 lg %r1,__LC_KERNEL_STACK
603 aghi %r1,-SP_SIZE
604 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
605 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
606 lgr %r15,%r1
607#
608# One of the work bits is on. Find out which one.
54dfe5dd
HC		 609# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
610# and _TIF_MCCK_PENDING
1da177e4
LT		 611#
612io_work_loop:
77fa2245
HC		 613 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
614 jo io_mcck_pending
1da177e4
LT		 615 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
616 jo io_reschedule
54dfe5dd
HC		 617 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
618 jnz io_sigpending
1da177e4
LT		 619 j io_leave
620
77fa2245
HC		 621#
622# _TIF_MCCK_PENDING is set, call handler
623#
624io_mcck_pending:
625 larl %r14,io_work_loop
626 jg s390_handle_mcck # TIF bit will be cleared by handler
627
1da177e4
LT		 628#
629# _TIF_NEED_RESCHED is set, call schedule
630#
631io_reschedule:
632 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
633 brasl %r14,schedule # call scheduler
634 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
635 tm __TI_flags+7(%r9),_TIF_WORK_INT
636 jz io_leave # there is no work to do
637 j io_work_loop
638
639#
54dfe5dd 640# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
1da177e4
LT		 641#
642io_sigpending:
643 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
644 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 645 brasl %r14,do_signal # call do_signal
646 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
e1c3ad96 647 j io_work_loop
1da177e4
LT		 648
649/*
650 * External interrupt handler routine
651 */
652 .globl ext_int_handler
653ext_int_handler:
654 STORE_TIMER __LC_ASYNC_ENTER_TIMER
655 stck __LC_INT_CLOCK
656 SAVE_ALL_BASE __LC_SAVE_AREA+32
63b12246 657 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
77fa2245 658 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 659#ifdef CONFIG_VIRT_CPU_ACCOUNTING
660 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
661 jz ext_no_vtime
662 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
663 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
664 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
665ext_no_vtime:
666#endif
667 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
668 la %r2,SP_PTREGS(%r15) # address of register-save area
669 llgh %r3,__LC_EXT_INT_CODE # get interruption code
670 brasl %r14,do_extint
671 j io_return
672
ae6aa2ea
MS		 673__critical_end:
674
1da177e4
LT		 675/*
676 * Machine check handler routines
677 */
678 .globl mcck_int_handler
679mcck_int_handler:
77fa2245
HC		 680 la %r1,4095 # revalidate r1
681 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
682 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
1da177e4 683 SAVE_ALL_BASE __LC_SAVE_AREA+64
77fa2245
HC		 684 la %r12,__LC_MCK_OLD_PSW
685 tm __LC_MCCK_CODE,0x80 # system damage?
686 jo mcck_int_main # yes -> rest of mcck code invalid
1da177e4 687#ifdef CONFIG_VIRT_CPU_ACCOUNTING
63b12246
MS		 688 la %r14,4095
689 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
690 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
691 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
692 jo 1f
693 la %r14,__LC_SYNC_ENTER_TIMER
694 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
695 jl 0f
696 la %r14,__LC_ASYNC_ENTER_TIMER
6970: clc 0(8,%r14),__LC_EXIT_TIMER
698 jl 0f
699 la %r14,__LC_EXIT_TIMER
7000: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
701 jl 0f
702 la %r14,__LC_LAST_UPDATE_TIMER
7030: spt 0(%r14)
704 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
7051:
1da177e4 706#endif
63b12246 707 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
77fa2245
HC		 708 jno mcck_int_main # no -> skip cleanup critical
709 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
710 jnz mcck_int_main # from user -> load kernel stack
711 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
712 jhe mcck_int_main
713 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
714 jl mcck_int_main
715 brasl %r14,cleanup_critical
716mcck_int_main:
717 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
718 slgr %r14,%r15
719 srag %r14,%r14,PAGE_SHIFT
720 jz 0f
721 lg %r15,__LC_PANIC_STACK # load panic stack
7220: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
ae6aa2ea
MS		 723#ifdef CONFIG_VIRT_CPU_ACCOUNTING
724 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
725 jno mcck_no_vtime # no -> no timer update
63b12246 726 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
ae6aa2ea
MS		 727 jz mcck_no_vtime
728 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
729 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
730 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
731mcck_no_vtime:
732#endif
77fa2245
HC		 733 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
734 la %r2,SP_PTREGS(%r15) # load pt_regs
735 brasl %r14,s390_do_machine_check
736 tm SP_PSW+1(%r15),0x01 # returning to user ?
737 jno mcck_return
738 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
739 aghi %r1,-SP_SIZE
740 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
741 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
742 lgr %r15,%r1
743 stosm __SF_EMPTY(%r15),0x04 # turn dat on
744 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
745 jno mcck_return
746 brasl %r14,s390_handle_mcck
1da177e4 747mcck_return:
63b12246
MS		 748 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
749 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
750 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
751#ifdef CONFIG_VIRT_CPU_ACCOUNTING
752 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
753 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
754 jno 0f
755 stpt __LC_EXIT_TIMER
7560:
757#endif
758 lpswe __LC_RETURN_MCCK_PSW # back to caller
1da177e4
LT		 759
760#ifdef CONFIG_SMP
761/*
762 * Restart interruption handler, kick starter for additional CPUs
763 */
764 .globl restart_int_handler
765restart_int_handler:
766 lg %r15,__LC_SAVE_AREA+120 # load ksp
767 lghi %r10,__LC_CREGS_SAVE_AREA
768 lctlg %c0,%c15,0(%r10) # get new ctl regs
769 lghi %r10,__LC_AREGS_SAVE_AREA
770 lam %a0,%a15,0(%r10)
771 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
772 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
773 jg start_secondary
774#else
775/*
776 * If we do not run with SMP enabled, let the new CPU crash ...
777 */
778 .globl restart_int_handler
779restart_int_handler:
780 basr %r1,0
781restart_base:
782 lpswe restart_crash-restart_base(%r1)
783 .align 8
784restart_crash:
785 .long 0x000a0000,0x00000000,0x00000000,0x00000000
786restart_go:
787#endif
788
789#ifdef CONFIG_CHECK_STACK
790/*
791 * The synchronous or the asynchronous stack overflowed. We are dead.
792 * No need to properly save the registers, we are going to panic anyway.
793 * Setup a pt_regs so that show_trace can provide a good call trace.
794 */
795stack_overflow:
796 lg %r15,__LC_PANIC_STACK # change to panic stack
797 aghi %r1,-SP_SIZE
798 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
799 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
800 la %r1,__LC_SAVE_AREA
801 chi %r12,__LC_SVC_OLD_PSW
802 je 0f
803 chi %r12,__LC_PGM_OLD_PSW
804 je 0f
805 la %r1,__LC_SAVE_AREA+16
8060: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
807 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
808 la %r2,SP_PTREGS(%r15) # load pt_regs
809 jg kernel_stack_overflow
810#endif
811
812cleanup_table_system_call:
813 .quad system_call, sysc_do_svc
814cleanup_table_sysc_return:
815 .quad sysc_return, sysc_leave
816cleanup_table_sysc_leave:
817 .quad sysc_leave, sysc_work_loop
818cleanup_table_sysc_work_loop:
819 .quad sysc_work_loop, sysc_reschedule
63b12246
MS		 820cleanup_table_io_return:
821 .quad io_return, io_leave
ae6aa2ea
MS		 822cleanup_table_io_leave:
823 .quad io_leave, io_done
824cleanup_table_io_work_loop:
825 .quad io_work_loop, io_mcck_pending
1da177e4
LT		 826
827cleanup_critical:
828 clc 8(8,%r12),BASED(cleanup_table_system_call)
829 jl 0f
830 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
831 jl cleanup_system_call
8320:
833 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
834 jl 0f
835 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
836 jl cleanup_sysc_return
8370:
838 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
839 jl 0f
840 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
841 jl cleanup_sysc_leave
8420:
843 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
844 jl 0f
845 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
77fa2245 846 jl cleanup_sysc_return
63b12246
MS		 8470:
848 clc 8(8,%r12),BASED(cleanup_table_io_return)
849 jl 0f
850 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
851 jl cleanup_io_return
ae6aa2ea
MS		 8520:
853 clc 8(8,%r12),BASED(cleanup_table_io_leave)
854 jl 0f
855 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
856 jl cleanup_io_leave
8570:
858 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
859 jl 0f
860 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
861 jl cleanup_io_return
1da177e4
LT		 8620:
863 br %r14
864
865cleanup_system_call:
866 mvc __LC_RETURN_PSW(16),0(%r12)
ae6aa2ea
MS		 867 cghi %r12,__LC_MCK_OLD_PSW
868 je 0f
869 la %r12,__LC_SAVE_AREA+32
870 j 1f
8710: la %r12,__LC_SAVE_AREA+64
8721:
1da177e4
LT		 873#ifdef CONFIG_VIRT_CPU_ACCOUNTING
874 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
875 jh 0f
876 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
8770: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
878 jhe cleanup_vtime
879#endif
880 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
881 jh 0f
ae6aa2ea
MS		 882 mvc __LC_SAVE_AREA(32),0(%r12)
8830: stg %r13,8(%r12)
884 stg %r12,__LC_SAVE_AREA+96 # argh
63b12246 885 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 886 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
ae6aa2ea
MS		 887 lg %r12,__LC_SAVE_AREA+96 # argh
888 stg %r15,24(%r12)
1da177e4
LT		 889 llgh %r7,__LC_SVC_INT_CODE
890#ifdef CONFIG_VIRT_CPU_ACCOUNTING
891cleanup_vtime:
892 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
893 jhe cleanup_stime
894 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
895 jz cleanup_novtime
896 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
897cleanup_stime:
898 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
899 jh cleanup_update
900 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
901cleanup_update:
902 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
903cleanup_novtime:
904#endif
905 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
906 la %r12,__LC_RETURN_PSW
907 br %r14
908cleanup_system_call_insn:
909 .quad sysc_saveall
910#ifdef CONFIG_VIRT_CPU_ACCOUNTING
911 .quad system_call
912 .quad sysc_vtime
913 .quad sysc_stime
914 .quad sysc_update
915#endif
916
917cleanup_sysc_return:
918 mvc __LC_RETURN_PSW(8),0(%r12)
919 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
920 la %r12,__LC_RETURN_PSW
921 br %r14
922
923cleanup_sysc_leave:
924 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
ae6aa2ea 925 je 2f
1da177e4
LT		 926#ifdef CONFIG_VIRT_CPU_ACCOUNTING
927 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
928 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
ae6aa2ea 929 je 2f
1da177e4
LT		 930#endif
931 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
ae6aa2ea
MS		 932 cghi %r12,__LC_MCK_OLD_PSW
933 jne 0f
934 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
935 j 1f
9360: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9371: lmg %r0,%r11,SP_R0(%r15)
1da177e4 938 lg %r15,SP_R15(%r15)
ae6aa2ea 9392: la %r12,__LC_RETURN_PSW
1da177e4
LT		 940 br %r14
941cleanup_sysc_leave_insn:
942#ifdef CONFIG_VIRT_CPU_ACCOUNTING
943 .quad sysc_leave + 16
944#endif
945 .quad sysc_leave + 12
946
ae6aa2ea
MS		 947cleanup_io_return:
948 mvc __LC_RETURN_PSW(8),0(%r12)
949 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
950 la %r12,__LC_RETURN_PSW
951 br %r14
952
953cleanup_io_leave:
954 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
955 je 2f
956#ifdef CONFIG_VIRT_CPU_ACCOUNTING
957 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
958 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
959 je 2f
960#endif
961 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
962 cghi %r12,__LC_MCK_OLD_PSW
963 jne 0f
964 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
965 j 1f
9660: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9671: lmg %r0,%r11,SP_R0(%r15)
968 lg %r15,SP_R15(%r15)
9692: la %r12,__LC_RETURN_PSW
970 br %r14
971cleanup_io_leave_insn:
972#ifdef CONFIG_VIRT_CPU_ACCOUNTING
973 .quad io_leave + 20
974#endif
975 .quad io_leave + 16
976
1da177e4
LT		 977/*
978 * Integer constants
979 */
980 .align 4
981.Lconst:
982.Lc_pactive: .long PREEMPT_ACTIVE
983.Lnr_syscalls: .long NR_syscalls
984.L0x0130: .short 0x130
985.L0x0140: .short 0x140
986.L0x0150: .short 0x150
987.L0x0160: .short 0x160
988.L0x0170: .short 0x170
989.Lcritical_start:
990 .quad __critical_start
991.Lcritical_end:
992 .quad __critical_end
993
d882b172 994 .section .rodata, "a"
1da177e4 995#define SYSCALL(esa,esame,emu) .long esame
1da177e4
LT		 996sys_call_table:
997#include "syscalls.S"
998#undef SYSCALL
999
347a8dc3 1000#ifdef CONFIG_COMPAT
1da177e4
LT		 1001
1002#define SYSCALL(esa,esame,emu) .long emu
1da177e4
LT		 1003sys_call_table_emu:
1004#include "syscalls.S"
1005#undef SYSCALL
1006#endif
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