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1da177e4 | 1 | /* |
54dfe5dd | 2 | * arch/s390/kernel/entry64.S |
1da177e4 LT |
3 | * S390 low-level entry points. |
4 | * | |
54dfe5dd | 5 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 LT |
6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
7 | * Hartmut Penner (hp@de.ibm.com), | |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
12 | #include <linux/sys.h> | |
13 | #include <linux/linkage.h> | |
1da177e4 LT |
14 | #include <asm/cache.h> |
15 | #include <asm/lowcore.h> | |
16 | #include <asm/errno.h> | |
17 | #include <asm/ptrace.h> | |
18 | #include <asm/thread_info.h> | |
0013a854 | 19 | #include <asm/asm-offsets.h> |
1da177e4 LT |
20 | #include <asm/unistd.h> |
21 | #include <asm/page.h> | |
22 | ||
23 | /* | |
24 | * Stack layout for the system_call stack entry. | |
25 | * The first few entries are identical to the user_regs_struct. | |
26 | */ | |
27 | SP_PTREGS = STACK_FRAME_OVERHEAD | |
28 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
29 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
30 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
31 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
32 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
33 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
34 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
35 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
36 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
37 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
38 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64 | |
39 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72 | |
40 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80 | |
41 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88 | |
42 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96 | |
43 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104 | |
44 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112 | |
45 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120 | |
46 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
47 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
48 | SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP | |
49 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE | |
50 | ||
51 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
52 | STACK_SIZE = 1 << STACK_SHIFT | |
53 | ||
54dfe5dd HC |
54 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ |
55 | _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) | |
56 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ | |
57 | _TIF_MCCK_PENDING) | |
1da177e4 LT |
58 | |
59 | #define BASED(name) name-system_call(%r13) | |
60 | ||
1f194a4c HC |
61 | #ifdef CONFIG_TRACE_IRQFLAGS |
62 | .macro TRACE_IRQS_ON | |
63 | brasl %r14,trace_hardirqs_on | |
64 | .endm | |
65 | ||
66 | .macro TRACE_IRQS_OFF | |
67 | brasl %r14,trace_hardirqs_off | |
68 | .endm | |
69 | #else | |
70 | #define TRACE_IRQS_ON | |
71 | #define TRACE_IRQS_OFF | |
72 | #endif | |
73 | ||
1da177e4 LT |
74 | .macro STORE_TIMER lc_offset |
75 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
76 | stpt \lc_offset | |
77 | #endif | |
78 | .endm | |
79 | ||
80 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
81 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum | |
82 | lg %r10,\lc_from | |
83 | slg %r10,\lc_to | |
84 | alg %r10,\lc_sum | |
85 | stg %r10,\lc_sum | |
86 | .endm | |
87 | #endif | |
88 | ||
89 | /* | |
90 | * Register usage in interrupt handlers: | |
91 | * R9 - pointer to current task structure | |
92 | * R13 - pointer to literal pool | |
93 | * R14 - return register for function calls | |
94 | * R15 - kernel stack pointer | |
95 | */ | |
96 | ||
97 | .macro SAVE_ALL_BASE savearea | |
98 | stmg %r12,%r15,\savearea | |
99 | larl %r13,system_call | |
100 | .endm | |
101 | ||
63b12246 | 102 | .macro SAVE_ALL_SYNC psworg,savearea |
1da177e4 | 103 | la %r12,\psworg |
1da177e4 LT |
104 | tm \psworg+1,0x01 # test problem state bit |
105 | jz 2f # skip stack setup save | |
106 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
63b12246 MS |
107 | #ifdef CONFIG_CHECK_STACK |
108 | j 3f | |
109 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
110 | jz stack_overflow | |
111 | 3: | |
112 | #endif | |
113 | 2: | |
114 | .endm | |
115 | ||
116 | .macro SAVE_ALL_ASYNC psworg,savearea | |
117 | la %r12,\psworg | |
1da177e4 LT |
118 | tm \psworg+1,0x01 # test problem state bit |
119 | jnz 1f # from user -> load kernel stack | |
120 | clc \psworg+8(8),BASED(.Lcritical_end) | |
121 | jhe 0f | |
122 | clc \psworg+8(8),BASED(.Lcritical_start) | |
123 | jl 0f | |
124 | brasl %r14,cleanup_critical | |
6add9f7f | 125 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
126 | jnz 1f |
127 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ? | |
128 | slgr %r14,%r15 | |
129 | srag %r14,%r14,STACK_SHIFT | |
130 | jz 2f | |
131 | 1: lg %r15,__LC_ASYNC_STACK # load async stack | |
1da177e4 LT |
132 | #ifdef CONFIG_CHECK_STACK |
133 | j 3f | |
134 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
135 | jz stack_overflow | |
136 | 3: | |
137 | #endif | |
77fa2245 HC |
138 | 2: |
139 | .endm | |
140 | ||
141 | .macro CREATE_STACK_FRAME psworg,savearea | |
142 | aghi %r15,-SP_SIZE # make room for registers & psw | |
1da177e4 LT |
143 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack |
144 | la %r12,\psworg | |
145 | stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 | |
146 | icm %r12,12,__LC_SVC_ILC | |
147 | stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
148 | st %r12,SP_ILC(%r15) | |
149 | mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack | |
150 | la %r12,0 | |
151 | stg %r12,__SF_BACKCHAIN(%r15) | |
152 | .endm | |
153 | ||
ae6aa2ea MS |
154 | .macro RESTORE_ALL psworg,sync |
155 | mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore | |
1da177e4 | 156 | .if !\sync |
ae6aa2ea | 157 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 LT |
158 | .endif |
159 | lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user | |
160 | STORE_TIMER __LC_EXIT_TIMER | |
ae6aa2ea | 161 | lpswe \psworg # back to caller |
1da177e4 LT |
162 | .endm |
163 | ||
164 | /* | |
165 | * Scheduler resume function, called by switch_to | |
166 | * gpr2 = (task_struct *) prev | |
167 | * gpr3 = (task_struct *) next | |
168 | * Returns: | |
169 | * gpr2 = prev | |
170 | */ | |
171 | .globl __switch_to | |
172 | __switch_to: | |
173 | tm __THREAD_per+4(%r3),0xe8 # is the new process using per ? | |
174 | jz __switch_to_noper # if not we're fine | |
175 | stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff | |
176 | clc __THREAD_per(24,%r3),__SF_EMPTY(%r15) | |
177 | je __switch_to_noper # we got away without bashing TLB's | |
178 | lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
179 | __switch_to_noper: | |
77fa2245 HC |
180 | lg %r4,__THREAD_info(%r2) # get thread_info of prev |
181 | tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending? | |
182 | jz __switch_to_no_mcck | |
183 | ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
184 | lg %r4,__THREAD_info(%r3) # get thread_info of next | |
185 | oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next | |
186 | __switch_to_no_mcck: | |
1da177e4 LT |
187 | stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
188 | stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp | |
189 | lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
190 | lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task | |
191 | stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct | |
192 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
193 | lg %r3,__THREAD_info(%r3) # load thread_info from task struct | |
194 | stg %r3,__LC_THREAD_INFO | |
195 | aghi %r3,STACK_SIZE | |
196 | stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
197 | br %r14 | |
198 | ||
199 | __critical_start: | |
200 | /* | |
201 | * SVC interrupt handler routine. System calls are synchronous events and | |
202 | * are executed with interrupts enabled. | |
203 | */ | |
204 | ||
205 | .globl system_call | |
206 | system_call: | |
207 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
208 | sysc_saveall: | |
209 | SAVE_ALL_BASE __LC_SAVE_AREA | |
63b12246 | 210 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 211 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
212 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore |
213 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
214 | sysc_vtime: | |
215 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
216 | jz sysc_do_svc | |
217 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
218 | sysc_stime: | |
219 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
220 | sysc_update: | |
221 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
222 | #endif | |
223 | sysc_do_svc: | |
224 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
225 | slag %r7,%r7,2 # *4 and test for svc 0 | |
226 | jnz sysc_nr_ok | |
227 | # svc 0: system call number in %r1 | |
228 | cl %r1,BASED(.Lnr_syscalls) | |
229 | jnl sysc_nr_ok | |
230 | lgfr %r7,%r1 # clear high word in r1 | |
231 | slag %r7,%r7,2 # svc 0: system call number in %r1 | |
232 | sysc_nr_ok: | |
233 | mvc SP_ARGS(8,%r15),SP_R7(%r15) | |
234 | sysc_do_restart: | |
235 | larl %r10,sys_call_table | |
347a8dc3 | 236 | #ifdef CONFIG_COMPAT |
c563077e HC |
237 | tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ? |
238 | jno sysc_noemu | |
1da177e4 LT |
239 | larl %r10,sys_call_table_emu # use 31 bit emulation system calls |
240 | sysc_noemu: | |
241 | #endif | |
242 | tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
243 | lgf %r8,0(%r7,%r10) # load address of system call routine | |
244 | jnz sysc_tracesys | |
245 | basr %r14,%r8 # call sys_xxxx | |
246 | stg %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
247 | # ATTENTION: check sys_execve_glue before | |
248 | # changing anything here !! | |
249 | ||
250 | sysc_return: | |
251 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
252 | jno sysc_leave | |
253 | tm __TI_flags+7(%r9),_TIF_WORK_SVC | |
254 | jnz sysc_work # there is work to do (signals etc.) | |
255 | sysc_leave: | |
ae6aa2ea | 256 | RESTORE_ALL __LC_RETURN_PSW,1 |
1da177e4 LT |
257 | |
258 | # | |
259 | # recheck if there is more work to do | |
260 | # | |
261 | sysc_work_loop: | |
262 | tm __TI_flags+7(%r9),_TIF_WORK_SVC | |
263 | jz sysc_leave # there is no work to do | |
264 | # | |
265 | # One of the work bits is on. Find out which one. | |
266 | # | |
267 | sysc_work: | |
77fa2245 HC |
268 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING |
269 | jo sysc_mcck_pending | |
1da177e4 LT |
270 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED |
271 | jo sysc_reschedule | |
54dfe5dd HC |
272 | tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) |
273 | jnz sysc_sigpending | |
1da177e4 LT |
274 | tm __TI_flags+7(%r9),_TIF_RESTART_SVC |
275 | jo sysc_restart | |
276 | tm __TI_flags+7(%r9),_TIF_SINGLE_STEP | |
277 | jo sysc_singlestep | |
278 | j sysc_leave | |
279 | ||
280 | # | |
281 | # _TIF_NEED_RESCHED is set, call schedule | |
282 | # | |
283 | sysc_reschedule: | |
284 | larl %r14,sysc_work_loop | |
285 | jg schedule # return point is sysc_return | |
286 | ||
77fa2245 HC |
287 | # |
288 | # _TIF_MCCK_PENDING is set, call handler | |
289 | # | |
290 | sysc_mcck_pending: | |
291 | larl %r14,sysc_work_loop | |
292 | jg s390_handle_mcck # TIF bit will be cleared by handler | |
293 | ||
1da177e4 | 294 | # |
54dfe5dd | 295 | # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal |
1da177e4 LT |
296 | # |
297 | sysc_sigpending: | |
298 | ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP | |
299 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
300 | brasl %r14,do_signal # call do_signal |
301 | tm __TI_flags+7(%r9),_TIF_RESTART_SVC | |
302 | jo sysc_restart | |
303 | tm __TI_flags+7(%r9),_TIF_SINGLE_STEP | |
304 | jo sysc_singlestep | |
e1c3ad96 | 305 | j sysc_work_loop |
1da177e4 LT |
306 | |
307 | # | |
308 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
309 | # | |
310 | sysc_restart: | |
311 | ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC | |
312 | lg %r7,SP_R2(%r15) # load new svc number | |
313 | slag %r7,%r7,2 # *4 | |
314 | mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument | |
315 | lmg %r2,%r6,SP_R2(%r15) # load svc arguments | |
316 | j sysc_do_restart # restart svc | |
317 | ||
318 | # | |
319 | # _TIF_SINGLE_STEP is set, call do_single_step | |
320 | # | |
321 | sysc_singlestep: | |
322 | ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP | |
323 | lhi %r0,__LC_PGM_OLD_PSW | |
324 | sth %r0,SP_TRAP(%r15) # set trap indication to pgm check | |
325 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
326 | larl %r14,sysc_return # load adr. of system return | |
327 | jg do_single_step # branch to do_sigtrap | |
328 | ||
329 | ||
1da177e4 LT |
330 | # |
331 | # call syscall_trace before and after system call | |
332 | # special linkage: %r12 contains the return address for trace_svc | |
333 | # | |
334 | sysc_tracesys: | |
335 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
336 | la %r3,0 | |
337 | srl %r7,2 | |
338 | stg %r7,SP_R2(%r15) | |
339 | brasl %r14,syscall_trace | |
340 | lghi %r0,NR_syscalls | |
341 | clg %r0,SP_R2(%r15) | |
342 | jnh sysc_tracenogo | |
343 | lg %r7,SP_R2(%r15) # strace might have changed the | |
344 | sll %r7,2 # system call | |
345 | lgf %r8,0(%r7,%r10) | |
346 | sysc_tracego: | |
347 | lmg %r3,%r6,SP_R3(%r15) | |
348 | lg %r2,SP_ORIG_R2(%r15) | |
349 | basr %r14,%r8 # call sys_xxx | |
350 | stg %r2,SP_R2(%r15) # store return value | |
351 | sysc_tracenogo: | |
352 | tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
353 | jz sysc_return | |
354 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
355 | la %r3,1 | |
356 | larl %r14,sysc_return # return point is sysc_return | |
357 | jg syscall_trace | |
358 | ||
359 | # | |
360 | # a new process exits the kernel with ret_from_fork | |
361 | # | |
362 | .globl ret_from_fork | |
363 | ret_from_fork: | |
364 | lg %r13,__LC_SVC_NEW_PSW+8 | |
365 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
366 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? | |
367 | jo 0f | |
368 | stg %r15,SP_R15(%r15) # store stack pointer for new kthread | |
369 | 0: brasl %r14,schedule_tail | |
1f194a4c | 370 | TRACE_IRQS_ON |
1da177e4 LT |
371 | stosm 24(%r15),0x03 # reenable interrupts |
372 | j sysc_return | |
373 | ||
374 | # | |
375 | # clone, fork, vfork, exec and sigreturn need glue, | |
376 | # because they all expect pt_regs as parameter, | |
377 | # but are called with different parameter. | |
378 | # return-address is set up above | |
379 | # | |
380 | sys_clone_glue: | |
381 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
382 | jg sys_clone # branch to sys_clone | |
383 | ||
347a8dc3 | 384 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
385 | sys32_clone_glue: |
386 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
387 | jg sys32_clone # branch to sys32_clone | |
388 | #endif | |
389 | ||
390 | sys_fork_glue: | |
391 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
392 | jg sys_fork # branch to sys_fork | |
393 | ||
394 | sys_vfork_glue: | |
395 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
396 | jg sys_vfork # branch to sys_vfork | |
397 | ||
398 | sys_execve_glue: | |
399 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
400 | lgr %r12,%r14 # save return address | |
401 | brasl %r14,sys_execve # call sys_execve | |
402 | ltgr %r2,%r2 # check if execve failed | |
403 | bnz 0(%r12) # it did fail -> store result in gpr2 | |
404 | b 6(%r12) # SKIP STG 2,SP_R2(15) in | |
405 | # system_call/sysc_tracesys | |
347a8dc3 | 406 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
407 | sys32_execve_glue: |
408 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
409 | lgr %r12,%r14 # save return address | |
410 | brasl %r14,sys32_execve # call sys32_execve | |
411 | ltgr %r2,%r2 # check if execve failed | |
412 | bnz 0(%r12) # it did fail -> store result in gpr2 | |
413 | b 6(%r12) # SKIP STG 2,SP_R2(15) in | |
414 | # system_call/sysc_tracesys | |
415 | #endif | |
416 | ||
417 | sys_sigreturn_glue: | |
418 | la %r2,SP_PTREGS(%r15) # load pt_regs as parameter | |
419 | jg sys_sigreturn # branch to sys_sigreturn | |
420 | ||
347a8dc3 | 421 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
422 | sys32_sigreturn_glue: |
423 | la %r2,SP_PTREGS(%r15) # load pt_regs as parameter | |
424 | jg sys32_sigreturn # branch to sys32_sigreturn | |
425 | #endif | |
426 | ||
427 | sys_rt_sigreturn_glue: | |
428 | la %r2,SP_PTREGS(%r15) # load pt_regs as parameter | |
429 | jg sys_rt_sigreturn # branch to sys_sigreturn | |
430 | ||
347a8dc3 | 431 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
432 | sys32_rt_sigreturn_glue: |
433 | la %r2,SP_PTREGS(%r15) # load pt_regs as parameter | |
434 | jg sys32_rt_sigreturn # branch to sys32_sigreturn | |
435 | #endif | |
436 | ||
1da177e4 LT |
437 | sys_sigaltstack_glue: |
438 | la %r4,SP_PTREGS(%r15) # load pt_regs as parameter | |
439 | jg sys_sigaltstack # branch to sys_sigreturn | |
440 | ||
347a8dc3 | 441 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
442 | sys32_sigaltstack_glue: |
443 | la %r4,SP_PTREGS(%r15) # load pt_regs as parameter | |
444 | jg sys32_sigaltstack_wrapper # branch to sys_sigreturn | |
445 | #endif | |
446 | ||
447 | /* | |
448 | * Program check handler routine | |
449 | */ | |
450 | ||
451 | .globl pgm_check_handler | |
452 | pgm_check_handler: | |
453 | /* | |
454 | * First we need to check for a special case: | |
455 | * Single stepping an instruction that disables the PER event mask will | |
456 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
457 | * For a single stepped SVC the program check handler gets control after | |
458 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
459 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
460 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
461 | * if we have to load the kernel stack register. | |
462 | * For every other possible cause for PER event without the PER mask set | |
463 | * we just ignore the PER event (FIXME: is there anything we have to do | |
464 | * for LPSW?). | |
465 | */ | |
466 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
467 | SAVE_ALL_BASE __LC_SAVE_AREA | |
468 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception | |
469 | jnz pgm_per # got per exception -> special case | |
63b12246 | 470 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 471 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
472 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
473 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
474 | jz pgm_no_vtime | |
475 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
476 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
477 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
478 | pgm_no_vtime: | |
479 | #endif | |
480 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
481 | lgf %r3,__LC_PGM_ILC # load program interruption code | |
482 | lghi %r8,0x7f | |
483 | ngr %r8,%r3 | |
484 | pgm_do_call: | |
485 | sll %r8,3 | |
486 | larl %r1,pgm_check_table | |
487 | lg %r1,0(%r8,%r1) # load address of handler routine | |
488 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
489 | larl %r14,sysc_return | |
490 | br %r1 # branch to interrupt-handler | |
491 | ||
492 | # | |
493 | # handle per exception | |
494 | # | |
495 | pgm_per: | |
496 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on | |
497 | jnz pgm_per_std # ok, normal per event from user space | |
498 | # ok its one of the special cases, now we need to find out which one | |
499 | clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW | |
500 | je pgm_svcper | |
501 | # no interesting special case, ignore PER event | |
502 | lmg %r12,%r15,__LC_SAVE_AREA | |
503 | lpswe __LC_PGM_OLD_PSW | |
504 | ||
505 | # | |
506 | # Normal per exception | |
507 | # | |
508 | pgm_per_std: | |
63b12246 | 509 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 510 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
511 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
512 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
513 | jz pgm_no_vtime2 | |
514 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
515 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
516 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
517 | pgm_no_vtime2: | |
518 | #endif | |
519 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
520 | lg %r1,__TI_task(%r9) | |
4ba069b8 MG |
521 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
522 | jz kernel_per | |
1da177e4 LT |
523 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID |
524 | mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS | |
525 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
526 | oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
527 | lgf %r3,__LC_PGM_ILC # load program interruption code | |
528 | lghi %r8,0x7f | |
529 | ngr %r8,%r3 # clear per-event-bit and ilc | |
530 | je sysc_return | |
531 | j pgm_do_call | |
532 | ||
533 | # | |
534 | # it was a single stepped SVC that is causing all the trouble | |
535 | # | |
536 | pgm_svcper: | |
63b12246 | 537 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 538 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
539 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
540 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
541 | jz pgm_no_vtime3 | |
542 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
543 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
544 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
545 | pgm_no_vtime3: | |
546 | #endif | |
547 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore | |
548 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
549 | lg %r1,__TI_task(%r9) | |
550 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
551 | mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS | |
552 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
553 | oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
1f194a4c | 554 | TRACE_IRQS_ON |
1da177e4 LT |
555 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
556 | j sysc_do_svc | |
557 | ||
4ba069b8 MG |
558 | # |
559 | # per was called from kernel, must be kprobes | |
560 | # | |
561 | kernel_per: | |
562 | lhi %r0,__LC_PGM_OLD_PSW | |
563 | sth %r0,SP_TRAP(%r15) # set trap indication to pgm check | |
564 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
565 | larl %r14,sysc_leave # load adr. of system ret, no work | |
566 | jg do_single_step # branch to do_single_step | |
567 | ||
1da177e4 LT |
568 | /* |
569 | * IO interrupt handler routine | |
570 | */ | |
571 | .globl io_int_handler | |
572 | io_int_handler: | |
573 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
574 | stck __LC_INT_CLOCK | |
575 | SAVE_ALL_BASE __LC_SAVE_AREA+32 | |
63b12246 | 576 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
77fa2245 | 577 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
1da177e4 LT |
578 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
579 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
580 | jz io_no_vtime | |
581 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
582 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
583 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
584 | io_no_vtime: | |
585 | #endif | |
586 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
1f194a4c | 587 | TRACE_IRQS_OFF |
1da177e4 LT |
588 | la %r2,SP_PTREGS(%r15) # address of register-save area |
589 | brasl %r14,do_IRQ # call standard irq handler | |
1f194a4c | 590 | TRACE_IRQS_ON |
1da177e4 LT |
591 | |
592 | io_return: | |
593 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
594 | #ifdef CONFIG_PREEMPT | |
595 | jno io_preempt # no -> check for preemptive scheduling | |
596 | #else | |
597 | jno io_leave # no-> skip resched & signal | |
598 | #endif | |
599 | tm __TI_flags+7(%r9),_TIF_WORK_INT | |
600 | jnz io_work # there is work to do (signals etc.) | |
601 | io_leave: | |
ae6aa2ea MS |
602 | RESTORE_ALL __LC_RETURN_PSW,0 |
603 | io_done: | |
1da177e4 LT |
604 | |
605 | #ifdef CONFIG_PREEMPT | |
606 | io_preempt: | |
607 | icm %r0,15,__TI_precount(%r9) | |
608 | jnz io_leave | |
609 | # switch to kernel stack | |
610 | lg %r1,SP_R15(%r15) | |
611 | aghi %r1,-SP_SIZE | |
612 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
613 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
614 | lgr %r15,%r1 | |
615 | io_resume_loop: | |
616 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED | |
617 | jno io_leave | |
618 | larl %r1,.Lc_pactive | |
619 | mvc __TI_precount(4,%r9),0(%r1) | |
620 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
621 | brasl %r14,schedule # call schedule | |
622 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
623 | xc __TI_precount(4,%r9),__TI_precount(%r9) | |
624 | j io_resume_loop | |
625 | #endif | |
626 | ||
627 | # | |
628 | # switch to kernel stack, then check TIF bits | |
629 | # | |
630 | io_work: | |
631 | lg %r1,__LC_KERNEL_STACK | |
632 | aghi %r1,-SP_SIZE | |
633 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
634 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
635 | lgr %r15,%r1 | |
636 | # | |
637 | # One of the work bits is on. Find out which one. | |
54dfe5dd HC |
638 | # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED |
639 | # and _TIF_MCCK_PENDING | |
1da177e4 LT |
640 | # |
641 | io_work_loop: | |
77fa2245 HC |
642 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING |
643 | jo io_mcck_pending | |
1da177e4 LT |
644 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED |
645 | jo io_reschedule | |
54dfe5dd HC |
646 | tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) |
647 | jnz io_sigpending | |
1da177e4 LT |
648 | j io_leave |
649 | ||
77fa2245 HC |
650 | # |
651 | # _TIF_MCCK_PENDING is set, call handler | |
652 | # | |
653 | io_mcck_pending: | |
654 | larl %r14,io_work_loop | |
655 | jg s390_handle_mcck # TIF bit will be cleared by handler | |
656 | ||
1da177e4 LT |
657 | # |
658 | # _TIF_NEED_RESCHED is set, call schedule | |
659 | # | |
660 | io_reschedule: | |
661 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
662 | brasl %r14,schedule # call scheduler | |
663 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
664 | tm __TI_flags+7(%r9),_TIF_WORK_INT | |
665 | jz io_leave # there is no work to do | |
666 | j io_work_loop | |
667 | ||
668 | # | |
54dfe5dd | 669 | # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal |
1da177e4 LT |
670 | # |
671 | io_sigpending: | |
672 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
673 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
674 | brasl %r14,do_signal # call do_signal |
675 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
e1c3ad96 | 676 | j io_work_loop |
1da177e4 LT |
677 | |
678 | /* | |
679 | * External interrupt handler routine | |
680 | */ | |
681 | .globl ext_int_handler | |
682 | ext_int_handler: | |
683 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
684 | stck __LC_INT_CLOCK | |
685 | SAVE_ALL_BASE __LC_SAVE_AREA+32 | |
63b12246 | 686 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
77fa2245 | 687 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
1da177e4 LT |
688 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
689 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
690 | jz ext_no_vtime | |
691 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
692 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
693 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
694 | ext_no_vtime: | |
695 | #endif | |
696 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
1f194a4c | 697 | TRACE_IRQS_OFF |
1da177e4 LT |
698 | la %r2,SP_PTREGS(%r15) # address of register-save area |
699 | llgh %r3,__LC_EXT_INT_CODE # get interruption code | |
700 | brasl %r14,do_extint | |
1f194a4c | 701 | TRACE_IRQS_ON |
1da177e4 LT |
702 | j io_return |
703 | ||
ae6aa2ea MS |
704 | __critical_end: |
705 | ||
1da177e4 LT |
706 | /* |
707 | * Machine check handler routines | |
708 | */ | |
709 | .globl mcck_int_handler | |
710 | mcck_int_handler: | |
77fa2245 HC |
711 | la %r1,4095 # revalidate r1 |
712 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | |
713 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs | |
1da177e4 | 714 | SAVE_ALL_BASE __LC_SAVE_AREA+64 |
77fa2245 HC |
715 | la %r12,__LC_MCK_OLD_PSW |
716 | tm __LC_MCCK_CODE,0x80 # system damage? | |
717 | jo mcck_int_main # yes -> rest of mcck code invalid | |
1da177e4 | 718 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
63b12246 MS |
719 | la %r14,4095 |
720 | mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER | |
721 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14) | |
722 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | |
723 | jo 1f | |
724 | la %r14,__LC_SYNC_ENTER_TIMER | |
725 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
726 | jl 0f | |
727 | la %r14,__LC_ASYNC_ENTER_TIMER | |
728 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
729 | jl 0f | |
730 | la %r14,__LC_EXIT_TIMER | |
731 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
732 | jl 0f | |
733 | la %r14,__LC_LAST_UPDATE_TIMER | |
734 | 0: spt 0(%r14) | |
735 | mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) | |
736 | 1: | |
1da177e4 | 737 | #endif |
63b12246 | 738 | tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 HC |
739 | jno mcck_int_main # no -> skip cleanup critical |
740 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit | |
741 | jnz mcck_int_main # from user -> load kernel stack | |
742 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end) | |
743 | jhe mcck_int_main | |
744 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start) | |
745 | jl mcck_int_main | |
746 | brasl %r14,cleanup_critical | |
747 | mcck_int_main: | |
748 | lg %r14,__LC_PANIC_STACK # are we already on the panic stack? | |
749 | slgr %r14,%r15 | |
750 | srag %r14,%r14,PAGE_SHIFT | |
751 | jz 0f | |
752 | lg %r15,__LC_PANIC_STACK # load panic stack | |
753 | 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64 | |
ae6aa2ea MS |
754 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
755 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? | |
756 | jno mcck_no_vtime # no -> no timer update | |
63b12246 | 757 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea MS |
758 | jz mcck_no_vtime |
759 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
760 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
761 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
762 | mcck_no_vtime: | |
763 | #endif | |
77fa2245 HC |
764 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
765 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
766 | brasl %r14,s390_do_machine_check | |
767 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
768 | jno mcck_return | |
769 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack | |
770 | aghi %r1,-SP_SIZE | |
771 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
772 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
773 | lgr %r15,%r1 | |
774 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
775 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING | |
776 | jno mcck_return | |
1f194a4c | 777 | TRACE_IRQS_OFF |
77fa2245 | 778 | brasl %r14,s390_handle_mcck |
1f194a4c | 779 | TRACE_IRQS_ON |
1da177e4 | 780 | mcck_return: |
63b12246 MS |
781 | mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW |
782 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
783 | lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
784 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
785 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104 | |
786 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? | |
787 | jno 0f | |
788 | stpt __LC_EXIT_TIMER | |
789 | 0: | |
790 | #endif | |
791 | lpswe __LC_RETURN_MCCK_PSW # back to caller | |
1da177e4 LT |
792 | |
793 | #ifdef CONFIG_SMP | |
794 | /* | |
795 | * Restart interruption handler, kick starter for additional CPUs | |
796 | */ | |
797 | .globl restart_int_handler | |
798 | restart_int_handler: | |
799 | lg %r15,__LC_SAVE_AREA+120 # load ksp | |
800 | lghi %r10,__LC_CREGS_SAVE_AREA | |
801 | lctlg %c0,%c15,0(%r10) # get new ctl regs | |
802 | lghi %r10,__LC_AREGS_SAVE_AREA | |
803 | lam %a0,%a15,0(%r10) | |
804 | lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
805 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on | |
806 | jg start_secondary | |
807 | #else | |
808 | /* | |
809 | * If we do not run with SMP enabled, let the new CPU crash ... | |
810 | */ | |
811 | .globl restart_int_handler | |
812 | restart_int_handler: | |
813 | basr %r1,0 | |
814 | restart_base: | |
815 | lpswe restart_crash-restart_base(%r1) | |
816 | .align 8 | |
817 | restart_crash: | |
818 | .long 0x000a0000,0x00000000,0x00000000,0x00000000 | |
819 | restart_go: | |
820 | #endif | |
821 | ||
822 | #ifdef CONFIG_CHECK_STACK | |
823 | /* | |
824 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
825 | * No need to properly save the registers, we are going to panic anyway. | |
826 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
827 | */ | |
828 | stack_overflow: | |
829 | lg %r15,__LC_PANIC_STACK # change to panic stack | |
9514e231 | 830 | aghi %r15,-SP_SIZE |
1da177e4 LT |
831 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack |
832 | stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
833 | la %r1,__LC_SAVE_AREA | |
834 | chi %r12,__LC_SVC_OLD_PSW | |
835 | je 0f | |
836 | chi %r12,__LC_PGM_OLD_PSW | |
837 | je 0f | |
9514e231 | 838 | la %r1,__LC_SAVE_AREA+32 |
1da177e4 LT |
839 | 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack |
840 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain | |
841 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
842 | jg kernel_stack_overflow | |
843 | #endif | |
844 | ||
845 | cleanup_table_system_call: | |
846 | .quad system_call, sysc_do_svc | |
847 | cleanup_table_sysc_return: | |
848 | .quad sysc_return, sysc_leave | |
849 | cleanup_table_sysc_leave: | |
850 | .quad sysc_leave, sysc_work_loop | |
851 | cleanup_table_sysc_work_loop: | |
852 | .quad sysc_work_loop, sysc_reschedule | |
63b12246 MS |
853 | cleanup_table_io_return: |
854 | .quad io_return, io_leave | |
ae6aa2ea MS |
855 | cleanup_table_io_leave: |
856 | .quad io_leave, io_done | |
857 | cleanup_table_io_work_loop: | |
858 | .quad io_work_loop, io_mcck_pending | |
1da177e4 LT |
859 | |
860 | cleanup_critical: | |
861 | clc 8(8,%r12),BASED(cleanup_table_system_call) | |
862 | jl 0f | |
863 | clc 8(8,%r12),BASED(cleanup_table_system_call+8) | |
864 | jl cleanup_system_call | |
865 | 0: | |
866 | clc 8(8,%r12),BASED(cleanup_table_sysc_return) | |
867 | jl 0f | |
868 | clc 8(8,%r12),BASED(cleanup_table_sysc_return+8) | |
869 | jl cleanup_sysc_return | |
870 | 0: | |
871 | clc 8(8,%r12),BASED(cleanup_table_sysc_leave) | |
872 | jl 0f | |
873 | clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8) | |
874 | jl cleanup_sysc_leave | |
875 | 0: | |
876 | clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop) | |
877 | jl 0f | |
878 | clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8) | |
77fa2245 | 879 | jl cleanup_sysc_return |
63b12246 MS |
880 | 0: |
881 | clc 8(8,%r12),BASED(cleanup_table_io_return) | |
882 | jl 0f | |
883 | clc 8(8,%r12),BASED(cleanup_table_io_return+8) | |
884 | jl cleanup_io_return | |
ae6aa2ea MS |
885 | 0: |
886 | clc 8(8,%r12),BASED(cleanup_table_io_leave) | |
887 | jl 0f | |
888 | clc 8(8,%r12),BASED(cleanup_table_io_leave+8) | |
889 | jl cleanup_io_leave | |
890 | 0: | |
891 | clc 8(8,%r12),BASED(cleanup_table_io_work_loop) | |
892 | jl 0f | |
893 | clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8) | |
894 | jl cleanup_io_return | |
1da177e4 LT |
895 | 0: |
896 | br %r14 | |
897 | ||
898 | cleanup_system_call: | |
899 | mvc __LC_RETURN_PSW(16),0(%r12) | |
ae6aa2ea MS |
900 | cghi %r12,__LC_MCK_OLD_PSW |
901 | je 0f | |
902 | la %r12,__LC_SAVE_AREA+32 | |
903 | j 1f | |
904 | 0: la %r12,__LC_SAVE_AREA+64 | |
905 | 1: | |
1da177e4 LT |
906 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
907 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) | |
908 | jh 0f | |
909 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
910 | 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16) | |
911 | jhe cleanup_vtime | |
912 | #endif | |
913 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn) | |
914 | jh 0f | |
ae6aa2ea MS |
915 | mvc __LC_SAVE_AREA(32),0(%r12) |
916 | 0: stg %r13,8(%r12) | |
917 | stg %r12,__LC_SAVE_AREA+96 # argh | |
63b12246 | 918 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 919 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
ae6aa2ea MS |
920 | lg %r12,__LC_SAVE_AREA+96 # argh |
921 | stg %r15,24(%r12) | |
1da177e4 LT |
922 | llgh %r7,__LC_SVC_INT_CODE |
923 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
924 | cleanup_vtime: | |
925 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24) | |
926 | jhe cleanup_stime | |
927 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
928 | jz cleanup_novtime | |
929 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
930 | cleanup_stime: | |
931 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32) | |
932 | jh cleanup_update | |
933 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
934 | cleanup_update: | |
935 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
936 | cleanup_novtime: | |
937 | #endif | |
938 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8) | |
939 | la %r12,__LC_RETURN_PSW | |
940 | br %r14 | |
941 | cleanup_system_call_insn: | |
942 | .quad sysc_saveall | |
943 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
944 | .quad system_call | |
945 | .quad sysc_vtime | |
946 | .quad sysc_stime | |
947 | .quad sysc_update | |
948 | #endif | |
949 | ||
950 | cleanup_sysc_return: | |
951 | mvc __LC_RETURN_PSW(8),0(%r12) | |
952 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return) | |
953 | la %r12,__LC_RETURN_PSW | |
954 | br %r14 | |
955 | ||
956 | cleanup_sysc_leave: | |
957 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn) | |
ae6aa2ea | 958 | je 2f |
1da177e4 LT |
959 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
960 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
961 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8) | |
ae6aa2ea | 962 | je 2f |
1da177e4 LT |
963 | #endif |
964 | mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | |
ae6aa2ea MS |
965 | cghi %r12,__LC_MCK_OLD_PSW |
966 | jne 0f | |
967 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) | |
968 | j 1f | |
969 | 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) | |
970 | 1: lmg %r0,%r11,SP_R0(%r15) | |
1da177e4 | 971 | lg %r15,SP_R15(%r15) |
ae6aa2ea | 972 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 LT |
973 | br %r14 |
974 | cleanup_sysc_leave_insn: | |
975 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
976 | .quad sysc_leave + 16 | |
977 | #endif | |
978 | .quad sysc_leave + 12 | |
979 | ||
ae6aa2ea MS |
980 | cleanup_io_return: |
981 | mvc __LC_RETURN_PSW(8),0(%r12) | |
982 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop) | |
983 | la %r12,__LC_RETURN_PSW | |
984 | br %r14 | |
985 | ||
986 | cleanup_io_leave: | |
987 | clc 8(8,%r12),BASED(cleanup_io_leave_insn) | |
988 | je 2f | |
989 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
990 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
991 | clc 8(8,%r12),BASED(cleanup_io_leave_insn+8) | |
992 | je 2f | |
993 | #endif | |
994 | mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | |
995 | cghi %r12,__LC_MCK_OLD_PSW | |
996 | jne 0f | |
997 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) | |
998 | j 1f | |
999 | 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) | |
1000 | 1: lmg %r0,%r11,SP_R0(%r15) | |
1001 | lg %r15,SP_R15(%r15) | |
1002 | 2: la %r12,__LC_RETURN_PSW | |
1003 | br %r14 | |
1004 | cleanup_io_leave_insn: | |
1005 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
1006 | .quad io_leave + 20 | |
1007 | #endif | |
1008 | .quad io_leave + 16 | |
1009 | ||
1da177e4 LT |
1010 | /* |
1011 | * Integer constants | |
1012 | */ | |
1013 | .align 4 | |
1014 | .Lconst: | |
1015 | .Lc_pactive: .long PREEMPT_ACTIVE | |
1016 | .Lnr_syscalls: .long NR_syscalls | |
1017 | .L0x0130: .short 0x130 | |
1018 | .L0x0140: .short 0x140 | |
1019 | .L0x0150: .short 0x150 | |
1020 | .L0x0160: .short 0x160 | |
1021 | .L0x0170: .short 0x170 | |
1022 | .Lcritical_start: | |
1023 | .quad __critical_start | |
1024 | .Lcritical_end: | |
1025 | .quad __critical_end | |
1026 | ||
d882b172 | 1027 | .section .rodata, "a" |
1da177e4 | 1028 | #define SYSCALL(esa,esame,emu) .long esame |
1da177e4 LT |
1029 | sys_call_table: |
1030 | #include "syscalls.S" | |
1031 | #undef SYSCALL | |
1032 | ||
347a8dc3 | 1033 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
1034 | |
1035 | #define SYSCALL(esa,esame,emu) .long emu | |
1da177e4 LT |
1036 | sys_call_table_emu: |
1037 | #include "syscalls.S" | |
1038 | #undef SYSCALL | |
1039 | #endif |