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Commit | Line | Data |
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1da177e4 | 1 | /* |
69a80d3f | 2 | * SMP support for pSeries machines. |
1da177e4 LT |
3 | * |
4 | * Dave Engebretsen, Peter Bergner, and | |
5 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
6 | * | |
7 | * Plus various changes from other IBM teams... | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
1da177e4 | 15 | |
1da177e4 LT |
16 | #include <linux/kernel.h> |
17 | #include <linux/module.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/smp.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/spinlock.h> | |
24 | #include <linux/cache.h> | |
25 | #include <linux/err.h> | |
26 | #include <linux/sysdev.h> | |
27 | #include <linux/cpu.h> | |
28 | ||
29 | #include <asm/ptrace.h> | |
30 | #include <asm/atomic.h> | |
31 | #include <asm/irq.h> | |
32 | #include <asm/page.h> | |
33 | #include <asm/pgtable.h> | |
34 | #include <asm/io.h> | |
35 | #include <asm/prom.h> | |
36 | #include <asm/smp.h> | |
37 | #include <asm/paca.h> | |
38 | #include <asm/time.h> | |
39 | #include <asm/machdep.h> | |
1da177e4 | 40 | #include <asm/cputable.h> |
1ababe11 | 41 | #include <asm/firmware.h> |
1da177e4 LT |
42 | #include <asm/system.h> |
43 | #include <asm/rtas.h> | |
1da177e4 | 44 | #include <asm/pSeries_reconfig.h> |
bbeb3f4c | 45 | #include <asm/mpic.h> |
271c3f35 | 46 | #include <asm/vdso_datapage.h> |
8d089085 | 47 | #include <asm/cputhreads.h> |
1da177e4 | 48 | |
a1218720 | 49 | #include "plpar_wrappers.h" |
8feaeca2 | 50 | #include "pseries.h" |
d13f7208 | 51 | #include "xics.h" |
a1218720 | 52 | |
1da177e4 LT |
53 | |
54 | /* | |
6a75a6b8 MM |
55 | * The Primary thread of each non-boot processor was started from the OF client |
56 | * interface by prom_hold_cpus and is spinning on secondary_hold_spinloop. | |
1da177e4 LT |
57 | */ |
58 | static cpumask_t of_spin_map; | |
59 | ||
f39b7a55 | 60 | extern void generic_secondary_smp_init(unsigned long); |
1da177e4 | 61 | |
1da177e4 LT |
62 | /** |
63 | * smp_startup_cpu() - start the given cpu | |
64 | * | |
65 | * At boot time, there is nothing to do for primary threads which were | |
66 | * started from Open Firmware. For anything else, call RTAS with the | |
67 | * appropriate start location. | |
68 | * | |
69 | * Returns: | |
70 | * 0 - failure | |
71 | * 1 - success | |
72 | */ | |
73 | static inline int __devinit smp_startup_cpu(unsigned int lcpu) | |
74 | { | |
75 | int status; | |
76 | unsigned long start_here = __pa((u32)*((unsigned long *) | |
f39b7a55 | 77 | generic_secondary_smp_init)); |
1da177e4 | 78 | unsigned int pcpu; |
1ed2fd2d | 79 | int start_cpu; |
1da177e4 LT |
80 | |
81 | if (cpu_isset(lcpu, of_spin_map)) | |
82 | /* Already started by OF and sitting in spin loop */ | |
83 | return 1; | |
84 | ||
85 | pcpu = get_hard_smp_processor_id(lcpu); | |
86 | ||
87 | /* Fixup atomic count: it exited inside IRQ handler. */ | |
b5e2fc1c | 88 | task_thread_info(paca[lcpu].__current)->preempt_count = 0; |
1da177e4 | 89 | |
1ed2fd2d AB |
90 | /* |
91 | * If the RTAS start-cpu token does not exist then presume the | |
92 | * cpu is already spinning. | |
93 | */ | |
94 | start_cpu = rtas_token("start-cpu"); | |
95 | if (start_cpu == RTAS_UNKNOWN_SERVICE) | |
96 | return 1; | |
97 | ||
496b7a51 | 98 | status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, pcpu); |
1da177e4 LT |
99 | if (status != 0) { |
100 | printk(KERN_ERR "start-cpu failed: %i\n", status); | |
101 | return 0; | |
102 | } | |
1ed2fd2d | 103 | |
1da177e4 LT |
104 | return 1; |
105 | } | |
106 | ||
cebf589c | 107 | #ifdef CONFIG_XICS |
1da177e4 LT |
108 | static void __devinit smp_xics_setup_cpu(int cpu) |
109 | { | |
110 | if (cpu != boot_cpuid) | |
111 | xics_setup_cpu(); | |
112 | ||
1ababe11 | 113 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) |
1da177e4 LT |
114 | vpa_init(cpu); |
115 | ||
116 | cpu_clear(cpu, of_spin_map); | |
117 | ||
1da177e4 | 118 | } |
cebf589c | 119 | #endif /* CONFIG_XICS */ |
1da177e4 LT |
120 | |
121 | static DEFINE_SPINLOCK(timebase_lock); | |
122 | static unsigned long timebase = 0; | |
123 | ||
124 | static void __devinit pSeries_give_timebase(void) | |
125 | { | |
126 | spin_lock(&timebase_lock); | |
127 | rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL); | |
128 | timebase = get_tb(); | |
129 | spin_unlock(&timebase_lock); | |
130 | ||
131 | while (timebase) | |
132 | barrier(); | |
133 | rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL); | |
134 | } | |
135 | ||
136 | static void __devinit pSeries_take_timebase(void) | |
137 | { | |
138 | while (!timebase) | |
139 | barrier(); | |
140 | spin_lock(&timebase_lock); | |
141 | set_tb(timebase >> 32, timebase & 0xffffffff); | |
142 | timebase = 0; | |
143 | spin_unlock(&timebase_lock); | |
144 | } | |
145 | ||
146 | static void __devinit smp_pSeries_kick_cpu(int nr) | |
147 | { | |
148 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
149 | ||
150 | if (!smp_startup_cpu(nr)) | |
151 | return; | |
152 | ||
153 | /* | |
154 | * The processor is currently spinning, waiting for the | |
155 | * cpu_start field to become non-zero After we set cpu_start, | |
156 | * the processor will continue on to secondary_start | |
157 | */ | |
158 | paca[nr].cpu_start = 1; | |
159 | } | |
160 | ||
161 | static int smp_pSeries_cpu_bootable(unsigned int nr) | |
162 | { | |
163 | /* Special case - we inhibit secondary thread startup | |
6a75a6b8 | 164 | * during boot if the user requests it. |
1da177e4 LT |
165 | */ |
166 | if (system_state < SYSTEM_RUNNING && | |
0231c290 | 167 | cpu_has_feature(CPU_FTR_SMT) && |
8d089085 | 168 | !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0) |
1da177e4 LT |
169 | return 0; |
170 | ||
171 | return 1; | |
172 | } | |
cebf589c | 173 | #ifdef CONFIG_MPIC |
1da177e4 LT |
174 | static struct smp_ops_t pSeries_mpic_smp_ops = { |
175 | .message_pass = smp_mpic_message_pass, | |
176 | .probe = smp_mpic_probe, | |
177 | .kick_cpu = smp_pSeries_kick_cpu, | |
178 | .setup_cpu = smp_mpic_setup_cpu, | |
179 | }; | |
cebf589c AB |
180 | #endif |
181 | #ifdef CONFIG_XICS | |
1da177e4 LT |
182 | static struct smp_ops_t pSeries_xics_smp_ops = { |
183 | .message_pass = smp_xics_message_pass, | |
184 | .probe = smp_xics_probe, | |
185 | .kick_cpu = smp_pSeries_kick_cpu, | |
186 | .setup_cpu = smp_xics_setup_cpu, | |
187 | .cpu_bootable = smp_pSeries_cpu_bootable, | |
188 | }; | |
cebf589c | 189 | #endif |
1da177e4 LT |
190 | |
191 | /* This is called very early */ | |
0ebfff14 | 192 | static void __init smp_init_pseries(void) |
1da177e4 LT |
193 | { |
194 | int i; | |
195 | ||
f7ebf352 | 196 | pr_debug(" -> smp_init_pSeries()\n"); |
1da177e4 | 197 | |
1da177e4 | 198 | /* Mark threads which are still spinning in hold loops. */ |
0231c290 AB |
199 | if (cpu_has_feature(CPU_FTR_SMT)) { |
200 | for_each_present_cpu(i) { | |
6a75a6b8 | 201 | if (cpu_thread_in_core(i) == 0) |
1da177e4 LT |
202 | cpu_set(i, of_spin_map); |
203 | } | |
0231c290 | 204 | } else { |
1da177e4 | 205 | of_spin_map = cpu_present_map; |
0231c290 | 206 | } |
1da177e4 LT |
207 | |
208 | cpu_clear(boot_cpuid, of_spin_map); | |
209 | ||
210 | /* Non-lpar has additional take/give timebase */ | |
211 | if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) { | |
212 | smp_ops->give_timebase = pSeries_give_timebase; | |
213 | smp_ops->take_timebase = pSeries_take_timebase; | |
214 | } | |
215 | ||
f7ebf352 | 216 | pr_debug(" <- smp_init_pSeries()\n"); |
1da177e4 LT |
217 | } |
218 | ||
0ebfff14 BH |
219 | #ifdef CONFIG_MPIC |
220 | void __init smp_init_pseries_mpic(void) | |
221 | { | |
222 | smp_ops = &pSeries_mpic_smp_ops; | |
223 | ||
224 | smp_init_pseries(); | |
225 | } | |
226 | #endif | |
227 | ||
228 | void __init smp_init_pseries_xics(void) | |
229 | { | |
230 | smp_ops = &pSeries_xics_smp_ops; | |
231 | ||
232 | smp_init_pseries(); | |
233 | } |