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CommitLineData
f58a9d17
GL
1/*
2 * PS3 address space management.
3 *
4 * Copyright (C) 2006 Sony Computer Entertainment Inc.
5 * Copyright 2006 Sony Corp.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/memory_hotplug.h>
d9b2b2a2 24#include <linux/lmb.h>
f58a9d17 25
e22ba7e3 26#include <asm/firmware.h>
d9b2b2a2 27#include <asm/prom.h>
f58a9d17 28#include <asm/udbg.h>
f58a9d17
GL
29#include <asm/lv1call.h>
30
31#include "platform.h"
32
33#if defined(DEBUG)
83bb643d 34#define DBG udbg_printf
f58a9d17 35#else
83bb643d 36#define DBG pr_debug
f58a9d17
GL
37#endif
38
39enum {
f58a9d17
GL
40#if defined(CONFIG_PS3_DYNAMIC_DMA)
41 USE_DYNAMIC_DMA = 1,
42#else
43 USE_DYNAMIC_DMA = 0,
44#endif
45};
46
47enum {
48 PAGE_SHIFT_4K = 12U,
49 PAGE_SHIFT_64K = 16U,
50 PAGE_SHIFT_16M = 24U,
51};
52
53static unsigned long make_page_sizes(unsigned long a, unsigned long b)
54{
55 return (a << 56) | (b << 48);
56}
57
58enum {
59 ALLOCATE_MEMORY_TRY_ALT_UNIT = 0X04,
60 ALLOCATE_MEMORY_ADDR_ZERO = 0X08,
61};
62
63/* valid htab sizes are {18,19,20} = 256K, 512K, 1M */
64
65enum {
66 HTAB_SIZE_MAX = 20U, /* HV limit of 1MB */
67 HTAB_SIZE_MIN = 18U, /* CPU limit of 256KB */
68};
69
70/*============================================================================*/
71/* virtual address space routines */
72/*============================================================================*/
73
74/**
75 * struct mem_region - memory region structure
76 * @base: base address
77 * @size: size in bytes
78 * @offset: difference between base and rm.size
79 */
80
81struct mem_region {
b17b3df1 82 u64 base;
5418b9c6 83 u64 size;
f58a9d17
GL
84 unsigned long offset;
85};
86
87/**
88 * struct map - address space state variables holder
89 * @total: total memory available as reported by HV
90 * @vas_id - HV virtual address space id
91 * @htab_size: htab size in bytes
92 *
93 * The HV virtual address space (vas) allows for hotplug memory regions.
94 * Memory regions can be created and destroyed in the vas at runtime.
95 * @rm: real mode (bootmem) region
96 * @r1: hotplug memory region(s)
97 *
98 * ps3 addresses
99 * virt_addr: a cpu 'translated' effective address
100 * phys_addr: an address in what Linux thinks is the physical address space
101 * lpar_addr: an address in the HV virtual address space
102 * bus_addr: an io controller 'translated' address on a device bus
103 */
104
105struct map {
5418b9c6 106 u64 total;
b17b3df1
SR
107 u64 vas_id;
108 u64 htab_size;
f58a9d17
GL
109 struct mem_region rm;
110 struct mem_region r1;
111};
112
113#define debug_dump_map(x) _debug_dump_map(x, __func__, __LINE__)
6bb5cf10
GL
114static void __maybe_unused _debug_dump_map(const struct map *m,
115 const char *func, int line)
f58a9d17 116{
5418b9c6
SR
117 DBG("%s:%d: map.total = %llxh\n", func, line, m->total);
118 DBG("%s:%d: map.rm.size = %llxh\n", func, line, m->rm.size);
b17b3df1
SR
119 DBG("%s:%d: map.vas_id = %llu\n", func, line, m->vas_id);
120 DBG("%s:%d: map.htab_size = %llxh\n", func, line, m->htab_size);
121 DBG("%s:%d: map.r1.base = %llxh\n", func, line, m->r1.base);
f58a9d17 122 DBG("%s:%d: map.r1.offset = %lxh\n", func, line, m->r1.offset);
5418b9c6 123 DBG("%s:%d: map.r1.size = %llxh\n", func, line, m->r1.size);
f58a9d17
GL
124}
125
126static struct map map;
127
128/**
129 * ps3_mm_phys_to_lpar - translate a linux physical address to lpar address
130 * @phys_addr: linux physical address
131 */
132
133unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr)
134{
135 BUG_ON(is_kernel_addr(phys_addr));
a628df1e
GL
136 return (phys_addr < map.rm.size || phys_addr >= map.total)
137 ? phys_addr : phys_addr + map.r1.offset;
f58a9d17
GL
138}
139
140EXPORT_SYMBOL(ps3_mm_phys_to_lpar);
141
142/**
143 * ps3_mm_vas_create - create the virtual address space
144 */
145
146void __init ps3_mm_vas_create(unsigned long* htab_size)
147{
148 int result;
b17b3df1
SR
149 u64 start_address;
150 u64 size;
151 u64 access_right;
152 u64 max_page_size;
153 u64 flags;
f58a9d17
GL
154
155 result = lv1_query_logical_partition_address_region_info(0,
156 &start_address, &size, &access_right, &max_page_size,
157 &flags);
158
159 if (result) {
160 DBG("%s:%d: lv1_query_logical_partition_address_region_info "
161 "failed: %s\n", __func__, __LINE__,
162 ps3_result(result));
163 goto fail;
164 }
165
166 if (max_page_size < PAGE_SHIFT_16M) {
b17b3df1 167 DBG("%s:%d: bad max_page_size %llxh\n", __func__, __LINE__,
f58a9d17
GL
168 max_page_size);
169 goto fail;
170 }
171
172 BUILD_BUG_ON(CONFIG_PS3_HTAB_SIZE > HTAB_SIZE_MAX);
173 BUILD_BUG_ON(CONFIG_PS3_HTAB_SIZE < HTAB_SIZE_MIN);
174
175 result = lv1_construct_virtual_address_space(CONFIG_PS3_HTAB_SIZE,
176 2, make_page_sizes(PAGE_SHIFT_16M, PAGE_SHIFT_64K),
177 &map.vas_id, &map.htab_size);
178
179 if (result) {
180 DBG("%s:%d: lv1_construct_virtual_address_space failed: %s\n",
181 __func__, __LINE__, ps3_result(result));
182 goto fail;
183 }
184
185 result = lv1_select_virtual_address_space(map.vas_id);
186
187 if (result) {
188 DBG("%s:%d: lv1_select_virtual_address_space failed: %s\n",
189 __func__, __LINE__, ps3_result(result));
190 goto fail;
191 }
192
193 *htab_size = map.htab_size;
194
195 debug_dump_map(&map);
196
197 return;
198
199fail:
200 panic("ps3_mm_vas_create failed");
201}
202
203/**
204 * ps3_mm_vas_destroy -
205 */
206
207void ps3_mm_vas_destroy(void)
208{
6bb5cf10
GL
209 int result;
210
b17b3df1 211 DBG("%s:%d: map.vas_id = %llu\n", __func__, __LINE__, map.vas_id);
6bb5cf10 212
f58a9d17 213 if (map.vas_id) {
6bb5cf10
GL
214 result = lv1_select_virtual_address_space(0);
215 BUG_ON(result);
216 result = lv1_destruct_virtual_address_space(map.vas_id);
217 BUG_ON(result);
f58a9d17
GL
218 map.vas_id = 0;
219 }
220}
221
222/*============================================================================*/
223/* memory hotplug routines */
224/*============================================================================*/
225
226/**
227 * ps3_mm_region_create - create a memory region in the vas
228 * @r: pointer to a struct mem_region to accept initialized values
229 * @size: requested region size
230 *
231 * This implementation creates the region with the vas large page size.
232 * @size is rounded down to a multiple of the vas large page size.
233 */
234
32f44a12 235static int ps3_mm_region_create(struct mem_region *r, unsigned long size)
f58a9d17
GL
236{
237 int result;
b17b3df1 238 u64 muid;
f58a9d17
GL
239
240 r->size = _ALIGN_DOWN(size, 1 << PAGE_SHIFT_16M);
241
242 DBG("%s:%d requested %lxh\n", __func__, __LINE__, size);
5418b9c6
SR
243 DBG("%s:%d actual %llxh\n", __func__, __LINE__, r->size);
244 DBG("%s:%d difference %llxh (%lluMB)\n", __func__, __LINE__,
245 size - r->size, (size - r->size) / 1024 / 1024);
f58a9d17
GL
246
247 if (r->size == 0) {
248 DBG("%s:%d: size == 0\n", __func__, __LINE__);
249 result = -1;
250 goto zero_region;
251 }
252
253 result = lv1_allocate_memory(r->size, PAGE_SHIFT_16M, 0,
254 ALLOCATE_MEMORY_TRY_ALT_UNIT, &r->base, &muid);
255
256 if (result || r->base < map.rm.size) {
257 DBG("%s:%d: lv1_allocate_memory failed: %s\n",
258 __func__, __LINE__, ps3_result(result));
259 goto zero_region;
260 }
261
262 r->offset = r->base - map.rm.size;
263 return result;
264
265zero_region:
266 r->size = r->base = r->offset = 0;
267 return result;
268}
269
270/**
271 * ps3_mm_region_destroy - destroy a memory region
272 * @r: pointer to struct mem_region
273 */
274
32f44a12 275static void ps3_mm_region_destroy(struct mem_region *r)
f58a9d17 276{
6bb5cf10
GL
277 int result;
278
b17b3df1 279 DBG("%s:%d: r->base = %llxh\n", __func__, __LINE__, r->base);
f58a9d17 280 if (r->base) {
6bb5cf10
GL
281 result = lv1_release_memory(r->base);
282 BUG_ON(result);
f58a9d17
GL
283 r->size = r->base = r->offset = 0;
284 map.total = map.rm.size;
285 }
286}
287
288/**
289 * ps3_mm_add_memory - hot add memory
290 */
291
292static int __init ps3_mm_add_memory(void)
293{
294 int result;
295 unsigned long start_addr;
296 unsigned long start_pfn;
297 unsigned long nr_pages;
298
e22ba7e3 299 if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
ef596c69 300 return -ENODEV;
e22ba7e3 301
f58a9d17
GL
302 BUG_ON(!mem_init_done);
303
a628df1e 304 start_addr = map.rm.size;
f58a9d17
GL
305 start_pfn = start_addr >> PAGE_SHIFT;
306 nr_pages = (map.r1.size + PAGE_SIZE - 1) >> PAGE_SHIFT;
307
308 DBG("%s:%d: start_addr %lxh, start_pfn %lxh, nr_pages %lxh\n",
309 __func__, __LINE__, start_addr, start_pfn, nr_pages);
310
311 result = add_memory(0, start_addr, map.r1.size);
312
313 if (result) {
314 DBG("%s:%d: add_memory failed: (%d)\n",
315 __func__, __LINE__, result);
316 return result;
317 }
318
ecc240f9
GL
319 lmb_add(start_addr, map.r1.size);
320 lmb_analyze();
321
f58a9d17
GL
322 result = online_pages(start_pfn, nr_pages);
323
324 if (result)
325 DBG("%s:%d: online_pages failed: (%d)\n",
326 __func__, __LINE__, result);
327
328 return result;
329}
330
331core_initcall(ps3_mm_add_memory);
332
333/*============================================================================*/
334/* dma routines */
335/*============================================================================*/
336
337/**
6bb5cf10 338 * dma_sb_lpar_to_bus - Translate an lpar address to ioc mapped bus address.
f58a9d17
GL
339 * @r: pointer to dma region structure
340 * @lpar_addr: HV lpar address
341 */
342
6bb5cf10 343static unsigned long dma_sb_lpar_to_bus(struct ps3_dma_region *r,
f58a9d17
GL
344 unsigned long lpar_addr)
345{
6bb5cf10
GL
346 if (lpar_addr >= map.rm.size)
347 lpar_addr -= map.r1.offset;
348 BUG_ON(lpar_addr < r->offset);
349 BUG_ON(lpar_addr >= r->offset + r->len);
350 return r->bus_addr + lpar_addr - r->offset;
f58a9d17
GL
351}
352
353#define dma_dump_region(_a) _dma_dump_region(_a, __func__, __LINE__)
6bb5cf10
GL
354static void __maybe_unused _dma_dump_region(const struct ps3_dma_region *r,
355 const char *func, int line)
f58a9d17 356{
034e0ab5 357 DBG("%s:%d: dev %lu:%lu\n", func, line, r->dev->bus_id,
6bb5cf10 358 r->dev->dev_id);
f58a9d17
GL
359 DBG("%s:%d: page_size %u\n", func, line, r->page_size);
360 DBG("%s:%d: bus_addr %lxh\n", func, line, r->bus_addr);
361 DBG("%s:%d: len %lxh\n", func, line, r->len);
6bb5cf10 362 DBG("%s:%d: offset %lxh\n", func, line, r->offset);
f58a9d17
GL
363}
364
6bb5cf10 365 /**
f58a9d17
GL
366 * dma_chunk - A chunk of dma pages mapped by the io controller.
367 * @region - The dma region that owns this chunk.
368 * @lpar_addr: Starting lpar address of the area to map.
369 * @bus_addr: Starting ioc bus address of the area to map.
370 * @len: Length in bytes of the area to map.
371 * @link: A struct list_head used with struct ps3_dma_region.chunk_list, the
372 * list of all chuncks owned by the region.
373 *
374 * This implementation uses a very simple dma page manager
375 * based on the dma_chunk structure. This scheme assumes
376 * that all drivers use very well behaved dma ops.
377 */
378
379struct dma_chunk {
380 struct ps3_dma_region *region;
381 unsigned long lpar_addr;
382 unsigned long bus_addr;
383 unsigned long len;
384 struct list_head link;
385 unsigned int usage_count;
386};
387
388#define dma_dump_chunk(_a) _dma_dump_chunk(_a, __func__, __LINE__)
389static void _dma_dump_chunk (const struct dma_chunk* c, const char* func,
390 int line)
391{
034e0ab5 392 DBG("%s:%d: r.dev %lu:%lu\n", func, line,
6bb5cf10 393 c->region->dev->bus_id, c->region->dev->dev_id);
f58a9d17
GL
394 DBG("%s:%d: r.bus_addr %lxh\n", func, line, c->region->bus_addr);
395 DBG("%s:%d: r.page_size %u\n", func, line, c->region->page_size);
396 DBG("%s:%d: r.len %lxh\n", func, line, c->region->len);
6bb5cf10 397 DBG("%s:%d: r.offset %lxh\n", func, line, c->region->offset);
f58a9d17
GL
398 DBG("%s:%d: c.lpar_addr %lxh\n", func, line, c->lpar_addr);
399 DBG("%s:%d: c.bus_addr %lxh\n", func, line, c->bus_addr);
400 DBG("%s:%d: c.len %lxh\n", func, line, c->len);
401}
402
403static struct dma_chunk * dma_find_chunk(struct ps3_dma_region *r,
404 unsigned long bus_addr, unsigned long len)
405{
406 struct dma_chunk *c;
407 unsigned long aligned_bus = _ALIGN_DOWN(bus_addr, 1 << r->page_size);
6bb5cf10
GL
408 unsigned long aligned_len = _ALIGN_UP(len+bus_addr-aligned_bus,
409 1 << r->page_size);
f58a9d17
GL
410
411 list_for_each_entry(c, &r->chunk_list.head, link) {
412 /* intersection */
6bb5cf10
GL
413 if (aligned_bus >= c->bus_addr &&
414 aligned_bus + aligned_len <= c->bus_addr + c->len)
f58a9d17 415 return c;
6bb5cf10 416
f58a9d17 417 /* below */
6bb5cf10 418 if (aligned_bus + aligned_len <= c->bus_addr)
f58a9d17 419 continue;
6bb5cf10 420
f58a9d17 421 /* above */
6bb5cf10 422 if (aligned_bus >= c->bus_addr + c->len)
f58a9d17 423 continue;
f58a9d17
GL
424
425 /* we don't handle the multi-chunk case for now */
f58a9d17
GL
426 dma_dump_chunk(c);
427 BUG();
428 }
429 return NULL;
430}
431
6bb5cf10
GL
432static struct dma_chunk *dma_find_chunk_lpar(struct ps3_dma_region *r,
433 unsigned long lpar_addr, unsigned long len)
434{
435 struct dma_chunk *c;
436 unsigned long aligned_lpar = _ALIGN_DOWN(lpar_addr, 1 << r->page_size);
437 unsigned long aligned_len = _ALIGN_UP(len + lpar_addr - aligned_lpar,
438 1 << r->page_size);
439
440 list_for_each_entry(c, &r->chunk_list.head, link) {
441 /* intersection */
442 if (c->lpar_addr <= aligned_lpar &&
443 aligned_lpar < c->lpar_addr + c->len) {
444 if (aligned_lpar + aligned_len <= c->lpar_addr + c->len)
445 return c;
446 else {
447 dma_dump_chunk(c);
448 BUG();
449 }
450 }
451 /* below */
452 if (aligned_lpar + aligned_len <= c->lpar_addr) {
453 continue;
454 }
455 /* above */
456 if (c->lpar_addr + c->len <= aligned_lpar) {
457 continue;
458 }
459 }
460 return NULL;
461}
462
463static int dma_sb_free_chunk(struct dma_chunk *c)
f58a9d17
GL
464{
465 int result = 0;
466
467 if (c->bus_addr) {
6bb5cf10
GL
468 result = lv1_unmap_device_dma_region(c->region->dev->bus_id,
469 c->region->dev->dev_id, c->bus_addr, c->len);
f58a9d17
GL
470 BUG_ON(result);
471 }
472
473 kfree(c);
474 return result;
475}
476
6bb5cf10
GL
477static int dma_ioc0_free_chunk(struct dma_chunk *c)
478{
479 int result = 0;
480 int iopage;
481 unsigned long offset;
482 struct ps3_dma_region *r = c->region;
483
484 DBG("%s:start\n", __func__);
485 for (iopage = 0; iopage < (c->len >> r->page_size); iopage++) {
486 offset = (1 << r->page_size) * iopage;
487 /* put INVALID entry */
488 result = lv1_put_iopte(0,
489 c->bus_addr + offset,
490 c->lpar_addr + offset,
491 r->ioid,
492 0);
493 DBG("%s: bus=%#lx, lpar=%#lx, ioid=%d\n", __func__,
494 c->bus_addr + offset,
495 c->lpar_addr + offset,
496 r->ioid);
497
498 if (result) {
499 DBG("%s:%d: lv1_put_iopte failed: %s\n", __func__,
500 __LINE__, ps3_result(result));
501 }
502 }
503 kfree(c);
504 DBG("%s:end\n", __func__);
505 return result;
506}
507
f58a9d17 508/**
6bb5cf10 509 * dma_sb_map_pages - Maps dma pages into the io controller bus address space.
f58a9d17
GL
510 * @r: Pointer to a struct ps3_dma_region.
511 * @phys_addr: Starting physical address of the area to map.
512 * @len: Length in bytes of the area to map.
513 * c_out: A pointer to receive an allocated struct dma_chunk for this area.
514 *
515 * This is the lowest level dma mapping routine, and is the one that will
516 * make the HV call to add the pages into the io controller address space.
517 */
518
6bb5cf10
GL
519static int dma_sb_map_pages(struct ps3_dma_region *r, unsigned long phys_addr,
520 unsigned long len, struct dma_chunk **c_out, u64 iopte_flag)
f58a9d17
GL
521{
522 int result;
523 struct dma_chunk *c;
524
525 c = kzalloc(sizeof(struct dma_chunk), GFP_ATOMIC);
526
527 if (!c) {
528 result = -ENOMEM;
529 goto fail_alloc;
530 }
531
532 c->region = r;
533 c->lpar_addr = ps3_mm_phys_to_lpar(phys_addr);
6bb5cf10 534 c->bus_addr = dma_sb_lpar_to_bus(r, c->lpar_addr);
f58a9d17
GL
535 c->len = len;
536
6bb5cf10
GL
537 BUG_ON(iopte_flag != 0xf800000000000000UL);
538 result = lv1_map_device_dma_region(c->region->dev->bus_id,
539 c->region->dev->dev_id, c->lpar_addr,
540 c->bus_addr, c->len, iopte_flag);
f58a9d17
GL
541 if (result) {
542 DBG("%s:%d: lv1_map_device_dma_region failed: %s\n",
543 __func__, __LINE__, ps3_result(result));
544 goto fail_map;
545 }
546
547 list_add(&c->link, &r->chunk_list.head);
548
549 *c_out = c;
550 return 0;
551
552fail_map:
553 kfree(c);
554fail_alloc:
555 *c_out = NULL;
556 DBG(" <- %s:%d\n", __func__, __LINE__);
557 return result;
558}
559
6bb5cf10
GL
560static int dma_ioc0_map_pages(struct ps3_dma_region *r, unsigned long phys_addr,
561 unsigned long len, struct dma_chunk **c_out,
562 u64 iopte_flag)
563{
564 int result;
565 struct dma_chunk *c, *last;
566 int iopage, pages;
567 unsigned long offset;
568
569 DBG(KERN_ERR "%s: phy=%#lx, lpar%#lx, len=%#lx\n", __func__,
570 phys_addr, ps3_mm_phys_to_lpar(phys_addr), len);
571 c = kzalloc(sizeof(struct dma_chunk), GFP_ATOMIC);
572
573 if (!c) {
574 result = -ENOMEM;
575 goto fail_alloc;
576 }
577
578 c->region = r;
579 c->len = len;
580 c->lpar_addr = ps3_mm_phys_to_lpar(phys_addr);
581 /* allocate IO address */
582 if (list_empty(&r->chunk_list.head)) {
583 /* first one */
584 c->bus_addr = r->bus_addr;
585 } else {
586 /* derive from last bus addr*/
587 last = list_entry(r->chunk_list.head.next,
588 struct dma_chunk, link);
589 c->bus_addr = last->bus_addr + last->len;
590 DBG("%s: last bus=%#lx, len=%#lx\n", __func__,
591 last->bus_addr, last->len);
592 }
593
594 /* FIXME: check whether length exceeds region size */
595
596 /* build ioptes for the area */
597 pages = len >> r->page_size;
598 DBG("%s: pgsize=%#x len=%#lx pages=%#x iopteflag=%#lx\n", __func__,
599 r->page_size, r->len, pages, iopte_flag);
600 for (iopage = 0; iopage < pages; iopage++) {
601 offset = (1 << r->page_size) * iopage;
602 result = lv1_put_iopte(0,
603 c->bus_addr + offset,
604 c->lpar_addr + offset,
605 r->ioid,
606 iopte_flag);
607 if (result) {
608 printk(KERN_WARNING "%s:%d: lv1_map_device_dma_region "
609 "failed: %s\n", __func__, __LINE__,
610 ps3_result(result));
611 goto fail_map;
612 }
613 DBG("%s: pg=%d bus=%#lx, lpar=%#lx, ioid=%#x\n", __func__,
614 iopage, c->bus_addr + offset, c->lpar_addr + offset,
615 r->ioid);
616 }
617
618 /* be sure that last allocated one is inserted at head */
619 list_add(&c->link, &r->chunk_list.head);
620
621 *c_out = c;
622 DBG("%s: end\n", __func__);
623 return 0;
624
625fail_map:
626 for (iopage--; 0 <= iopage; iopage--) {
627 lv1_put_iopte(0,
628 c->bus_addr + offset,
629 c->lpar_addr + offset,
630 r->ioid,
631 0);
632 }
633 kfree(c);
634fail_alloc:
635 *c_out = NULL;
636 return result;
637}
638
f58a9d17 639/**
6bb5cf10 640 * dma_sb_region_create - Create a device dma region.
f58a9d17
GL
641 * @r: Pointer to a struct ps3_dma_region.
642 *
643 * This is the lowest level dma region create routine, and is the one that
644 * will make the HV call to create the region.
645 */
646
6bb5cf10 647static int dma_sb_region_create(struct ps3_dma_region *r)
f58a9d17
GL
648{
649 int result;
b17b3df1 650 u64 bus_addr;
f58a9d17 651
62d80749 652 DBG(" -> %s:%d:\n", __func__, __LINE__);
6bb5cf10
GL
653
654 BUG_ON(!r);
655
656 if (!r->dev->bus_id) {
034e0ab5 657 pr_info("%s:%d: %lu:%lu no dma\n", __func__, __LINE__,
6bb5cf10
GL
658 r->dev->bus_id, r->dev->dev_id);
659 return 0;
660 }
661
662 DBG("%s:%u: len = 0x%lx, page_size = %u, offset = 0x%lx\n", __func__,
663 __LINE__, r->len, r->page_size, r->offset);
664
665 BUG_ON(!r->len);
666 BUG_ON(!r->page_size);
667 BUG_ON(!r->region_ops);
668
f58a9d17
GL
669 INIT_LIST_HEAD(&r->chunk_list.head);
670 spin_lock_init(&r->chunk_list.lock);
671
6bb5cf10
GL
672 result = lv1_allocate_device_dma_region(r->dev->bus_id, r->dev->dev_id,
673 roundup_pow_of_two(r->len), r->page_size, r->region_type,
b17b3df1
SR
674 &bus_addr);
675 r->bus_addr = bus_addr;
f58a9d17
GL
676
677 if (result) {
678 DBG("%s:%d: lv1_allocate_device_dma_region failed: %s\n",
679 __func__, __LINE__, ps3_result(result));
680 r->len = r->bus_addr = 0;
681 }
682
683 return result;
684}
685
6bb5cf10
GL
686static int dma_ioc0_region_create(struct ps3_dma_region *r)
687{
688 int result;
b17b3df1 689 u64 bus_addr;
6bb5cf10
GL
690
691 INIT_LIST_HEAD(&r->chunk_list.head);
692 spin_lock_init(&r->chunk_list.lock);
693
694 result = lv1_allocate_io_segment(0,
695 r->len,
696 r->page_size,
b17b3df1
SR
697 &bus_addr);
698 r->bus_addr = bus_addr;
6bb5cf10
GL
699 if (result) {
700 DBG("%s:%d: lv1_allocate_io_segment failed: %s\n",
701 __func__, __LINE__, ps3_result(result));
702 r->len = r->bus_addr = 0;
703 }
704 DBG("%s: len=%#lx, pg=%d, bus=%#lx\n", __func__,
705 r->len, r->page_size, r->bus_addr);
706 return result;
707}
708
f58a9d17
GL
709/**
710 * dma_region_free - Free a device dma region.
711 * @r: Pointer to a struct ps3_dma_region.
712 *
713 * This is the lowest level dma region free routine, and is the one that
714 * will make the HV call to free the region.
715 */
716
6bb5cf10 717static int dma_sb_region_free(struct ps3_dma_region *r)
f58a9d17
GL
718{
719 int result;
720 struct dma_chunk *c;
721 struct dma_chunk *tmp;
722
6bb5cf10
GL
723 BUG_ON(!r);
724
725 if (!r->dev->bus_id) {
034e0ab5 726 pr_info("%s:%d: %lu:%lu no dma\n", __func__, __LINE__,
6bb5cf10
GL
727 r->dev->bus_id, r->dev->dev_id);
728 return 0;
729 }
730
f58a9d17
GL
731 list_for_each_entry_safe(c, tmp, &r->chunk_list.head, link) {
732 list_del(&c->link);
6bb5cf10 733 dma_sb_free_chunk(c);
f58a9d17
GL
734 }
735
6bb5cf10 736 result = lv1_free_device_dma_region(r->dev->bus_id, r->dev->dev_id,
f58a9d17
GL
737 r->bus_addr);
738
739 if (result)
740 DBG("%s:%d: lv1_free_device_dma_region failed: %s\n",
741 __func__, __LINE__, ps3_result(result));
742
6bb5cf10
GL
743 r->bus_addr = 0;
744
745 return result;
746}
747
748static int dma_ioc0_region_free(struct ps3_dma_region *r)
749{
750 int result;
751 struct dma_chunk *c, *n;
752
753 DBG("%s: start\n", __func__);
754 list_for_each_entry_safe(c, n, &r->chunk_list.head, link) {
755 list_del(&c->link);
756 dma_ioc0_free_chunk(c);
757 }
758
759 result = lv1_release_io_segment(0, r->bus_addr);
760
761 if (result)
762 DBG("%s:%d: lv1_free_device_dma_region failed: %s\n",
763 __func__, __LINE__, ps3_result(result));
764
765 r->bus_addr = 0;
766 DBG("%s: end\n", __func__);
f58a9d17
GL
767
768 return result;
769}
770
771/**
6bb5cf10 772 * dma_sb_map_area - Map an area of memory into a device dma region.
f58a9d17
GL
773 * @r: Pointer to a struct ps3_dma_region.
774 * @virt_addr: Starting virtual address of the area to map.
775 * @len: Length in bytes of the area to map.
776 * @bus_addr: A pointer to return the starting ioc bus address of the area to
777 * map.
778 *
779 * This is the common dma mapping routine.
780 */
781
6bb5cf10 782static int dma_sb_map_area(struct ps3_dma_region *r, unsigned long virt_addr,
494fd07a 783 unsigned long len, dma_addr_t *bus_addr,
6bb5cf10 784 u64 iopte_flag)
f58a9d17
GL
785{
786 int result;
787 unsigned long flags;
788 struct dma_chunk *c;
789 unsigned long phys_addr = is_kernel_addr(virt_addr) ? __pa(virt_addr)
790 : virt_addr;
6bb5cf10
GL
791 unsigned long aligned_phys = _ALIGN_DOWN(phys_addr, 1 << r->page_size);
792 unsigned long aligned_len = _ALIGN_UP(len + phys_addr - aligned_phys,
793 1 << r->page_size);
794 *bus_addr = dma_sb_lpar_to_bus(r, ps3_mm_phys_to_lpar(phys_addr));
f58a9d17
GL
795
796 if (!USE_DYNAMIC_DMA) {
797 unsigned long lpar_addr = ps3_mm_phys_to_lpar(phys_addr);
798 DBG(" -> %s:%d\n", __func__, __LINE__);
799 DBG("%s:%d virt_addr %lxh\n", __func__, __LINE__,
800 virt_addr);
801 DBG("%s:%d phys_addr %lxh\n", __func__, __LINE__,
802 phys_addr);
803 DBG("%s:%d lpar_addr %lxh\n", __func__, __LINE__,
804 lpar_addr);
805 DBG("%s:%d len %lxh\n", __func__, __LINE__, len);
494fd07a 806 DBG("%s:%d bus_addr %llxh (%lxh)\n", __func__, __LINE__,
f58a9d17
GL
807 *bus_addr, len);
808 }
809
810 spin_lock_irqsave(&r->chunk_list.lock, flags);
811 c = dma_find_chunk(r, *bus_addr, len);
812
813 if (c) {
6bb5cf10
GL
814 DBG("%s:%d: reusing mapped chunk", __func__, __LINE__);
815 dma_dump_chunk(c);
f58a9d17
GL
816 c->usage_count++;
817 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
818 return 0;
819 }
820
6bb5cf10 821 result = dma_sb_map_pages(r, aligned_phys, aligned_len, &c, iopte_flag);
f58a9d17
GL
822
823 if (result) {
824 *bus_addr = 0;
6bb5cf10 825 DBG("%s:%d: dma_sb_map_pages failed (%d)\n",
f58a9d17
GL
826 __func__, __LINE__, result);
827 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
828 return result;
829 }
830
831 c->usage_count = 1;
832
833 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
834 return result;
835}
836
6bb5cf10 837static int dma_ioc0_map_area(struct ps3_dma_region *r, unsigned long virt_addr,
494fd07a 838 unsigned long len, dma_addr_t *bus_addr,
6bb5cf10
GL
839 u64 iopte_flag)
840{
841 int result;
842 unsigned long flags;
843 struct dma_chunk *c;
844 unsigned long phys_addr = is_kernel_addr(virt_addr) ? __pa(virt_addr)
845 : virt_addr;
846 unsigned long aligned_phys = _ALIGN_DOWN(phys_addr, 1 << r->page_size);
847 unsigned long aligned_len = _ALIGN_UP(len + phys_addr - aligned_phys,
848 1 << r->page_size);
849
850 DBG(KERN_ERR "%s: vaddr=%#lx, len=%#lx\n", __func__,
851 virt_addr, len);
852 DBG(KERN_ERR "%s: ph=%#lx a_ph=%#lx a_l=%#lx\n", __func__,
853 phys_addr, aligned_phys, aligned_len);
854
855 spin_lock_irqsave(&r->chunk_list.lock, flags);
856 c = dma_find_chunk_lpar(r, ps3_mm_phys_to_lpar(phys_addr), len);
857
858 if (c) {
859 /* FIXME */
860 BUG();
861 *bus_addr = c->bus_addr + phys_addr - aligned_phys;
862 c->usage_count++;
863 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
864 return 0;
865 }
866
867 result = dma_ioc0_map_pages(r, aligned_phys, aligned_len, &c,
868 iopte_flag);
869
870 if (result) {
871 *bus_addr = 0;
872 DBG("%s:%d: dma_ioc0_map_pages failed (%d)\n",
873 __func__, __LINE__, result);
874 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
875 return result;
876 }
877 *bus_addr = c->bus_addr + phys_addr - aligned_phys;
494fd07a 878 DBG("%s: va=%#lx pa=%#lx a_pa=%#lx bus=%#llx\n", __func__,
6bb5cf10
GL
879 virt_addr, phys_addr, aligned_phys, *bus_addr);
880 c->usage_count = 1;
881
882 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
883 return result;
884}
885
f58a9d17 886/**
6bb5cf10 887 * dma_sb_unmap_area - Unmap an area of memory from a device dma region.
f58a9d17
GL
888 * @r: Pointer to a struct ps3_dma_region.
889 * @bus_addr: The starting ioc bus address of the area to unmap.
890 * @len: Length in bytes of the area to unmap.
891 *
892 * This is the common dma unmap routine.
893 */
894
494fd07a 895static int dma_sb_unmap_area(struct ps3_dma_region *r, dma_addr_t bus_addr,
f58a9d17
GL
896 unsigned long len)
897{
898 unsigned long flags;
899 struct dma_chunk *c;
900
901 spin_lock_irqsave(&r->chunk_list.lock, flags);
902 c = dma_find_chunk(r, bus_addr, len);
903
904 if (!c) {
905 unsigned long aligned_bus = _ALIGN_DOWN(bus_addr,
906 1 << r->page_size);
6bb5cf10
GL
907 unsigned long aligned_len = _ALIGN_UP(len + bus_addr
908 - aligned_bus, 1 << r->page_size);
494fd07a 909 DBG("%s:%d: not found: bus_addr %llxh\n",
f58a9d17
GL
910 __func__, __LINE__, bus_addr);
911 DBG("%s:%d: not found: len %lxh\n",
912 __func__, __LINE__, len);
913 DBG("%s:%d: not found: aligned_bus %lxh\n",
914 __func__, __LINE__, aligned_bus);
915 DBG("%s:%d: not found: aligned_len %lxh\n",
916 __func__, __LINE__, aligned_len);
917 BUG();
918 }
919
920 c->usage_count--;
921
922 if (!c->usage_count) {
923 list_del(&c->link);
6bb5cf10 924 dma_sb_free_chunk(c);
f58a9d17
GL
925 }
926
927 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
928 return 0;
929}
930
32f44a12 931static int dma_ioc0_unmap_area(struct ps3_dma_region *r,
494fd07a 932 dma_addr_t bus_addr, unsigned long len)
6bb5cf10
GL
933{
934 unsigned long flags;
935 struct dma_chunk *c;
936
494fd07a 937 DBG("%s: start a=%#llx l=%#lx\n", __func__, bus_addr, len);
6bb5cf10
GL
938 spin_lock_irqsave(&r->chunk_list.lock, flags);
939 c = dma_find_chunk(r, bus_addr, len);
940
941 if (!c) {
942 unsigned long aligned_bus = _ALIGN_DOWN(bus_addr,
943 1 << r->page_size);
944 unsigned long aligned_len = _ALIGN_UP(len + bus_addr
945 - aligned_bus,
946 1 << r->page_size);
494fd07a 947 DBG("%s:%d: not found: bus_addr %llxh\n",
6bb5cf10
GL
948 __func__, __LINE__, bus_addr);
949 DBG("%s:%d: not found: len %lxh\n",
950 __func__, __LINE__, len);
951 DBG("%s:%d: not found: aligned_bus %lxh\n",
952 __func__, __LINE__, aligned_bus);
953 DBG("%s:%d: not found: aligned_len %lxh\n",
954 __func__, __LINE__, aligned_len);
955 BUG();
956 }
957
958 c->usage_count--;
959
960 if (!c->usage_count) {
961 list_del(&c->link);
962 dma_ioc0_free_chunk(c);
963 }
964
965 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
966 DBG("%s: end\n", __func__);
967 return 0;
968}
969
f58a9d17 970/**
6bb5cf10 971 * dma_sb_region_create_linear - Setup a linear dma mapping for a device.
f58a9d17
GL
972 * @r: Pointer to a struct ps3_dma_region.
973 *
974 * This routine creates an HV dma region for the device and maps all available
975 * ram into the io controller bus address space.
976 */
977
6bb5cf10 978static int dma_sb_region_create_linear(struct ps3_dma_region *r)
f58a9d17
GL
979{
980 int result;
494fd07a
SR
981 unsigned long virt_addr, len;
982 dma_addr_t tmp;
6bb5cf10
GL
983
984 if (r->len > 16*1024*1024) { /* FIXME: need proper fix */
985 /* force 16M dma pages for linear mapping */
986 if (r->page_size != PS3_DMA_16M) {
987 pr_info("%s:%d: forcing 16M pages for linear map\n",
988 __func__, __LINE__);
989 r->page_size = PS3_DMA_16M;
990 r->len = _ALIGN_UP(r->len, 1 << r->page_size);
991 }
f58a9d17
GL
992 }
993
6bb5cf10 994 result = dma_sb_region_create(r);
f58a9d17
GL
995 BUG_ON(result);
996
6bb5cf10
GL
997 if (r->offset < map.rm.size) {
998 /* Map (part of) 1st RAM chunk */
999 virt_addr = map.rm.base + r->offset;
1000 len = map.rm.size - r->offset;
1001 if (len > r->len)
1002 len = r->len;
1003 result = dma_sb_map_area(r, virt_addr, len, &tmp,
1004 IOPTE_PP_W | IOPTE_PP_R | IOPTE_SO_RW | IOPTE_M);
1005 BUG_ON(result);
1006 }
f58a9d17 1007
6bb5cf10
GL
1008 if (r->offset + r->len > map.rm.size) {
1009 /* Map (part of) 2nd RAM chunk */
a628df1e 1010 virt_addr = map.rm.size;
6bb5cf10
GL
1011 len = r->len;
1012 if (r->offset >= map.rm.size)
1013 virt_addr += r->offset - map.rm.size;
1014 else
1015 len -= map.rm.size - r->offset;
1016 result = dma_sb_map_area(r, virt_addr, len, &tmp,
1017 IOPTE_PP_W | IOPTE_PP_R | IOPTE_SO_RW | IOPTE_M);
1018 BUG_ON(result);
1019 }
f58a9d17
GL
1020
1021 return result;
1022}
1023
1024/**
6bb5cf10 1025 * dma_sb_region_free_linear - Free a linear dma mapping for a device.
f58a9d17
GL
1026 * @r: Pointer to a struct ps3_dma_region.
1027 *
1028 * This routine will unmap all mapped areas and free the HV dma region.
1029 */
1030
6bb5cf10 1031static int dma_sb_region_free_linear(struct ps3_dma_region *r)
f58a9d17
GL
1032{
1033 int result;
494fd07a
SR
1034 dma_addr_t bus_addr;
1035 unsigned long len, lpar_addr;
6bb5cf10
GL
1036
1037 if (r->offset < map.rm.size) {
1038 /* Unmap (part of) 1st RAM chunk */
1039 lpar_addr = map.rm.base + r->offset;
1040 len = map.rm.size - r->offset;
1041 if (len > r->len)
1042 len = r->len;
1043 bus_addr = dma_sb_lpar_to_bus(r, lpar_addr);
1044 result = dma_sb_unmap_area(r, bus_addr, len);
1045 BUG_ON(result);
1046 }
f58a9d17 1047
6bb5cf10
GL
1048 if (r->offset + r->len > map.rm.size) {
1049 /* Unmap (part of) 2nd RAM chunk */
1050 lpar_addr = map.r1.base;
1051 len = r->len;
1052 if (r->offset >= map.rm.size)
1053 lpar_addr += r->offset - map.rm.size;
1054 else
1055 len -= map.rm.size - r->offset;
1056 bus_addr = dma_sb_lpar_to_bus(r, lpar_addr);
1057 result = dma_sb_unmap_area(r, bus_addr, len);
1058 BUG_ON(result);
1059 }
f58a9d17 1060
6bb5cf10 1061 result = dma_sb_region_free(r);
f58a9d17
GL
1062 BUG_ON(result);
1063
1064 return result;
1065}
1066
1067/**
6bb5cf10 1068 * dma_sb_map_area_linear - Map an area of memory into a device dma region.
f58a9d17
GL
1069 * @r: Pointer to a struct ps3_dma_region.
1070 * @virt_addr: Starting virtual address of the area to map.
1071 * @len: Length in bytes of the area to map.
1072 * @bus_addr: A pointer to return the starting ioc bus address of the area to
1073 * map.
1074 *
6bb5cf10 1075 * This routine just returns the corresponding bus address. Actual mapping
f58a9d17
GL
1076 * occurs in dma_region_create_linear().
1077 */
1078
6bb5cf10 1079static int dma_sb_map_area_linear(struct ps3_dma_region *r,
494fd07a 1080 unsigned long virt_addr, unsigned long len, dma_addr_t *bus_addr,
6bb5cf10 1081 u64 iopte_flag)
f58a9d17
GL
1082{
1083 unsigned long phys_addr = is_kernel_addr(virt_addr) ? __pa(virt_addr)
1084 : virt_addr;
6bb5cf10 1085 *bus_addr = dma_sb_lpar_to_bus(r, ps3_mm_phys_to_lpar(phys_addr));
f58a9d17
GL
1086 return 0;
1087}
1088
1089/**
1090 * dma_unmap_area_linear - Unmap an area of memory from a device dma region.
1091 * @r: Pointer to a struct ps3_dma_region.
1092 * @bus_addr: The starting ioc bus address of the area to unmap.
1093 * @len: Length in bytes of the area to unmap.
1094 *
6bb5cf10 1095 * This routine does nothing. Unmapping occurs in dma_sb_region_free_linear().
f58a9d17
GL
1096 */
1097
6bb5cf10 1098static int dma_sb_unmap_area_linear(struct ps3_dma_region *r,
494fd07a 1099 dma_addr_t bus_addr, unsigned long len)
f58a9d17
GL
1100{
1101 return 0;
6bb5cf10
GL
1102};
1103
1104static const struct ps3_dma_region_ops ps3_dma_sb_region_ops = {
1105 .create = dma_sb_region_create,
1106 .free = dma_sb_region_free,
1107 .map = dma_sb_map_area,
1108 .unmap = dma_sb_unmap_area
1109};
1110
1111static const struct ps3_dma_region_ops ps3_dma_sb_region_linear_ops = {
1112 .create = dma_sb_region_create_linear,
1113 .free = dma_sb_region_free_linear,
1114 .map = dma_sb_map_area_linear,
1115 .unmap = dma_sb_unmap_area_linear
1116};
1117
1118static const struct ps3_dma_region_ops ps3_dma_ioc0_region_ops = {
1119 .create = dma_ioc0_region_create,
1120 .free = dma_ioc0_region_free,
1121 .map = dma_ioc0_map_area,
1122 .unmap = dma_ioc0_unmap_area
1123};
1124
1125int ps3_dma_region_init(struct ps3_system_bus_device *dev,
1126 struct ps3_dma_region *r, enum ps3_dma_page_size page_size,
1127 enum ps3_dma_region_type region_type, void *addr, unsigned long len)
1128{
1129 unsigned long lpar_addr;
1130
1131 lpar_addr = addr ? ps3_mm_phys_to_lpar(__pa(addr)) : 0;
1132
1133 r->dev = dev;
1134 r->page_size = page_size;
1135 r->region_type = region_type;
1136 r->offset = lpar_addr;
1137 if (r->offset >= map.rm.size)
1138 r->offset -= map.r1.offset;
1139 r->len = len ? len : _ALIGN_UP(map.total, 1 << r->page_size);
1140
1141 switch (dev->dev_type) {
1142 case PS3_DEVICE_TYPE_SB:
1143 r->region_ops = (USE_DYNAMIC_DMA)
1144 ? &ps3_dma_sb_region_ops
1145 : &ps3_dma_sb_region_linear_ops;
1146 break;
1147 case PS3_DEVICE_TYPE_IOC0:
1148 r->region_ops = &ps3_dma_ioc0_region_ops;
1149 break;
1150 default:
1151 BUG();
1152 return -EINVAL;
1153 }
1154 return 0;
f58a9d17 1155}
6bb5cf10 1156EXPORT_SYMBOL(ps3_dma_region_init);
f58a9d17
GL
1157
1158int ps3_dma_region_create(struct ps3_dma_region *r)
1159{
6bb5cf10
GL
1160 BUG_ON(!r);
1161 BUG_ON(!r->region_ops);
1162 BUG_ON(!r->region_ops->create);
1163 return r->region_ops->create(r);
f58a9d17 1164}
6bb5cf10 1165EXPORT_SYMBOL(ps3_dma_region_create);
f58a9d17
GL
1166
1167int ps3_dma_region_free(struct ps3_dma_region *r)
1168{
6bb5cf10
GL
1169 BUG_ON(!r);
1170 BUG_ON(!r->region_ops);
1171 BUG_ON(!r->region_ops->free);
1172 return r->region_ops->free(r);
f58a9d17 1173}
6bb5cf10 1174EXPORT_SYMBOL(ps3_dma_region_free);
f58a9d17
GL
1175
1176int ps3_dma_map(struct ps3_dma_region *r, unsigned long virt_addr,
494fd07a 1177 unsigned long len, dma_addr_t *bus_addr,
6bb5cf10 1178 u64 iopte_flag)
f58a9d17 1179{
6bb5cf10 1180 return r->region_ops->map(r, virt_addr, len, bus_addr, iopte_flag);
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1181}
1182
494fd07a 1183int ps3_dma_unmap(struct ps3_dma_region *r, dma_addr_t bus_addr,
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1184 unsigned long len)
1185{
6bb5cf10 1186 return r->region_ops->unmap(r, bus_addr, len);
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1187}
1188
1189/*============================================================================*/
1190/* system startup routines */
1191/*============================================================================*/
1192
1193/**
1194 * ps3_mm_init - initialize the address space state variables
1195 */
1196
1197void __init ps3_mm_init(void)
1198{
1199 int result;
1200
1201 DBG(" -> %s:%d\n", __func__, __LINE__);
1202
1203 result = ps3_repository_read_mm_info(&map.rm.base, &map.rm.size,
1204 &map.total);
1205
1206 if (result)
1207 panic("ps3_repository_read_mm_info() failed");
1208
1209 map.rm.offset = map.rm.base;
1210 map.vas_id = map.htab_size = 0;
1211
1212 /* this implementation assumes map.rm.base is zero */
1213
1214 BUG_ON(map.rm.base);
1215 BUG_ON(!map.rm.size);
1216
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1217
1218 /* arrange to do this in ps3_mm_add_memory */
1219 ps3_mm_region_create(&map.r1, map.total - map.rm.size);
1220
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1221 /* correct map.total for the real total amount of memory we use */
1222 map.total = map.rm.size + map.r1.size;
1223
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1224 DBG(" <- %s:%d\n", __func__, __LINE__);
1225}
1226
1227/**
1228 * ps3_mm_shutdown - final cleanup of address space
1229 */
1230
1231void ps3_mm_shutdown(void)
1232{
1233 ps3_mm_region_destroy(&map.r1);
f58a9d17 1234}