[net-next-2.6.git] / arch / powerpc / include / asm / page_64.h

#ifndef _ASM_POWERPC_PAGE_64_H
#define _ASM_POWERPC_PAGE_64_H

/*
 * Copyright (C) 2001 PPC64 Team, IBM Corp
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

/*
 * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
 * specific, every notion of page number shared with the firmware, TCEs,
 * iommu, etc... still uses a page size of 4K.
 */
#define HW_PAGE_SHIFT		12
#define HW_PAGE_SIZE		(ASM_CONST(1) << HW_PAGE_SHIFT)
#define HW_PAGE_MASK		(~(HW_PAGE_SIZE-1))

/*
 * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
 * HW_PAGE_SHIFT, that is 4K pages.
 */
#define PAGE_FACTOR		(PAGE_SHIFT - HW_PAGE_SHIFT)

/* Segment size; normal 256M segments */
#define SID_SHIFT		28
#define SID_MASK		ASM_CONST(0xfffffffff)
#define ESID_MASK		0xfffffffff0000000UL
#define GET_ESID(x)		(((x) >> SID_SHIFT) & SID_MASK)

/* 1T segments */
#define SID_SHIFT_1T		40
#define SID_MASK_1T		0xffffffUL
#define ESID_MASK_1T		0xffffff0000000000UL
#define GET_ESID_1T(x)		(((x) >> SID_SHIFT_1T) & SID_MASK_1T)

#ifndef __ASSEMBLY__
#include <asm/cache.h>

typedef unsigned long pte_basic_t;

static __inline__ void clear_page(void *addr)
{
	unsigned long lines, line_size;

	line_size = ppc64_caches.dline_size;
	lines = ppc64_caches.dlines_per_page;

	__asm__ __volatile__(
	"mtctr	%1	# clear_page\n\
1:      dcbz	0,%0\n\
	add	%0,%0,%3\n\
	bdnz+	1b"
        : "=r" (addr)
        : "r" (lines), "0" (addr), "r" (line_size)
	: "ctr", "memory");
}

extern void copy_4K_page(void *to, void *from);

#ifdef CONFIG_PPC_64K_PAGES
static inline void copy_page(void *to, void *from)
{
	unsigned int i;
	for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
		copy_4K_page(to, from);
		to += 4096;
		from += 4096;
	}
}
#else /* CONFIG_PPC_64K_PAGES */
static inline void copy_page(void *to, void *from)
{
	copy_4K_page(to, from);
}
#endif /* CONFIG_PPC_64K_PAGES */

/* Log 2 of page table size */
extern u64 ppc64_pft_size;

/* Large pages size */
#ifdef CONFIG_HUGETLB_PAGE
extern unsigned int HPAGE_SHIFT;
#else
#define HPAGE_SHIFT PAGE_SHIFT
#endif
#define HPAGE_SIZE		((1UL) << HPAGE_SHIFT)
#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
#define HUGE_MAX_HSTATE		(MMU_PAGE_COUNT-1)

#endif /* __ASSEMBLY__ */

#ifdef CONFIG_PPC_MM_SLICES

#define SLICE_LOW_SHIFT		28
#define SLICE_HIGH_SHIFT	40

#define SLICE_LOW_TOP		(0x100000000ul)
#define SLICE_NUM_LOW		(SLICE_LOW_TOP >> SLICE_LOW_SHIFT)
#define SLICE_NUM_HIGH		(PGTABLE_RANGE >> SLICE_HIGH_SHIFT)

#define GET_LOW_SLICE_INDEX(addr)	((addr) >> SLICE_LOW_SHIFT)
#define GET_HIGH_SLICE_INDEX(addr)	((addr) >> SLICE_HIGH_SHIFT)

#ifndef __ASSEMBLY__

struct slice_mask {
	u16 low_slices;
	u16 high_slices;
};

struct mm_struct;

extern unsigned long slice_get_unmapped_area(unsigned long addr,
					     unsigned long len,
					     unsigned long flags,
					     unsigned int psize,
					     int topdown,
					     int use_cache);

extern unsigned int get_slice_psize(struct mm_struct *mm,
				    unsigned long addr);

extern void slice_init_context(struct mm_struct *mm, unsigned int psize);
extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
				  unsigned long len, unsigned int psize);

#define slice_mm_new_context(mm)	((mm)->context.id == 0)

#endif /* __ASSEMBLY__ */
#else
#define slice_init()
#ifdef CONFIG_PPC_STD_MMU_64
#define get_slice_psize(mm, addr)	((mm)->context.user_psize)
#define slice_set_user_psize(mm, psize)		\
do {						\
	(mm)->context.user_psize = (psize);	\
	(mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
} while (0)
#else /* CONFIG_PPC_STD_MMU_64 */
#ifdef CONFIG_PPC_64K_PAGES
#define get_slice_psize(mm, addr)	MMU_PAGE_64K
#else /* CONFIG_PPC_64K_PAGES */
#define get_slice_psize(mm, addr)	MMU_PAGE_4K
#endif /* !CONFIG_PPC_64K_PAGES */
#define slice_set_user_psize(mm, psize)	do { BUG(); } while(0)
#endif /* !CONFIG_PPC_STD_MMU_64 */

#define slice_set_range_psize(mm, start, len, psize)	\
	slice_set_user_psize((mm), (psize))
#define slice_mm_new_context(mm)	1
#endif /* CONFIG_PPC_MM_SLICES */

#ifdef CONFIG_HUGETLB_PAGE

#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA

#endif /* !CONFIG_HUGETLB_PAGE */

#define VM_DATA_DEFAULT_FLAGS \
	(test_thread_flag(TIF_32BIT) ? \
	 VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)

/*
 * This is the default if a program doesn't have a PT_GNU_STACK
 * program header entry. The PPC64 ELF ABI has a non executable stack
 * stack by default, so in the absense of a PT_GNU_STACK program header
 * we turn execute permission off.
 */
#define VM_STACK_DEFAULT_FLAGS32	(VM_READ | VM_WRITE | VM_EXEC | \
					 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)

#define VM_STACK_DEFAULT_FLAGS64	(VM_READ | VM_WRITE | \
					 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)

#define VM_STACK_DEFAULT_FLAGS \
	(test_thread_flag(TIF_32BIT) ? \
	 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)

#include <asm-generic/getorder.h>

#endif /* _ASM_POWERPC_PAGE_64_H */
Commit	Line	Data
5cd16ee9 ME	1	#ifndef _ASM_POWERPC_PAGE_64_H
	2	#define _ASM_POWERPC_PAGE_64_H
	3
	4	/*
	5	* Copyright (C) 2001 PPC64 Team, IBM Corp
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* as published by the Free Software Foundation; either version
	10	* 2 of the License, or (at your option) any later version.
	11	*/
	12
	13	/*
	14	* We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
	15	* specific, every notion of page number shared with the firmware, TCEs,
	16	* iommu, etc... still uses a page size of 4K.
	17	*/
	18	#define HW_PAGE_SHIFT 12
	19	#define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT)
	20	#define HW_PAGE_MASK (~(HW_PAGE_SIZE-1))
	21
	22	/*
	23	* PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
	24	* HW_PAGE_SHIFT, that is 4K pages.
	25	*/
	26	#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
	27
1189be65	28	/* Segment size; normal 256M segments */
5cd16ee9	29	#define SID_SHIFT 28
16a15a30	30	#define SID_MASK ASM_CONST(0xfffffffff)
5cd16ee9 ME	31	#define ESID_MASK 0xfffffffff0000000UL
	32	#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
	33
1189be65 PM	34	/* 1T segments */
	35	#define SID_SHIFT_1T 40
	36	#define SID_MASK_1T 0xffffffUL
	37	#define ESID_MASK_1T 0xffffff0000000000UL
	38	#define GET_ESID_1T(x) (((x) >> SID_SHIFT_1T) & SID_MASK_1T)
	39
5cd16ee9 ME	40	#ifndef __ASSEMBLY__
	41	#include <asm/cache.h>
	42
	43	typedef unsigned long pte_basic_t;
	44
	45	static __inline__ void clear_page(void *addr)
	46	{
	47	unsigned long lines, line_size;
	48
	49	line_size = ppc64_caches.dline_size;
	50	lines = ppc64_caches.dlines_per_page;
	51
	52	__asm__ __volatile__(
	53	"mtctr %1 # clear_page\n\
	54	1: dcbz 0,%0\n\
	55	add %0,%0,%3\n\
	56	bdnz+ 1b"
	57	: "=r" (addr)
	58	: "r" (lines), "0" (addr), "r" (line_size)
	59	: "ctr", "memory");
	60	}
	61
	62	extern void copy_4K_page(void to, void from);
	63
	64	#ifdef CONFIG_PPC_64K_PAGES
	65	static inline void copy_page(void to, void from)
	66	{
	67	unsigned int i;
	68	for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
	69	copy_4K_page(to, from);
	70	to += 4096;
	71	from += 4096;
	72	}
	73	}
	74	#else /* CONFIG_PPC_64K_PAGES */
	75	static inline void copy_page(void to, void from)
	76	{
	77	copy_4K_page(to, from);
	78	}
	79	#endif /* CONFIG_PPC_64K_PAGES */
	80
	81	/* Log 2 of page table size */
	82	extern u64 ppc64_pft_size;
	83
	84	/* Large pages size */
b50ce232	85	#ifdef CONFIG_HUGETLB_PAGE
5cd16ee9	86	extern unsigned int HPAGE_SHIFT;
b50ce232 AW	87	#else
	88	#define HPAGE_SHIFT PAGE_SHIFT
	89	#endif
5cd16ee9 ME	90	#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
	91	#define HPAGE_MASK (~(HPAGE_SIZE - 1))
	92	#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
d1837cba	93	#define HUGE_MAX_HSTATE (MMU_PAGE_COUNT-1)
5cd16ee9 ME	94
	95	#endif /* __ASSEMBLY__ */
	96
d0f13e3c	97	#ifdef CONFIG_PPC_MM_SLICES
5cd16ee9	98
d0f13e3c BH	99	#define SLICE_LOW_SHIFT 28
d0f13e3c BH	100	#define SLICE_HIGH_SHIFT 40
5cd16ee9	101
d0f13e3c BH	102	#define SLICE_LOW_TOP (0x100000000ul)
	103	#define SLICE_NUM_LOW (SLICE_LOW_TOP >> SLICE_LOW_SHIFT)
	104	#define SLICE_NUM_HIGH (PGTABLE_RANGE >> SLICE_HIGH_SHIFT)
5cd16ee9	105
d0f13e3c BH	106	#define GET_LOW_SLICE_INDEX(addr) ((addr) >> SLICE_LOW_SHIFT)
d0f13e3c BH	107	#define GET_HIGH_SLICE_INDEX(addr) ((addr) >> SLICE_HIGH_SHIFT)
5cd16ee9	108
d0f13e3c BH	109	#ifndef __ASSEMBLY__
	110
	111	struct slice_mask {
	112	u16 low_slices;
	113	u16 high_slices;
	114	};
	115
	116	struct mm_struct;
5cd16ee9	117
d0f13e3c BH	118	extern unsigned long slice_get_unmapped_area(unsigned long addr,
	119	unsigned long len,
	120	unsigned long flags,
	121	unsigned int psize,
	122	int topdown,
	123	int use_cache);
5cd16ee9	124
d0f13e3c BH	125	extern unsigned int get_slice_psize(struct mm_struct *mm,
d0f13e3c BH	126	unsigned long addr);
5cd16ee9	127
d0f13e3c BH	128	extern void slice_init_context(struct mm_struct *mm, unsigned int psize);
d0f13e3c BH	129	extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
3a8247cc PM	130	extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
	131	unsigned long len, unsigned int psize);
	132
e8ff0646	133	#define slice_mm_new_context(mm) ((mm)->context.id == 0)
d0f13e3c	134
d0f13e3c BH	135	#endif /* __ASSEMBLY__ */
	136	#else
	137	#define slice_init()
57e2a99f	138	#ifdef CONFIG_PPC_STD_MMU_64
3a8247cc	139	#define get_slice_psize(mm, addr) ((mm)->context.user_psize)
e8ff0646 SR	140	#define slice_set_user_psize(mm, psize) \
	141	do { \
	142	(mm)->context.user_psize = (psize); \
	143	(mm)->context.sllp = SLB_VSID_USER \| mmu_psize_defs[(psize)].sllp; \
	144	} while (0)
57e2a99f BH	145	#else /* CONFIG_PPC_STD_MMU_64 */
	146	#ifdef CONFIG_PPC_64K_PAGES
	147	#define get_slice_psize(mm, addr) MMU_PAGE_64K
	148	#else /* CONFIG_PPC_64K_PAGES */
	149	#define get_slice_psize(mm, addr) MMU_PAGE_4K
	150	#endif /* !CONFIG_PPC_64K_PAGES */
	151	#define slice_set_user_psize(mm, psize) do { BUG(); } while(0)
	152	#endif /* !CONFIG_PPC_STD_MMU_64 */
	153
3a8247cc PM	154	#define slice_set_range_psize(mm, start, len, psize) \
3a8247cc PM	155	slice_set_user_psize((mm), (psize))
e8ff0646	156	#define slice_mm_new_context(mm) 1
d0f13e3c BH	157	#endif /* CONFIG_PPC_MM_SLICES */
	158
	159	#ifdef CONFIG_HUGETLB_PAGE
	160
d0f13e3c	161	#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
5cd16ee9 ME	162
	163	#endif /* !CONFIG_HUGETLB_PAGE */
	164
5cd16ee9 ME	165	#define VM_DATA_DEFAULT_FLAGS \
	166	(test_thread_flag(TIF_32BIT) ? \
	167	VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
	168
	169	/*
	170	* This is the default if a program doesn't have a PT_GNU_STACK
	171	* program header entry. The PPC64 ELF ABI has a non executable stack
	172	* stack by default, so in the absense of a PT_GNU_STACK program header
	173	* we turn execute permission off.
	174	*/
	175	#define VM_STACK_DEFAULT_FLAGS32 (VM_READ \| VM_WRITE \| VM_EXEC \| \
	176	VM_MAYREAD \| VM_MAYWRITE \| VM_MAYEXEC)
	177
	178	#define VM_STACK_DEFAULT_FLAGS64 (VM_READ \| VM_WRITE \| \
	179	VM_MAYREAD \| VM_MAYWRITE \| VM_MAYEXEC)
	180
	181	#define VM_STACK_DEFAULT_FLAGS \
	182	(test_thread_flag(TIF_32BIT) ? \
	183	VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
	184
5b17e1cd	185	#include <asm-generic/getorder.h>
5cd16ee9 ME	186
5cd16ee9 ME	187	#endif /* _ASM_POWERPC_PAGE_64_H */