]> bbs.cooldavid.org Git - net-next-2.6.git/blame - arch/mips/nxp/pnx8550/common/platform.c
dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
[net-next-2.6.git] / arch / mips / nxp / pnx8550 / common / platform.c
CommitLineData
bdf21b18 1/*
a92b0588 2 * Platform device support for NXP PNX8550 SoCs
bdf21b18
PP
3 *
4 * Copyright 2005, Embedded Alley Solutions, Inc
5 *
6 * Based on arch/mips/au1000/common/platform.c
7 * Platform device support for Au1x00 SoCs.
8 *
9 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 */
15#include <linux/device.h>
4b62220b 16#include <linux/dma-mapping.h>
bdf21b18
PP
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/resource.h>
20#include <linux/serial.h>
7009af8c 21#include <linux/serial_pnx8xxx.h>
41d4f0e6 22#include <linux/platform_device.h>
bdf21b18
PP
23
24#include <int.h>
25#include <usb.h>
26#include <uart.h>
27
bdf21b18
PP
28static struct resource pnx8550_usb_ohci_resources[] = {
29 [0] = {
30 .start = PNX8550_USB_OHCI_OP_BASE,
31 .end = PNX8550_USB_OHCI_OP_BASE +
32 PNX8550_USB_OHCI_OP_LEN,
33 .flags = IORESOURCE_MEM,
34 },
35 [1] = {
36 .start = PNX8550_INT_USB,
37 .end = PNX8550_INT_USB,
38 .flags = IORESOURCE_IRQ,
39 },
40};
41
42static struct resource pnx8550_uart_resources[] = {
43 [0] = {
44 .start = PNX8550_UART_PORT0,
45 .end = PNX8550_UART_PORT0 + 0xfff,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = PNX8550_UART_INT(0),
50 .end = PNX8550_UART_INT(0),
51 .flags = IORESOURCE_IRQ,
52 },
53 [2] = {
54 .start = PNX8550_UART_PORT1,
55 .end = PNX8550_UART_PORT1 + 0xfff,
56 .flags = IORESOURCE_MEM,
57 },
58 [3] = {
59 .start = PNX8550_UART_INT(1),
60 .end = PNX8550_UART_INT(1),
61 .flags = IORESOURCE_IRQ,
62 },
63};
64
7009af8c 65struct pnx8xxx_port pnx8xxx_ports[] = {
bdf21b18
PP
66 [0] = {
67 .port = {
7009af8c 68 .type = PORT_PNX8XXX,
9b4a1617 69 .iotype = UPIO_MEM,
bdf21b18
PP
70 .membase = (void __iomem *)PNX8550_UART_PORT0,
71 .mapbase = PNX8550_UART_PORT0,
72 .irq = PNX8550_UART_INT(0),
73 .uartclk = 3692300,
74 .fifosize = 16,
59a675b2 75 .flags = UPF_BOOT_AUTOCONF,
bdf21b18
PP
76 .line = 0,
77 },
78 },
79 [1] = {
80 .port = {
7009af8c 81 .type = PORT_PNX8XXX,
9b4a1617 82 .iotype = UPIO_MEM,
bdf21b18
PP
83 .membase = (void __iomem *)PNX8550_UART_PORT1,
84 .mapbase = PNX8550_UART_PORT1,
85 .irq = PNX8550_UART_INT(1),
86 .uartclk = 3692300,
87 .fifosize = 16,
59a675b2 88 .flags = UPF_BOOT_AUTOCONF,
bdf21b18
PP
89 .line = 1,
90 },
91 },
92};
93
94/* The dmamask must be set for OHCI to work */
284901a9 95static u64 ohci_dmamask = DMA_BIT_MASK(32);
bdf21b18 96
284901a9 97static u64 uart_dmamask = DMA_BIT_MASK(32);
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PP
98
99static struct platform_device pnx8550_usb_ohci_device = {
100 .name = "pnx8550-ohci",
101 .id = -1,
102 .dev = {
103 .dma_mask = &ohci_dmamask,
284901a9 104 .coherent_dma_mask = DMA_BIT_MASK(32),
bdf21b18
PP
105 },
106 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
107 .resource = pnx8550_usb_ohci_resources,
108};
109
110static struct platform_device pnx8550_uart_device = {
7009af8c 111 .name = "pnx8xxx-uart",
bdf21b18
PP
112 .id = -1,
113 .dev = {
114 .dma_mask = &uart_dmamask,
284901a9 115 .coherent_dma_mask = DMA_BIT_MASK(32),
7009af8c 116 .platform_data = pnx8xxx_ports,
bdf21b18
PP
117 },
118 .num_resources = ARRAY_SIZE(pnx8550_uart_resources),
119 .resource = pnx8550_uart_resources,
120};
121
122static struct platform_device *pnx8550_platform_devices[] __initdata = {
123 &pnx8550_usb_ohci_device,
124 &pnx8550_uart_device,
125};
126
f2c4b47f 127static int __init pnx8550_platform_init(void)
bdf21b18
PP
128{
129 return platform_add_devices(pnx8550_platform_devices,
130 ARRAY_SIZE(pnx8550_platform_devices));
131}
132
133arch_initcall(pnx8550_platform_init);