]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1995 Linus Torvalds | |
7 | * Copyright (C) 1995 Waldorf Electronics | |
8 | * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 Ralf Baechle | |
9 | * Copyright (C) 1996 Stoned Elipot | |
10 | * Copyright (C) 1999 Silicon Graphics, Inc. | |
11 | * Copyright (C) 2000 2001, 2002 Maciej W. Rozycki | |
12 | */ | |
1da177e4 LT |
13 | #include <linux/init.h> |
14 | #include <linux/ioport.h> | |
1da177e4 | 15 | #include <linux/module.h> |
894673ee | 16 | #include <linux/screen_info.h> |
1da177e4 LT |
17 | #include <linux/bootmem.h> |
18 | #include <linux/initrd.h> | |
1da177e4 LT |
19 | #include <linux/root_dev.h> |
20 | #include <linux/highmem.h> | |
21 | #include <linux/console.h> | |
22a9835c | 22 | #include <linux/pfn.h> |
1da177e4 LT |
23 | |
24 | #include <asm/addrspace.h> | |
25 | #include <asm/bootinfo.h> | |
ec74e361 | 26 | #include <asm/cache.h> |
1da177e4 LT |
27 | #include <asm/cpu.h> |
28 | #include <asm/sections.h> | |
29 | #include <asm/setup.h> | |
30 | #include <asm/system.h> | |
31 | ||
ec74e361 | 32 | struct cpuinfo_mips cpu_data[NR_CPUS] __read_mostly; |
1da177e4 LT |
33 | |
34 | EXPORT_SYMBOL(cpu_data); | |
35 | ||
36 | #ifdef CONFIG_VT | |
37 | struct screen_info screen_info; | |
38 | #endif | |
39 | ||
40 | /* | |
41 | * Despite it's name this variable is even if we don't have PCI | |
42 | */ | |
43 | unsigned int PCI_DMA_BUS_IS_PHYS; | |
44 | ||
45 | EXPORT_SYMBOL(PCI_DMA_BUS_IS_PHYS); | |
46 | ||
47 | /* | |
48 | * Setup information | |
49 | * | |
50 | * These are initialized so they are in the .data section | |
51 | */ | |
ec74e361 RB |
52 | unsigned long mips_machtype __read_mostly = MACH_UNKNOWN; |
53 | unsigned long mips_machgroup __read_mostly = MACH_GROUP_UNKNOWN; | |
1da177e4 LT |
54 | |
55 | EXPORT_SYMBOL(mips_machtype); | |
56 | EXPORT_SYMBOL(mips_machgroup); | |
57 | ||
58 | struct boot_mem_map boot_mem_map; | |
59 | ||
60 | static char command_line[CL_SIZE]; | |
61 | char arcs_cmdline[CL_SIZE]=CONFIG_CMDLINE; | |
62 | ||
63 | /* | |
64 | * mips_io_port_base is the begin of the address space to which x86 style | |
65 | * I/O ports are mapped. | |
66 | */ | |
ec74e361 | 67 | const unsigned long mips_io_port_base __read_mostly = -1; |
1da177e4 LT |
68 | EXPORT_SYMBOL(mips_io_port_base); |
69 | ||
70 | /* | |
71 | * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped | |
72 | * for the processor. | |
73 | */ | |
74 | unsigned long isa_slot_offset; | |
75 | EXPORT_SYMBOL(isa_slot_offset); | |
76 | ||
77 | static struct resource code_resource = { .name = "Kernel code", }; | |
78 | static struct resource data_resource = { .name = "Kernel data", }; | |
79 | ||
80 | void __init add_memory_region(phys_t start, phys_t size, long type) | |
81 | { | |
82 | int x = boot_mem_map.nr_map; | |
83 | struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1; | |
84 | ||
b6f1f0de FBH |
85 | /* Sanity check */ |
86 | if (start + size < start) { | |
87 | printk("Trying to add an invalid memory region, skipped\n"); | |
88 | return; | |
89 | } | |
90 | ||
1da177e4 LT |
91 | /* |
92 | * Try to merge with previous entry if any. This is far less than | |
93 | * perfect but is sufficient for most real world cases. | |
94 | */ | |
95 | if (x && prev->addr + prev->size == start && prev->type == type) { | |
96 | prev->size += size; | |
97 | return; | |
98 | } | |
99 | ||
100 | if (x == BOOT_MEM_MAP_MAX) { | |
101 | printk("Ooops! Too many entries in the memory map!\n"); | |
102 | return; | |
103 | } | |
104 | ||
105 | boot_mem_map.map[x].addr = start; | |
106 | boot_mem_map.map[x].size = size; | |
107 | boot_mem_map.map[x].type = type; | |
108 | boot_mem_map.nr_map++; | |
109 | } | |
110 | ||
111 | static void __init print_memory_map(void) | |
112 | { | |
113 | int i; | |
114 | const int field = 2 * sizeof(unsigned long); | |
115 | ||
116 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
117 | printk(" memory: %0*Lx @ %0*Lx ", | |
118 | field, (unsigned long long) boot_mem_map.map[i].size, | |
119 | field, (unsigned long long) boot_mem_map.map[i].addr); | |
120 | ||
121 | switch (boot_mem_map.map[i].type) { | |
122 | case BOOT_MEM_RAM: | |
123 | printk("(usable)\n"); | |
124 | break; | |
125 | case BOOT_MEM_ROM_DATA: | |
126 | printk("(ROM data)\n"); | |
127 | break; | |
128 | case BOOT_MEM_RESERVED: | |
129 | printk("(reserved)\n"); | |
130 | break; | |
131 | default: | |
132 | printk("type %lu\n", boot_mem_map.map[i].type); | |
133 | break; | |
134 | } | |
135 | } | |
136 | } | |
137 | ||
8df32c63 | 138 | static void __init parse_cmdline_early(void) |
1da177e4 LT |
139 | { |
140 | char c = ' ', *to = command_line, *from = saved_command_line; | |
141 | unsigned long start_at, mem_size; | |
142 | int len = 0; | |
143 | int usermem = 0; | |
144 | ||
145 | printk("Determined physical RAM map:\n"); | |
146 | print_memory_map(); | |
147 | ||
148 | for (;;) { | |
149 | /* | |
150 | * "mem=XXX[kKmM]" defines a memory region from | |
151 | * 0 to <XXX>, overriding the determined size. | |
152 | * "mem=XXX[KkmM]@YYY[KkmM]" defines a memory region from | |
153 | * <YYY> to <YYY>+<XXX>, overriding the determined size. | |
154 | */ | |
155 | if (c == ' ' && !memcmp(from, "mem=", 4)) { | |
156 | if (to != command_line) | |
157 | to--; | |
158 | /* | |
159 | * If a user specifies memory size, we | |
160 | * blow away any automatically generated | |
161 | * size. | |
162 | */ | |
163 | if (usermem == 0) { | |
164 | boot_mem_map.nr_map = 0; | |
165 | usermem = 1; | |
166 | } | |
167 | mem_size = memparse(from + 4, &from); | |
168 | if (*from == '@') | |
169 | start_at = memparse(from + 1, &from); | |
170 | else | |
171 | start_at = 0; | |
172 | add_memory_region(start_at, mem_size, BOOT_MEM_RAM); | |
173 | } | |
174 | c = *(from++); | |
175 | if (!c) | |
176 | break; | |
177 | if (CL_SIZE <= ++len) | |
178 | break; | |
179 | *(to++) = c; | |
180 | } | |
181 | *to = '\0'; | |
182 | ||
183 | if (usermem) { | |
184 | printk("User-defined physical RAM map:\n"); | |
185 | print_memory_map(); | |
186 | } | |
187 | } | |
188 | ||
d2043ca8 FBH |
189 | /* |
190 | * Manage initrd | |
191 | */ | |
192 | #ifdef CONFIG_BLK_DEV_INITRD | |
193 | ||
194 | static int __init parse_rd_cmdline(unsigned long *rd_start, unsigned long *rd_end) | |
1da177e4 LT |
195 | { |
196 | /* | |
197 | * "rd_start=0xNNNNNNNN" defines the memory address of an initrd | |
198 | * "rd_size=0xNN" it's size | |
199 | */ | |
200 | unsigned long start = 0; | |
201 | unsigned long size = 0; | |
202 | unsigned long end; | |
203 | char cmd_line[CL_SIZE]; | |
204 | char *start_str; | |
205 | char *size_str; | |
206 | char *tmp; | |
207 | ||
208 | strcpy(cmd_line, command_line); | |
209 | *command_line = 0; | |
210 | tmp = cmd_line; | |
211 | /* Ignore "rd_start=" strings in other parameters. */ | |
212 | start_str = strstr(cmd_line, "rd_start="); | |
213 | if (start_str && start_str != cmd_line && *(start_str - 1) != ' ') | |
214 | start_str = strstr(start_str, " rd_start="); | |
215 | while (start_str) { | |
216 | if (start_str != cmd_line) | |
217 | strncat(command_line, tmp, start_str - tmp); | |
218 | start = memparse(start_str + 9, &start_str); | |
219 | tmp = start_str + 1; | |
220 | start_str = strstr(start_str, " rd_start="); | |
221 | } | |
222 | if (*tmp) | |
223 | strcat(command_line, tmp); | |
224 | ||
225 | strcpy(cmd_line, command_line); | |
226 | *command_line = 0; | |
227 | tmp = cmd_line; | |
228 | /* Ignore "rd_size" strings in other parameters. */ | |
229 | size_str = strstr(cmd_line, "rd_size="); | |
230 | if (size_str && size_str != cmd_line && *(size_str - 1) != ' ') | |
231 | size_str = strstr(size_str, " rd_size="); | |
232 | while (size_str) { | |
233 | if (size_str != cmd_line) | |
234 | strncat(command_line, tmp, size_str - tmp); | |
235 | size = memparse(size_str + 8, &size_str); | |
236 | tmp = size_str + 1; | |
237 | size_str = strstr(size_str, " rd_size="); | |
238 | } | |
239 | if (*tmp) | |
240 | strcat(command_line, tmp); | |
241 | ||
875d43e7 | 242 | #ifdef CONFIG_64BIT |
1da177e4 LT |
243 | /* HACK: Guess if the sign extension was forgotten */ |
244 | if (start > 0x0000000080000000 && start < 0x00000000ffffffff) | |
460c0422 | 245 | start |= 0xffffffff00000000UL; |
1da177e4 LT |
246 | #endif |
247 | ||
248 | end = start + size; | |
249 | if (start && end) { | |
250 | *rd_start = start; | |
251 | *rd_end = end; | |
252 | return 1; | |
253 | } | |
254 | return 0; | |
255 | } | |
256 | ||
d2043ca8 FBH |
257 | static unsigned long __init init_initrd(void) |
258 | { | |
259 | unsigned long tmp, end; | |
260 | u32 *initrd_header; | |
261 | ||
262 | ROOT_DEV = Root_RAM0; | |
263 | ||
264 | if (parse_rd_cmdline(&initrd_start, &initrd_end)) | |
265 | return initrd_end; | |
266 | /* | |
267 | * Board specific code should have set up initrd_start | |
268 | * and initrd_end... | |
269 | */ | |
270 | end = (unsigned long)&_end; | |
271 | tmp = PAGE_ALIGN(end) - sizeof(u32) * 2; | |
272 | if (tmp < end) | |
273 | tmp += PAGE_SIZE; | |
274 | ||
275 | initrd_header = (u32 *)tmp; | |
276 | if (initrd_header[0] == 0x494E5244) { | |
277 | initrd_start = (unsigned long)&initrd_header[2]; | |
278 | initrd_end = initrd_start + initrd_header[1]; | |
279 | } | |
280 | return initrd_end; | |
281 | } | |
282 | ||
283 | static void __init finalize_initrd(void) | |
284 | { | |
285 | unsigned long size = initrd_end - initrd_start; | |
286 | ||
287 | if (size == 0) { | |
288 | printk(KERN_INFO "Initrd not found or empty"); | |
289 | goto disable; | |
290 | } | |
291 | if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) { | |
292 | printk("Initrd extends beyond end of memory"); | |
293 | goto disable; | |
294 | } | |
295 | ||
296 | reserve_bootmem(CPHYSADDR(initrd_start), size); | |
297 | initrd_below_start_ok = 1; | |
298 | ||
299 | printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n", | |
300 | initrd_start, size); | |
301 | return; | |
302 | disable: | |
303 | printk(" - disabling initrd\n"); | |
304 | initrd_start = 0; | |
305 | initrd_end = 0; | |
306 | } | |
307 | ||
308 | #else /* !CONFIG_BLK_DEV_INITRD */ | |
309 | ||
310 | #define init_initrd() 0 | |
311 | #define finalize_initrd() do {} while (0) | |
312 | ||
313 | #endif | |
314 | ||
b6f1f0de FBH |
315 | /* |
316 | * Initialize the bootmem allocator. It also setup initrd related data | |
317 | * if needed. | |
318 | */ | |
d2043ca8 FBH |
319 | #ifdef CONFIG_SGI_IP27 |
320 | ||
b6f1f0de | 321 | static void __init bootmem_init(void) |
1da177e4 | 322 | { |
d2043ca8 FBH |
323 | init_initrd(); |
324 | finalize_initrd(); | |
325 | } | |
326 | ||
327 | #else /* !CONFIG_SGI_IP27 */ | |
328 | ||
329 | static void __init bootmem_init(void) | |
330 | { | |
331 | unsigned long reserved_end; | |
b6f1f0de FBH |
332 | unsigned long highest = 0; |
333 | unsigned long mapstart = -1UL; | |
1da177e4 LT |
334 | unsigned long bootmap_size; |
335 | int i; | |
1da177e4 LT |
336 | |
337 | /* | |
d2043ca8 FBH |
338 | * Init any data related to initrd. It's a nop if INITRD is |
339 | * not selected. Once that done we can determine the low bound | |
340 | * of usable memory. | |
1da177e4 | 341 | */ |
d2043ca8 FBH |
342 | reserved_end = init_initrd(); |
343 | reserved_end = PFN_UP(CPHYSADDR(max(reserved_end, (unsigned long)&_end))); | |
1da177e4 | 344 | |
b6f1f0de FBH |
345 | /* |
346 | * Find the highest page frame number we have available. | |
347 | */ | |
1da177e4 LT |
348 | for (i = 0; i < boot_mem_map.nr_map; i++) { |
349 | unsigned long start, end; | |
350 | ||
351 | if (boot_mem_map.map[i].type != BOOT_MEM_RAM) | |
352 | continue; | |
353 | ||
354 | start = PFN_UP(boot_mem_map.map[i].addr); | |
355 | end = PFN_DOWN(boot_mem_map.map[i].addr | |
b6f1f0de | 356 | + boot_mem_map.map[i].size); |
1da177e4 | 357 | |
b6f1f0de FBH |
358 | if (end > highest) |
359 | highest = end; | |
360 | if (end <= reserved_end) | |
1da177e4 | 361 | continue; |
b6f1f0de FBH |
362 | if (start >= mapstart) |
363 | continue; | |
364 | mapstart = max(reserved_end, start); | |
1da177e4 LT |
365 | } |
366 | ||
367 | /* | |
368 | * Determine low and high memory ranges | |
369 | */ | |
b6f1f0de FBH |
370 | if (highest > PFN_DOWN(HIGHMEM_START)) { |
371 | #ifdef CONFIG_HIGHMEM | |
372 | highstart_pfn = PFN_DOWN(HIGHMEM_START); | |
373 | highend_pfn = highest; | |
1da177e4 | 374 | #endif |
b6f1f0de | 375 | highest = PFN_DOWN(HIGHMEM_START); |
1da177e4 LT |
376 | } |
377 | ||
1da177e4 | 378 | /* |
b6f1f0de | 379 | * Initialize the boot-time allocator with low memory only. |
1da177e4 | 380 | */ |
b6f1f0de | 381 | bootmap_size = init_bootmem(mapstart, highest); |
1da177e4 LT |
382 | |
383 | /* | |
384 | * Register fully available low RAM pages with the bootmem allocator. | |
385 | */ | |
386 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
b6f1f0de | 387 | unsigned long start, end, size; |
1da177e4 LT |
388 | |
389 | /* | |
390 | * Reserve usable memory. | |
391 | */ | |
392 | if (boot_mem_map.map[i].type != BOOT_MEM_RAM) | |
393 | continue; | |
394 | ||
b6f1f0de FBH |
395 | start = PFN_UP(boot_mem_map.map[i].addr); |
396 | end = PFN_DOWN(boot_mem_map.map[i].addr | |
1da177e4 | 397 | + boot_mem_map.map[i].size); |
1da177e4 | 398 | /* |
b6f1f0de FBH |
399 | * We are rounding up the start address of usable memory |
400 | * and at the end of the usable range downwards. | |
1da177e4 | 401 | */ |
b6f1f0de | 402 | if (start >= max_low_pfn) |
1da177e4 | 403 | continue; |
b6f1f0de FBH |
404 | if (start < reserved_end) |
405 | start = reserved_end; | |
406 | if (end > max_low_pfn) | |
407 | end = max_low_pfn; | |
1da177e4 LT |
408 | |
409 | /* | |
b6f1f0de | 410 | * ... finally, is the area going away? |
1da177e4 | 411 | */ |
b6f1f0de | 412 | if (end <= start) |
1da177e4 | 413 | continue; |
b6f1f0de | 414 | size = end - start; |
1da177e4 LT |
415 | |
416 | /* Register lowmem ranges */ | |
b6f1f0de FBH |
417 | free_bootmem(PFN_PHYS(start), size << PAGE_SHIFT); |
418 | memory_present(0, start, end); | |
1da177e4 LT |
419 | } |
420 | ||
b6f1f0de FBH |
421 | /* |
422 | * Reserve the bootmap memory. | |
423 | */ | |
424 | reserve_bootmem(PFN_PHYS(mapstart), bootmap_size); | |
425 | ||
d2043ca8 FBH |
426 | /* |
427 | * Reserve initrd memory if needed. | |
428 | */ | |
429 | finalize_initrd(); | |
1da177e4 LT |
430 | } |
431 | ||
d2043ca8 FBH |
432 | #endif /* CONFIG_SGI_IP27 */ |
433 | ||
2925aba4 RB |
434 | /* |
435 | * arch_mem_init - initialize memory managment subsystem | |
436 | * | |
437 | * o plat_mem_setup() detects the memory configuration and will record detected | |
438 | * memory areas using add_memory_region. | |
439 | * o parse_cmdline_early() parses the command line for mem= options which, | |
440 | * iff detected, will override the results of the automatic detection. | |
441 | * | |
442 | * At this stage the memory configuration of the system is known to the | |
443 | * kernel but generic memory managment system is still entirely uninitialized. | |
444 | * | |
445 | * o bootmem_init() | |
446 | * o sparse_init() | |
447 | * o paging_init() | |
448 | * | |
449 | * At this stage the bootmem allocator is ready to use. | |
450 | * | |
451 | * NOTE: historically plat_mem_setup did the entire platform initialization. | |
452 | * This was rather impractical because it meant plat_mem_setup had to | |
453 | * get away without any kind of memory allocator. To keep old code from | |
454 | * breaking plat_setup was just renamed to plat_setup and a second platform | |
455 | * initialization hook for anything else was introduced. | |
456 | */ | |
457 | ||
458 | extern void plat_mem_setup(void); | |
459 | ||
460 | static void __init arch_mem_init(char **cmdline_p) | |
461 | { | |
462 | /* call board setup routine */ | |
463 | plat_mem_setup(); | |
464 | ||
465 | strlcpy(command_line, arcs_cmdline, sizeof(command_line)); | |
466 | strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE); | |
467 | ||
468 | *cmdline_p = command_line; | |
469 | ||
470 | parse_cmdline_early(); | |
471 | bootmem_init(); | |
472 | sparse_init(); | |
473 | paging_init(); | |
474 | } | |
475 | ||
8df32c63 | 476 | static void __init resource_init(void) |
1da177e4 LT |
477 | { |
478 | int i; | |
479 | ||
6adb5fe7 RB |
480 | if (UNCAC_BASE != IO_BASE) |
481 | return; | |
482 | ||
1da177e4 LT |
483 | code_resource.start = virt_to_phys(&_text); |
484 | code_resource.end = virt_to_phys(&_etext) - 1; | |
485 | data_resource.start = virt_to_phys(&_etext); | |
486 | data_resource.end = virt_to_phys(&_edata) - 1; | |
1da177e4 LT |
487 | |
488 | /* | |
489 | * Request address space for all standard RAM. | |
490 | */ | |
491 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
492 | struct resource *res; | |
493 | unsigned long start, end; | |
494 | ||
495 | start = boot_mem_map.map[i].addr; | |
496 | end = boot_mem_map.map[i].addr + boot_mem_map.map[i].size - 1; | |
1c6fd44d | 497 | if (start >= HIGHMEM_START) |
1da177e4 | 498 | continue; |
1c6fd44d FBH |
499 | if (end >= HIGHMEM_START) |
500 | end = HIGHMEM_START - 1; | |
1da177e4 LT |
501 | |
502 | res = alloc_bootmem(sizeof(struct resource)); | |
503 | switch (boot_mem_map.map[i].type) { | |
504 | case BOOT_MEM_RAM: | |
505 | case BOOT_MEM_ROM_DATA: | |
506 | res->name = "System RAM"; | |
507 | break; | |
508 | case BOOT_MEM_RESERVED: | |
509 | default: | |
510 | res->name = "reserved"; | |
511 | } | |
512 | ||
513 | res->start = start; | |
514 | res->end = end; | |
515 | ||
516 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; | |
517 | request_resource(&iomem_resource, res); | |
518 | ||
519 | /* | |
520 | * We don't know which RAM region contains kernel data, | |
521 | * so we try it repeatedly and let the resource manager | |
522 | * test it. | |
523 | */ | |
524 | request_resource(res, &code_resource); | |
525 | request_resource(res, &data_resource); | |
526 | } | |
527 | } | |
528 | ||
1da177e4 LT |
529 | void __init setup_arch(char **cmdline_p) |
530 | { | |
531 | cpu_probe(); | |
532 | prom_init(); | |
533 | cpu_report(); | |
534 | ||
535 | #if defined(CONFIG_VT) | |
536 | #if defined(CONFIG_VGA_CONSOLE) | |
537 | conswitchp = &vga_con; | |
538 | #elif defined(CONFIG_DUMMY_CONSOLE) | |
539 | conswitchp = &dummy_con; | |
540 | #endif | |
541 | #endif | |
542 | ||
2925aba4 | 543 | arch_mem_init(cmdline_p); |
1da177e4 | 544 | |
1da177e4 | 545 | resource_init(); |
9b6695a8 RB |
546 | #ifdef CONFIG_SMP |
547 | plat_smp_setup(); | |
548 | #endif | |
1da177e4 LT |
549 | } |
550 | ||
551 | int __init fpu_disable(char *s) | |
552 | { | |
f088fc84 RB |
553 | int i; |
554 | ||
555 | for (i = 0; i < NR_CPUS; i++) | |
556 | cpu_data[i].options &= ~MIPS_CPU_FPU; | |
1da177e4 LT |
557 | |
558 | return 1; | |
559 | } | |
560 | ||
561 | __setup("nofpu", fpu_disable); | |
e50c0a8f RB |
562 | |
563 | int __init dsp_disable(char *s) | |
564 | { | |
565 | cpu_data[0].ases &= ~MIPS_ASE_DSP; | |
566 | ||
567 | return 1; | |
568 | } | |
569 | ||
570 | __setup("nodsp", dsp_disable); |