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[MIPS] Reformat __xchg().
[net-next-2.6.git] / arch / mips / Makefile
CommitLineData
1da177e4
LT		 1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7# DECStation modifications by Paul M. Antoine, 1996
8# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
9#
10# This file is included by the global makefile so that you can add your own
11# architecture-specific flags and dependencies. Remember to do have actions
12# for "archclean" cleaning up for this architecture.
13#
14
15as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
16 -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
17 else echo "$(2)"; fi ;)
18
19cflags-y :=
20
21#
22# Select the object file format to substitute into the linker script.
23#
24ifdef CONFIG_CPU_LITTLE_ENDIAN
2532bit-tool-prefix = mipsel-linux-
2664bit-tool-prefix = mips64el-linux-
2732bit-bfd = elf32-tradlittlemips
2864bit-bfd = elf64-tradlittlemips
2932bit-emul = elf32ltsmip
3064bit-emul = elf64ltsmip
31else
3232bit-tool-prefix = mips-linux-
3364bit-tool-prefix = mips64-linux-
3432bit-bfd = elf32-tradbigmips
3564bit-bfd = elf64-tradbigmips
3632bit-emul = elf32btsmip
3764bit-emul = elf64btsmip
38endif
39
875d43e7 40ifdef CONFIG_32BIT
1da177e4
LT		 41gcc-abi = 32
42tool-prefix = $(32bit-tool-prefix)
43UTS_MACHINE := mips
44endif
875d43e7 45ifdef CONFIG_64BIT
1da177e4
LT		 46gcc-abi = 64
47tool-prefix = $(64bit-tool-prefix)
48UTS_MACHINE := mips64
49endif
50
51ifdef CONFIG_CROSSCOMPILE
52CROSS_COMPILE := $(tool-prefix)
53endif
54
fe00f943 55CHECKFLAGS-y += -D__linux__ -D__mips__ \
c315a2b5 56 -D_MIPS_SZINT=32 \
fe00f943
RB		 57 -D_ABIO32=1 \
58 -D_ABIN32=2 \
59 -D_ABI64=3
60CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \
61 -D_MIPS_SZLONG=32 \
c315a2b5 62 -D_MIPS_SZPTR=32 \
fe00f943
RB		 63 -D__PTRDIFF_TYPE__=int
64CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \
65 -D_MIPS_SZLONG=64 \
c315a2b5 66 -D_MIPS_SZPTR=64 \
fe00f943
RB		 67 -D__PTRDIFF_TYPE__="long int"
68CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__
69CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__
70
71CHECKFLAGS = $(CHECKFLAGS-y)
72
8145095c 73ifdef CONFIG_32BIT
1da177e4
LT		 74gas-abi = 32
75ld-emul = $(32bit-emul)
76vmlinux-32 = vmlinux
77vmlinux-64 = vmlinux.64
8145095c 78endif
1da177e4 79
8145095c
RB		 80ifdef CONFIG_64BIT
81gas-abi = 64
82ld-emul = $(64bit-emul)
83vmlinux-32 = vmlinux.32
84vmlinux-64 = vmlinux
85
86cflags-y += $(call cc-option,-mno-explicit-relocs)
1da177e4
LT		 87endif
88
89#
90# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
91# code since it only slows down the whole thing. At some point we might make
92# use of global pointer optimizations but their use of $28 conflicts with
93# the current pointer optimization.
94#
95# The DECStation requires an ECOFF kernel for remote booting, other MIPS
96# machines may also. Since BFD is incredibly buggy with respect to
97# crossformat linking we rely on the elf2ecoff tool for format conversion.
98#
1da177e4 99cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
6218cf44 100cflags-y += -msoft-float
9f83d839 101LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
1da177e4
LT		 102MODFLAGS += -mlong-calls
103
f425a6dc
TS		 104#
105# We explicitly add the endianness specifier if needed, this allows
106# to compile kernels with a toolchain for the other endianness. We
107# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
108# when fed the toolchain default!
109#
85f14bf2
TS		 110cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
111cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
f425a6dc 112
9007c9a2
RB		 113cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
114 -fno-omit-frame-pointer
1da177e4
LT		 115
116#
117# Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
118#
119# <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
120# recent tools)
121# <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
122# with up to the oldest supported tools)
123# <isa2> -- an ISA designation used as an ABI selector for
124# gcc versions that do not support "-mabi=32"
125# (depending on the CPU type, either "mips1" or
126# "mips2")
127#
128set_gccflags = $(shell \
129while :; do \
130 cpu=$(1); isa=-$(2); \
131 for gcc_opt in -march= -mcpu=; do \
132 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
133 -xc /dev/null > /dev/null 2>&1 && \
134 break 2; \
135 done; \
136 cpu=$(3); isa=-$(4); \
137 for gcc_opt in -march= -mcpu=; do \
138 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
139 -xc /dev/null > /dev/null 2>&1 && \
140 break 2; \
141 done; \
142 break; \
143done; \
144gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \
145if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \
146 gcc_isa=$$isa; \
147else \
148 gcc_abi=; gcc_isa=-$(5); \
149fi; \
150gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
151while :; do \
152 for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
153 $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
154 -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \
155 break 2; \
156 done; \
157 gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \
158 break; \
159done; \
160if test "$(gcc-abi)" != "$(gas-abi)"; then \
161 gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
162fi; \
163if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
164 $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
165 -xc /dev/null > /dev/null 2>&1 && \
166 gcc_isa=; \
167fi; \
168echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
169
170#
171# CPU-dependent compiler/assembler options for optimization.
172#
173cflags-$(CONFIG_CPU_R3000) += \
174 $(call set_gccflags,r3000,mips1,r3000,mips1,mips1)
c315a2b5 175CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
1da177e4
LT		 176
177cflags-$(CONFIG_CPU_TX39XX) += \
178 $(call set_gccflags,r3900,mips1,r3000,mips1,mips1)
c315a2b5 179CHECKFLAGS-$(CONFIG_CPU_TX39XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
1da177e4
LT		 180
181cflags-$(CONFIG_CPU_R6000) += \
182 $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \
183 -Wa,--trap
c315a2b5 184CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2
1da177e4
LT		 185
186cflags-$(CONFIG_CPU_R4300) += \
187 $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \
188 -Wa,--trap
c315a2b5 189CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
1da177e4
LT		 190
191cflags-$(CONFIG_CPU_VR41XX) += \
192 $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \
193 -Wa,--trap
c315a2b5 194CHECKFLAGS-$(CONFIG_CPU_VR41XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
1da177e4
LT		 195
196cflags-$(CONFIG_CPU_R4X00) += \
197 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
198 -Wa,--trap
c315a2b5 199CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
1da177e4
LT		 200
201cflags-$(CONFIG_CPU_TX49XX) += \
202 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
203 -Wa,--trap
c315a2b5 204CHECKFLAGS-$(CONFIG_CPU_TX49XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
1da177e4 205
6e760c8d 206cflags-$(CONFIG_CPU_MIPS32_R1) += \
1da177e4
LT		 207 $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
208 -Wa,--trap
c315a2b5 209CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
1da177e4 210
079ef8bb
RB		 211cflags-$(CONFIG_CPU_MIPS32_R2) += \
212 $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \
213 -Wa,--trap
c315a2b5 214CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
079ef8bb 215
6e760c8d 216cflags-$(CONFIG_CPU_MIPS64_R1) += \
1da177e4
LT		 217 $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
218 -Wa,--trap
c315a2b5 219CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
1da177e4 220
079ef8bb
RB		 221cflags-$(CONFIG_CPU_MIPS64_R2) += \
222 $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \
223 -Wa,--trap
c315a2b5 224CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
079ef8bb 225
1da177e4
LT		 226cflags-$(CONFIG_CPU_R5000) += \
227 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
42a3b4f2 228 -Wa,--trap
c315a2b5 229CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1da177e4
LT		 230
231cflags-$(CONFIG_CPU_R5432) += \
232 $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
233 -Wa,--trap
c315a2b5 234CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1da177e4
LT		 235
236cflags-$(CONFIG_CPU_NEVADA) += \
237 $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \
238 -Wa,--trap
c315a2b5 239CHECKFLAGS-$(CONFIG_CPU_NEVADA) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1da177e4
LT		 240
241cflags-$(CONFIG_CPU_RM7000) += \
242 $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \
243 -Wa,--trap
c315a2b5 244CHECKFLAGS-$(CONFIG_CPU_RM7000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1da177e4
LT		 245
246cflags-$(CONFIG_CPU_RM9000) += \
247 $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
248 -Wa,--trap
c315a2b5 249CHECKFLAGS-$(CONFIG_CPU_RM9000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1da177e4 250
bdf21b18 251
1da177e4
LT		 252cflags-$(CONFIG_CPU_SB1) += \
253 $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
254 -Wa,--trap
c315a2b5 255CHECKFLAGS-$(CONFIG_CPU_SB1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
1da177e4
LT		 256
257cflags-$(CONFIG_CPU_R8000) += \
258 $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \
259 -Wa,--trap
c315a2b5 260CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1da177e4
LT		 261
262cflags-$(CONFIG_CPU_R10000) += \
263 $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
264 -Wa,--trap
c315a2b5 265CHECKFLAGS-$(CONFIG_CPU_R10000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1da177e4
LT		 266
267ifdef CONFIG_CPU_SB1
268ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
269MODFLAGS += -msb1-pass1-workarounds
270endif
271endif
272
273#
274# Firmware support
275#
276libs-$(CONFIG_ARC) += arch/mips/arc/
277libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
278
279#
280# Board-dependent options and extra files
281#
282
283#
284# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
285#
286core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
287cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
288load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
289
290#
291# Common Alchemy Au1x00 stuff
292#
293core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
294cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
295
296#
297# AMD Alchemy Pb1000 eval board
298#
299libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
300cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
301load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
302
303#
304# AMD Alchemy Pb1100 eval board
305#
306libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
307cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
308load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
309
310#
311# AMD Alchemy Pb1500 eval board
312#
313libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
314cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
315load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
316
317#
318# AMD Alchemy Pb1550 eval board
319#
320libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
321cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
322load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
323
e3ad1c23
PP		 324#
325# AMD Alchemy Pb1200 eval board
326#
327libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
328cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
329load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
330
1da177e4
LT		 331#
332# AMD Alchemy Db1000 eval board
333#
334libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
335cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
336load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
337
338#
339# AMD Alchemy Db1100 eval board
340#
341libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
342cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
343load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
344
345#
346# AMD Alchemy Db1500 eval board
347#
348libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
349cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
350load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
351
352#
353# AMD Alchemy Db1550 eval board
354#
355libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
356cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
357load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
358
e3ad1c23
PP		 359#
360# AMD Alchemy Db1200 eval board
361#
362libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
363cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
364load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
365
1da177e4
LT		 366#
367# AMD Alchemy Bosporus eval board
368#
369libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
370cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
371load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
372
373#
374# AMD Alchemy Mirage eval board
375#
376libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
377cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
378load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
379
380#
381# 4G-Systems eval board
382#
383libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
384load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
385
386#
387# MyCable eval board
388#
389libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
390load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
391
392#
393# Cobalt Server
394#
395core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
11ed6d5b 396cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
1da177e4
LT		 397load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
398
399#
400# DECstation family
401#
402core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
403cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
404libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
405load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
406CLEAN_FILES += drivers/tc/lk201-map.c
407
408#
409# Galileo EV64120 Board
410#
411core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
412core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
413cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
414load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
415
416#
417# Galileo EV96100 Board
418#
419core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
420cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
421load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
422
423#
424# Globespan IVR eval board with QED 5231 CPU
425#
426core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
427core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
428load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
429
430#
431# ITE 8172 eval board with QED 5231 CPU
432#
433core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
434load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
435
436#
437# For all MIPS, Inc. eval boards
438#
439core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
440
441#
442# MIPS Atlas board
443#
444core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
445cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
446cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
447load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
448
449#
450# MIPS Malta board
451#
452core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
453cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
454load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
455
456#
457# MIPS SEAD board
458#
459core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
460load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
461
c78cbf49
RB		 462#
463# MIPS SIM
464#
465core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
466cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
467load-$(CONFIG_MIPS_SIM) += 0x80100000
468
1da177e4
LT		 469#
470# Momentum Ocelot board
471#
472# The Ocelot setup.o must be linked early - it does the ioremap() for the
473# mips_io_port_base.
474#
475core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
476 arch/mips/gt64120/momenco_ocelot/
477cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
478load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
479
480#
481# Momentum Ocelot-G board
482#
483# The Ocelot-G setup.o must be linked early - it does the ioremap() for the
484# mips_io_port_base.
485#
486core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
487load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
488
489#
490# Momentum Ocelot-C and -CS boards
491#
492# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
493# mips_io_port_base.
494core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
495load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
496
497#
498# PMC-Sierra Yosemite
499#
500core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
501cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
502load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
503
07119621
RB		 504# Qemu simulating MIPS32 4Kc
505#
506core-$(CONFIG_QEMU) += arch/mips/qemu/
507cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
508load-$(CONFIG_QEMU) += 0xffffffff80010000
509
1da177e4
LT		 510#
511# Momentum Ocelot-3
512#
513core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
514cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
515load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
516
517#
518# Momentum Jaguar ATX
519#
520core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
521cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
522#ifdef CONFIG_JAGUAR_DMALOW
523#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
524#else
525load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
526#endif
527
528#
529# NEC DDB
530#
531core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
532
533#
534# NEC DDB Vrc-5074
535#
536core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
537load-$(CONFIG_DDB5074) += 0xffffffff80080000
538
539#
540# NEC DDB Vrc-5476
541#
542core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
543load-$(CONFIG_DDB5476) += 0xffffffff80080000
544
545#
546# NEC DDB Vrc-5477
547#
548core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
549load-$(CONFIG_DDB5477) += 0xffffffff80100000
550
551core-$(CONFIG_LASAT) += arch/mips/lasat/
552cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
553load-$(CONFIG_LASAT) += 0xffffffff80000000
554
1da177e4
LT		 555#
556# Common VR41xx
557#
558core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
559cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
560
561#
562# NEC VR4133
563#
564core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
565load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
566
567#
568# ZAO Networks Capcella (VR4131)
569#
1da177e4
LT		 570load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
571
572#
573# Victor MP-C303/304 (VR4122)
574#
1da177e4
LT		 575load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
576
577#
578# IBM WorkPad z50 (VR4121)
579#
580core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
581load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
582
583#
584# CASIO CASSIPEIA E-55/65 (VR4111)
585#
586core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
587load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
588
589#
63b799f9 590# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
1da177e4 591#
63b799f9 592load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
1da177e4 593
bdf21b18
PP		 594#
595# Common Philips PNX8550
596#
597core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
598cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
599
600#
601# Philips PNX8550 JBS board
602#
603libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
604#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
605load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
606
1da177e4
LT		 607#
608# SGI IP22 (Indy/Indigo2)
609#
610# Set the load address to >= 0xffffffff88069000 if you want to leave space for
611# symmon, 0xffffffff80002000 for production kernels. Note that the value must
612# be aligned to a multiple of the kernel stack size or the handling of the
613# current variable will break so for 64-bit kernels we have to raise the start
614# address by 8kb.
615#
616core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
617cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
875d43e7 618ifdef CONFIG_32BIT
1da177e4
LT		 619load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
620endif
875d43e7 621ifdef CONFIG_64BIT
1da177e4
LT		 622load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
623endif
624
625#
626# SGI-IP27 (Origin200/2000)
627#
628# Set the load address to >= 0xc000000000300000 if you want to leave space for
629# symmon, 0xc00000000001c000 for production kernels. Note that the value must
630# be 16kb aligned or the handling of the current variable will break.
631#
632ifdef CONFIG_SGI_IP27
633core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
634cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
1da177e4
LT		 635ifdef CONFIG_MAPPED_KERNEL
636load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
637OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
638dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
639else
640load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
641OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
642endif
1da177e4
LT		 643endif
644
645#
646# SGI-IP32 (O2)
647#
648# Set the load address to >= 80069000 if you want to leave space for symmon,
649# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
650# a multiple of the kernel stack size or the handling of the current variable
651# will break.
652#
653core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
654cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
655load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
656
657#
658# Sibyte SB1250 SOC
659#
660# This is a LIB so that it links at the end, and initcalls are later
661# the sequence; but it is built as an object so that modules don't get
662# removed (as happens, even if they have __initcall/module_init)
663#
664core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
f137e463
AI		 665cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
666 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
1da177e4
LT		 667
668core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
f137e463
AI		 669cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
670 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
671
672core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
673cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
674 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
675
676core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
677cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
678 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
1da177e4
LT		 679
680#
681# Sibyte BCM91120x (Carmel) board
682# Sibyte BCM91120C (CRhine) board
683# Sibyte BCM91125C (CRhone) board
684# Sibyte BCM91125E (Rhone) board
685# Sibyte SWARM board
9a6dcea1 686# Sibyte BCM91x80 (BigSur) board
1da177e4
LT		 687#
688libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
689load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
690libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
691load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
692libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
693load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
694libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
695load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
696libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
697load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
698libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
699load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
9a6dcea1
AI		 700libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
701load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
1da177e4
LT		 702
703#
704# SNI RM200 PCI
705#
706core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
707cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
708load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
709
710#
711# Toshiba JMR-TX3927 board
712#
713core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
714 arch/mips/jmr3927/common/
5135b0cd 715cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
1da177e4
LT		 716load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
717
718#
719# Toshiba RBTX4927 board or
720# Toshiba RBTX4937 board
721#
722core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
723core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
724load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
725
23fbee9d
RB		 726#
727# Toshiba RBTX4938 board
728#
729core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
730core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
731load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
732
1da177e4
LT		 733cflags-y += -Iinclude/asm-mips/mach-generic
734drivers-$(CONFIG_PCI) += arch/mips/pci/
735
875d43e7 736ifdef CONFIG_32BIT
1da177e4
LT		 737ifdef CONFIG_CPU_LITTLE_ENDIAN
738JIFFIES = jiffies_64
739else
740JIFFIES = jiffies_64 + 4
741endif
742else
743JIFFIES = jiffies_64
744endif
745
746AFLAGS += $(cflags-y)
747CFLAGS += $(cflags-y)
748
749LDFLAGS += -m $(ld-emul)
750
751OBJCOPYFLAGS += --remove-section=.reginfo
752
753#
754# Choosing incompatible machines durings configuration will result in
755# error messages during linking. Select a default linkscript if
756# none has been choosen above.
757#
758
759CPPFLAGS_vmlinux.lds := \
760 $(CFLAGS) \
761 -D"LOADADDR=$(load-y)" \
762 -D"JIFFIES=$(JIFFIES)" \
763 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
764
765head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
766
767libs-y += arch/mips/lib/
875d43e7
RB		 768libs-$(CONFIG_32BIT) += arch/mips/lib-32/
769libs-$(CONFIG_64BIT) += arch/mips/lib-64/
1da177e4
LT		 770
771core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
772
773drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
774
775ifdef CONFIG_LASAT
776rom.bin rom.sw: vmlinux
7c6b155f 777 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
1da177e4
LT		 778endif
779
780#
781# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
782# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
783# convert to ECOFF using elf2ecoff.
784#
785vmlinux.32: vmlinux
786 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
787
788#
789# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
790# ELF files from 32-bit files by conversion.
791#
792vmlinux.64: vmlinux
793 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
794
795makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
796
797ifdef CONFIG_BOOT_ELF32
798all: $(vmlinux-32)
799endif
800
801ifdef CONFIG_BOOT_ELF64
802all: $(vmlinux-64)
803endif
804
149f60b3
RB		 805ifdef CONFIG_MIPS_ATLAS
806all: vmlinux.srec
807endif
808
809ifdef CONFIG_MIPS_MALTA
810all: vmlinux.srec
811endif
812
813ifdef CONFIG_MIPS_SEAD
814all: vmlinux.srec
815endif
816
154b500b
RB		 817ifdef CONFIG_QEMU
818all: vmlinux.bin
819endif
820
1da177e4
LT		 821ifdef CONFIG_SNI_RM200_PCI
822all: vmlinux.ecoff
823endif
824
154b500b
RB		 825vmlinux.bin: $(vmlinux-32)
826 +@$(call makeboot,$@)
827
1da177e4
LT		 828vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
829 +@$(call makeboot,$@)
830
831vmlinux.srec: $(vmlinux-32)
832 +@$(call makeboot,$@)
833
834CLEAN_FILES += vmlinux.ecoff \
835 vmlinux.srec \
836 vmlinux.rm200.tmp \
837 vmlinux.rm200
838
839archclean:
840 @$(MAKE) $(clean)=arch/mips/boot
841 @$(MAKE) $(clean)=arch/mips/lasat
842
048eb582 843CLEAN_FILES += vmlinux.32 \
1da177e4
LT		 844 vmlinux.64 \
845 vmlinux.ecoff
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