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m68knommu: platform setup for 527x ColdFire parts
[net-next-2.6.git] / arch / m68knommu / platform / 527x / config.c
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1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/527x/config.c
5 *
6 * Sub-architcture dependant initialization code for the Freescale
7 * 5270/5271 CPUs.
8 *
9 * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
1da177e4 15#include <linux/kernel.h>
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16#include <linux/param.h>
17#include <linux/init.h>
18#include <linux/interrupt.h>
e206da0b 19#include <linux/io.h>
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20#include <asm/machdep.h>
21#include <asm/coldfire.h>
22#include <asm/mcfsim.h>
e206da0b 23#include <asm/mcfuart.h>
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24
25/***************************************************************************/
26
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27void coldfire_reset(void);
28
29/***************************************************************************/
30
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31static struct mcf_platform_uart m527x_uart_platform[] = {
32 {
33 .mapbase = MCF_MBAR + MCFUART_BASE1,
34 .irq = MCFINT_VECBASE + MCFINT_UART0,
35 },
36 {
37 .mapbase = MCF_MBAR + MCFUART_BASE2,
38 .irq = MCFINT_VECBASE + MCFINT_UART1,
39 },
40 {
41 .mapbase = MCF_MBAR + MCFUART_BASE3,
42 .irq = MCFINT_VECBASE + MCFINT_UART2,
43 },
44 { },
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45};
46
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47static struct platform_device m527x_uart = {
48 .name = "mcfuart",
49 .id = 0,
50 .dev.platform_data = m527x_uart_platform,
51};
52
53static struct platform_device *m527x_devices[] __initdata = {
54 &m527x_uart,
55};
56
57/***************************************************************************/
58
59#define INTC0 (MCF_MBAR + MCFICM_INTC0)
60
61static void __init m527x_uart_init_line(int line, int irq)
62{
63 u16 sepmask;
64 u32 imr;
65
66 if ((line < 0) || (line > 2))
67 return;
68
69 /* level 6, line based priority */
70 writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
71
72 imr = readl(INTC0 + MCFINTC_IMRL);
73 imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
74 writel(imr, INTC0 + MCFINTC_IMRL);
75
76 /*
77 * External Pin Mask Setting & Enable External Pin for Interface
78 */
79 sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
80 if (line == 0)
81 sepmask |= UART0_ENABLE_MASK;
82 else if (line == 1)
83 sepmask |= UART1_ENABLE_MASK;
84 else if (line == 2)
85 sepmask |= UART2_ENABLE_MASK;
86 writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART);
87}
88
89static void __init m527x_uarts_init(void)
90{
91 const int nrlines = ARRAY_SIZE(m527x_uart_platform);
92 int line;
93
94 for (line = 0; (line < nrlines); line++)
95 m527x_uart_init_line(line, m527x_uart_platform[line].irq);
96}
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97
98/***************************************************************************/
99
100void mcf_disableall(void)
101{
102 *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
103 *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
104}
105
106/***************************************************************************/
107
108void mcf_autovector(unsigned int vec)
109{
110 /* Everything is auto-vectored on the 5272 */
111}
112
113/***************************************************************************/
114
e206da0b 115void __init config_BSP(char *commandp, int size)
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116{
117 mcf_disableall();
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118 mach_reset = coldfire_reset;
119}
120
121/***************************************************************************/
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122
123static int __init init_BSP(void)
124{
125 m527x_uarts_init();
126 platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
127 return 0;
128}
129
130arch_initcall(init_BSP);
131
132/***************************************************************************/