git://bbs.cooldavid.org / net-next-2.6.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /***************************************************************************/ |
| 2 | ||
| 3 | /* | |
| 4 | * linux/arch/m68knommu/platform/5206e/config.c | |
| 5 | * | |
| 6 | * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) | |
| 7 | */ | |
| 8 | ||
| 9 | /***************************************************************************/ | |
| 10 | ||
| 1da177e4 | 11 | #include <linux/kernel.h> |
| 1da177e4 | 12 | #include <linux/param.h> |
| cf64c233 | 13 | #include <linux/init.h> |
| cf64c233 | 14 | #include <linux/io.h> |
| 1da177e4 LT |
15 | #include <asm/machdep.h> |
| 16 | #include <asm/coldfire.h> | |
| 1da177e4 | 17 | #include <asm/mcfsim.h> |
| 24a1836e | 18 | #include <asm/mcfuart.h> |
| 1da177e4 | 19 | #include <asm/mcfdma.h> |
| 9333d826 | 20 | #include <asm/mcfuart.h> |
| 1da177e4 LT |
21 | |
| 22 | /***************************************************************************/ | |
| 23 | ||
| cf64c233 GU |
24 | static struct mcf_platform_uart m5206e_uart_platform[] = { |
| 25 | { | |
| 26 | .mapbase = MCF_MBAR + MCFUART_BASE1, | |
| 27 | .irq = 73, | |
| 28 | }, | |
| 29 | { | |
| 30 | .mapbase = MCF_MBAR + MCFUART_BASE2, | |
| 31 | .irq = 74, | |
| 32 | }, | |
| 33 | { }, | |
| 34 | }; | |
| 35 | ||
| 36 | static struct platform_device m5206e_uart = { | |
| 37 | .name = "mcfuart", | |
| 38 | .id = 0, | |
| 39 | .dev.platform_data = m5206e_uart_platform, | |
| 1da177e4 LT |
40 | }; |
| 41 | ||
| cf64c233 GU |
42 | static struct platform_device *m5206e_devices[] __initdata = { |
| 43 | &m5206e_uart, | |
| 44 | }; | |
| 45 | ||
| 46 | /***************************************************************************/ | |
| 47 | ||
| d259c329 | 48 | static void __init m5206e_uart_init_line(int line, int irq) |
| cf64c233 GU |
49 | { |
| 50 | if (line == 0) { | |
| 51 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); | |
| 52 | writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); | |
| f2154bef | 53 | mcf_clrimr(MCFINTC_UART0); |
| cf64c233 GU |
54 | } else if (line == 1) { |
| 55 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); | |
| 56 | writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); | |
| f2154bef | 57 | mcf_clrimr(MCFINTC_UART1); |
| cf64c233 GU |
58 | } |
| 59 | } | |
| 60 | ||
| 61 | static void __init m5206e_uarts_init(void) | |
| 62 | { | |
| 63 | const int nrlines = ARRAY_SIZE(m5206e_uart_platform); | |
| 64 | int line; | |
| 65 | ||
| 66 | for (line = 0; (line < nrlines); line++) | |
| 67 | m5206e_uart_init_line(line, m5206e_uart_platform[line].irq); | |
| 68 | } | |
| 1da177e4 LT |
69 | |
| 70 | /***************************************************************************/ | |
| 71 | ||
| 04b75b10 | 72 | static void __init m5206e_timers_init(void) |
| 1da177e4 | 73 | { |
| 04b75b10 GU |
74 | /* Timer1 is always used as system timer */ |
| 75 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, | |
| 76 | MCF_MBAR + MCFSIM_TIMER1ICR); | |
| 77 | ||
| 78 | #ifdef CONFIG_HIGHPROFILE | |
| 79 | /* Timer2 is to be used as a high speed profile timer */ | |
| 80 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, | |
| 81 | MCF_MBAR + MCFSIM_TIMER2ICR); | |
| 82 | #endif | |
| 1da177e4 LT |
83 | } |
| 84 | ||
| 85 | /***************************************************************************/ | |
| 86 | ||
| b61a7260 GU |
87 | void m5206e_cpu_reset(void) |
| 88 | { | |
| 89 | local_irq_disable(); | |
| 90 | /* Set watchdog to soft reset, and enabled */ | |
| 91 | __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); | |
| 92 | for (;;) | |
| 93 | /* wait for watchdog to timeout */; | |
| 94 | } | |
| 95 | ||
| 96 | /***************************************************************************/ | |
| 97 | ||
| cf64c233 | 98 | void __init config_BSP(char *commandp, int size) |
| 1da177e4 | 99 | { |
| bc72450a | 100 | #if defined(CONFIG_NETtel) |
| 1da177e4 LT |
101 | /* Copy command line from FLASH to local buffer... */ |
| 102 | memcpy(commandp, (char *) 0xf0004000, size); | |
| 103 | commandp[size-1] = 0; | |
| 1da177e4 LT |
104 | #endif /* CONFIG_NETtel */ |
| 105 | ||
| b61a7260 | 106 | mach_reset = m5206e_cpu_reset; |
| 04b75b10 | 107 | m5206e_timers_init(); |
| 1da177e4 LT |
108 | } |
| 109 | ||
| 110 | /***************************************************************************/ | |
| cf64c233 GU |
111 | |
| 112 | static int __init init_BSP(void) | |
| 113 | { | |
| 114 | m5206e_uarts_init(); | |
| 115 | platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices)); | |
| 116 | return 0; | |
| 117 | } | |
| 118 | ||
| 119 | arch_initcall(init_BSP); | |
| 120 | ||
| 121 | /***************************************************************************/ |