[net-next-2.6.git] / arch / m32r / platforms / mappi2 / setup.c

/*
 *  linux/arch/m32r/platforms/mappi2/setup.c
 *
 *  Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
 *
 *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
 *                           Hitoshi Yamamoto, Mamoru Sakugawa
 */

#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>

#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))

icu_data_t icu_data[NR_IRQS];

static void disable_mappi2_irq(unsigned int irq)
{
	unsigned long port, data;

	if ((irq == 0) ||(irq >= NR_IRQS))  {
		printk("bad irq 0x%08x\n", irq);
		return;
	}
	port = irq2port(irq);
	data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
	outl(data, port);
}

static void enable_mappi2_irq(unsigned int irq)
{
	unsigned long port, data;

	if ((irq == 0) ||(irq >= NR_IRQS))  {
		printk("bad irq 0x%08x\n", irq);
		return;
	}
	port = irq2port(irq);
	data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
	outl(data, port);
}

static void mask_and_ack_mappi2(unsigned int irq)
{
	disable_mappi2_irq(irq);
}

static void end_mappi2_irq(unsigned int irq)
{
	enable_mappi2_irq(irq);
}

static unsigned int startup_mappi2_irq(unsigned int irq)
{
	enable_mappi2_irq(irq);
	return (0);
}

static void shutdown_mappi2_irq(unsigned int irq)
{
	unsigned long port;

	port = irq2port(irq);
	outl(M32R_ICUCR_ILEVEL7, port);
}

static struct irq_chip mappi2_irq_type =
{
	.name = "MAPPI2-IRQ",
	.startup = startup_mappi2_irq,
	.shutdown = shutdown_mappi2_irq,
	.enable = enable_mappi2_irq,
	.disable = disable_mappi2_irq,
	.ack = mask_and_ack_mappi2,
	.end = end_mappi2_irq
};

void __init init_IRQ(void)
{
#if defined(CONFIG_SMC91X)
	/* INT0 : LAN controller (SMC91111) */
	irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
	irq_desc[M32R_IRQ_INT0].action = 0;
	irq_desc[M32R_IRQ_INT0].depth = 1;
	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
	disable_mappi2_irq(M32R_IRQ_INT0);
#endif  /* CONFIG_SMC91X */

	/* MFT2 : system timer */
	irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
	irq_desc[M32R_IRQ_MFT2].action = 0;
	irq_desc[M32R_IRQ_MFT2].depth = 1;
	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
	disable_mappi2_irq(M32R_IRQ_MFT2);

#ifdef CONFIG_SERIAL_M32R_SIO
	/* SIO0_R : uart receive data */
	irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
	irq_desc[M32R_IRQ_SIO0_R].action = 0;
	irq_desc[M32R_IRQ_SIO0_R].depth = 1;
	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
	disable_mappi2_irq(M32R_IRQ_SIO0_R);

	/* SIO0_S : uart send data */
	irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
	irq_desc[M32R_IRQ_SIO0_S].action = 0;
	irq_desc[M32R_IRQ_SIO0_S].depth = 1;
	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
	disable_mappi2_irq(M32R_IRQ_SIO0_S);
	/* SIO1_R : uart receive data */
	irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
	irq_desc[M32R_IRQ_SIO1_R].action = 0;
	irq_desc[M32R_IRQ_SIO1_R].depth = 1;
	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
	disable_mappi2_irq(M32R_IRQ_SIO1_R);

	/* SIO1_S : uart send data */
	irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
	irq_desc[M32R_IRQ_SIO1_S].action = 0;
	irq_desc[M32R_IRQ_SIO1_S].depth = 1;
	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
	disable_mappi2_irq(M32R_IRQ_SIO1_S);
#endif  /* CONFIG_M32R_USE_DBG_CONSOLE */

#if defined(CONFIG_USB)
	/* INT1 : USB Host controller interrupt */
	irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
	irq_desc[M32R_IRQ_INT1].action = 0;
	irq_desc[M32R_IRQ_INT1].depth = 1;
	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
	disable_mappi2_irq(M32R_IRQ_INT1);
#endif /* CONFIG_USB */

	/* ICUCR40: CFC IREQ */
	irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
	irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
	irq_desc[PLD_IRQ_CFIREQ].action = 0;
	irq_desc[PLD_IRQ_CFIREQ].depth = 1;	/* disable nested irq */
	icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
	disable_mappi2_irq(PLD_IRQ_CFIREQ);

#if defined(CONFIG_M32R_CFC)
	/* ICUCR41: CFC Insert */
	irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
	irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
	irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
	irq_desc[PLD_IRQ_CFC_INSERT].depth = 1;	/* disable nested irq */
	icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
	disable_mappi2_irq(PLD_IRQ_CFC_INSERT);

	/* ICUCR42: CFC Eject */
	irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
	irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
	irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
	irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;	/* disable nested irq */
	icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
	disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
#endif /* CONFIG_MAPPI2_CFC */
}

#define LAN_IOSTART     0x300
#define LAN_IOEND       0x320
static struct resource smc91x_resources[] = {
	[0] = {
		.start  = (LAN_IOSTART),
		.end    = (LAN_IOEND),
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = M32R_IRQ_INT0,
		.end    = M32R_IRQ_INT0,
		.flags  = IORESOURCE_IRQ,
	}
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.num_resources  = ARRAY_SIZE(smc91x_resources),
	.resource       = smc91x_resources,
};

static int __init platform_init(void)
{
	platform_device_register(&smc91x_device);
	return 0;
}
arch_initcall(platform_init);
Commit	Line	Data
1da177e4	1	/*
3264f976	2	* linux/arch/m32r/platforms/mappi2/setup.c
1da177e4 LT	3	*
	4	* Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
	5	*
316240f6 HT	6	* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
316240f6 HT	7	* Hitoshi Yamamoto, Mamoru Sakugawa
1da177e4 LT	8	*/
1da177e4 LT	9
1da177e4 LT	10	#include <linux/irq.h>
	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
d052d1be	13	#include <linux/platform_device.h>
1da177e4 LT	14
	15	#include <asm/system.h>
	16	#include <asm/m32r.h>
	17	#include <asm/io.h>
	18
	19	#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
	20
1da177e4 LT	21	icu_data_t icu_data[NR_IRQS];
	22
	23	static void disable_mappi2_irq(unsigned int irq)
	24	{
	25	unsigned long port, data;
	26
	27	if ((irq == 0) \|\|(irq >= NR_IRQS)) {
	28	printk("bad irq 0x%08x\n", irq);
	29	return;
	30	}
	31	port = irq2port(irq);
	32	data = icu_data[irq].icucr\|M32R_ICUCR_ILEVEL7;
	33	outl(data, port);
	34	}
	35
	36	static void enable_mappi2_irq(unsigned int irq)
	37	{
	38	unsigned long port, data;
	39
	40	if ((irq == 0) \|\|(irq >= NR_IRQS)) {
	41	printk("bad irq 0x%08x\n", irq);
	42	return;
	43	}
	44	port = irq2port(irq);
	45	data = icu_data[irq].icucr\|M32R_ICUCR_IEN\|M32R_ICUCR_ILEVEL6;
	46	outl(data, port);
	47	}
	48
	49	static void mask_and_ack_mappi2(unsigned int irq)
	50	{
	51	disable_mappi2_irq(irq);
	52	}
	53
	54	static void end_mappi2_irq(unsigned int irq)
	55	{
	56	enable_mappi2_irq(irq);
	57	}
	58
	59	static unsigned int startup_mappi2_irq(unsigned int irq)
	60	{
	61	enable_mappi2_irq(irq);
	62	return (0);
	63	}
	64
	65	static void shutdown_mappi2_irq(unsigned int irq)
	66	{
	67	unsigned long port;
	68
	69	port = irq2port(irq);
	70	outl(M32R_ICUCR_ILEVEL7, port);
	71	}
	72
189e91f5	73	static struct irq_chip mappi2_irq_type =
1da177e4	74	{
d1ea13c6	75	.name = "MAPPI2-IRQ",
6f973b00 HT	76	.startup = startup_mappi2_irq,
	77	.shutdown = shutdown_mappi2_irq,
	78	.enable = enable_mappi2_irq,
	79	.disable = disable_mappi2_irq,
	80	.ack = mask_and_ack_mappi2,
	81	.end = end_mappi2_irq
1da177e4 LT	82	};
	83
	84	void __init init_IRQ(void)
	85	{
	86	#if defined(CONFIG_SMC91X)
	87	/* INT0 : LAN controller (SMC91111) */
	88	irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
d1bef4ed	89	irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
1da177e4 LT	90	irq_desc[M32R_IRQ_INT0].action = 0;
	91	irq_desc[M32R_IRQ_INT0].depth = 1;
	92	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN\|M32R_ICUCR_ISMOD10;
	93	disable_mappi2_irq(M32R_IRQ_INT0);
	94	#endif /* CONFIG_SMC91X */
	95
	96	/* MFT2 : system timer */
	97	irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
d1bef4ed	98	irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
1da177e4 LT	99	irq_desc[M32R_IRQ_MFT2].action = 0;
	100	irq_desc[M32R_IRQ_MFT2].depth = 1;
	101	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
	102	disable_mappi2_irq(M32R_IRQ_MFT2);
	103
	104	#ifdef CONFIG_SERIAL_M32R_SIO
	105	/* SIO0_R : uart receive data */
	106	irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
d1bef4ed	107	irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
1da177e4 LT	108	irq_desc[M32R_IRQ_SIO0_R].action = 0;
	109	irq_desc[M32R_IRQ_SIO0_R].depth = 1;
	110	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
	111	disable_mappi2_irq(M32R_IRQ_SIO0_R);
	112
	113	/* SIO0_S : uart send data */
	114	irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
d1bef4ed	115	irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
1da177e4 LT	116	irq_desc[M32R_IRQ_SIO0_S].action = 0;
	117	irq_desc[M32R_IRQ_SIO0_S].depth = 1;
	118	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
	119	disable_mappi2_irq(M32R_IRQ_SIO0_S);
	120	/* SIO1_R : uart receive data */
	121	irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
d1bef4ed	122	irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
1da177e4 LT	123	irq_desc[M32R_IRQ_SIO1_R].action = 0;
	124	irq_desc[M32R_IRQ_SIO1_R].depth = 1;
	125	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
	126	disable_mappi2_irq(M32R_IRQ_SIO1_R);
	127
	128	/* SIO1_S : uart send data */
	129	irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
d1bef4ed	130	irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
1da177e4 LT	131	irq_desc[M32R_IRQ_SIO1_S].action = 0;
	132	irq_desc[M32R_IRQ_SIO1_S].depth = 1;
	133	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
	134	disable_mappi2_irq(M32R_IRQ_SIO1_S);
	135	#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
	136
	137	#if defined(CONFIG_USB)
	138	/* INT1 : USB Host controller interrupt */
	139	irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
d1bef4ed	140	irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
1da177e4 LT	141	irq_desc[M32R_IRQ_INT1].action = 0;
	142	irq_desc[M32R_IRQ_INT1].depth = 1;
	143	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
	144	disable_mappi2_irq(M32R_IRQ_INT1);
	145	#endif /* CONFIG_USB */
	146
	147	/* ICUCR40: CFC IREQ */
	148	irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
d1bef4ed	149	irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
1da177e4 LT	150	irq_desc[PLD_IRQ_CFIREQ].action = 0;
1da177e4 LT	151	irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
1da177e4 LT	152	icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN\|M32R_ICUCR_ISMOD01;
	153	disable_mappi2_irq(PLD_IRQ_CFIREQ);
	154
	155	#if defined(CONFIG_M32R_CFC)
	156	/* ICUCR41: CFC Insert */
	157	irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
d1bef4ed	158	irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
1da177e4 LT	159	irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
	160	irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
	161	icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN\|M32R_ICUCR_ISMOD00;
1da177e4 LT	162	disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
	163
	164	/* ICUCR42: CFC Eject */
	165	irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
d1bef4ed	166	irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
1da177e4 LT	167	irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
	168	irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
	169	icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN\|M32R_ICUCR_ISMOD10;
1da177e4	170	disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
1da177e4 LT	171	#endif /* CONFIG_MAPPI2_CFC */
	172	}
	173
	174	#define LAN_IOSTART 0x300
	175	#define LAN_IOEND 0x320
	176	static struct resource smc91x_resources[] = {
	177	[0] = {
	178	.start = (LAN_IOSTART),
	179	.end = (LAN_IOEND),
	180	.flags = IORESOURCE_MEM,
	181	},
	182	[1] = {
	183	.start = M32R_IRQ_INT0,
	184	.end = M32R_IRQ_INT0,
	185	.flags = IORESOURCE_IRQ,
	186	}
	187	};
	188
	189	static struct platform_device smc91x_device = {
	190	.name = "smc91x",
	191	.id = 0,
	192	.num_resources = ARRAY_SIZE(smc91x_resources),
	193	.resource = smc91x_resources,
	194	};
	195
	196	static int __init platform_init(void)
	197	{
	198	platform_device_register(&smc91x_device);
	199	return 0;
	200	}
	201	arch_initcall(platform_init);