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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
2e34f07f | 6 | * Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All rights reserved. |
1da177e4 LT |
7 | */ |
8 | ||
9 | #include <linux/config.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/kdev_t.h> | |
15 | #include <linux/string.h> | |
16 | #include <linux/tty.h> | |
17 | #include <linux/console.h> | |
18 | #include <linux/timex.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/ioport.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/serial.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/bootmem.h> | |
25 | #include <linux/mmzone.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/acpi.h> | |
28 | #include <linux/compiler.h> | |
29 | #include <linux/sched.h> | |
30 | #include <linux/root_dev.h> | |
31 | #include <linux/nodemask.h> | |
c1298c5c | 32 | #include <linux/pm.h> |
ff51224c | 33 | #include <linux/efi.h> |
1da177e4 LT |
34 | |
35 | #include <asm/io.h> | |
36 | #include <asm/sal.h> | |
37 | #include <asm/machvec.h> | |
38 | #include <asm/system.h> | |
39 | #include <asm/processor.h> | |
a9f9de73 | 40 | #include <asm/vga.h> |
1da177e4 LT |
41 | #include <asm/sn/arch.h> |
42 | #include <asm/sn/addrs.h> | |
43 | #include <asm/sn/pda.h> | |
44 | #include <asm/sn/nodepda.h> | |
45 | #include <asm/sn/sn_cpuid.h> | |
46 | #include <asm/sn/simulator.h> | |
47 | #include <asm/sn/leds.h> | |
48 | #include <asm/sn/bte.h> | |
49 | #include <asm/sn/shub_mmr.h> | |
50 | #include <asm/sn/clksupport.h> | |
51 | #include <asm/sn/sn_sal.h> | |
52 | #include <asm/sn/geo.h> | |
a1cddb88 | 53 | #include <asm/sn/sn_feature_sets.h> |
1da177e4 LT |
54 | #include "xtalk/xwidgetdev.h" |
55 | #include "xtalk/hubdev.h" | |
56 | #include <asm/sn/klconfig.h> | |
57 | ||
58 | ||
59 | DEFINE_PER_CPU(struct pda_s, pda_percpu); | |
60 | ||
9b17e7e7 | 61 | #define MAX_PHYS_MEMORY (1UL << IA64_MAX_PHYS_BITS) /* Max physical address supported */ |
1da177e4 | 62 | |
1da177e4 LT |
63 | extern void bte_init_node(nodepda_t *, cnodeid_t); |
64 | ||
65 | extern void sn_timer_init(void); | |
66 | extern unsigned long last_time_offset; | |
67 | extern void (*ia64_mark_idle) (int); | |
68 | extern void snidle(int); | |
69 | extern unsigned char acpi_kbd_controller_present; | |
70 | ||
71 | unsigned long sn_rtc_cycles_per_second; | |
72 | EXPORT_SYMBOL(sn_rtc_cycles_per_second); | |
73 | ||
74 | DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info); | |
75 | EXPORT_PER_CPU_SYMBOL(__sn_hub_info); | |
76 | ||
2e34f07f DN |
77 | DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]); |
78 | EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid); | |
79 | ||
9b48b466 DN |
80 | DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda); |
81 | EXPORT_PER_CPU_SYMBOL(__sn_nodepda); | |
82 | ||
1da177e4 LT |
83 | char sn_system_serial_number_string[128]; |
84 | EXPORT_SYMBOL(sn_system_serial_number_string); | |
85 | u64 sn_partition_serial_number; | |
86 | EXPORT_SYMBOL(sn_partition_serial_number); | |
87 | u8 sn_partition_id; | |
88 | EXPORT_SYMBOL(sn_partition_id); | |
89 | u8 sn_system_size; | |
90 | EXPORT_SYMBOL(sn_system_size); | |
91 | u8 sn_sharing_domain_size; | |
92 | EXPORT_SYMBOL(sn_sharing_domain_size); | |
93 | u8 sn_coherency_id; | |
94 | EXPORT_SYMBOL(sn_coherency_id); | |
95 | u8 sn_region_size; | |
96 | EXPORT_SYMBOL(sn_region_size); | |
71a5d027 | 97 | int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */ |
1da177e4 | 98 | |
24ee0a6d | 99 | short physical_node_map[MAX_NUMALINK_NODES]; |
a1cddb88 | 100 | static unsigned long sn_prom_features[MAX_PROM_FEATURE_SETS]; |
1da177e4 LT |
101 | |
102 | EXPORT_SYMBOL(physical_node_map); | |
103 | ||
24ee0a6d | 104 | int num_cnodes; |
1da177e4 LT |
105 | |
106 | static void sn_init_pdas(char **); | |
24ee0a6d | 107 | static void build_cnode_tables(void); |
1da177e4 LT |
108 | |
109 | static nodepda_t *nodepdaindr[MAX_COMPACT_NODES]; | |
110 | ||
111 | /* | |
112 | * The format of "screen_info" is strange, and due to early i386-setup | |
113 | * code. This is just enough to make the console code think we're on a | |
114 | * VGA color display. | |
115 | */ | |
116 | struct screen_info sn_screen_info = { | |
117 | .orig_x = 0, | |
118 | .orig_y = 0, | |
119 | .orig_video_mode = 3, | |
120 | .orig_video_cols = 80, | |
121 | .orig_video_ega_bx = 3, | |
122 | .orig_video_lines = 25, | |
123 | .orig_video_isVGA = 1, | |
124 | .orig_video_points = 16 | |
125 | }; | |
126 | ||
127 | /* | |
128 | * This is here so we can use the CMOS detection in ide-probe.c to | |
129 | * determine what drives are present. In theory, we don't need this | |
130 | * as the auto-detection could be done via ide-probe.c:do_probe() but | |
131 | * in practice that would be much slower, which is painful when | |
132 | * running in the simulator. Note that passing zeroes in DRIVE_INFO | |
133 | * is sufficient (the IDE driver will autodetect the drive geometry). | |
134 | */ | |
135 | #ifdef CONFIG_IA64_GENERIC | |
136 | extern char drive_info[4 * 16]; | |
137 | #else | |
138 | char drive_info[4 * 16]; | |
139 | #endif | |
140 | ||
1da177e4 LT |
141 | /* |
142 | * This routine can only be used during init, since | |
143 | * smp_boot_data is an init data structure. | |
144 | * We have to use smp_boot_data.cpu_phys_id to find | |
145 | * the physical id of the processor because the normal | |
146 | * cpu_physical_id() relies on data structures that | |
147 | * may not be initialized yet. | |
148 | */ | |
149 | ||
150 | static int __init pxm_to_nasid(int pxm) | |
151 | { | |
152 | int i; | |
153 | int nid; | |
154 | ||
155 | nid = pxm_to_nid_map[pxm]; | |
156 | for (i = 0; i < num_node_memblks; i++) { | |
157 | if (node_memblk[i].nid == nid) { | |
158 | return NASID_GET(node_memblk[i].start_paddr); | |
159 | } | |
160 | } | |
161 | return -1; | |
162 | } | |
163 | ||
164 | /** | |
165 | * early_sn_setup - early setup routine for SN platforms | |
166 | * | |
167 | * Sets up an initial console to aid debugging. Intended primarily | |
168 | * for bringup. See start_kernel() in init/main.c. | |
169 | */ | |
170 | ||
171 | void __init early_sn_setup(void) | |
172 | { | |
173 | efi_system_table_t *efi_systab; | |
174 | efi_config_table_t *config_tables; | |
175 | struct ia64_sal_systab *sal_systab; | |
176 | struct ia64_sal_desc_entry_point *ep; | |
177 | char *p; | |
178 | int i, j; | |
179 | ||
180 | /* | |
181 | * Parse enough of the SAL tables to locate the SAL entry point. Since, console | |
182 | * IO on SN2 is done via SAL calls, early_printk won't work without this. | |
183 | * | |
184 | * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c. | |
185 | * Any changes to those file may have to be made hereas well. | |
186 | */ | |
187 | efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab); | |
188 | config_tables = __va(efi_systab->tables); | |
189 | for (i = 0; i < efi_systab->nr_tables; i++) { | |
190 | if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) == | |
191 | 0) { | |
192 | sal_systab = __va(config_tables[i].table); | |
193 | p = (char *)(sal_systab + 1); | |
194 | for (j = 0; j < sal_systab->entry_count; j++) { | |
195 | if (*p == SAL_DESC_ENTRY_POINT) { | |
196 | ep = (struct ia64_sal_desc_entry_point | |
197 | *)p; | |
198 | ia64_sal_handler_init(__va | |
199 | (ep->sal_proc), | |
200 | __va(ep->gp)); | |
201 | return; | |
202 | } | |
203 | p += SAL_DESC_SIZE(*p); | |
204 | } | |
205 | } | |
206 | } | |
207 | /* Uh-oh, SAL not available?? */ | |
208 | printk(KERN_ERR "failed to find SAL entry point\n"); | |
209 | } | |
210 | ||
211 | extern int platform_intr_list[]; | |
2fcc3db0 | 212 | static int __initdata shub_1_1_found; |
1da177e4 LT |
213 | |
214 | /* | |
215 | * sn_check_for_wars | |
216 | * | |
217 | * Set flag for enabling shub specific wars | |
218 | */ | |
219 | ||
220 | static inline int __init is_shub_1_1(int nasid) | |
221 | { | |
222 | unsigned long id; | |
223 | int rev; | |
224 | ||
225 | if (is_shub2()) | |
226 | return 0; | |
227 | id = REMOTE_HUB_L(nasid, SH1_SHUB_ID); | |
228 | rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT; | |
229 | return rev <= 2; | |
230 | } | |
231 | ||
232 | static void __init sn_check_for_wars(void) | |
233 | { | |
234 | int cnode; | |
235 | ||
236 | if (is_shub2()) { | |
237 | /* none yet */ | |
238 | } else { | |
239 | for_each_online_node(cnode) { | |
240 | if (is_shub_1_1(cnodeid_to_nasid(cnode))) | |
ff89bf3b | 241 | shub_1_1_found = 1; |
1da177e4 LT |
242 | } |
243 | } | |
244 | } | |
245 | ||
ff51224c MM |
246 | /* |
247 | * Scan the EFI PCDP table (if it exists) for an acceptable VGA console | |
248 | * output device. If one exists, pick it and set sn_legacy_{io,mem} to | |
249 | * reflect the bus offsets needed to address it. | |
250 | * | |
251 | * Since pcdp support in SN is not supported in the 2.4 kernel (or at least | |
252 | * the one lbs is based on) just declare the needed structs here. | |
253 | * | |
254 | * Reference spec http://www.dig64.org/specifications/DIG64_PCDPv20.pdf | |
255 | * | |
256 | * Returns 0 if no acceptable vga is found, !0 otherwise. | |
257 | * | |
258 | * Note: This stuff is duped here because Altix requires the PCDP to | |
259 | * locate a usable VGA device due to lack of proper ACPI support. Structures | |
260 | * could be used from drivers/firmware/pcdp.h, but it was decided that moving | |
261 | * this file to a more public location just for Altix use was undesireable. | |
262 | */ | |
263 | ||
264 | struct hcdp_uart_desc { | |
265 | u8 pad[45]; | |
266 | }; | |
267 | ||
268 | struct pcdp { | |
269 | u8 signature[4]; /* should be 'HCDP' */ | |
270 | u32 length; | |
271 | u8 rev; /* should be >=3 for pcdp, <3 for hcdp */ | |
272 | u8 sum; | |
273 | u8 oem_id[6]; | |
274 | u64 oem_tableid; | |
275 | u32 oem_rev; | |
276 | u32 creator_id; | |
277 | u32 creator_rev; | |
278 | u32 num_type0; | |
279 | struct hcdp_uart_desc uart[0]; /* num_type0 of these */ | |
280 | /* pcdp descriptors follow */ | |
281 | } __attribute__((packed)); | |
282 | ||
283 | struct pcdp_device_desc { | |
284 | u8 type; | |
285 | u8 primary; | |
286 | u16 length; | |
287 | u16 index; | |
288 | /* interconnect specific structure follows */ | |
289 | /* device specific structure follows that */ | |
290 | } __attribute__((packed)); | |
291 | ||
292 | struct pcdp_interface_pci { | |
293 | u8 type; /* 1 == pci */ | |
294 | u8 reserved; | |
295 | u16 length; | |
296 | u8 segment; | |
297 | u8 bus; | |
298 | u8 dev; | |
299 | u8 fun; | |
300 | u16 devid; | |
301 | u16 vendid; | |
302 | u32 acpi_interrupt; | |
303 | u64 mmio_tra; | |
304 | u64 ioport_tra; | |
305 | u8 flags; | |
306 | u8 translation; | |
307 | } __attribute__((packed)); | |
308 | ||
309 | struct pcdp_vga_device { | |
310 | u8 num_eas_desc; | |
311 | /* ACPI Extended Address Space Desc follows */ | |
312 | } __attribute__((packed)); | |
313 | ||
314 | /* from pcdp_device_desc.primary */ | |
315 | #define PCDP_PRIMARY_CONSOLE 0x01 | |
316 | ||
317 | /* from pcdp_device_desc.type */ | |
318 | #define PCDP_CONSOLE_INOUT 0x0 | |
319 | #define PCDP_CONSOLE_DEBUG 0x1 | |
320 | #define PCDP_CONSOLE_OUT 0x2 | |
321 | #define PCDP_CONSOLE_IN 0x3 | |
322 | #define PCDP_CONSOLE_TYPE_VGA 0x8 | |
323 | ||
324 | #define PCDP_CONSOLE_VGA (PCDP_CONSOLE_TYPE_VGA | PCDP_CONSOLE_OUT) | |
325 | ||
326 | /* from pcdp_interface_pci.type */ | |
327 | #define PCDP_IF_PCI 1 | |
328 | ||
329 | /* from pcdp_interface_pci.translation */ | |
330 | #define PCDP_PCI_TRANS_IOPORT 0x02 | |
331 | #define PCDP_PCI_TRANS_MMIO 0x01 | |
332 | ||
333 | static void | |
334 | sn_scan_pcdp(void) | |
335 | { | |
336 | u8 *bp; | |
337 | struct pcdp *pcdp; | |
338 | struct pcdp_device_desc device; | |
339 | struct pcdp_interface_pci if_pci; | |
340 | extern struct efi efi; | |
341 | ||
342 | pcdp = efi.hcdp; | |
343 | if (! pcdp) | |
344 | return; /* no hcdp/pcdp table */ | |
345 | ||
346 | if (pcdp->rev < 3) | |
347 | return; /* only support PCDP (rev >= 3) */ | |
348 | ||
349 | for (bp = (u8 *)&pcdp->uart[pcdp->num_type0]; | |
350 | bp < (u8 *)pcdp + pcdp->length; | |
351 | bp += device.length) { | |
352 | memcpy(&device, bp, sizeof(device)); | |
353 | if (! (device.primary & PCDP_PRIMARY_CONSOLE)) | |
354 | continue; /* not primary console */ | |
355 | ||
356 | if (device.type != PCDP_CONSOLE_VGA) | |
357 | continue; /* not VGA descriptor */ | |
358 | ||
359 | memcpy(&if_pci, bp+sizeof(device), sizeof(if_pci)); | |
360 | if (if_pci.type != PCDP_IF_PCI) | |
361 | continue; /* not PCI interconnect */ | |
362 | ||
363 | if (if_pci.translation & PCDP_PCI_TRANS_IOPORT) | |
364 | vga_console_iobase = | |
365 | if_pci.ioport_tra | __IA64_UNCACHED_OFFSET; | |
366 | ||
367 | if (if_pci.translation & PCDP_PCI_TRANS_MMIO) | |
368 | vga_console_membase = | |
369 | if_pci.mmio_tra | __IA64_UNCACHED_OFFSET; | |
370 | ||
371 | break; /* once we find the primary, we're done */ | |
372 | } | |
373 | } | |
374 | ||
1da177e4 LT |
375 | /** |
376 | * sn_setup - SN platform setup routine | |
377 | * @cmdline_p: kernel command line | |
378 | * | |
379 | * Handles platform setup for SN machines. This includes determining | |
380 | * the RTC frequency (via a SAL call), initializing secondary CPUs, and | |
381 | * setting up per-node data areas. The console is also initialized here. | |
382 | */ | |
383 | void __init sn_setup(char **cmdline_p) | |
384 | { | |
385 | long status, ticks_per_sec, drift; | |
283c7f6a | 386 | u32 version = sn_sal_rev(); |
1da177e4 LT |
387 | extern void sn_cpu_init(void); |
388 | ||
a1cddb88 JS |
389 | ia64_sn_plat_set_error_handling_features(); // obsolete |
390 | ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV); | |
391 | ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES); | |
392 | ||
6872ec54 | 393 | |
a9f9de73 | 394 | #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) |
1da177e4 | 395 | /* |
ff51224c MM |
396 | * Handle SN vga console. |
397 | * | |
398 | * SN systems do not have enough ACPI table information | |
399 | * being passed from prom to identify VGA adapters and the legacy | |
400 | * addresses to access them. Until that is done, SN systems rely | |
401 | * on the PCDP table to identify the primary VGA console if one | |
402 | * exists. | |
403 | * | |
404 | * However, kernel PCDP support is optional, and even if it is built | |
405 | * into the kernel, it will not be used if the boot cmdline contains | |
406 | * console= directives. | |
407 | * | |
408 | * So, to work around this mess, we duplicate some of the PCDP code | |
409 | * here so that the primary VGA console (as defined by PCDP) will | |
410 | * work on SN systems even if a different console (e.g. serial) is | |
411 | * selected on the boot line (or CONFIG_EFI_PCDP is off). | |
1da177e4 | 412 | */ |
a9f9de73 | 413 | |
ff51224c MM |
414 | if (! vga_console_membase) |
415 | sn_scan_pcdp(); | |
416 | ||
a9f9de73 MM |
417 | if (vga_console_membase) { |
418 | /* usable vga ... make tty0 the preferred default console */ | |
ff51224c MM |
419 | if (!strstr(*cmdline_p, "console=")) |
420 | add_preferred_console("tty", 0, NULL); | |
a9f9de73 | 421 | } else { |
1da177e4 | 422 | printk(KERN_DEBUG "SGI: Disabling VGA console\n"); |
ff51224c MM |
423 | if (!strstr(*cmdline_p, "console=")) |
424 | add_preferred_console("ttySG", 0, NULL); | |
1da177e4 LT |
425 | #ifdef CONFIG_DUMMY_CONSOLE |
426 | conswitchp = &dummy_con; | |
427 | #else | |
428 | conswitchp = NULL; | |
429 | #endif /* CONFIG_DUMMY_CONSOLE */ | |
430 | } | |
431 | #endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */ | |
432 | ||
433 | MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY; | |
434 | ||
24ee0a6d JS |
435 | /* |
436 | * Build the tables for managing cnodes. | |
437 | */ | |
438 | build_cnode_tables(); | |
1da177e4 LT |
439 | |
440 | /* | |
441 | * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard | |
442 | * support here so we don't have to listen to failed keyboard probe | |
443 | * messages. | |
444 | */ | |
283c7f6a | 445 | if (version <= 0x0209 && acpi_kbd_controller_present) { |
1da177e4 LT |
446 | printk(KERN_INFO "Disabling legacy keyboard support as prom " |
447 | "is too old and doesn't provide FADT\n"); | |
448 | acpi_kbd_controller_present = 0; | |
449 | } | |
450 | ||
283c7f6a | 451 | printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF); |
1da177e4 | 452 | |
1da177e4 LT |
453 | status = |
454 | ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec, | |
455 | &drift); | |
456 | if (status != 0 || ticks_per_sec < 100000) { | |
457 | printk(KERN_WARNING | |
458 | "unable to determine platform RTC clock frequency, guessing.\n"); | |
459 | /* PROM gives wrong value for clock freq. so guess */ | |
460 | sn_rtc_cycles_per_second = 1000000000000UL / 30000UL; | |
461 | } else | |
462 | sn_rtc_cycles_per_second = ticks_per_sec; | |
463 | ||
464 | platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR; | |
465 | ||
466 | /* | |
467 | * we set the default root device to /dev/hda | |
468 | * to make simulation easy | |
469 | */ | |
470 | ROOT_DEV = Root_HDA1; | |
471 | ||
472 | /* | |
473 | * Create the PDAs and NODEPDAs for all the cpus. | |
474 | */ | |
475 | sn_init_pdas(cmdline_p); | |
476 | ||
477 | ia64_mark_idle = &snidle; | |
478 | ||
71a5d027 | 479 | /* |
1da177e4 LT |
480 | * For the bootcpu, we do this here. All other cpus will make the |
481 | * call as part of cpu_init in slave cpu initialization. | |
482 | */ | |
483 | sn_cpu_init(); | |
484 | ||
485 | #ifdef CONFIG_SMP | |
486 | init_smp_config(); | |
487 | #endif | |
488 | screen_info = sn_screen_info; | |
489 | ||
490 | sn_timer_init(); | |
c1298c5c AY |
491 | |
492 | /* | |
493 | * set pm_power_off to a SAL call to allow | |
494 | * sn machines to power off. The SAL call can be replaced | |
495 | * by an ACPI interface call when ACPI is fully implemented | |
496 | * for sn. | |
497 | */ | |
498 | pm_power_off = ia64_sn_power_down; | |
1da177e4 LT |
499 | } |
500 | ||
501 | /** | |
502 | * sn_init_pdas - setup node data areas | |
503 | * | |
504 | * One time setup for Node Data Area. Called by sn_setup(). | |
505 | */ | |
506 | static void __init sn_init_pdas(char **cmdline_p) | |
507 | { | |
508 | cnodeid_t cnode; | |
509 | ||
1da177e4 LT |
510 | /* |
511 | * Allocate & initalize the nodepda for each node. | |
512 | */ | |
513 | for_each_online_node(cnode) { | |
514 | nodepdaindr[cnode] = | |
515 | alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t)); | |
516 | memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); | |
71a5d027 | 517 | memset(nodepdaindr[cnode]->phys_cpuid, -1, |
1da177e4 | 518 | sizeof(nodepdaindr[cnode]->phys_cpuid)); |
470ceb05 | 519 | spin_lock_init(&nodepdaindr[cnode]->ptc_lock); |
1da177e4 LT |
520 | } |
521 | ||
522 | /* | |
523 | * Allocate & initialize nodepda for TIOs. For now, put them on node 0. | |
524 | */ | |
24ee0a6d | 525 | for (cnode = num_online_nodes(); cnode < num_cnodes; cnode++) { |
1da177e4 LT |
526 | nodepdaindr[cnode] = |
527 | alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t)); | |
528 | memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); | |
529 | } | |
530 | ||
531 | /* | |
532 | * Now copy the array of nodepda pointers to each nodepda. | |
533 | */ | |
24ee0a6d | 534 | for (cnode = 0; cnode < num_cnodes; cnode++) |
1da177e4 LT |
535 | memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr, |
536 | sizeof(nodepdaindr)); | |
537 | ||
538 | /* | |
539 | * Set up IO related platform-dependent nodepda fields. | |
540 | * The following routine actually sets up the hubinfo struct | |
541 | * in nodepda. | |
542 | */ | |
543 | for_each_online_node(cnode) { | |
544 | bte_init_node(nodepdaindr[cnode], cnode); | |
545 | } | |
546 | ||
547 | /* | |
71a5d027 | 548 | * Initialize the per node hubdev. This includes IO Nodes and |
1da177e4 LT |
549 | * headless/memless nodes. |
550 | */ | |
24ee0a6d | 551 | for (cnode = 0; cnode < num_cnodes; cnode++) { |
1da177e4 LT |
552 | hubdev_init_node(nodepdaindr[cnode], cnode); |
553 | } | |
554 | } | |
555 | ||
556 | /** | |
557 | * sn_cpu_init - initialize per-cpu data areas | |
558 | * @cpuid: cpuid of the caller | |
559 | * | |
560 | * Called during cpu initialization on each cpu as it starts. | |
561 | * Currently, initializes the per-cpu data area for SNIA. | |
562 | * Also sets up a few fields in the nodepda. Also known as | |
563 | * platform_cpu_init() by the ia64 machvec code. | |
564 | */ | |
565 | void __init sn_cpu_init(void) | |
566 | { | |
567 | int cpuid; | |
568 | int cpuphyid; | |
569 | int nasid; | |
570 | int subnode; | |
571 | int slice; | |
572 | int cnode; | |
573 | int i; | |
574 | static int wars_have_been_checked; | |
575 | ||
71a5d027 JS |
576 | if (smp_processor_id() == 0 && IS_MEDUSA()) { |
577 | if (ia64_sn_is_fake_prom()) | |
578 | sn_prom_type = 2; | |
579 | else | |
580 | sn_prom_type = 1; | |
2fcc3db0 JS |
581 | printk(KERN_INFO "Running on medusa with %s PROM\n", |
582 | (sn_prom_type == 1) ? "real" : "fake"); | |
71a5d027 JS |
583 | } |
584 | ||
1da177e4 | 585 | memset(pda, 0, sizeof(pda)); |
2fcc3db0 JS |
586 | if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, |
587 | &sn_hub_info->nasid_bitmask, | |
588 | &sn_hub_info->nasid_shift, | |
589 | &sn_system_size, &sn_sharing_domain_size, | |
590 | &sn_partition_id, &sn_coherency_id, | |
591 | &sn_region_size)) | |
1da177e4 LT |
592 | BUG(); |
593 | sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2; | |
594 | ||
595 | /* | |
596 | * The boot cpu makes this call again after platform initialization is | |
597 | * complete. | |
598 | */ | |
599 | if (nodepdaindr[0] == NULL) | |
600 | return; | |
601 | ||
a1cddb88 JS |
602 | for (i = 0; i < MAX_PROM_FEATURE_SETS; i++) |
603 | if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0) | |
604 | break; | |
605 | ||
1da177e4 LT |
606 | cpuid = smp_processor_id(); |
607 | cpuphyid = get_sapicid(); | |
608 | ||
609 | if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice)) | |
610 | BUG(); | |
611 | ||
612 | for (i=0; i < MAX_NUMNODES; i++) { | |
613 | if (nodepdaindr[i]) { | |
614 | nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid; | |
615 | nodepdaindr[i]->phys_cpuid[cpuid].slice = slice; | |
616 | nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode; | |
617 | } | |
618 | } | |
619 | ||
620 | cnode = nasid_to_cnodeid(nasid); | |
621 | ||
9b48b466 DN |
622 | sn_nodepda = nodepdaindr[cnode]; |
623 | ||
1da177e4 LT |
624 | pda->led_address = |
625 | (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT)); | |
626 | pda->led_state = LED_ALWAYS_SET; | |
627 | pda->hb_count = HZ / 2; | |
628 | pda->hb_state = 0; | |
629 | pda->idle_flag = 0; | |
630 | ||
631 | if (cpuid != 0) { | |
2e34f07f DN |
632 | /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */ |
633 | memcpy(sn_cnodeid_to_nasid, | |
634 | (&per_cpu(__sn_cnodeid_to_nasid, 0)), | |
635 | sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid))); | |
1da177e4 LT |
636 | } |
637 | ||
638 | /* | |
639 | * Check for WARs. | |
640 | * Only needs to be done once, on BSP. | |
2e34f07f DN |
641 | * Has to be done after loop above, because it uses this cpu's |
642 | * sn_cnodeid_to_nasid table which was just initialized if this | |
643 | * isn't cpu 0. | |
1da177e4 LT |
644 | * Has to be done before assignment below. |
645 | */ | |
646 | if (!wars_have_been_checked) { | |
647 | sn_check_for_wars(); | |
648 | wars_have_been_checked = 1; | |
649 | } | |
650 | sn_hub_info->shub_1_1_found = shub_1_1_found; | |
651 | ||
652 | /* | |
653 | * Set up addresses of PIO/MEM write status registers. | |
654 | */ | |
655 | { | |
656 | u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0}; | |
2fdbb590 JS |
657 | u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_2, |
658 | SH2_PIO_WRITE_STATUS_1, SH2_PIO_WRITE_STATUS_3}; | |
1da177e4 LT |
659 | u64 *pio; |
660 | pio = is_shub1() ? pio1 : pio2; | |
661 | pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]); | |
662 | pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0; | |
663 | } | |
664 | ||
665 | /* | |
666 | * WAR addresses for SHUB 1.x. | |
667 | */ | |
668 | if (local_node_data->active_cpu_count++ == 0 && is_shub1()) { | |
669 | int buddy_nasid; | |
670 | buddy_nasid = | |
671 | cnodeid_to_nasid(numa_node_id() == | |
672 | num_online_nodes() - 1 ? 0 : numa_node_id() + 1); | |
673 | pda->pio_shub_war_cam_addr = | |
674 | (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid, | |
675 | SH1_PI_CAM_CONTROL); | |
676 | } | |
677 | } | |
678 | ||
679 | /* | |
24ee0a6d | 680 | * Build tables for converting between NASIDs and cnodes. |
1da177e4 | 681 | */ |
24ee0a6d JS |
682 | static inline int __init board_needs_cnode(int type) |
683 | { | |
684 | return (type == KLTYPE_SNIA || type == KLTYPE_TIO); | |
685 | } | |
1da177e4 | 686 | |
24ee0a6d | 687 | void __init build_cnode_tables(void) |
1da177e4 | 688 | { |
24ee0a6d JS |
689 | int nasid; |
690 | int node; | |
1da177e4 LT |
691 | lboard_t *brd; |
692 | ||
24ee0a6d JS |
693 | memset(physical_node_map, -1, sizeof(physical_node_map)); |
694 | memset(sn_cnodeid_to_nasid, -1, | |
695 | sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid))); | |
1da177e4 | 696 | |
24ee0a6d JS |
697 | /* |
698 | * First populate the tables with C/M bricks. This ensures that | |
699 | * cnode == node for all C & M bricks. | |
700 | */ | |
701 | for_each_online_node(node) { | |
702 | nasid = pxm_to_nasid(nid_to_pxm_map[node]); | |
703 | sn_cnodeid_to_nasid[node] = nasid; | |
704 | physical_node_map[nasid] = node; | |
1da177e4 LT |
705 | } |
706 | ||
24ee0a6d JS |
707 | /* |
708 | * num_cnodes is total number of C/M/TIO bricks. Because of the 256 node | |
709 | * limit on the number of nodes, we can't use the generic node numbers | |
710 | * for this. Note that num_cnodes is incremented below as TIOs or | |
711 | * headless/memoryless nodes are discovered. | |
712 | */ | |
713 | num_cnodes = num_online_nodes(); | |
1da177e4 | 714 | |
24ee0a6d JS |
715 | /* fakeprom does not support klgraph */ |
716 | if (IS_RUNNING_ON_FAKE_PROM()) | |
717 | return; | |
1da177e4 | 718 | |
24ee0a6d JS |
719 | /* Find TIOs & headless/memoryless nodes and add them to the tables */ |
720 | for_each_online_node(node) { | |
721 | kl_config_hdr_t *klgraph_header; | |
722 | nasid = cnodeid_to_nasid(node); | |
2fcc3db0 JS |
723 | klgraph_header = ia64_sn_get_klconfig_addr(nasid); |
724 | if (klgraph_header == NULL) | |
24ee0a6d JS |
725 | BUG(); |
726 | brd = NODE_OFFSET_TO_LBOARD(nasid, klgraph_header->ch_board_info); | |
1da177e4 | 727 | while (brd) { |
24ee0a6d JS |
728 | if (board_needs_cnode(brd->brd_type) && physical_node_map[brd->brd_nasid] < 0) { |
729 | sn_cnodeid_to_nasid[num_cnodes] = brd->brd_nasid; | |
730 | physical_node_map[brd->brd_nasid] = num_cnodes++; | |
731 | } | |
732 | brd = find_lboard_next(brd); | |
1da177e4 LT |
733 | } |
734 | } | |
1da177e4 LT |
735 | } |
736 | ||
737 | int | |
738 | nasid_slice_to_cpuid(int nasid, int slice) | |
739 | { | |
740 | long cpu; | |
71a5d027 | 741 | |
2fcc3db0 | 742 | for (cpu = 0; cpu < NR_CPUS; cpu++) |
9b48b466 DN |
743 | if (cpuid_to_nasid(cpu) == nasid && |
744 | cpuid_to_slice(cpu) == slice) | |
1da177e4 LT |
745 | return cpu; |
746 | ||
747 | return -1; | |
748 | } | |
a1cddb88 JS |
749 | |
750 | int sn_prom_feature_available(int id) | |
751 | { | |
752 | if (id >= BITS_PER_LONG * MAX_PROM_FEATURE_SETS) | |
753 | return 0; | |
754 | return test_bit(id, sn_prom_features); | |
755 | } | |
756 | EXPORT_SYMBOL(sn_prom_feature_available); | |
757 |