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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
2e34f07f | 6 | * Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All rights reserved. |
1da177e4 LT |
7 | */ |
8 | ||
9 | #include <linux/config.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/kdev_t.h> | |
15 | #include <linux/string.h> | |
16 | #include <linux/tty.h> | |
17 | #include <linux/console.h> | |
18 | #include <linux/timex.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/ioport.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/serial.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/bootmem.h> | |
25 | #include <linux/mmzone.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/acpi.h> | |
28 | #include <linux/compiler.h> | |
29 | #include <linux/sched.h> | |
30 | #include <linux/root_dev.h> | |
31 | #include <linux/nodemask.h> | |
c1298c5c | 32 | #include <linux/pm.h> |
1da177e4 LT |
33 | |
34 | #include <asm/io.h> | |
35 | #include <asm/sal.h> | |
36 | #include <asm/machvec.h> | |
37 | #include <asm/system.h> | |
38 | #include <asm/processor.h> | |
39 | #include <asm/sn/arch.h> | |
40 | #include <asm/sn/addrs.h> | |
41 | #include <asm/sn/pda.h> | |
42 | #include <asm/sn/nodepda.h> | |
43 | #include <asm/sn/sn_cpuid.h> | |
44 | #include <asm/sn/simulator.h> | |
45 | #include <asm/sn/leds.h> | |
46 | #include <asm/sn/bte.h> | |
47 | #include <asm/sn/shub_mmr.h> | |
48 | #include <asm/sn/clksupport.h> | |
49 | #include <asm/sn/sn_sal.h> | |
50 | #include <asm/sn/geo.h> | |
51 | #include "xtalk/xwidgetdev.h" | |
52 | #include "xtalk/hubdev.h" | |
53 | #include <asm/sn/klconfig.h> | |
54 | ||
55 | ||
56 | DEFINE_PER_CPU(struct pda_s, pda_percpu); | |
57 | ||
58 | #define MAX_PHYS_MEMORY (1UL << 49) /* 1 TB */ | |
59 | ||
60 | lboard_t *root_lboard[MAX_COMPACT_NODES]; | |
61 | ||
62 | extern void bte_init_node(nodepda_t *, cnodeid_t); | |
63 | ||
64 | extern void sn_timer_init(void); | |
65 | extern unsigned long last_time_offset; | |
66 | extern void (*ia64_mark_idle) (int); | |
67 | extern void snidle(int); | |
68 | extern unsigned char acpi_kbd_controller_present; | |
69 | ||
70 | unsigned long sn_rtc_cycles_per_second; | |
71 | EXPORT_SYMBOL(sn_rtc_cycles_per_second); | |
72 | ||
73 | DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info); | |
74 | EXPORT_PER_CPU_SYMBOL(__sn_hub_info); | |
75 | ||
2e34f07f DN |
76 | DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]); |
77 | EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid); | |
78 | ||
9b48b466 DN |
79 | DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda); |
80 | EXPORT_PER_CPU_SYMBOL(__sn_nodepda); | |
81 | ||
1da177e4 LT |
82 | partid_t sn_partid = -1; |
83 | EXPORT_SYMBOL(sn_partid); | |
84 | char sn_system_serial_number_string[128]; | |
85 | EXPORT_SYMBOL(sn_system_serial_number_string); | |
86 | u64 sn_partition_serial_number; | |
87 | EXPORT_SYMBOL(sn_partition_serial_number); | |
88 | u8 sn_partition_id; | |
89 | EXPORT_SYMBOL(sn_partition_id); | |
90 | u8 sn_system_size; | |
91 | EXPORT_SYMBOL(sn_system_size); | |
92 | u8 sn_sharing_domain_size; | |
93 | EXPORT_SYMBOL(sn_sharing_domain_size); | |
94 | u8 sn_coherency_id; | |
95 | EXPORT_SYMBOL(sn_coherency_id); | |
96 | u8 sn_region_size; | |
97 | EXPORT_SYMBOL(sn_region_size); | |
98 | ||
99 | short physical_node_map[MAX_PHYSNODE_ID]; | |
100 | ||
101 | EXPORT_SYMBOL(physical_node_map); | |
102 | ||
103 | int numionodes; | |
104 | ||
105 | static void sn_init_pdas(char **); | |
106 | static void scan_for_ionodes(void); | |
107 | ||
108 | static nodepda_t *nodepdaindr[MAX_COMPACT_NODES]; | |
109 | ||
110 | /* | |
111 | * The format of "screen_info" is strange, and due to early i386-setup | |
112 | * code. This is just enough to make the console code think we're on a | |
113 | * VGA color display. | |
114 | */ | |
115 | struct screen_info sn_screen_info = { | |
116 | .orig_x = 0, | |
117 | .orig_y = 0, | |
118 | .orig_video_mode = 3, | |
119 | .orig_video_cols = 80, | |
120 | .orig_video_ega_bx = 3, | |
121 | .orig_video_lines = 25, | |
122 | .orig_video_isVGA = 1, | |
123 | .orig_video_points = 16 | |
124 | }; | |
125 | ||
126 | /* | |
127 | * This is here so we can use the CMOS detection in ide-probe.c to | |
128 | * determine what drives are present. In theory, we don't need this | |
129 | * as the auto-detection could be done via ide-probe.c:do_probe() but | |
130 | * in practice that would be much slower, which is painful when | |
131 | * running in the simulator. Note that passing zeroes in DRIVE_INFO | |
132 | * is sufficient (the IDE driver will autodetect the drive geometry). | |
133 | */ | |
134 | #ifdef CONFIG_IA64_GENERIC | |
135 | extern char drive_info[4 * 16]; | |
136 | #else | |
137 | char drive_info[4 * 16]; | |
138 | #endif | |
139 | ||
140 | /* | |
141 | * Get nasid of current cpu early in boot before nodepda is initialized | |
142 | */ | |
143 | static int | |
144 | boot_get_nasid(void) | |
145 | { | |
146 | int nasid; | |
147 | ||
148 | if (ia64_sn_get_sapic_info(get_sapicid(), &nasid, NULL, NULL)) | |
149 | BUG(); | |
150 | return nasid; | |
151 | } | |
152 | ||
153 | /* | |
154 | * This routine can only be used during init, since | |
155 | * smp_boot_data is an init data structure. | |
156 | * We have to use smp_boot_data.cpu_phys_id to find | |
157 | * the physical id of the processor because the normal | |
158 | * cpu_physical_id() relies on data structures that | |
159 | * may not be initialized yet. | |
160 | */ | |
161 | ||
162 | static int __init pxm_to_nasid(int pxm) | |
163 | { | |
164 | int i; | |
165 | int nid; | |
166 | ||
167 | nid = pxm_to_nid_map[pxm]; | |
168 | for (i = 0; i < num_node_memblks; i++) { | |
169 | if (node_memblk[i].nid == nid) { | |
170 | return NASID_GET(node_memblk[i].start_paddr); | |
171 | } | |
172 | } | |
173 | return -1; | |
174 | } | |
175 | ||
176 | /** | |
177 | * early_sn_setup - early setup routine for SN platforms | |
178 | * | |
179 | * Sets up an initial console to aid debugging. Intended primarily | |
180 | * for bringup. See start_kernel() in init/main.c. | |
181 | */ | |
182 | ||
183 | void __init early_sn_setup(void) | |
184 | { | |
185 | efi_system_table_t *efi_systab; | |
186 | efi_config_table_t *config_tables; | |
187 | struct ia64_sal_systab *sal_systab; | |
188 | struct ia64_sal_desc_entry_point *ep; | |
189 | char *p; | |
190 | int i, j; | |
191 | ||
192 | /* | |
193 | * Parse enough of the SAL tables to locate the SAL entry point. Since, console | |
194 | * IO on SN2 is done via SAL calls, early_printk won't work without this. | |
195 | * | |
196 | * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c. | |
197 | * Any changes to those file may have to be made hereas well. | |
198 | */ | |
199 | efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab); | |
200 | config_tables = __va(efi_systab->tables); | |
201 | for (i = 0; i < efi_systab->nr_tables; i++) { | |
202 | if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) == | |
203 | 0) { | |
204 | sal_systab = __va(config_tables[i].table); | |
205 | p = (char *)(sal_systab + 1); | |
206 | for (j = 0; j < sal_systab->entry_count; j++) { | |
207 | if (*p == SAL_DESC_ENTRY_POINT) { | |
208 | ep = (struct ia64_sal_desc_entry_point | |
209 | *)p; | |
210 | ia64_sal_handler_init(__va | |
211 | (ep->sal_proc), | |
212 | __va(ep->gp)); | |
213 | return; | |
214 | } | |
215 | p += SAL_DESC_SIZE(*p); | |
216 | } | |
217 | } | |
218 | } | |
219 | /* Uh-oh, SAL not available?? */ | |
220 | printk(KERN_ERR "failed to find SAL entry point\n"); | |
221 | } | |
222 | ||
223 | extern int platform_intr_list[]; | |
224 | extern nasid_t master_nasid; | |
225 | static int shub_1_1_found __initdata; | |
226 | ||
227 | /* | |
228 | * sn_check_for_wars | |
229 | * | |
230 | * Set flag for enabling shub specific wars | |
231 | */ | |
232 | ||
233 | static inline int __init is_shub_1_1(int nasid) | |
234 | { | |
235 | unsigned long id; | |
236 | int rev; | |
237 | ||
238 | if (is_shub2()) | |
239 | return 0; | |
240 | id = REMOTE_HUB_L(nasid, SH1_SHUB_ID); | |
241 | rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT; | |
242 | return rev <= 2; | |
243 | } | |
244 | ||
245 | static void __init sn_check_for_wars(void) | |
246 | { | |
247 | int cnode; | |
248 | ||
249 | if (is_shub2()) { | |
250 | /* none yet */ | |
251 | } else { | |
252 | for_each_online_node(cnode) { | |
253 | if (is_shub_1_1(cnodeid_to_nasid(cnode))) | |
254 | sn_hub_info->shub_1_1_found = 1; | |
255 | } | |
256 | } | |
257 | } | |
258 | ||
259 | /** | |
260 | * sn_setup - SN platform setup routine | |
261 | * @cmdline_p: kernel command line | |
262 | * | |
263 | * Handles platform setup for SN machines. This includes determining | |
264 | * the RTC frequency (via a SAL call), initializing secondary CPUs, and | |
265 | * setting up per-node data areas. The console is also initialized here. | |
266 | */ | |
267 | void __init sn_setup(char **cmdline_p) | |
268 | { | |
269 | long status, ticks_per_sec, drift; | |
270 | int pxm; | |
271 | int major = sn_sal_rev_major(), minor = sn_sal_rev_minor(); | |
272 | extern void sn_cpu_init(void); | |
273 | ||
274 | /* | |
275 | * If the generic code has enabled vga console support - lets | |
276 | * get rid of it again. This is a kludge for the fact that ACPI | |
277 | * currtently has no way of informing us if legacy VGA is available | |
278 | * or not. | |
279 | */ | |
280 | #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) | |
281 | if (conswitchp == &vga_con) { | |
282 | printk(KERN_DEBUG "SGI: Disabling VGA console\n"); | |
283 | #ifdef CONFIG_DUMMY_CONSOLE | |
284 | conswitchp = &dummy_con; | |
285 | #else | |
286 | conswitchp = NULL; | |
287 | #endif /* CONFIG_DUMMY_CONSOLE */ | |
288 | } | |
289 | #endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */ | |
290 | ||
291 | MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY; | |
292 | ||
293 | memset(physical_node_map, -1, sizeof(physical_node_map)); | |
294 | for (pxm = 0; pxm < MAX_PXM_DOMAINS; pxm++) | |
295 | if (pxm_to_nid_map[pxm] != -1) | |
296 | physical_node_map[pxm_to_nasid(pxm)] = | |
297 | pxm_to_nid_map[pxm]; | |
298 | ||
299 | /* | |
300 | * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard | |
301 | * support here so we don't have to listen to failed keyboard probe | |
302 | * messages. | |
303 | */ | |
304 | if ((major < 2 || (major == 2 && minor <= 9)) && | |
305 | acpi_kbd_controller_present) { | |
306 | printk(KERN_INFO "Disabling legacy keyboard support as prom " | |
307 | "is too old and doesn't provide FADT\n"); | |
308 | acpi_kbd_controller_present = 0; | |
309 | } | |
310 | ||
311 | printk("SGI SAL version %x.%02x\n", major, minor); | |
312 | ||
313 | /* | |
314 | * Confirm the SAL we're running on is recent enough... | |
315 | */ | |
316 | if ((major < SN_SAL_MIN_MAJOR) || (major == SN_SAL_MIN_MAJOR && | |
317 | minor < SN_SAL_MIN_MINOR)) { | |
318 | printk(KERN_ERR "This kernel needs SGI SAL version >= " | |
319 | "%x.%02x\n", SN_SAL_MIN_MAJOR, SN_SAL_MIN_MINOR); | |
320 | panic("PROM version too old\n"); | |
321 | } | |
322 | ||
323 | master_nasid = boot_get_nasid(); | |
324 | ||
325 | status = | |
326 | ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec, | |
327 | &drift); | |
328 | if (status != 0 || ticks_per_sec < 100000) { | |
329 | printk(KERN_WARNING | |
330 | "unable to determine platform RTC clock frequency, guessing.\n"); | |
331 | /* PROM gives wrong value for clock freq. so guess */ | |
332 | sn_rtc_cycles_per_second = 1000000000000UL / 30000UL; | |
333 | } else | |
334 | sn_rtc_cycles_per_second = ticks_per_sec; | |
335 | ||
336 | platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR; | |
337 | ||
338 | /* | |
339 | * we set the default root device to /dev/hda | |
340 | * to make simulation easy | |
341 | */ | |
342 | ROOT_DEV = Root_HDA1; | |
343 | ||
344 | /* | |
345 | * Create the PDAs and NODEPDAs for all the cpus. | |
346 | */ | |
347 | sn_init_pdas(cmdline_p); | |
348 | ||
349 | ia64_mark_idle = &snidle; | |
350 | ||
351 | /* | |
352 | * For the bootcpu, we do this here. All other cpus will make the | |
353 | * call as part of cpu_init in slave cpu initialization. | |
354 | */ | |
355 | sn_cpu_init(); | |
356 | ||
357 | #ifdef CONFIG_SMP | |
358 | init_smp_config(); | |
359 | #endif | |
360 | screen_info = sn_screen_info; | |
361 | ||
362 | sn_timer_init(); | |
c1298c5c AY |
363 | |
364 | /* | |
365 | * set pm_power_off to a SAL call to allow | |
366 | * sn machines to power off. The SAL call can be replaced | |
367 | * by an ACPI interface call when ACPI is fully implemented | |
368 | * for sn. | |
369 | */ | |
370 | pm_power_off = ia64_sn_power_down; | |
1da177e4 LT |
371 | } |
372 | ||
373 | /** | |
374 | * sn_init_pdas - setup node data areas | |
375 | * | |
376 | * One time setup for Node Data Area. Called by sn_setup(). | |
377 | */ | |
378 | static void __init sn_init_pdas(char **cmdline_p) | |
379 | { | |
380 | cnodeid_t cnode; | |
381 | ||
2e34f07f DN |
382 | memset(sn_cnodeid_to_nasid, -1, |
383 | sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid))); | |
1da177e4 | 384 | for_each_online_node(cnode) |
2e34f07f DN |
385 | sn_cnodeid_to_nasid[cnode] = |
386 | pxm_to_nasid(nid_to_pxm_map[cnode]); | |
1da177e4 LT |
387 | |
388 | numionodes = num_online_nodes(); | |
389 | scan_for_ionodes(); | |
390 | ||
391 | /* | |
392 | * Allocate & initalize the nodepda for each node. | |
393 | */ | |
394 | for_each_online_node(cnode) { | |
395 | nodepdaindr[cnode] = | |
396 | alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t)); | |
397 | memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); | |
398 | memset(nodepdaindr[cnode]->phys_cpuid, -1, | |
399 | sizeof(nodepdaindr[cnode]->phys_cpuid)); | |
400 | } | |
401 | ||
402 | /* | |
403 | * Allocate & initialize nodepda for TIOs. For now, put them on node 0. | |
404 | */ | |
405 | for (cnode = num_online_nodes(); cnode < numionodes; cnode++) { | |
406 | nodepdaindr[cnode] = | |
407 | alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t)); | |
408 | memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); | |
409 | } | |
410 | ||
411 | /* | |
412 | * Now copy the array of nodepda pointers to each nodepda. | |
413 | */ | |
414 | for (cnode = 0; cnode < numionodes; cnode++) | |
415 | memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr, | |
416 | sizeof(nodepdaindr)); | |
417 | ||
418 | /* | |
419 | * Set up IO related platform-dependent nodepda fields. | |
420 | * The following routine actually sets up the hubinfo struct | |
421 | * in nodepda. | |
422 | */ | |
423 | for_each_online_node(cnode) { | |
424 | bte_init_node(nodepdaindr[cnode], cnode); | |
425 | } | |
426 | ||
427 | /* | |
428 | * Initialize the per node hubdev. This includes IO Nodes and | |
429 | * headless/memless nodes. | |
430 | */ | |
431 | for (cnode = 0; cnode < numionodes; cnode++) { | |
432 | hubdev_init_node(nodepdaindr[cnode], cnode); | |
433 | } | |
434 | } | |
435 | ||
436 | /** | |
437 | * sn_cpu_init - initialize per-cpu data areas | |
438 | * @cpuid: cpuid of the caller | |
439 | * | |
440 | * Called during cpu initialization on each cpu as it starts. | |
441 | * Currently, initializes the per-cpu data area for SNIA. | |
442 | * Also sets up a few fields in the nodepda. Also known as | |
443 | * platform_cpu_init() by the ia64 machvec code. | |
444 | */ | |
445 | void __init sn_cpu_init(void) | |
446 | { | |
447 | int cpuid; | |
448 | int cpuphyid; | |
449 | int nasid; | |
450 | int subnode; | |
451 | int slice; | |
452 | int cnode; | |
453 | int i; | |
454 | static int wars_have_been_checked; | |
455 | ||
456 | memset(pda, 0, sizeof(pda)); | |
457 | if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift, | |
458 | &sn_system_size, &sn_sharing_domain_size, &sn_partition_id, | |
459 | &sn_coherency_id, &sn_region_size)) | |
460 | BUG(); | |
461 | sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2; | |
462 | ||
463 | /* | |
464 | * The boot cpu makes this call again after platform initialization is | |
465 | * complete. | |
466 | */ | |
467 | if (nodepdaindr[0] == NULL) | |
468 | return; | |
469 | ||
470 | cpuid = smp_processor_id(); | |
471 | cpuphyid = get_sapicid(); | |
472 | ||
473 | if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice)) | |
474 | BUG(); | |
475 | ||
476 | for (i=0; i < MAX_NUMNODES; i++) { | |
477 | if (nodepdaindr[i]) { | |
478 | nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid; | |
479 | nodepdaindr[i]->phys_cpuid[cpuid].slice = slice; | |
480 | nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode; | |
481 | } | |
482 | } | |
483 | ||
484 | cnode = nasid_to_cnodeid(nasid); | |
485 | ||
9b48b466 DN |
486 | sn_nodepda = nodepdaindr[cnode]; |
487 | ||
1da177e4 LT |
488 | pda->led_address = |
489 | (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT)); | |
490 | pda->led_state = LED_ALWAYS_SET; | |
491 | pda->hb_count = HZ / 2; | |
492 | pda->hb_state = 0; | |
493 | pda->idle_flag = 0; | |
494 | ||
495 | if (cpuid != 0) { | |
2e34f07f DN |
496 | /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */ |
497 | memcpy(sn_cnodeid_to_nasid, | |
498 | (&per_cpu(__sn_cnodeid_to_nasid, 0)), | |
499 | sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid))); | |
1da177e4 LT |
500 | } |
501 | ||
502 | /* | |
503 | * Check for WARs. | |
504 | * Only needs to be done once, on BSP. | |
2e34f07f DN |
505 | * Has to be done after loop above, because it uses this cpu's |
506 | * sn_cnodeid_to_nasid table which was just initialized if this | |
507 | * isn't cpu 0. | |
1da177e4 LT |
508 | * Has to be done before assignment below. |
509 | */ | |
510 | if (!wars_have_been_checked) { | |
511 | sn_check_for_wars(); | |
512 | wars_have_been_checked = 1; | |
513 | } | |
514 | sn_hub_info->shub_1_1_found = shub_1_1_found; | |
515 | ||
516 | /* | |
517 | * Set up addresses of PIO/MEM write status registers. | |
518 | */ | |
519 | { | |
520 | u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0}; | |
521 | u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1, | |
522 | SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3}; | |
523 | u64 *pio; | |
524 | pio = is_shub1() ? pio1 : pio2; | |
525 | pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]); | |
526 | pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0; | |
527 | } | |
528 | ||
529 | /* | |
530 | * WAR addresses for SHUB 1.x. | |
531 | */ | |
532 | if (local_node_data->active_cpu_count++ == 0 && is_shub1()) { | |
533 | int buddy_nasid; | |
534 | buddy_nasid = | |
535 | cnodeid_to_nasid(numa_node_id() == | |
536 | num_online_nodes() - 1 ? 0 : numa_node_id() + 1); | |
537 | pda->pio_shub_war_cam_addr = | |
538 | (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid, | |
539 | SH1_PI_CAM_CONTROL); | |
540 | } | |
541 | } | |
542 | ||
543 | /* | |
544 | * Scan klconfig for ionodes. Add the nasids to the | |
545 | * physical_node_map and the pda and increment numionodes. | |
546 | */ | |
547 | ||
548 | static void __init scan_for_ionodes(void) | |
549 | { | |
550 | int nasid = 0; | |
551 | lboard_t *brd; | |
552 | ||
553 | /* Setup ionodes with memory */ | |
554 | for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) { | |
555 | char *klgraph_header; | |
556 | cnodeid_t cnodeid; | |
557 | ||
558 | if (physical_node_map[nasid] == -1) | |
559 | continue; | |
560 | ||
561 | cnodeid = -1; | |
562 | klgraph_header = __va(ia64_sn_get_klconfig_addr(nasid)); | |
563 | if (!klgraph_header) { | |
564 | if (IS_RUNNING_ON_SIMULATOR()) | |
565 | continue; | |
566 | BUG(); /* All nodes must have klconfig tables! */ | |
567 | } | |
568 | cnodeid = nasid_to_cnodeid(nasid); | |
569 | root_lboard[cnodeid] = (lboard_t *) | |
570 | NODE_OFFSET_TO_LBOARD((nasid), | |
571 | ((kl_config_hdr_t | |
572 | *) (klgraph_header))-> | |
573 | ch_board_info); | |
574 | } | |
575 | ||
576 | /* Scan headless/memless IO Nodes. */ | |
577 | for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) { | |
578 | /* if there's no nasid, don't try to read the klconfig on the node */ | |
579 | if (physical_node_map[nasid] == -1) | |
580 | continue; | |
581 | brd = find_lboard_any((lboard_t *) | |
582 | root_lboard[nasid_to_cnodeid(nasid)], | |
583 | KLTYPE_SNIA); | |
584 | if (brd) { | |
585 | brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */ | |
586 | if (!brd) | |
587 | continue; | |
588 | } | |
589 | ||
590 | brd = find_lboard_any(brd, KLTYPE_SNIA); | |
591 | ||
592 | while (brd) { | |
2e34f07f | 593 | sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid; |
1da177e4 LT |
594 | physical_node_map[brd->brd_nasid] = numionodes; |
595 | root_lboard[numionodes] = brd; | |
596 | numionodes++; | |
597 | brd = KLCF_NEXT_ANY(brd); | |
598 | if (!brd) | |
599 | break; | |
600 | ||
601 | brd = find_lboard_any(brd, KLTYPE_SNIA); | |
602 | } | |
603 | } | |
604 | ||
605 | /* Scan for TIO nodes. */ | |
606 | for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) { | |
607 | /* if there's no nasid, don't try to read the klconfig on the node */ | |
608 | if (physical_node_map[nasid] == -1) | |
609 | continue; | |
610 | brd = find_lboard_any((lboard_t *) | |
611 | root_lboard[nasid_to_cnodeid(nasid)], | |
612 | KLTYPE_TIO); | |
613 | while (brd) { | |
2e34f07f | 614 | sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid; |
1da177e4 LT |
615 | physical_node_map[brd->brd_nasid] = numionodes; |
616 | root_lboard[numionodes] = brd; | |
617 | numionodes++; | |
618 | brd = KLCF_NEXT_ANY(brd); | |
619 | if (!brd) | |
620 | break; | |
621 | ||
622 | brd = find_lboard_any(brd, KLTYPE_TIO); | |
623 | } | |
624 | } | |
1da177e4 LT |
625 | } |
626 | ||
627 | int | |
628 | nasid_slice_to_cpuid(int nasid, int slice) | |
629 | { | |
630 | long cpu; | |
631 | ||
632 | for (cpu=0; cpu < NR_CPUS; cpu++) | |
9b48b466 DN |
633 | if (cpuid_to_nasid(cpu) == nasid && |
634 | cpuid_to_slice(cpu) == slice) | |
1da177e4 LT |
635 | return cpu; |
636 | ||
637 | return -1; | |
638 | } |