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[IA64] hotplug/ia64: SN Hotplug Driver - new SN PROM version code
[net-next-2.6.git] / arch / ia64 / sn / kernel / setup.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
2e34f07f 6 * Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All rights reserved.
1da177e4
LT
7 */
8
9#include <linux/config.h>
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/delay.h>
13#include <linux/kernel.h>
14#include <linux/kdev_t.h>
15#include <linux/string.h>
16#include <linux/tty.h>
17#include <linux/console.h>
18#include <linux/timex.h>
19#include <linux/sched.h>
20#include <linux/ioport.h>
21#include <linux/mm.h>
22#include <linux/serial.h>
23#include <linux/irq.h>
24#include <linux/bootmem.h>
25#include <linux/mmzone.h>
26#include <linux/interrupt.h>
27#include <linux/acpi.h>
28#include <linux/compiler.h>
29#include <linux/sched.h>
30#include <linux/root_dev.h>
31#include <linux/nodemask.h>
c1298c5c 32#include <linux/pm.h>
1da177e4
LT
33
34#include <asm/io.h>
35#include <asm/sal.h>
36#include <asm/machvec.h>
37#include <asm/system.h>
38#include <asm/processor.h>
a9f9de73 39#include <asm/vga.h>
1da177e4
LT
40#include <asm/sn/arch.h>
41#include <asm/sn/addrs.h>
42#include <asm/sn/pda.h>
43#include <asm/sn/nodepda.h>
44#include <asm/sn/sn_cpuid.h>
45#include <asm/sn/simulator.h>
46#include <asm/sn/leds.h>
47#include <asm/sn/bte.h>
48#include <asm/sn/shub_mmr.h>
49#include <asm/sn/clksupport.h>
50#include <asm/sn/sn_sal.h>
51#include <asm/sn/geo.h>
52#include "xtalk/xwidgetdev.h"
53#include "xtalk/hubdev.h"
54#include <asm/sn/klconfig.h>
55
56
57DEFINE_PER_CPU(struct pda_s, pda_percpu);
58
59#define MAX_PHYS_MEMORY (1UL << 49) /* 1 TB */
60
61lboard_t *root_lboard[MAX_COMPACT_NODES];
62
63extern void bte_init_node(nodepda_t *, cnodeid_t);
64
65extern void sn_timer_init(void);
66extern unsigned long last_time_offset;
67extern void (*ia64_mark_idle) (int);
68extern void snidle(int);
69extern unsigned char acpi_kbd_controller_present;
70
71unsigned long sn_rtc_cycles_per_second;
72EXPORT_SYMBOL(sn_rtc_cycles_per_second);
73
74DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
75EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
76
2e34f07f
DN
77DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
78EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
79
9b48b466
DN
80DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
81EXPORT_PER_CPU_SYMBOL(__sn_nodepda);
82
1da177e4
LT
83partid_t sn_partid = -1;
84EXPORT_SYMBOL(sn_partid);
85char sn_system_serial_number_string[128];
86EXPORT_SYMBOL(sn_system_serial_number_string);
87u64 sn_partition_serial_number;
88EXPORT_SYMBOL(sn_partition_serial_number);
89u8 sn_partition_id;
90EXPORT_SYMBOL(sn_partition_id);
91u8 sn_system_size;
92EXPORT_SYMBOL(sn_system_size);
93u8 sn_sharing_domain_size;
94EXPORT_SYMBOL(sn_sharing_domain_size);
95u8 sn_coherency_id;
96EXPORT_SYMBOL(sn_coherency_id);
97u8 sn_region_size;
98EXPORT_SYMBOL(sn_region_size);
71a5d027 99int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
1da177e4
LT
100
101short physical_node_map[MAX_PHYSNODE_ID];
102
103EXPORT_SYMBOL(physical_node_map);
104
105int numionodes;
106
107static void sn_init_pdas(char **);
108static void scan_for_ionodes(void);
109
110static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
111
112/*
113 * The format of "screen_info" is strange, and due to early i386-setup
114 * code. This is just enough to make the console code think we're on a
115 * VGA color display.
116 */
117struct screen_info sn_screen_info = {
118 .orig_x = 0,
119 .orig_y = 0,
120 .orig_video_mode = 3,
121 .orig_video_cols = 80,
122 .orig_video_ega_bx = 3,
123 .orig_video_lines = 25,
124 .orig_video_isVGA = 1,
125 .orig_video_points = 16
126};
127
128/*
129 * This is here so we can use the CMOS detection in ide-probe.c to
130 * determine what drives are present. In theory, we don't need this
131 * as the auto-detection could be done via ide-probe.c:do_probe() but
132 * in practice that would be much slower, which is painful when
133 * running in the simulator. Note that passing zeroes in DRIVE_INFO
134 * is sufficient (the IDE driver will autodetect the drive geometry).
135 */
136#ifdef CONFIG_IA64_GENERIC
137extern char drive_info[4 * 16];
138#else
139char drive_info[4 * 16];
140#endif
141
142/*
143 * Get nasid of current cpu early in boot before nodepda is initialized
144 */
145static int
146boot_get_nasid(void)
147{
148 int nasid;
149
150 if (ia64_sn_get_sapic_info(get_sapicid(), &nasid, NULL, NULL))
151 BUG();
152 return nasid;
153}
154
155/*
156 * This routine can only be used during init, since
157 * smp_boot_data is an init data structure.
158 * We have to use smp_boot_data.cpu_phys_id to find
159 * the physical id of the processor because the normal
160 * cpu_physical_id() relies on data structures that
161 * may not be initialized yet.
162 */
163
164static int __init pxm_to_nasid(int pxm)
165{
166 int i;
167 int nid;
168
169 nid = pxm_to_nid_map[pxm];
170 for (i = 0; i < num_node_memblks; i++) {
171 if (node_memblk[i].nid == nid) {
172 return NASID_GET(node_memblk[i].start_paddr);
173 }
174 }
175 return -1;
176}
177
178/**
179 * early_sn_setup - early setup routine for SN platforms
180 *
181 * Sets up an initial console to aid debugging. Intended primarily
182 * for bringup. See start_kernel() in init/main.c.
183 */
184
185void __init early_sn_setup(void)
186{
187 efi_system_table_t *efi_systab;
188 efi_config_table_t *config_tables;
189 struct ia64_sal_systab *sal_systab;
190 struct ia64_sal_desc_entry_point *ep;
191 char *p;
192 int i, j;
193
194 /*
195 * Parse enough of the SAL tables to locate the SAL entry point. Since, console
196 * IO on SN2 is done via SAL calls, early_printk won't work without this.
197 *
198 * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
199 * Any changes to those file may have to be made hereas well.
200 */
201 efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
202 config_tables = __va(efi_systab->tables);
203 for (i = 0; i < efi_systab->nr_tables; i++) {
204 if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
205 0) {
206 sal_systab = __va(config_tables[i].table);
207 p = (char *)(sal_systab + 1);
208 for (j = 0; j < sal_systab->entry_count; j++) {
209 if (*p == SAL_DESC_ENTRY_POINT) {
210 ep = (struct ia64_sal_desc_entry_point
211 *)p;
212 ia64_sal_handler_init(__va
213 (ep->sal_proc),
214 __va(ep->gp));
215 return;
216 }
217 p += SAL_DESC_SIZE(*p);
218 }
219 }
220 }
221 /* Uh-oh, SAL not available?? */
222 printk(KERN_ERR "failed to find SAL entry point\n");
223}
224
225extern int platform_intr_list[];
226extern nasid_t master_nasid;
ff89bf3b 227static int __initdata shub_1_1_found = 0;
1da177e4
LT
228
229/*
230 * sn_check_for_wars
231 *
232 * Set flag for enabling shub specific wars
233 */
234
235static inline int __init is_shub_1_1(int nasid)
236{
237 unsigned long id;
238 int rev;
239
240 if (is_shub2())
241 return 0;
242 id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
243 rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
244 return rev <= 2;
245}
246
247static void __init sn_check_for_wars(void)
248{
249 int cnode;
250
251 if (is_shub2()) {
252 /* none yet */
253 } else {
254 for_each_online_node(cnode) {
255 if (is_shub_1_1(cnodeid_to_nasid(cnode)))
ff89bf3b 256 shub_1_1_found = 1;
1da177e4
LT
257 }
258 }
259}
260
261/**
262 * sn_setup - SN platform setup routine
263 * @cmdline_p: kernel command line
264 *
265 * Handles platform setup for SN machines. This includes determining
266 * the RTC frequency (via a SAL call), initializing secondary CPUs, and
267 * setting up per-node data areas. The console is also initialized here.
268 */
269void __init sn_setup(char **cmdline_p)
270{
271 long status, ticks_per_sec, drift;
272 int pxm;
283c7f6a 273 u32 version = sn_sal_rev();
1da177e4
LT
274 extern void sn_cpu_init(void);
275
6872ec54
RA
276 ia64_sn_plat_set_error_handling_features();
277
a9f9de73 278#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
1da177e4 279 /*
a9f9de73
MM
280 * If there was a primary vga adapter identified through the
281 * EFI PCDP table, make it the preferred console. Otherwise
282 * zero out conswitchp.
1da177e4 283 */
a9f9de73
MM
284
285 if (vga_console_membase) {
286 /* usable vga ... make tty0 the preferred default console */
287 add_preferred_console("tty", 0, NULL);
288 } else {
1da177e4
LT
289 printk(KERN_DEBUG "SGI: Disabling VGA console\n");
290#ifdef CONFIG_DUMMY_CONSOLE
291 conswitchp = &dummy_con;
292#else
293 conswitchp = NULL;
294#endif /* CONFIG_DUMMY_CONSOLE */
295 }
296#endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
297
298 MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
299
300 memset(physical_node_map, -1, sizeof(physical_node_map));
301 for (pxm = 0; pxm < MAX_PXM_DOMAINS; pxm++)
302 if (pxm_to_nid_map[pxm] != -1)
303 physical_node_map[pxm_to_nasid(pxm)] =
304 pxm_to_nid_map[pxm];
305
306 /*
307 * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
308 * support here so we don't have to listen to failed keyboard probe
309 * messages.
310 */
283c7f6a 311 if (version <= 0x0209 && acpi_kbd_controller_present) {
1da177e4
LT
312 printk(KERN_INFO "Disabling legacy keyboard support as prom "
313 "is too old and doesn't provide FADT\n");
314 acpi_kbd_controller_present = 0;
315 }
316
283c7f6a 317 printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF);
1da177e4
LT
318
319 /*
320 * Confirm the SAL we're running on is recent enough...
321 */
283c7f6a 322 if (version < SN_SAL_MIN_VERSION) {
1da177e4 323 printk(KERN_ERR "This kernel needs SGI SAL version >= "
283c7f6a
PB
324 "%x.%02x\n", SN_SAL_MIN_VERSION >> 8,
325 SN_SAL_MIN_VERSION & 0x00FF);
1da177e4
LT
326 panic("PROM version too old\n");
327 }
328
329 master_nasid = boot_get_nasid();
330
331 status =
332 ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
333 &drift);
334 if (status != 0 || ticks_per_sec < 100000) {
335 printk(KERN_WARNING
336 "unable to determine platform RTC clock frequency, guessing.\n");
337 /* PROM gives wrong value for clock freq. so guess */
338 sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
339 } else
340 sn_rtc_cycles_per_second = ticks_per_sec;
341
342 platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
343
344 /*
345 * we set the default root device to /dev/hda
346 * to make simulation easy
347 */
348 ROOT_DEV = Root_HDA1;
349
350 /*
351 * Create the PDAs and NODEPDAs for all the cpus.
352 */
353 sn_init_pdas(cmdline_p);
354
355 ia64_mark_idle = &snidle;
356
71a5d027 357 /*
1da177e4
LT
358 * For the bootcpu, we do this here. All other cpus will make the
359 * call as part of cpu_init in slave cpu initialization.
360 */
361 sn_cpu_init();
362
363#ifdef CONFIG_SMP
364 init_smp_config();
365#endif
366 screen_info = sn_screen_info;
367
368 sn_timer_init();
c1298c5c
AY
369
370 /*
371 * set pm_power_off to a SAL call to allow
372 * sn machines to power off. The SAL call can be replaced
373 * by an ACPI interface call when ACPI is fully implemented
374 * for sn.
375 */
376 pm_power_off = ia64_sn_power_down;
1da177e4
LT
377}
378
379/**
380 * sn_init_pdas - setup node data areas
381 *
382 * One time setup for Node Data Area. Called by sn_setup().
383 */
384static void __init sn_init_pdas(char **cmdline_p)
385{
386 cnodeid_t cnode;
387
2e34f07f
DN
388 memset(sn_cnodeid_to_nasid, -1,
389 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
1da177e4 390 for_each_online_node(cnode)
2e34f07f
DN
391 sn_cnodeid_to_nasid[cnode] =
392 pxm_to_nasid(nid_to_pxm_map[cnode]);
1da177e4
LT
393
394 numionodes = num_online_nodes();
395 scan_for_ionodes();
396
397 /*
398 * Allocate & initalize the nodepda for each node.
399 */
400 for_each_online_node(cnode) {
401 nodepdaindr[cnode] =
402 alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
403 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
71a5d027 404 memset(nodepdaindr[cnode]->phys_cpuid, -1,
1da177e4
LT
405 sizeof(nodepdaindr[cnode]->phys_cpuid));
406 }
407
408 /*
409 * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
410 */
411 for (cnode = num_online_nodes(); cnode < numionodes; cnode++) {
412 nodepdaindr[cnode] =
413 alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
414 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
415 }
416
417 /*
418 * Now copy the array of nodepda pointers to each nodepda.
419 */
420 for (cnode = 0; cnode < numionodes; cnode++)
421 memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
422 sizeof(nodepdaindr));
423
424 /*
425 * Set up IO related platform-dependent nodepda fields.
426 * The following routine actually sets up the hubinfo struct
427 * in nodepda.
428 */
429 for_each_online_node(cnode) {
430 bte_init_node(nodepdaindr[cnode], cnode);
431 }
432
433 /*
71a5d027 434 * Initialize the per node hubdev. This includes IO Nodes and
1da177e4
LT
435 * headless/memless nodes.
436 */
437 for (cnode = 0; cnode < numionodes; cnode++) {
438 hubdev_init_node(nodepdaindr[cnode], cnode);
439 }
440}
441
442/**
443 * sn_cpu_init - initialize per-cpu data areas
444 * @cpuid: cpuid of the caller
445 *
446 * Called during cpu initialization on each cpu as it starts.
447 * Currently, initializes the per-cpu data area for SNIA.
448 * Also sets up a few fields in the nodepda. Also known as
449 * platform_cpu_init() by the ia64 machvec code.
450 */
451void __init sn_cpu_init(void)
452{
453 int cpuid;
454 int cpuphyid;
455 int nasid;
456 int subnode;
457 int slice;
458 int cnode;
459 int i;
460 static int wars_have_been_checked;
461
71a5d027
JS
462 if (smp_processor_id() == 0 && IS_MEDUSA()) {
463 if (ia64_sn_is_fake_prom())
464 sn_prom_type = 2;
465 else
466 sn_prom_type = 1;
467 printk("Running on medusa with %s PROM\n", (sn_prom_type == 1) ? "real" : "fake");
468 }
469
1da177e4
LT
470 memset(pda, 0, sizeof(pda));
471 if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift,
472 &sn_system_size, &sn_sharing_domain_size, &sn_partition_id,
473 &sn_coherency_id, &sn_region_size))
474 BUG();
475 sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
476
477 /*
478 * The boot cpu makes this call again after platform initialization is
479 * complete.
480 */
481 if (nodepdaindr[0] == NULL)
482 return;
483
484 cpuid = smp_processor_id();
485 cpuphyid = get_sapicid();
486
487 if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
488 BUG();
489
490 for (i=0; i < MAX_NUMNODES; i++) {
491 if (nodepdaindr[i]) {
492 nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
493 nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
494 nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
495 }
496 }
497
498 cnode = nasid_to_cnodeid(nasid);
499
9b48b466
DN
500 sn_nodepda = nodepdaindr[cnode];
501
1da177e4
LT
502 pda->led_address =
503 (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
504 pda->led_state = LED_ALWAYS_SET;
505 pda->hb_count = HZ / 2;
506 pda->hb_state = 0;
507 pda->idle_flag = 0;
508
509 if (cpuid != 0) {
2e34f07f
DN
510 /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */
511 memcpy(sn_cnodeid_to_nasid,
512 (&per_cpu(__sn_cnodeid_to_nasid, 0)),
513 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
1da177e4
LT
514 }
515
516 /*
517 * Check for WARs.
518 * Only needs to be done once, on BSP.
2e34f07f
DN
519 * Has to be done after loop above, because it uses this cpu's
520 * sn_cnodeid_to_nasid table which was just initialized if this
521 * isn't cpu 0.
1da177e4
LT
522 * Has to be done before assignment below.
523 */
524 if (!wars_have_been_checked) {
525 sn_check_for_wars();
526 wars_have_been_checked = 1;
527 }
528 sn_hub_info->shub_1_1_found = shub_1_1_found;
529
530 /*
531 * Set up addresses of PIO/MEM write status registers.
532 */
533 {
534 u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
71a5d027 535 u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1,
1da177e4
LT
536 SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3};
537 u64 *pio;
538 pio = is_shub1() ? pio1 : pio2;
539 pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);
540 pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
541 }
542
543 /*
544 * WAR addresses for SHUB 1.x.
545 */
546 if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
547 int buddy_nasid;
548 buddy_nasid =
549 cnodeid_to_nasid(numa_node_id() ==
550 num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
551 pda->pio_shub_war_cam_addr =
552 (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
553 SH1_PI_CAM_CONTROL);
554 }
555}
556
557/*
558 * Scan klconfig for ionodes. Add the nasids to the
559 * physical_node_map and the pda and increment numionodes.
560 */
561
562static void __init scan_for_ionodes(void)
563{
564 int nasid = 0;
565 lboard_t *brd;
566
71a5d027
JS
567 /* fakeprom does not support klgraph */
568 if (IS_RUNNING_ON_FAKE_PROM())
569 return;
570
1da177e4
LT
571 /* Setup ionodes with memory */
572 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
573 char *klgraph_header;
574 cnodeid_t cnodeid;
575
576 if (physical_node_map[nasid] == -1)
577 continue;
578
579 cnodeid = -1;
580 klgraph_header = __va(ia64_sn_get_klconfig_addr(nasid));
581 if (!klgraph_header) {
1da177e4
LT
582 BUG(); /* All nodes must have klconfig tables! */
583 }
584 cnodeid = nasid_to_cnodeid(nasid);
585 root_lboard[cnodeid] = (lboard_t *)
586 NODE_OFFSET_TO_LBOARD((nasid),
587 ((kl_config_hdr_t
588 *) (klgraph_header))->
589 ch_board_info);
590 }
591
592 /* Scan headless/memless IO Nodes. */
593 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
594 /* if there's no nasid, don't try to read the klconfig on the node */
595 if (physical_node_map[nasid] == -1)
596 continue;
597 brd = find_lboard_any((lboard_t *)
598 root_lboard[nasid_to_cnodeid(nasid)],
599 KLTYPE_SNIA);
600 if (brd) {
601 brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */
602 if (!brd)
603 continue;
604 }
605
606 brd = find_lboard_any(brd, KLTYPE_SNIA);
607
608 while (brd) {
2e34f07f 609 sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
1da177e4
LT
610 physical_node_map[brd->brd_nasid] = numionodes;
611 root_lboard[numionodes] = brd;
612 numionodes++;
613 brd = KLCF_NEXT_ANY(brd);
614 if (!brd)
615 break;
616
617 brd = find_lboard_any(brd, KLTYPE_SNIA);
618 }
619 }
620
621 /* Scan for TIO nodes. */
622 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
623 /* if there's no nasid, don't try to read the klconfig on the node */
624 if (physical_node_map[nasid] == -1)
625 continue;
626 brd = find_lboard_any((lboard_t *)
627 root_lboard[nasid_to_cnodeid(nasid)],
628 KLTYPE_TIO);
629 while (brd) {
2e34f07f 630 sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
1da177e4
LT
631 physical_node_map[brd->brd_nasid] = numionodes;
632 root_lboard[numionodes] = brd;
633 numionodes++;
634 brd = KLCF_NEXT_ANY(brd);
635 if (!brd)
636 break;
637
638 brd = find_lboard_any(brd, KLTYPE_TIO);
639 }
640 }
1da177e4
LT
641}
642
643int
644nasid_slice_to_cpuid(int nasid, int slice)
645{
646 long cpu;
71a5d027
JS
647
648 for (cpu=0; cpu < NR_CPUS; cpu++)
9b48b466
DN
649 if (cpuid_to_nasid(cpu) == nasid &&
650 cpuid_to_slice(cpu) == slice)
1da177e4
LT
651 return cpu;
652
653 return -1;
654}