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Commit | Line | Data |
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1da177e4 LT |
1 | |
2 | #include <asm/cache.h> | |
3 | #include <asm/ptrace.h> | |
4 | #include <asm/system.h> | |
5 | #include <asm/pgtable.h> | |
6 | ||
1da177e4 LT |
7 | #include <asm-generic/vmlinux.lds.h> |
8 | ||
c7b645f9 KA |
9 | #define IVT_TEXT \ |
10 | VMLINUX_SYMBOL(__start_ivt_text) = .; \ | |
2b55f367 | 11 | *(.text..ivt) \ |
c7b645f9 KA |
12 | VMLINUX_SYMBOL(__end_ivt_text) = .; |
13 | ||
1da177e4 LT |
14 | OUTPUT_FORMAT("elf64-ia64-little") |
15 | OUTPUT_ARCH(ia64) | |
16 | ENTRY(phys_start) | |
17 | jiffies = jiffies_64; | |
18 | PHDRS { | |
19 | code PT_LOAD; | |
20 | percpu PT_LOAD; | |
21 | data PT_LOAD; | |
336cdba8 | 22 | note PT_NOTE; |
9bf77d0e | 23 | unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */ |
1da177e4 LT |
24 | } |
25 | SECTIONS | |
26 | { | |
023bf6f1 TH |
27 | /* unwind exit sections must be discarded before the rest of the |
28 | sections get included. */ | |
1da177e4 | 29 | /DISCARD/ : { |
1da177e4 LT |
30 | *(.IA_64.unwind.exit.text) |
31 | *(.IA_64.unwind_info.exit.text) | |
023bf6f1 TH |
32 | *(.comment) |
33 | *(.note) | |
34 | } | |
1da177e4 LT |
35 | |
36 | v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */ | |
37 | phys_start = _start - LOAD_OFFSET; | |
38 | ||
39 | code : { } :code | |
40 | . = KERNEL_START; | |
41 | ||
42 | _text = .; | |
43 | _stext = .; | |
44 | ||
45 | .text : AT(ADDR(.text) - LOAD_OFFSET) | |
46 | { | |
c7b645f9 | 47 | IVT_TEXT |
7664709b | 48 | TEXT_TEXT |
1da177e4 LT |
49 | SCHED_TEXT |
50 | LOCK_TEXT | |
1f7ad57b | 51 | KPROBES_TEXT |
1da177e4 LT |
52 | *(.gnu.linkonce.t*) |
53 | } | |
54 | .text2 : AT(ADDR(.text2) - LOAD_OFFSET) | |
55 | { *(.text2) } | |
56 | #ifdef CONFIG_SMP | |
75ddb0e8 DV |
57 | .text..lock : AT(ADDR(.text..lock) - LOAD_OFFSET) |
58 | { *(.text..lock) } | |
1da177e4 LT |
59 | #endif |
60 | _etext = .; | |
61 | ||
62 | /* Read-only data */ | |
63 | ||
336cdba8 DMT |
64 | NOTES :code :note /* put .notes in text and mark in PT_NOTE */ |
65 | code_continues : {} :code /* switch back to regular program... */ | |
66 | ||
6ae86350 | 67 | EXCEPTION_TABLE(16) |
1da177e4 | 68 | |
d89cfe7f RA |
69 | /* MCA table */ |
70 | . = ALIGN(16); | |
71 | __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET) | |
72 | { | |
73 | __start___mca_table = .; | |
74 | *(__mca_table) | |
75 | __stop___mca_table = .; | |
76 | } | |
77 | ||
dafb9320 | 78 | .data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET) |
a0776ec8 KC |
79 | { |
80 | __start___phys_stack_reg_patchlist = .; | |
dafb9320 | 81 | *(.data..patch.phys_stack_reg) |
a0776ec8 KC |
82 | __end___phys_stack_reg_patchlist = .; |
83 | } | |
84 | ||
1da177e4 LT |
85 | /* Global data */ |
86 | _data = .; | |
87 | ||
1da177e4 LT |
88 | /* Unwind info & table: */ |
89 | . = ALIGN(8); | |
90 | .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET) | |
91 | { *(.IA_64.unwind_info*) } | |
92 | .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET) | |
93 | { | |
94 | __start_unwind = .; | |
95 | *(.IA_64.unwind*) | |
96 | __end_unwind = .; | |
9bf77d0e DMT |
97 | } :code :unwind |
98 | code_continues2 : {} : code | |
1da177e4 LT |
99 | |
100 | RODATA | |
101 | ||
102 | .opd : AT(ADDR(.opd) - LOAD_OFFSET) | |
103 | { *(.opd) } | |
104 | ||
105 | /* Initialization code and data: */ | |
106 | ||
107 | . = ALIGN(PAGE_SIZE); | |
108 | __init_begin = .; | |
1da177e4 | 109 | |
6ae86350 NE |
110 | INIT_TEXT_SECTION(PAGE_SIZE) |
111 | INIT_DATA_SECTION(16) | |
39e18de8 | 112 | |
dafb9320 | 113 | .data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET) |
39e18de8 KC |
114 | { |
115 | __start___vtop_patchlist = .; | |
dafb9320 | 116 | *(.data..patch.vtop) |
39e18de8 KC |
117 | __end___vtop_patchlist = .; |
118 | } | |
119 | ||
dafb9320 | 120 | .data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET) |
4dcc29e1 TL |
121 | { |
122 | __start___rse_patchlist = .; | |
dafb9320 | 123 | *(.data..patch.rse) |
4dcc29e1 TL |
124 | __end___rse_patchlist = .; |
125 | } | |
126 | ||
dafb9320 | 127 | .data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET) |
39e18de8 KC |
128 | { |
129 | __start___mckinley_e9_bundles = .; | |
dafb9320 | 130 | *(.data..patch.mckinley_e9) |
39e18de8 KC |
131 | __end___mckinley_e9_bundles = .; |
132 | } | |
133 | ||
bf7ab02f IY |
134 | #if defined(CONFIG_PARAVIRT) |
135 | . = ALIGN(16); | |
136 | .paravirt_bundles : AT(ADDR(.paravirt_bundles) - LOAD_OFFSET) | |
137 | { | |
138 | __start_paravirt_bundles = .; | |
139 | *(.paravirt_bundles) | |
140 | __stop_paravirt_bundles = .; | |
141 | } | |
142 | . = ALIGN(16); | |
143 | .paravirt_insts : AT(ADDR(.paravirt_insts) - LOAD_OFFSET) | |
144 | { | |
145 | __start_paravirt_insts = .; | |
146 | *(.paravirt_insts) | |
147 | __stop_paravirt_insts = .; | |
148 | } | |
149 | . = ALIGN(16); | |
150 | .paravirt_branches : AT(ADDR(.paravirt_branches) - LOAD_OFFSET) | |
151 | { | |
152 | __start_paravirt_branches = .; | |
153 | *(.paravirt_branches) | |
154 | __stop_paravirt_branches = .; | |
155 | } | |
156 | #endif | |
157 | ||
39e18de8 KC |
158 | #if defined(CONFIG_IA64_GENERIC) |
159 | /* Machine Vector */ | |
160 | . = ALIGN(16); | |
161 | .machvec : AT(ADDR(.machvec) - LOAD_OFFSET) | |
162 | { | |
163 | machvec_start = .; | |
164 | *(.machvec) | |
165 | machvec_end = .; | |
166 | } | |
167 | #endif | |
168 | ||
36886478 TH |
169 | #ifdef CONFIG_SMP |
170 | . = ALIGN(PERCPU_PAGE_SIZE); | |
171 | __cpu0_per_cpu = .; | |
172 | . = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */ | |
173 | #endif | |
174 | ||
1da177e4 LT |
175 | . = ALIGN(PAGE_SIZE); |
176 | __init_end = .; | |
177 | ||
75b13483 | 178 | .data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) |
ed7af3e6 NE |
179 | { |
180 | PAGE_ALIGNED_DATA(PAGE_SIZE) | |
181 | . = ALIGN(PAGE_SIZE); | |
1da177e4 | 182 | __start_gate_section = .; |
e1cb14b8 | 183 | *(.data..gate) |
1da177e4 | 184 | __stop_gate_section = .; |
b937dd76 IY |
185 | #ifdef CONFIG_XEN |
186 | . = ALIGN(PAGE_SIZE); | |
187 | __xen_start_gate_section = .; | |
e1cb14b8 | 188 | *(.data..gate.xen) |
b937dd76 IY |
189 | __xen_stop_gate_section = .; |
190 | #endif | |
1da177e4 | 191 | } |
df8f0ec1 AS |
192 | . = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose |
193 | * kernel data | |
194 | */ | |
1da177e4 | 195 | |
1da177e4 | 196 | /* Per-cpu data: */ |
1da177e4 | 197 | . = ALIGN(PERCPU_PAGE_SIZE); |
19390c4d TH |
198 | PERCPU_VADDR(PERCPU_ADDR, :percpu) |
199 | __phys_per_cpu_start = __per_cpu_load; | |
df8f0ec1 AS |
200 | . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits |
201 | * into percpu page size | |
202 | */ | |
1da177e4 LT |
203 | |
204 | data : { } :data | |
205 | .data : AT(ADDR(.data) - LOAD_OFFSET) | |
ca967258 | 206 | { |
6ae86350 NE |
207 | INIT_TASK_DATA(PAGE_SIZE) |
208 | CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES) | |
209 | READ_MOSTLY_DATA(SMP_CACHE_BYTES) | |
ca967258 SR |
210 | DATA_DATA |
211 | *(.data1) | |
212 | *(.gnu.linkonce.d*) | |
213 | CONSTRUCTORS | |
214 | } | |
1da177e4 LT |
215 | |
216 | . = ALIGN(16); /* gp must be 16-byte aligned for exc. table */ | |
217 | .got : AT(ADDR(.got) - LOAD_OFFSET) | |
218 | { *(.got.plt) *(.got) } | |
219 | __gp = ADDR(.got) + 0x200000; | |
220 | /* We want the small data sections together, so single-instruction offsets | |
221 | can access them all, and initialized data all before uninitialized, so | |
222 | we can shorten the on-disk segment size. */ | |
223 | .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) | |
224 | { *(.sdata) *(.sdata1) *(.srdata) } | |
225 | _edata = .; | |
6ae86350 NE |
226 | |
227 | BSS_SECTION(0, 0, 0) | |
1da177e4 LT |
228 | |
229 | _end = .; | |
230 | ||
231 | code : { } :code | |
6ae86350 NE |
232 | |
233 | STABS_DEBUG | |
234 | DWARF_DEBUG | |
023bf6f1 TH |
235 | |
236 | /* Default discards */ | |
237 | DISCARDS | |
1da177e4 | 238 | } |