[net-next-2.6.git] / arch / ia64 / include / asm / dma-mapping.h

#ifndef _ASM_IA64_DMA_MAPPING_H
#define _ASM_IA64_DMA_MAPPING_H

/*
 * Copyright (C) 2003-2004 Hewlett-Packard Co
 *	David Mosberger-Tang <davidm@hpl.hp.com>
 */
#include <asm/machvec.h>
#include <linux/scatterlist.h>
#include <asm/swiotlb.h>

struct dma_mapping_ops {
	int             (*mapping_error)(struct device *dev,
					 dma_addr_t dma_addr);
	void*           (*alloc_coherent)(struct device *dev, size_t size,
				dma_addr_t *dma_handle, gfp_t gfp);
	void            (*free_coherent)(struct device *dev, size_t size,
				void *vaddr, dma_addr_t dma_handle);
	dma_addr_t      (*map_single)(struct device *hwdev, unsigned long ptr,
				size_t size, int direction);
	void            (*unmap_single)(struct device *dev, dma_addr_t addr,
				size_t size, int direction);
	dma_addr_t      (*map_single_attrs)(struct device *dev, void *cpu_addr,
					    size_t size, int direction,
					    struct dma_attrs *attrs);
	void		(*unmap_single_attrs)(struct device *dev,
					      dma_addr_t dma_addr,
					      size_t size, int direction,
					      struct dma_attrs *attrs);
	void            (*sync_single_for_cpu)(struct device *hwdev,
				dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_for_device)(struct device *hwdev,
				dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_range_for_cpu)(struct device *hwdev,
				dma_addr_t dma_handle, unsigned long offset,
				size_t size, int direction);
	void            (*sync_single_range_for_device)(struct device *hwdev,
				dma_addr_t dma_handle, unsigned long offset,
				size_t size, int direction);
	void            (*sync_sg_for_cpu)(struct device *hwdev,
				struct scatterlist *sg, int nelems,
				int direction);
	void            (*sync_sg_for_device)(struct device *hwdev,
				struct scatterlist *sg, int nelems,
				int direction);
	int             (*map_sg)(struct device *hwdev, struct scatterlist *sg,
				int nents, int direction);
	void            (*unmap_sg)(struct device *hwdev,
				struct scatterlist *sg, int nents,
				int direction);
	int             (*map_sg_attrs)(struct device *dev,
					struct scatterlist *sg, int nents,
					int direction, struct dma_attrs *attrs);
	void            (*unmap_sg_attrs)(struct device *dev,
					  struct scatterlist *sg, int nents,
					  int direction,
					  struct dma_attrs *attrs);
	int             (*dma_supported_op)(struct device *hwdev, u64 mask);
	int		is_phys;
};

extern struct dma_mapping_ops *dma_ops;
extern struct ia64_machine_vector ia64_mv;
extern void set_iommu_machvec(void);

#define dma_alloc_coherent(dev, size, handle, gfp)	\
	platform_dma_alloc_coherent(dev, size, handle, (gfp) | GFP_DMA)

/* coherent mem. is cheap */
static inline void *
dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
		      gfp_t flag)
{
	return dma_alloc_coherent(dev, size, dma_handle, flag);
}
#define dma_free_coherent	platform_dma_free_coherent
static inline void
dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
		     dma_addr_t dma_handle)
{
	dma_free_coherent(dev, size, cpu_addr, dma_handle);
}
#define dma_map_single_attrs	platform_dma_map_single_attrs
static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
					size_t size, int dir)
{
	return dma_map_single_attrs(dev, cpu_addr, size, dir, NULL);
}
#define dma_map_sg_attrs	platform_dma_map_sg_attrs
static inline int dma_map_sg(struct device *dev, struct scatterlist *sgl,
			     int nents, int dir)
{
	return dma_map_sg_attrs(dev, sgl, nents, dir, NULL);
}
#define dma_unmap_single_attrs	platform_dma_unmap_single_attrs
static inline void dma_unmap_single(struct device *dev, dma_addr_t cpu_addr,
				    size_t size, int dir)
{
	return dma_unmap_single_attrs(dev, cpu_addr, size, dir, NULL);
}
#define dma_unmap_sg_attrs	platform_dma_unmap_sg_attrs
static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sgl,
				int nents, int dir)
{
	return dma_unmap_sg_attrs(dev, sgl, nents, dir, NULL);
}
#define dma_sync_single_for_cpu	platform_dma_sync_single_for_cpu
#define dma_sync_sg_for_cpu	platform_dma_sync_sg_for_cpu
#define dma_sync_single_for_device platform_dma_sync_single_for_device
#define dma_sync_sg_for_device	platform_dma_sync_sg_for_device
#define dma_mapping_error	platform_dma_mapping_error

#define dma_map_page(dev, pg, off, size, dir)				\
	dma_map_single(dev, page_address(pg) + (off), (size), (dir))
#define dma_unmap_page(dev, dma_addr, size, dir)			\
	dma_unmap_single(dev, dma_addr, size, dir)

/*
 * Rest of this file is part of the "Advanced DMA API".  Use at your own risk.
 * See Documentation/DMA-API.txt for details.
 */

#define dma_sync_single_range_for_cpu(dev, dma_handle, offset, size, dir)	\
	dma_sync_single_for_cpu(dev, dma_handle, size, dir)
#define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir)	\
	dma_sync_single_for_device(dev, dma_handle, size, dir)

#define dma_supported		platform_dma_supported

static inline int
dma_set_mask (struct device *dev, u64 mask)
{
	if (!dev->dma_mask || !dma_supported(dev, mask))
		return -EIO;
	*dev->dma_mask = mask;
	return 0;
}

extern int dma_get_cache_alignment(void);

static inline void
dma_cache_sync (struct device *dev, void *vaddr, size_t size,
	enum dma_data_direction dir)
{
	/*
	 * IA-64 is cache-coherent, so this is mostly a no-op.  However, we do need to
	 * ensure that dma_cache_sync() enforces order, hence the mb().
	 */
	mb();
}

#define dma_is_consistent(d, h)	(1)	/* all we do is coherent memory... */

static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
{
	return dma_ops;
}


#endif /* _ASM_IA64_DMA_MAPPING_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _ASM_IA64_DMA_MAPPING_H
	2	#define _ASM_IA64_DMA_MAPPING_H
	3
	4	/*
	5	* Copyright (C) 2003-2004 Hewlett-Packard Co
	6	* David Mosberger-Tang <davidm@hpl.hp.com>
	7	*/
1da177e4	8	#include <asm/machvec.h>
9b6eccfc	9	#include <linux/scatterlist.h>
62fdd767 FY	10	#include <asm/swiotlb.h>
	11
	12	struct dma_mapping_ops {
	13	int (mapping_error)(struct device dev,
	14	dma_addr_t dma_addr);
	15	void* (alloc_coherent)(struct device dev, size_t size,
	16	dma_addr_t *dma_handle, gfp_t gfp);
	17	void (free_coherent)(struct device dev, size_t size,
	18	void *vaddr, dma_addr_t dma_handle);
	19	dma_addr_t (map_single)(struct device hwdev, unsigned long ptr,
	20	size_t size, int direction);
	21	void (unmap_single)(struct device dev, dma_addr_t addr,
	22	size_t size, int direction);
e751ab33 FT	23	dma_addr_t (map_single_attrs)(struct device dev, void *cpu_addr,
	24	size_t size, int direction,
	25	struct dma_attrs *attrs);
	26	void (unmap_single_attrs)(struct device dev,
	27	dma_addr_t dma_addr,
	28	size_t size, int direction,
	29	struct dma_attrs *attrs);
62fdd767 FY	30	void (sync_single_for_cpu)(struct device hwdev,
	31	dma_addr_t dma_handle, size_t size,
	32	int direction);
	33	void (sync_single_for_device)(struct device hwdev,
	34	dma_addr_t dma_handle, size_t size,
	35	int direction);
	36	void (sync_single_range_for_cpu)(struct device hwdev,
	37	dma_addr_t dma_handle, unsigned long offset,
	38	size_t size, int direction);
	39	void (sync_single_range_for_device)(struct device hwdev,
	40	dma_addr_t dma_handle, unsigned long offset,
	41	size_t size, int direction);
	42	void (sync_sg_for_cpu)(struct device hwdev,
	43	struct scatterlist *sg, int nelems,
	44	int direction);
	45	void (sync_sg_for_device)(struct device hwdev,
	46	struct scatterlist *sg, int nelems,
	47	int direction);
	48	int (map_sg)(struct device hwdev, struct scatterlist *sg,
	49	int nents, int direction);
	50	void (unmap_sg)(struct device hwdev,
	51	struct scatterlist *sg, int nents,
	52	int direction);
e751ab33 FT	53	int (map_sg_attrs)(struct device dev,
	54	struct scatterlist *sg, int nents,
	55	int direction, struct dma_attrs *attrs);
	56	void (unmap_sg_attrs)(struct device dev,
	57	struct scatterlist *sg, int nents,
	58	int direction,
	59	struct dma_attrs *attrs);
62fdd767 FY	60	int (dma_supported_op)(struct device hwdev, u64 mask);
	61	int is_phys;
	62	};
	63
	64	extern struct dma_mapping_ops *dma_ops;
	65	extern struct ia64_machine_vector ia64_mv;
	66	extern void set_iommu_machvec(void);
1da177e4	67
3a80b6aa FT	68	#define dma_alloc_coherent(dev, size, handle, gfp) \
	69	platform_dma_alloc_coherent(dev, size, handle, (gfp) \| GFP_DMA)
	70
b7de8e7e RD	71	/* coherent mem. is cheap */
	72	static inline void *
	73	dma_alloc_noncoherent(struct device dev, size_t size, dma_addr_t dma_handle,
	74	gfp_t flag)
	75	{
	76	return dma_alloc_coherent(dev, size, dma_handle, flag);
	77	}
1da177e4	78	#define dma_free_coherent platform_dma_free_coherent
b7de8e7e RD	79	static inline void
	80	dma_free_noncoherent(struct device dev, size_t size, void cpu_addr,
	81	dma_addr_t dma_handle)
	82	{
	83	dma_free_coherent(dev, size, cpu_addr, dma_handle);
	84	}
309df0c5 AK	85	#define dma_map_single_attrs platform_dma_map_single_attrs
	86	static inline dma_addr_t dma_map_single(struct device dev, void cpu_addr,
	87	size_t size, int dir)
	88	{
	89	return dma_map_single_attrs(dev, cpu_addr, size, dir, NULL);
	90	}
	91	#define dma_map_sg_attrs platform_dma_map_sg_attrs
	92	static inline int dma_map_sg(struct device dev, struct scatterlist sgl,
	93	int nents, int dir)
	94	{
	95	return dma_map_sg_attrs(dev, sgl, nents, dir, NULL);
	96	}
	97	#define dma_unmap_single_attrs platform_dma_unmap_single_attrs
	98	static inline void dma_unmap_single(struct device *dev, dma_addr_t cpu_addr,
	99	size_t size, int dir)
	100	{
	101	return dma_unmap_single_attrs(dev, cpu_addr, size, dir, NULL);
	102	}
	103	#define dma_unmap_sg_attrs platform_dma_unmap_sg_attrs
	104	static inline void dma_unmap_sg(struct device dev, struct scatterlist sgl,
	105	int nents, int dir)
	106	{
	107	return dma_unmap_sg_attrs(dev, sgl, nents, dir, NULL);
	108	}
1da177e4 LT	109	#define dma_sync_single_for_cpu platform_dma_sync_single_for_cpu
	110	#define dma_sync_sg_for_cpu platform_dma_sync_sg_for_cpu
	111	#define dma_sync_single_for_device platform_dma_sync_single_for_device
	112	#define dma_sync_sg_for_device platform_dma_sync_sg_for_device
	113	#define dma_mapping_error platform_dma_mapping_error
	114
	115	#define dma_map_page(dev, pg, off, size, dir) \
	116	dma_map_single(dev, page_address(pg) + (off), (size), (dir))
	117	#define dma_unmap_page(dev, dma_addr, size, dir) \
	118	dma_unmap_single(dev, dma_addr, size, dir)
	119
	120	/*
	121	* Rest of this file is part of the "Advanced DMA API". Use at your own risk.
	122	* See Documentation/DMA-API.txt for details.
	123	*/
	124
	125	#define dma_sync_single_range_for_cpu(dev, dma_handle, offset, size, dir) \
	126	dma_sync_single_for_cpu(dev, dma_handle, size, dir)
	127	#define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir) \
	128	dma_sync_single_for_device(dev, dma_handle, size, dir)
	129
	130	#define dma_supported platform_dma_supported
	131
	132	static inline int
	133	dma_set_mask (struct device *dev, u64 mask)
	134	{
	135	if (!dev->dma_mask \|\| !dma_supported(dev, mask))
	136	return -EIO;
	137	*dev->dma_mask = mask;
	138	return 0;
	139	}
	140
e1531b42	141	extern int dma_get_cache_alignment(void);
1da177e4 LT	142
1da177e4 LT	143	static inline void
d3fa72e4 RB	144	dma_cache_sync (struct device dev, void vaddr, size_t size,
d3fa72e4 RB	145	enum dma_data_direction dir)
1da177e4 LT	146	{
	147	/*
	148	* IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to
	149	* ensure that dma_cache_sync() enforces order, hence the mb().
	150	*/
	151	mb();
	152	}
	153
f67637ee	154	#define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */
1da177e4	155
62fdd767 FY	156	static inline struct dma_mapping_ops get_dma_ops(struct device dev)
	157	{
	158	return dma_ops;
	159	}
	160
	161
	162
1da177e4	163	#endif /* _ASM_IA64_DMA_MAPPING_H */