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[PATCH] usb/core/hcd-pci.c: don't free_irq() on suspend
[net-next-2.6.git] / arch / i386 / pci / irq.c
CommitLineData
1da177e4
LT		 1/*
2 * Low-Level PCI Support for PC -- Routing of Interrupts
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7#include <linux/config.h>
8#include <linux/types.h>
9#include <linux/kernel.h>
10#include <linux/pci.h>
11#include <linux/init.h>
12#include <linux/slab.h>
13#include <linux/interrupt.h>
1da177e4
LT		 14#include <linux/dmi.h>
15#include <asm/io.h>
16#include <asm/smp.h>
17#include <asm/io_apic.h>
18#include <asm/hw_irq.h>
19#include <linux/acpi.h>
20
21#include "pci.h"
22
23#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
24#define PIRQ_VERSION 0x0100
25
26static int broken_hp_bios_irq9;
27static int acer_tm360_irqrouting;
28
29static struct irq_routing_table *pirq_table;
30
31static int pirq_enable_irq(struct pci_dev *dev);
32
33/*
34 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
35 * Avoid using: 13, 14 and 15 (FP error and IDE).
36 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
37 */
38unsigned int pcibios_irq_mask = 0xfff8;
39
40static int pirq_penalty[16] = {
41 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
42 0, 0, 0, 0, 1000, 100000, 100000, 100000
43};
44
45struct irq_router {
46 char *name;
47 u16 vendor, device;
48 int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
49 int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
50};
51
52struct irq_router_handler {
53 u16 vendor;
54 int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
55};
56
57int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
87bec66b 58void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
1da177e4 59
120bb424 60/*
61 * Check passed address for the PCI IRQ Routing Table signature
62 * and perform checksum verification.
63 */
64
65static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
66{
67 struct irq_routing_table *rt;
68 int i;
69 u8 sum;
70
71 rt = (struct irq_routing_table *) addr;
72 if (rt->signature != PIRQ_SIGNATURE ||
73 rt->version != PIRQ_VERSION ||
74 rt->size % 16 ||
75 rt->size < sizeof(struct irq_routing_table))
76 return NULL;
77 sum = 0;
78 for (i=0; i < rt->size; i++)
79 sum += addr[i];
80 if (!sum) {
81 DBG("PCI: Interrupt Routing Table found at 0x%p\n", rt);
82 return rt;
83 }
84 return NULL;
85}
86
87
88
1da177e4
LT		 89/*
90 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
91 */
92
93static struct irq_routing_table * __init pirq_find_routing_table(void)
94{
95 u8 *addr;
96 struct irq_routing_table *rt;
1da177e4 97
120bb424 98 if (pirq_table_addr) {
99 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
100 if (rt)
101 return rt;
102 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
103 }
1da177e4 104 for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
120bb424 105 rt = pirq_check_routing_table(addr);
106 if (rt)
1da177e4 107 return rt;
1da177e4
LT		 108 }
109 return NULL;
110}
111
112/*
113 * If we have a IRQ routing table, use it to search for peer host
114 * bridges. It's a gross hack, but since there are no other known
115 * ways how to get a list of buses, we have to go this way.
116 */
117
118static void __init pirq_peer_trick(void)
119{
120 struct irq_routing_table *rt = pirq_table;
121 u8 busmap[256];
122 int i;
123 struct irq_info *e;
124
125 memset(busmap, 0, sizeof(busmap));
126 for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
127 e = &rt->slots[i];
128#ifdef DEBUG
129 {
130 int j;
131 DBG("%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
132 for(j=0; j<4; j++)
133 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
134 DBG("\n");
135 }
136#endif
137 busmap[e->bus] = 1;
138 }
139 for(i = 1; i < 256; i++) {
140 if (!busmap[i] || pci_find_bus(0, i))
141 continue;
142 if (pci_scan_bus(i, &pci_root_ops, NULL))
143 printk(KERN_INFO "PCI: Discovered primary peer bus %02x [IRQ]\n", i);
144 }
145 pcibios_last_bus = -1;
146}
147
148/*
149 * Code for querying and setting of IRQ routes on various interrupt routers.
150 */
151
152void eisa_set_level_irq(unsigned int irq)
153{
154 unsigned char mask = 1 << (irq & 7);
155 unsigned int port = 0x4d0 + (irq >> 3);
156 unsigned char val;
157 static u16 eisa_irq_mask;
158
159 if (irq >= 16 || (1 << irq) & eisa_irq_mask)
160 return;
161
162 eisa_irq_mask |= (1 << irq);
163 printk("PCI: setting IRQ %u as level-triggered\n", irq);
164 val = inb(port);
165 if (!(val & mask)) {
166 DBG(" -> edge");
167 outb(val | mask, port);
168 }
169}
170
171/*
172 * Common IRQ routing practice: nybbles in config space,
173 * offset by some magic constant.
174 */
175static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
176{
177 u8 x;
178 unsigned reg = offset + (nr >> 1);
179
180 pci_read_config_byte(router, reg, &x);
181 return (nr & 1) ? (x >> 4) : (x & 0xf);
182}
183
184static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
185{
186 u8 x;
187 unsigned reg = offset + (nr >> 1);
188
189 pci_read_config_byte(router, reg, &x);
190 x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
191 pci_write_config_byte(router, reg, x);
192}
193
194/*
195 * ALI pirq entries are damn ugly, and completely undocumented.
196 * This has been figured out from pirq tables, and it's not a pretty
197 * picture.
198 */
199static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
200{
201 static unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
202
203 return irqmap[read_config_nybble(router, 0x48, pirq-1)];
204}
205
206static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
207{
208 static unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
209 unsigned int val = irqmap[irq];
210
211 if (val) {
212 write_config_nybble(router, 0x48, pirq-1, val);
213 return 1;
214 }
215 return 0;
216}
217
218/*
219 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
220 * just a pointer to the config space.
221 */
222static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
223{
224 u8 x;
225
226 pci_read_config_byte(router, pirq, &x);
227 return (x < 16) ? x : 0;
228}
229
230static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
231{
232 pci_write_config_byte(router, pirq, irq);
233 return 1;
234}
235
236/*
237 * The VIA pirq rules are nibble-based, like ALI,
238 * but without the ugly irq number munging.
239 * However, PIRQD is in the upper instead of lower 4 bits.
240 */
241static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
242{
243 return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
244}
245
246static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
247{
248 write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
249 return 1;
250}
251
80bb82af
AG		 252/*
253 * The VIA pirq rules are nibble-based, like ALI,
254 * but without the ugly irq number munging.
255 * However, for 82C586, nibble map is different .
256 */
257static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
258{
259 static unsigned int pirqmap[4] = { 3, 2, 5, 1 };
260 return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
261}
262
263static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
264{
265 static unsigned int pirqmap[4] = { 3, 2, 5, 1 };
266 write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
267 return 1;
268}
269
1da177e4
LT		 270/*
271 * ITE 8330G pirq rules are nibble-based
272 * FIXME: pirqmap may be { 1, 0, 3, 2 },
273 * 2+3 are both mapped to irq 9 on my system
274 */
275static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
276{
277 static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
278 return read_config_nybble(router,0x43, pirqmap[pirq-1]);
279}
280
281static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
282{
283 static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
284 write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
285 return 1;
286}
287
288/*
289 * OPTI: high four bits are nibble pointer..
290 * I wonder what the low bits do?
291 */
292static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
293{
294 return read_config_nybble(router, 0xb8, pirq >> 4);
295}
296
297static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
298{
299 write_config_nybble(router, 0xb8, pirq >> 4, irq);
300 return 1;
301}
302
303/*
304 * Cyrix: nibble offset 0x5C
305 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
306 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
307 */
308static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
309{
310 return read_config_nybble(router, 0x5C, (pirq-1)^1);
311}
312
313static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
314{
315 write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
316 return 1;
317}
318
319/*
320 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
321 * We have to deal with the following issues here:
322 * - vendors have different ideas about the meaning of link values
323 * - some onboard devices (integrated in the chipset) have special
324 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
325 * - different revision of the router have a different layout for
326 * the routing registers, particularly for the onchip devices
327 *
328 * For all routing registers the common thing is we have one byte
329 * per routeable link which is defined as:
330 * bit 7 IRQ mapping enabled (0) or disabled (1)
331 * bits [6:4] reserved (sometimes used for onchip devices)
332 * bits [3:0] IRQ to map to
333 * allowed: 3-7, 9-12, 14-15
334 * reserved: 0, 1, 2, 8, 13
335 *
336 * The config-space registers located at 0x41/0x42/0x43/0x44 are
337 * always used to route the normal PCI INT A/B/C/D respectively.
338 * Apparently there are systems implementing PCI routing table using
339 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
340 * We try our best to handle both link mappings.
341 *
342 * Currently (2003-05-21) it appears most SiS chipsets follow the
343 * definition of routing registers from the SiS-5595 southbridge.
344 * According to the SiS 5595 datasheets the revision id's of the
345 * router (ISA-bridge) should be 0x01 or 0xb0.
346 *
347 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
348 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
349 * They seem to work with the current routing code. However there is
350 * some concern because of the two USB-OHCI HCs (original SiS 5595
351 * had only one). YMMV.
352 *
353 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
354 *
355 * 0x61: IDEIRQ:
356 * bits [6:5] must be written 01
357 * bit 4 channel-select primary (0), secondary (1)
358 *
359 * 0x62: USBIRQ:
360 * bit 6 OHCI function disabled (0), enabled (1)
361 *
362 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
363 *
364 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
365 *
366 * We support USBIRQ (in addition to INTA-INTD) and keep the
367 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
368 *
369 * Currently the only reported exception is the new SiS 65x chipset
370 * which includes the SiS 69x southbridge. Here we have the 85C503
371 * router revision 0x04 and there are changes in the register layout
372 * mostly related to the different USB HCs with USB 2.0 support.
373 *
374 * Onchip routing for router rev-id 0x04 (try-and-error observation)
375 *
376 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
377 * bit 6-4 are probably unused, not like 5595
378 */
379
380#define PIRQ_SIS_IRQ_MASK 0x0f
381#define PIRQ_SIS_IRQ_DISABLE 0x80
382#define PIRQ_SIS_USB_ENABLE 0x40
383
384static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
385{
386 u8 x;
387 int reg;
388
389 reg = pirq;
390 if (reg >= 0x01 && reg <= 0x04)
391 reg += 0x40;
392 pci_read_config_byte(router, reg, &x);
393 return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
394}
395
396static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
397{
398 u8 x;
399 int reg;
400
401 reg = pirq;
402 if (reg >= 0x01 && reg <= 0x04)
403 reg += 0x40;
404 pci_read_config_byte(router, reg, &x);
405 x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
406 x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
407 pci_write_config_byte(router, reg, x);
408 return 1;
409}
410
411
412/*
413 * VLSI: nibble offset 0x74 - educated guess due to routing table and
414 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
415 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
416 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
417 * for the busbridge to the docking station.
418 */
419
420static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
421{
422 if (pirq > 8) {
423 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
424 return 0;
425 }
426 return read_config_nybble(router, 0x74, pirq-1);
427}
428
429static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
430{
431 if (pirq > 8) {
432 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
433 return 0;
434 }
435 write_config_nybble(router, 0x74, pirq-1, irq);
436 return 1;
437}
438
439/*
440 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
441 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
442 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
443 * register is a straight binary coding of desired PIC IRQ (low nibble).
444 *
445 * The 'link' value in the PIRQ table is already in the correct format
446 * for the Index register. There are some special index values:
447 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
448 * and 0x03 for SMBus.
449 */
450static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
451{
452 outb_p(pirq, 0xc00);
453 return inb(0xc01) & 0xf;
454}
455
456static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
457{
458 outb_p(pirq, 0xc00);
459 outb_p(irq, 0xc01);
460 return 1;
461}
462
463/* Support for AMD756 PCI IRQ Routing
464 * Jhon H. Caicedo <jhcaiced@osso.org.co>
465 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
466 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
467 * The AMD756 pirq rules are nibble-based
468 * offset 0x56 0-3 PIRQA 4-7 PIRQB
469 * offset 0x57 0-3 PIRQC 4-7 PIRQD
470 */
471static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
472{
473 u8 irq;
474 irq = 0;
475 if (pirq <= 4)
476 {
477 irq = read_config_nybble(router, 0x56, pirq - 1);
478 }
479 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
480 dev->vendor, dev->device, pirq, irq);
481 return irq;
482}
483
484static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
485{
486 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
487 dev->vendor, dev->device, pirq, irq);
488 if (pirq <= 4)
489 {
490 write_config_nybble(router, 0x56, pirq - 1, irq);
491 }
492 return 1;
493}
494
495#ifdef CONFIG_PCI_BIOS
496
497static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
498{
499 struct pci_dev *bridge;
500 int pin = pci_get_interrupt_pin(dev, &bridge);
501 return pcibios_set_irq_routing(bridge, pin, irq);
502}
503
504#endif
505
506static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
507{
508 static struct pci_device_id pirq_440gx[] = {
509 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
510 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
511 { },
512 };
513
514 /* 440GX has a proprietary PIRQ router -- don't use it */
515 if (pci_dev_present(pirq_440gx))
516 return 0;
517
518 switch(device)
519 {
520 case PCI_DEVICE_ID_INTEL_82371FB_0:
521 case PCI_DEVICE_ID_INTEL_82371SB_0:
522 case PCI_DEVICE_ID_INTEL_82371AB_0:
523 case PCI_DEVICE_ID_INTEL_82371MX:
524 case PCI_DEVICE_ID_INTEL_82443MX_0:
525 case PCI_DEVICE_ID_INTEL_82801AA_0:
526 case PCI_DEVICE_ID_INTEL_82801AB_0:
527 case PCI_DEVICE_ID_INTEL_82801BA_0:
528 case PCI_DEVICE_ID_INTEL_82801BA_10:
529 case PCI_DEVICE_ID_INTEL_82801CA_0:
530 case PCI_DEVICE_ID_INTEL_82801CA_12:
531 case PCI_DEVICE_ID_INTEL_82801DB_0:
532 case PCI_DEVICE_ID_INTEL_82801E_0:
533 case PCI_DEVICE_ID_INTEL_82801EB_0:
534 case PCI_DEVICE_ID_INTEL_ESB_1:
535 case PCI_DEVICE_ID_INTEL_ICH6_0:
536 case PCI_DEVICE_ID_INTEL_ICH6_1:
537 case PCI_DEVICE_ID_INTEL_ICH7_0:
538 case PCI_DEVICE_ID_INTEL_ICH7_1:
4d24a439
JG		 539 case PCI_DEVICE_ID_INTEL_ICH7_30:
540 case PCI_DEVICE_ID_INTEL_ICH7_31:
e285f809 541 case PCI_DEVICE_ID_INTEL_ESB2_0:
1da177e4
LT		 542 r->name = "PIIX/ICH";
543 r->get = pirq_piix_get;
544 r->set = pirq_piix_set;
545 return 1;
546 }
547 return 0;
548}
549
550static __init int via_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
551{
552 /* FIXME: We should move some of the quirk fixup stuff here */
ac12259f
GF		 553
554 if (router->device == PCI_DEVICE_ID_VIA_82C686 &&
555 device == PCI_DEVICE_ID_VIA_82C586_0) {
556 /* Asus k7m bios wrongly reports 82C686A as 586-compatible */
557 device = PCI_DEVICE_ID_VIA_82C686;
558 }
559
1da177e4
LT		 560 switch(device)
561 {
562 case PCI_DEVICE_ID_VIA_82C586_0:
80bb82af
AG		 563 r->name = "VIA";
564 r->get = pirq_via586_get;
565 r->set = pirq_via586_set;
566 return 1;
1da177e4
LT		 567 case PCI_DEVICE_ID_VIA_82C596:
568 case PCI_DEVICE_ID_VIA_82C686:
569 case PCI_DEVICE_ID_VIA_8231:
570 /* FIXME: add new ones for 8233/5 */
571 r->name = "VIA";
572 r->get = pirq_via_get;
573 r->set = pirq_via_set;
574 return 1;
575 }
576 return 0;
577}
578
579static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
580{
581 switch(device)
582 {
583 case PCI_DEVICE_ID_VLSI_82C534:
584 r->name = "VLSI 82C534";
585 r->get = pirq_vlsi_get;
586 r->set = pirq_vlsi_set;
587 return 1;
588 }
589 return 0;
590}
591
592
593static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
594{
595 switch(device)
596 {
597 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
598 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
599 r->name = "ServerWorks";
600 r->get = pirq_serverworks_get;
601 r->set = pirq_serverworks_set;
602 return 1;
603 }
604 return 0;
605}
606
607static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
608{
609 if (device != PCI_DEVICE_ID_SI_503)
610 return 0;
611
612 r->name = "SIS";
613 r->get = pirq_sis_get;
614 r->set = pirq_sis_set;
615 return 1;
616}
617
618static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
619{
620 switch(device)
621 {
622 case PCI_DEVICE_ID_CYRIX_5520:
623 r->name = "NatSemi";
624 r->get = pirq_cyrix_get;
625 r->set = pirq_cyrix_set;
626 return 1;
627 }
628 return 0;
629}
630
631static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
632{
633 switch(device)
634 {
635 case PCI_DEVICE_ID_OPTI_82C700:
636 r->name = "OPTI";
637 r->get = pirq_opti_get;
638 r->set = pirq_opti_set;
639 return 1;
640 }
641 return 0;
642}
643
644static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
645{
646 switch(device)
647 {
648 case PCI_DEVICE_ID_ITE_IT8330G_0:
649 r->name = "ITE";
650 r->get = pirq_ite_get;
651 r->set = pirq_ite_set;
652 return 1;
653 }
654 return 0;
655}
656
657static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
658{
659 switch(device)
660 {
661 case PCI_DEVICE_ID_AL_M1533:
662 case PCI_DEVICE_ID_AL_M1563:
663 printk("PCI: Using ALI IRQ Router\n");
664 r->name = "ALI";
665 r->get = pirq_ali_get;
666 r->set = pirq_ali_set;
667 return 1;
668 }
669 return 0;
670}
671
672static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
673{
674 switch(device)
675 {
676 case PCI_DEVICE_ID_AMD_VIPER_740B:
677 r->name = "AMD756";
678 break;
679 case PCI_DEVICE_ID_AMD_VIPER_7413:
680 r->name = "AMD766";
681 break;
682 case PCI_DEVICE_ID_AMD_VIPER_7443:
683 r->name = "AMD768";
684 break;
685 default:
686 return 0;
687 }
688 r->get = pirq_amd756_get;
689 r->set = pirq_amd756_set;
690 return 1;
691}
692
693static __initdata struct irq_router_handler pirq_routers[] = {
694 { PCI_VENDOR_ID_INTEL, intel_router_probe },
695 { PCI_VENDOR_ID_AL, ali_router_probe },
696 { PCI_VENDOR_ID_ITE, ite_router_probe },
697 { PCI_VENDOR_ID_VIA, via_router_probe },
698 { PCI_VENDOR_ID_OPTI, opti_router_probe },
699 { PCI_VENDOR_ID_SI, sis_router_probe },
700 { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
701 { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
702 { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
703 { PCI_VENDOR_ID_AMD, amd_router_probe },
704 /* Someone with docs needs to add the ATI Radeon IGP */
705 { 0, NULL }
706};
707static struct irq_router pirq_router;
708static struct pci_dev *pirq_router_dev;
709
710
711/*
712 * FIXME: should we have an option to say "generic for
713 * chipset" ?
714 */
715
716static void __init pirq_find_router(struct irq_router *r)
717{
718 struct irq_routing_table *rt = pirq_table;
719 struct irq_router_handler *h;
720
721#ifdef CONFIG_PCI_BIOS
722 if (!rt->signature) {
723 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
724 r->set = pirq_bios_set;
725 r->name = "BIOS";
726 return;
727 }
728#endif
729
730 /* Default unless a driver reloads it */
731 r->name = "default";
732 r->get = NULL;
733 r->set = NULL;
734
735 DBG("PCI: Attempting to find IRQ router for %04x:%04x\n",
736 rt->rtr_vendor, rt->rtr_device);
737
738 pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn);
739 if (!pirq_router_dev) {
740 DBG("PCI: Interrupt router not found at %02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
741 return;
742 }
743
744 for( h = pirq_routers; h->vendor; h++) {
745 /* First look for a router match */
746 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
747 break;
748 /* Fall back to a device match */
749 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
750 break;
751 }
752 printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
753 pirq_router.name,
754 pirq_router_dev->vendor,
755 pirq_router_dev->device,
756 pci_name(pirq_router_dev));
757}
758
759static struct irq_info *pirq_get_info(struct pci_dev *dev)
760{
761 struct irq_routing_table *rt = pirq_table;
762 int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
763 struct irq_info *info;
764
765 for (info = rt->slots; entries--; info++)
766 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
767 return info;
768 return NULL;
769}
770
771static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
772{
773 u8 pin;
774 struct irq_info *info;
775 int i, pirq, newirq;
776 int irq = 0;
777 u32 mask;
778 struct irq_router *r = &pirq_router;
779 struct pci_dev *dev2 = NULL;
780 char *msg = NULL;
781
782 /* Find IRQ pin */
783 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
784 if (!pin) {
785 DBG(" -> no interrupt pin\n");
786 return 0;
787 }
788 pin = pin - 1;
789
790 /* Find IRQ routing entry */
791
792 if (!pirq_table)
793 return 0;
794
795 DBG("IRQ for %s[%c]", pci_name(dev), 'A' + pin);
796 info = pirq_get_info(dev);
797 if (!info) {
798 DBG(" -> not found in routing table\n");
799 return 0;
800 }
801 pirq = info->irq[pin].link;
802 mask = info->irq[pin].bitmap;
803 if (!pirq) {
804 DBG(" -> not routed\n");
805 return 0;
806 }
807 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
808 mask &= pcibios_irq_mask;
809
810 /* Work around broken HP Pavilion Notebooks which assign USB to
811 IRQ 9 even though it is actually wired to IRQ 11 */
812
813 if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
814 dev->irq = 11;
815 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
816 r->set(pirq_router_dev, dev, pirq, 11);
817 }
818
819 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
820 if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
821 pirq = 0x68;
822 mask = 0x400;
823 dev->irq = r->get(pirq_router_dev, dev, pirq);
824 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
825 }
826
827 /*
828 * Find the best IRQ to assign: use the one
829 * reported by the device if possible.
830 */
831 newirq = dev->irq;
832 if (!((1 << newirq) & mask)) {
833 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
834 else printk(KERN_WARNING "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq, pci_name(dev));
835 }
836 if (!newirq && assign) {
837 for (i = 0; i < 16; i++) {
838 if (!(mask & (1 << i)))
839 continue;
840 if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, SA_SHIRQ))
841 newirq = i;
842 }
843 }
844 DBG(" -> newirq=%d", newirq);
845
846 /* Check if it is hardcoded */
847 if ((pirq & 0xf0) == 0xf0) {
848 irq = pirq & 0xf;
849 DBG(" -> hardcoded IRQ %d\n", irq);
850 msg = "Hardcoded";
851 } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
852 ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
853 DBG(" -> got IRQ %d\n", irq);
854 msg = "Found";
855 } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
856 DBG(" -> assigning IRQ %d", newirq);
857 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
858 eisa_set_level_irq(newirq);
859 DBG(" ... OK\n");
860 msg = "Assigned";
861 irq = newirq;
862 }
863 }
864
865 if (!irq) {
866 DBG(" ... failed\n");
867 if (newirq && mask == (1 << newirq)) {
868 msg = "Guessed";
869 irq = newirq;
870 } else
871 return 0;
872 }
873 printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
874
875 /* Update IRQ for all devices with the same pirq value */
876 while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
877 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
878 if (!pin)
879 continue;
880 pin--;
881 info = pirq_get_info(dev2);
882 if (!info)
883 continue;
884 if (info->irq[pin].link == pirq) {
885 /* We refuse to override the dev->irq information. Give a warning! */
886 if ( dev2->irq && dev2->irq != irq && \
887 (!(pci_probe & PCI_USE_PIRQ_MASK) || \
888 ((1 << dev2->irq) & mask)) ) {
889#ifndef CONFIG_PCI_MSI
890 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
891 pci_name(dev2), dev2->irq, irq);
892#endif
893 continue;
894 }
895 dev2->irq = irq;
896 pirq_penalty[irq]++;
897 if (dev != dev2)
898 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
899 }
900 }
901 return 1;
902}
903
904static void __init pcibios_fixup_irqs(void)
905{
906 struct pci_dev *dev = NULL;
907 u8 pin;
908
909 DBG("PCI: IRQ fixup\n");
910 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
911 /*
912 * If the BIOS has set an out of range IRQ number, just ignore it.
913 * Also keep track of which IRQ's are already in use.
914 */
915 if (dev->irq >= 16) {
916 DBG("%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
917 dev->irq = 0;
918 }
919 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
920 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
921 pirq_penalty[dev->irq] = 0;
922 pirq_penalty[dev->irq]++;
923 }
924
925 dev = NULL;
926 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
927 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
928#ifdef CONFIG_X86_IO_APIC
929 /*
930 * Recalculate IRQ numbers if we use the I/O APIC.
931 */
932 if (io_apic_assign_pci_irqs)
933 {
934 int irq;
935
936 if (pin) {
937 pin--; /* interrupt pins are numbered starting from 1 */
938 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
939 /*
940 * Busses behind bridges are typically not listed in the MP-table.
941 * In this case we have to look up the IRQ based on the parent bus,
942 * parent slot, and pin number. The SMP code detects such bridged
943 * busses itself so we should get into this branch reliably.
944 */
945 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
946 struct pci_dev * bridge = dev->bus->self;
947
948 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
949 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
950 PCI_SLOT(bridge->devfn), pin);
951 if (irq >= 0)
952 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
953 pci_name(bridge), 'A' + pin, irq);
954 }
955 if (irq >= 0) {
956 if (use_pci_vector() &&
957 !platform_legacy_irq(irq))
958 irq = IO_APIC_VECTOR(irq);
959
960 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
961 pci_name(dev), 'A' + pin, irq);
962 dev->irq = irq;
963 }
964 }
965 }
966#endif
967 /*
968 * Still no IRQ? Try to lookup one...
969 */
970 if (pin && !dev->irq)
971 pcibios_lookup_irq(dev, 0);
972 }
973}
974
975/*
976 * Work around broken HP Pavilion Notebooks which assign USB to
977 * IRQ 9 even though it is actually wired to IRQ 11
978 */
979static int __init fix_broken_hp_bios_irq9(struct dmi_system_id *d)
980{
981 if (!broken_hp_bios_irq9) {
982 broken_hp_bios_irq9 = 1;
983 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
984 }
985 return 0;
986}
987
988/*
989 * Work around broken Acer TravelMate 360 Notebooks which assign
990 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
991 */
992static int __init fix_acer_tm360_irqrouting(struct dmi_system_id *d)
993{
994 if (!acer_tm360_irqrouting) {
995 acer_tm360_irqrouting = 1;
996 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
997 }
998 return 0;
999}
1000
1001static struct dmi_system_id __initdata pciirq_dmi_table[] = {
1002 {
1003 .callback = fix_broken_hp_bios_irq9,
1004 .ident = "HP Pavilion N5400 Series Laptop",
1005 .matches = {
1006 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1007 DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1008 DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
1009 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1010 },
1011 },
1012 {
1013 .callback = fix_acer_tm360_irqrouting,
1014 .ident = "Acer TravelMate 36x Laptop",
1015 .matches = {
1016 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1017 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1018 },
1019 },
1020 { }
1021};
1022
1023static int __init pcibios_irq_init(void)
1024{
1025 DBG("PCI: IRQ init\n");
1026
1027 if (pcibios_enable_irq || raw_pci_ops == NULL)
1028 return 0;
1029
1030 dmi_check_system(pciirq_dmi_table);
1031
1032 pirq_table = pirq_find_routing_table();
1033
1034#ifdef CONFIG_PCI_BIOS
1035 if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1036 pirq_table = pcibios_get_irq_routing_table();
1037#endif
1038 if (pirq_table) {
1039 pirq_peer_trick();
1040 pirq_find_router(&pirq_router);
1041 if (pirq_table->exclusive_irqs) {
1042 int i;
1043 for (i=0; i<16; i++)
1044 if (!(pirq_table->exclusive_irqs & (1 << i)))
1045 pirq_penalty[i] += 100;
1046 }
1047 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1048 if (io_apic_assign_pci_irqs)
1049 pirq_table = NULL;
1050 }
1051
1052 pcibios_enable_irq = pirq_enable_irq;
1053
1054 pcibios_fixup_irqs();
1055 return 0;
1056}
1057
1058subsys_initcall(pcibios_irq_init);
1059
1060
c9c3e457 1061static void pirq_penalize_isa_irq(int irq, int active)
1da177e4
LT		 1062{
1063 /*
1064 * If any ISAPnP device reports an IRQ in its list of possible
1065 * IRQ's, we try to avoid assigning it to PCI devices.
1066 */
c9c3e457
DSL		 1067 if (irq < 16) {
1068 if (active)
1069 pirq_penalty[irq] += 1000;
1070 else
1071 pirq_penalty[irq] += 100;
1072 }
1da177e4
LT		 1073}
1074
c9c3e457 1075void pcibios_penalize_isa_irq(int irq, int active)
1da177e4 1076{
6153df7b 1077#ifdef CONFIG_ACPI
1da177e4 1078 if (!acpi_noirq)
c9c3e457 1079 acpi_penalize_isa_irq(irq, active);
1da177e4
LT		 1080 else
1081#endif
c9c3e457 1082 pirq_penalize_isa_irq(irq, active);
1da177e4
LT		 1083}
1084
1085static int pirq_enable_irq(struct pci_dev *dev)
1086{
1087 u8 pin;
1da177e4
LT		 1088 struct pci_dev *temp_dev;
1089
1090 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1091 if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1092 char *msg = "";
1093
1094 pin--; /* interrupt pins are numbered starting from 1 */
1095
1096 if (io_apic_assign_pci_irqs) {
1097 int irq;
1098
1099 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1100 /*
1101 * Busses behind bridges are typically not listed in the MP-table.
1102 * In this case we have to look up the IRQ based on the parent bus,
1103 * parent slot, and pin number. The SMP code detects such bridged
1104 * busses itself so we should get into this branch reliably.
1105 */
1106 temp_dev = dev;
1107 while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1108 struct pci_dev * bridge = dev->bus->self;
1109
1110 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1111 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1112 PCI_SLOT(bridge->devfn), pin);
1113 if (irq >= 0)
1114 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1115 pci_name(bridge), 'A' + pin, irq);
1116 dev = bridge;
1117 }
1118 dev = temp_dev;
1119 if (irq >= 0) {
1120#ifdef CONFIG_PCI_MSI
1121 if (!platform_legacy_irq(irq))
1122 irq = IO_APIC_VECTOR(irq);
1123#endif
1124 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1125 pci_name(dev), 'A' + pin, irq);
1126 dev->irq = irq;
1127 return 0;
1128 } else
1129 msg = " Probably buggy MP table.";
1130 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1131 msg = "";
1132 else
1133 msg = " Please try using pci=biosirq.";
1134
1135 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1136 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1137 return 0;
1138
1139 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1140 'A' + pin, pci_name(dev), msg);
1141 }
1da177e4
LT		 1142 return 0;
1143}
1144
1145int pci_vector_resources(int last, int nr_released)
1146{
1147 int count = nr_released;
1148
1149 int next = last;
1150 int offset = (last % 8);
1151
1152 while (next < FIRST_SYSTEM_VECTOR) {
1153 next += 8;
1154#ifdef CONFIG_X86_64
1155 if (next == IA32_SYSCALL_VECTOR)
1156 continue;
1157#else
1158 if (next == SYSCALL_VECTOR)
1159 continue;
1160#endif
1161 count++;
1162 if (next >= FIRST_SYSTEM_VECTOR) {
1163 if (offset%8) {
1164 next = FIRST_DEVICE_VECTOR + offset;
1165 offset++;
1166 continue;
1167 }
1168 count--;
1169 }
1170 }
1171
1172 return count;
1173}
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