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58d08319 JN |
1 | #ifndef _ASM_ARCH_CRIS_DMA_H |
2 | #define _ASM_ARCH_CRIS_DMA_H | |
3 | ||
4 | /* Defines for using and allocating dma channels. */ | |
5 | ||
6 | #define MAX_DMA_CHANNELS 12 /* 8 and 10 not used. */ | |
7 | ||
6f09963c JN |
8 | #define NETWORK_ETH_TX_DMA_NBR 0 /* Ethernet 0 out. */ |
9 | #define NETWORK_ETH_RX_DMA_NBR 1 /* Ethernet 0 in. */ | |
10 | ||
11 | #define IO_PROC_DMA_TX_DMA_NBR 4 /* IO processor DMA0 out. */ | |
12 | #define IO_PROC_DMA_RX_DMA_NBR 5 /* IO processor DMA0 in. */ | |
13 | ||
14 | #define ASYNC_SER3_TX_DMA_NBR 2 /* Asynchronous serial port 3 out. */ | |
15 | #define ASYNC_SER3_RX_DMA_NBR 3 /* Asynchronous serial port 3 in. */ | |
16 | ||
17 | #define ASYNC_SER2_TX_DMA_NBR 6 /* Asynchronous serial port 2 out. */ | |
18 | #define ASYNC_SER2_RX_DMA_NBR 7 /* Asynchronous serial port 2 in. */ | |
19 | ||
20 | #define ASYNC_SER1_TX_DMA_NBR 4 /* Asynchronous serial port 1 out. */ | |
21 | #define ASYNC_SER1_RX_DMA_NBR 5 /* Asynchronous serial port 1 in. */ | |
22 | ||
23 | #define SYNC_SER_TX_DMA_NBR 6 /* Synchronous serial port 0 out. */ | |
24 | #define SYNC_SER_RX_DMA_NBR 7 /* Synchronous serial port 0 in. */ | |
25 | ||
26 | #define ASYNC_SER0_TX_DMA_NBR 0 /* Asynchronous serial port 0 out. */ | |
27 | #define ASYNC_SER0_RX_DMA_NBR 1 /* Asynchronous serial port 0 in. */ | |
28 | ||
29 | #define STRCOP_TX_DMA_NBR 2 /* Stream co-processor out. */ | |
30 | #define STRCOP_RX_DMA_NBR 3 /* Stream co-processor in. */ | |
31 | ||
32 | #define dma_eth0 dma_eth | |
33 | #define dma_eth1 dma_eth | |
34 | ||
58d08319 JN |
35 | enum dma_owner { |
36 | dma_eth, | |
37 | dma_ser0, | |
38 | dma_ser1, | |
39 | dma_ser2, | |
40 | dma_ser3, | |
41 | dma_ser4, | |
42 | dma_iop, | |
43 | dma_sser, | |
44 | dma_strp, | |
45 | dma_h264, | |
46 | dma_jpeg | |
47 | }; | |
48 | ||
49 | int crisv32_request_dma(unsigned int dmanr, const char *device_id, | |
50 | unsigned options, unsigned bandwidth, enum dma_owner owner); | |
51 | void crisv32_free_dma(unsigned int dmanr); | |
52 | ||
53 | /* Masks used by crisv32_request_dma options: */ | |
54 | #define DMA_VERBOSE_ON_ERROR 1 | |
55 | #define DMA_PANIC_ON_ERROR (2|DMA_VERBOSE_ON_ERROR) | |
56 | #define DMA_INT_MEM 4 | |
57 | ||
58 | #endif /* _ASM_ARCH_CRIS_DMA_H */ |