[net-next-2.6.git] / arch / cris / include / arch-v32 / arch / hwregs / iop / iop_dmc_in_defs.h

#ifndef __iop_dmc_in_defs_h
#define __iop_dmc_in_defs_h

/*
 * This file is autogenerated from
 *   file:           ../../inst/io_proc/rtl/iop_dmc_in.r
 *     id:           iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
 *     last modfied: Mon Apr 11 16:08:45 2005
 *
 *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_dmc_in_defs.h ../../inst/io_proc/rtl/iop_dmc_in.r
 *      id: $Id: iop_dmc_in_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
 * Any changes here will be lost.
 *
 * -*- buffer-read-only: t -*-
 */
/* Main access macros */
#ifndef REG_RD
#define REG_RD( scope, inst, reg ) \
  REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_WR
#define REG_WR( scope, inst, reg, val ) \
  REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_VECT
#define REG_RD_VECT( scope, inst, reg, index ) \
  REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg + \
	    (index) * STRIDE_##scope##_##reg )
#endif

#ifndef REG_WR_VECT
#define REG_WR_VECT( scope, inst, reg, index, val ) \
  REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg + \
	     (index) * STRIDE_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_INT
#define REG_RD_INT( scope, inst, reg ) \
  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_WR_INT
#define REG_WR_INT( scope, inst, reg, val ) \
  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_INT_VECT
#define REG_RD_INT_VECT( scope, inst, reg, index ) \
  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
	    (index) * STRIDE_##scope##_##reg )
#endif

#ifndef REG_WR_INT_VECT
#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
	     (index) * STRIDE_##scope##_##reg, (val) )
#endif

#ifndef REG_TYPE_CONV
#define REG_TYPE_CONV( type, orgtype, val ) \
  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
#endif

#ifndef reg_page_size
#define reg_page_size 8192
#endif

#ifndef REG_ADDR
#define REG_ADDR( scope, inst, reg ) \
  ( (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_ADDR_VECT
#define REG_ADDR_VECT( scope, inst, reg, index ) \
  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
    (index) * STRIDE_##scope##_##reg )
#endif

/* C-code for register scope iop_dmc_in */

/* Register rw_cfg, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int sth_intr     : 3;
  unsigned int last_dis_dif : 1;
  unsigned int dummy1       : 28;
} reg_iop_dmc_in_rw_cfg;
#define REG_RD_ADDR_iop_dmc_in_rw_cfg 0
#define REG_WR_ADDR_iop_dmc_in_rw_cfg 0

/* Register rw_ctrl, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int dif_en     : 1;
  unsigned int dif_dis    : 1;
  unsigned int stream_clr : 1;
  unsigned int dummy1     : 29;
} reg_iop_dmc_in_rw_ctrl;
#define REG_RD_ADDR_iop_dmc_in_rw_ctrl 4
#define REG_WR_ADDR_iop_dmc_in_rw_ctrl 4

/* Register r_stat, scope iop_dmc_in, type r */
typedef struct {
  unsigned int dif_en : 1;
  unsigned int dummy1 : 31;
} reg_iop_dmc_in_r_stat;
#define REG_RD_ADDR_iop_dmc_in_r_stat 8

/* Register rw_stream_cmd, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int cmd : 10;
  unsigned int dummy1 : 6;
  unsigned int n   : 8;
  unsigned int dummy2 : 8;
} reg_iop_dmc_in_rw_stream_cmd;
#define REG_RD_ADDR_iop_dmc_in_rw_stream_cmd 12
#define REG_WR_ADDR_iop_dmc_in_rw_stream_cmd 12

/* Register rw_stream_wr_data, scope iop_dmc_in, type rw */
typedef unsigned int reg_iop_dmc_in_rw_stream_wr_data;
#define REG_RD_ADDR_iop_dmc_in_rw_stream_wr_data 16
#define REG_WR_ADDR_iop_dmc_in_rw_stream_wr_data 16

/* Register rw_stream_wr_data_last, scope iop_dmc_in, type rw */
typedef unsigned int reg_iop_dmc_in_rw_stream_wr_data_last;
#define REG_RD_ADDR_iop_dmc_in_rw_stream_wr_data_last 20
#define REG_WR_ADDR_iop_dmc_in_rw_stream_wr_data_last 20

/* Register rw_stream_ctrl, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int eop     : 1;
  unsigned int wait    : 1;
  unsigned int keep_md : 1;
  unsigned int size    : 3;
  unsigned int dummy1  : 26;
} reg_iop_dmc_in_rw_stream_ctrl;
#define REG_RD_ADDR_iop_dmc_in_rw_stream_ctrl 24
#define REG_WR_ADDR_iop_dmc_in_rw_stream_ctrl 24

/* Register r_stream_stat, scope iop_dmc_in, type r */
typedef struct {
  unsigned int sth            : 7;
  unsigned int dummy1         : 9;
  unsigned int full           : 1;
  unsigned int last_pkt       : 1;
  unsigned int data_md_valid  : 1;
  unsigned int ctxt_md_valid  : 1;
  unsigned int group_md_valid : 1;
  unsigned int stream_busy    : 1;
  unsigned int cmd_rdy        : 1;
  unsigned int dummy2         : 9;
} reg_iop_dmc_in_r_stream_stat;
#define REG_RD_ADDR_iop_dmc_in_r_stream_stat 28

/* Register r_data_descr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int ctrl : 8;
  unsigned int stat : 8;
  unsigned int md   : 16;
} reg_iop_dmc_in_r_data_descr;
#define REG_RD_ADDR_iop_dmc_in_r_data_descr 32

/* Register r_ctxt_descr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int ctrl : 8;
  unsigned int stat : 8;
  unsigned int md0  : 16;
} reg_iop_dmc_in_r_ctxt_descr;
#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr 36

/* Register r_ctxt_descr_md1, scope iop_dmc_in, type r */
typedef unsigned int reg_iop_dmc_in_r_ctxt_descr_md1;
#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr_md1 40

/* Register r_ctxt_descr_md2, scope iop_dmc_in, type r */
typedef unsigned int reg_iop_dmc_in_r_ctxt_descr_md2;
#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr_md2 44

/* Register r_group_descr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int ctrl : 8;
  unsigned int stat : 8;
  unsigned int md   : 16;
} reg_iop_dmc_in_r_group_descr;
#define REG_RD_ADDR_iop_dmc_in_r_group_descr 56

/* Register rw_data_descr, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int dummy1 : 16;
  unsigned int md : 16;
} reg_iop_dmc_in_rw_data_descr;
#define REG_RD_ADDR_iop_dmc_in_rw_data_descr 60
#define REG_WR_ADDR_iop_dmc_in_rw_data_descr 60

/* Register rw_ctxt_descr, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int dummy1 : 16;
  unsigned int md0 : 16;
} reg_iop_dmc_in_rw_ctxt_descr;
#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr 64
#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr 64

/* Register rw_ctxt_descr_md1, scope iop_dmc_in, type rw */
typedef unsigned int reg_iop_dmc_in_rw_ctxt_descr_md1;
#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr_md1 68
#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr_md1 68

/* Register rw_ctxt_descr_md2, scope iop_dmc_in, type rw */
typedef unsigned int reg_iop_dmc_in_rw_ctxt_descr_md2;
#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr_md2 72
#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr_md2 72

/* Register rw_group_descr, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int dummy1 : 16;
  unsigned int md : 16;
} reg_iop_dmc_in_rw_group_descr;
#define REG_RD_ADDR_iop_dmc_in_rw_group_descr 84
#define REG_WR_ADDR_iop_dmc_in_rw_group_descr 84

/* Register rw_intr_mask, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int data_md  : 1;
  unsigned int ctxt_md  : 1;
  unsigned int group_md : 1;
  unsigned int cmd_rdy  : 1;
  unsigned int sth      : 1;
  unsigned int full     : 1;
  unsigned int dummy1   : 26;
} reg_iop_dmc_in_rw_intr_mask;
#define REG_RD_ADDR_iop_dmc_in_rw_intr_mask 88
#define REG_WR_ADDR_iop_dmc_in_rw_intr_mask 88

/* Register rw_ack_intr, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int data_md  : 1;
  unsigned int ctxt_md  : 1;
  unsigned int group_md : 1;
  unsigned int cmd_rdy  : 1;
  unsigned int sth      : 1;
  unsigned int full     : 1;
  unsigned int dummy1   : 26;
} reg_iop_dmc_in_rw_ack_intr;
#define REG_RD_ADDR_iop_dmc_in_rw_ack_intr 92
#define REG_WR_ADDR_iop_dmc_in_rw_ack_intr 92

/* Register r_intr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int data_md  : 1;
  unsigned int ctxt_md  : 1;
  unsigned int group_md : 1;
  unsigned int cmd_rdy  : 1;
  unsigned int sth      : 1;
  unsigned int full     : 1;
  unsigned int dummy1   : 26;
} reg_iop_dmc_in_r_intr;
#define REG_RD_ADDR_iop_dmc_in_r_intr 96

/* Register r_masked_intr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int data_md  : 1;
  unsigned int ctxt_md  : 1;
  unsigned int group_md : 1;
  unsigned int cmd_rdy  : 1;
  unsigned int sth      : 1;
  unsigned int full     : 1;
  unsigned int dummy1   : 26;
} reg_iop_dmc_in_r_masked_intr;
#define REG_RD_ADDR_iop_dmc_in_r_masked_intr 100


/* Constants */
enum {
  regk_iop_dmc_in_ack_pkt                  = 0x00000100,
  regk_iop_dmc_in_array                    = 0x00000008,
  regk_iop_dmc_in_burst                    = 0x00000020,
  regk_iop_dmc_in_copy_next                = 0x00000010,
  regk_iop_dmc_in_copy_up                  = 0x00000020,
  regk_iop_dmc_in_dis_c                    = 0x00000010,
  regk_iop_dmc_in_dis_g                    = 0x00000020,
  regk_iop_dmc_in_lim1                     = 0x00000000,
  regk_iop_dmc_in_lim16                    = 0x00000004,
  regk_iop_dmc_in_lim2                     = 0x00000001,
  regk_iop_dmc_in_lim32                    = 0x00000005,
  regk_iop_dmc_in_lim4                     = 0x00000002,
  regk_iop_dmc_in_lim64                    = 0x00000006,
  regk_iop_dmc_in_lim8                     = 0x00000003,
  regk_iop_dmc_in_load_c                   = 0x00000200,
  regk_iop_dmc_in_load_c_n                 = 0x00000280,
  regk_iop_dmc_in_load_c_next              = 0x00000240,
  regk_iop_dmc_in_load_d                   = 0x00000140,
  regk_iop_dmc_in_load_g                   = 0x00000300,
  regk_iop_dmc_in_load_g_down              = 0x000003c0,
  regk_iop_dmc_in_load_g_next              = 0x00000340,
  regk_iop_dmc_in_load_g_up                = 0x00000380,
  regk_iop_dmc_in_next_en                  = 0x00000010,
  regk_iop_dmc_in_next_pkt                 = 0x00000010,
  regk_iop_dmc_in_no                       = 0x00000000,
  regk_iop_dmc_in_restore                  = 0x00000020,
  regk_iop_dmc_in_rw_cfg_default           = 0x00000000,
  regk_iop_dmc_in_rw_ctxt_descr_default    = 0x00000000,
  regk_iop_dmc_in_rw_ctxt_descr_md1_default = 0x00000000,
  regk_iop_dmc_in_rw_ctxt_descr_md2_default = 0x00000000,
  regk_iop_dmc_in_rw_data_descr_default    = 0x00000000,
  regk_iop_dmc_in_rw_group_descr_default   = 0x00000000,
  regk_iop_dmc_in_rw_intr_mask_default     = 0x00000000,
  regk_iop_dmc_in_rw_stream_ctrl_default   = 0x00000000,
  regk_iop_dmc_in_save_down                = 0x00000020,
  regk_iop_dmc_in_save_up                  = 0x00000020,
  regk_iop_dmc_in_set_reg                  = 0x00000050,
  regk_iop_dmc_in_set_w_size1              = 0x00000190,
  regk_iop_dmc_in_set_w_size2              = 0x000001a0,
  regk_iop_dmc_in_set_w_size4              = 0x000001c0,
  regk_iop_dmc_in_store_c                  = 0x00000002,
  regk_iop_dmc_in_store_descr              = 0x00000000,
  regk_iop_dmc_in_store_g                  = 0x00000004,
  regk_iop_dmc_in_store_md                 = 0x00000001,
  regk_iop_dmc_in_update_down              = 0x00000020,
  regk_iop_dmc_in_yes                      = 0x00000001
};
#endif /* __iop_dmc_in_defs_h */
Commit	Line	Data
51533b61 MS	1	#ifndef __iop_dmc_in_defs_h
	2	#define __iop_dmc_in_defs_h
	3
	4	/*
	5	* This file is autogenerated from
	6	* file: ../../inst/io_proc/rtl/iop_dmc_in.r
	7	* id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
	8	* last modfied: Mon Apr 11 16:08:45 2005
	9	*
	10	* by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_dmc_in_defs.h ../../inst/io_proc/rtl/iop_dmc_in.r
	11	* id: $Id: iop_dmc_in_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
	12	* Any changes here will be lost.
	13	*
	14	* -- buffer-read-only: t --
	15	*/
	16	/* Main access macros */
	17	#ifndef REG_RD
	18	#define REG_RD( scope, inst, reg ) \
	19	REG_READ( reg_##scope##_##reg, \
	20	(inst) + REG_RD_ADDR_##scope##_##reg )
	21	#endif
	22
	23	#ifndef REG_WR
	24	#define REG_WR( scope, inst, reg, val ) \
	25	REG_WRITE( reg_##scope##_##reg, \
	26	(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
	27	#endif
	28
	29	#ifndef REG_RD_VECT
	30	#define REG_RD_VECT( scope, inst, reg, index ) \
	31	REG_READ( reg_##scope##_##reg, \
	32	(inst) + REG_RD_ADDR_##scope##_##reg + \
	33	(index) * STRIDE_##scope##_##reg )
	34	#endif
	35
	36	#ifndef REG_WR_VECT
	37	#define REG_WR_VECT( scope, inst, reg, index, val ) \
	38	REG_WRITE( reg_##scope##_##reg, \
	39	(inst) + REG_WR_ADDR_##scope##_##reg + \
	40	(index) * STRIDE_##scope##_##reg, (val) )
	41	#endif
	42
	43	#ifndef REG_RD_INT
	44	#define REG_RD_INT( scope, inst, reg ) \
	45	REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
	46	#endif
	47
	48	#ifndef REG_WR_INT
	49	#define REG_WR_INT( scope, inst, reg, val ) \
	50	REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
	51	#endif
	52
	53	#ifndef REG_RD_INT_VECT
	54	#define REG_RD_INT_VECT( scope, inst, reg, index ) \
	55	REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
	56	(index) * STRIDE_##scope##_##reg )
	57	#endif
	58
	59	#ifndef REG_WR_INT_VECT
	60	#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
	61	REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
	62	(index) * STRIDE_##scope##_##reg, (val) )
	63	#endif
	64
65	#ifndef REG_TYPE_CONV
66	#define REG_TYPE_CONV( type, orgtype, val ) \
67	( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68	#endif
69
70	#ifndef reg_page_size
71	#define reg_page_size 8192
72	#endif
73
74	#ifndef REG_ADDR
75	#define REG_ADDR( scope, inst, reg ) \
76	( (inst) + REG_RD_ADDR_##scope##_##reg )
77	#endif
78
79	#ifndef REG_ADDR_VECT
80	#define REG_ADDR_VECT( scope, inst, reg, index ) \
81	( (inst) + REG_RD_ADDR_##scope##_##reg + \
82	(index) * STRIDE_##scope##_##reg )
83	#endif
84
85	/* C-code for register scope iop_dmc_in */
86
87	/* Register rw_cfg, scope iop_dmc_in, type rw */
88	typedef struct {
89	unsigned int sth_intr : 3;
90	unsigned int last_dis_dif : 1;
91	unsigned int dummy1 : 28;
92	} reg_iop_dmc_in_rw_cfg;
93	#define REG_RD_ADDR_iop_dmc_in_rw_cfg 0
94	#define REG_WR_ADDR_iop_dmc_in_rw_cfg 0
95
96	/* Register rw_ctrl, scope iop_dmc_in, type rw */
97	typedef struct {
98	unsigned int dif_en : 1;
99	unsigned int dif_dis : 1;
100	unsigned int stream_clr : 1;
101	unsigned int dummy1 : 29;
102	} reg_iop_dmc_in_rw_ctrl;
103	#define REG_RD_ADDR_iop_dmc_in_rw_ctrl 4
104	#define REG_WR_ADDR_iop_dmc_in_rw_ctrl 4
105
106	/* Register r_stat, scope iop_dmc_in, type r */
107	typedef struct {
108	unsigned int dif_en : 1;
109	unsigned int dummy1 : 31;
110	} reg_iop_dmc_in_r_stat;
111	#define REG_RD_ADDR_iop_dmc_in_r_stat 8
112
113	/* Register rw_stream_cmd, scope iop_dmc_in, type rw */
114	typedef struct {
115	unsigned int cmd : 10;
116	unsigned int dummy1 : 6;
117	unsigned int n : 8;
118	unsigned int dummy2 : 8;
119	} reg_iop_dmc_in_rw_stream_cmd;
120	#define REG_RD_ADDR_iop_dmc_in_rw_stream_cmd 12
121	#define REG_WR_ADDR_iop_dmc_in_rw_stream_cmd 12
122
123	/* Register rw_stream_wr_data, scope iop_dmc_in, type rw */
124	typedef unsigned int reg_iop_dmc_in_rw_stream_wr_data;
125	#define REG_RD_ADDR_iop_dmc_in_rw_stream_wr_data 16
126	#define REG_WR_ADDR_iop_dmc_in_rw_stream_wr_data 16
127
128	/* Register rw_stream_wr_data_last, scope iop_dmc_in, type rw */
129	typedef unsigned int reg_iop_dmc_in_rw_stream_wr_data_last;
130	#define REG_RD_ADDR_iop_dmc_in_rw_stream_wr_data_last 20
131	#define REG_WR_ADDR_iop_dmc_in_rw_stream_wr_data_last 20
132
133	/* Register rw_stream_ctrl, scope iop_dmc_in, type rw */
134	typedef struct {
135	unsigned int eop : 1;
136	unsigned int wait : 1;
137	unsigned int keep_md : 1;
138	unsigned int size : 3;
139	unsigned int dummy1 : 26;
140	} reg_iop_dmc_in_rw_stream_ctrl;
141	#define REG_RD_ADDR_iop_dmc_in_rw_stream_ctrl 24
142	#define REG_WR_ADDR_iop_dmc_in_rw_stream_ctrl 24
143
144	/* Register r_stream_stat, scope iop_dmc_in, type r */
145	typedef struct {
146	unsigned int sth : 7;
147	unsigned int dummy1 : 9;
148	unsigned int full : 1;
149	unsigned int last_pkt : 1;
150	unsigned int data_md_valid : 1;
151	unsigned int ctxt_md_valid : 1;
152	unsigned int group_md_valid : 1;
153	unsigned int stream_busy : 1;
154	unsigned int cmd_rdy : 1;
155	unsigned int dummy2 : 9;
156	} reg_iop_dmc_in_r_stream_stat;
157	#define REG_RD_ADDR_iop_dmc_in_r_stream_stat 28
158
159	/* Register r_data_descr, scope iop_dmc_in, type r */
160	typedef struct {
161	unsigned int ctrl : 8;
162	unsigned int stat : 8;
163	unsigned int md : 16;
164	} reg_iop_dmc_in_r_data_descr;
165	#define REG_RD_ADDR_iop_dmc_in_r_data_descr 32
166
167	/* Register r_ctxt_descr, scope iop_dmc_in, type r */
168	typedef struct {
169	unsigned int ctrl : 8;
170	unsigned int stat : 8;
171	unsigned int md0 : 16;
172	} reg_iop_dmc_in_r_ctxt_descr;
173	#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr 36
174
175	/* Register r_ctxt_descr_md1, scope iop_dmc_in, type r */
176	typedef unsigned int reg_iop_dmc_in_r_ctxt_descr_md1;
177	#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr_md1 40
178
179	/* Register r_ctxt_descr_md2, scope iop_dmc_in, type r */
180	typedef unsigned int reg_iop_dmc_in_r_ctxt_descr_md2;
181	#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr_md2 44
182
183	/* Register r_group_descr, scope iop_dmc_in, type r */
184	typedef struct {
185	unsigned int ctrl : 8;
186	unsigned int stat : 8;
187	unsigned int md : 16;
188	} reg_iop_dmc_in_r_group_descr;
189	#define REG_RD_ADDR_iop_dmc_in_r_group_descr 56
190
191	/* Register rw_data_descr, scope iop_dmc_in, type rw */
192	typedef struct {
193	unsigned int dummy1 : 16;
194	unsigned int md : 16;
195	} reg_iop_dmc_in_rw_data_descr;
196	#define REG_RD_ADDR_iop_dmc_in_rw_data_descr 60
197	#define REG_WR_ADDR_iop_dmc_in_rw_data_descr 60
198
199	/* Register rw_ctxt_descr, scope iop_dmc_in, type rw */
200	typedef struct {
201	unsigned int dummy1 : 16;
202	unsigned int md0 : 16;
203	} reg_iop_dmc_in_rw_ctxt_descr;
204	#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr 64
205	#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr 64
206
207	/* Register rw_ctxt_descr_md1, scope iop_dmc_in, type rw */
208	typedef unsigned int reg_iop_dmc_in_rw_ctxt_descr_md1;
209	#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr_md1 68
210	#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr_md1 68
211
212	/* Register rw_ctxt_descr_md2, scope iop_dmc_in, type rw */
213	typedef unsigned int reg_iop_dmc_in_rw_ctxt_descr_md2;
214	#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr_md2 72
215	#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr_md2 72
216
217	/* Register rw_group_descr, scope iop_dmc_in, type rw */
218	typedef struct {
219	unsigned int dummy1 : 16;
220	unsigned int md : 16;
221	} reg_iop_dmc_in_rw_group_descr;
222	#define REG_RD_ADDR_iop_dmc_in_rw_group_descr 84
223	#define REG_WR_ADDR_iop_dmc_in_rw_group_descr 84
224
225	/* Register rw_intr_mask, scope iop_dmc_in, type rw */
226	typedef struct {
227	unsigned int data_md : 1;
228	unsigned int ctxt_md : 1;
229	unsigned int group_md : 1;
230	unsigned int cmd_rdy : 1;
231	unsigned int sth : 1;
232	unsigned int full : 1;
233	unsigned int dummy1 : 26;
234	} reg_iop_dmc_in_rw_intr_mask;
235	#define REG_RD_ADDR_iop_dmc_in_rw_intr_mask 88
236	#define REG_WR_ADDR_iop_dmc_in_rw_intr_mask 88
237
238	/* Register rw_ack_intr, scope iop_dmc_in, type rw */
239	typedef struct {
240	unsigned int data_md : 1;
241	unsigned int ctxt_md : 1;
242	unsigned int group_md : 1;
243	unsigned int cmd_rdy : 1;
244	unsigned int sth : 1;
245	unsigned int full : 1;
246	unsigned int dummy1 : 26;
247	} reg_iop_dmc_in_rw_ack_intr;
248	#define REG_RD_ADDR_iop_dmc_in_rw_ack_intr 92
249	#define REG_WR_ADDR_iop_dmc_in_rw_ack_intr 92
250
251	/* Register r_intr, scope iop_dmc_in, type r */
252	typedef struct {
253	unsigned int data_md : 1;
254	unsigned int ctxt_md : 1;
255	unsigned int group_md : 1;
256	unsigned int cmd_rdy : 1;
257	unsigned int sth : 1;
258	unsigned int full : 1;
259	unsigned int dummy1 : 26;
260	} reg_iop_dmc_in_r_intr;
261	#define REG_RD_ADDR_iop_dmc_in_r_intr 96
262
263	/* Register r_masked_intr, scope iop_dmc_in, type r */
264	typedef struct {
265	unsigned int data_md : 1;
266	unsigned int ctxt_md : 1;
267	unsigned int group_md : 1;
268	unsigned int cmd_rdy : 1;
269	unsigned int sth : 1;
270	unsigned int full : 1;
271	unsigned int dummy1 : 26;
272	} reg_iop_dmc_in_r_masked_intr;
273	#define REG_RD_ADDR_iop_dmc_in_r_masked_intr 100
274
275
276	/* Constants */
277	enum {
278	regk_iop_dmc_in_ack_pkt = 0x00000100,
279	regk_iop_dmc_in_array = 0x00000008,
280	regk_iop_dmc_in_burst = 0x00000020,
281	regk_iop_dmc_in_copy_next = 0x00000010,
282	regk_iop_dmc_in_copy_up = 0x00000020,
283	regk_iop_dmc_in_dis_c = 0x00000010,
284	regk_iop_dmc_in_dis_g = 0x00000020,
285	regk_iop_dmc_in_lim1 = 0x00000000,
286	regk_iop_dmc_in_lim16 = 0x00000004,
287	regk_iop_dmc_in_lim2 = 0x00000001,
288	regk_iop_dmc_in_lim32 = 0x00000005,
289	regk_iop_dmc_in_lim4 = 0x00000002,
290	regk_iop_dmc_in_lim64 = 0x00000006,
291	regk_iop_dmc_in_lim8 = 0x00000003,
292	regk_iop_dmc_in_load_c = 0x00000200,
293	regk_iop_dmc_in_load_c_n = 0x00000280,
294	regk_iop_dmc_in_load_c_next = 0x00000240,
295	regk_iop_dmc_in_load_d = 0x00000140,
296	regk_iop_dmc_in_load_g = 0x00000300,
297	regk_iop_dmc_in_load_g_down = 0x000003c0,
298	regk_iop_dmc_in_load_g_next = 0x00000340,
299	regk_iop_dmc_in_load_g_up = 0x00000380,
300	regk_iop_dmc_in_next_en = 0x00000010,
301	regk_iop_dmc_in_next_pkt = 0x00000010,
302	regk_iop_dmc_in_no = 0x00000000,
303	regk_iop_dmc_in_restore = 0x00000020,
304	regk_iop_dmc_in_rw_cfg_default = 0x00000000,
305	regk_iop_dmc_in_rw_ctxt_descr_default = 0x00000000,
306	regk_iop_dmc_in_rw_ctxt_descr_md1_default = 0x00000000,
307	regk_iop_dmc_in_rw_ctxt_descr_md2_default = 0x00000000,
308	regk_iop_dmc_in_rw_data_descr_default = 0x00000000,
309	regk_iop_dmc_in_rw_group_descr_default = 0x00000000,
310	regk_iop_dmc_in_rw_intr_mask_default = 0x00000000,
311	regk_iop_dmc_in_rw_stream_ctrl_default = 0x00000000,
312	regk_iop_dmc_in_save_down = 0x00000020,
313	regk_iop_dmc_in_save_up = 0x00000020,
314	regk_iop_dmc_in_set_reg = 0x00000050,
315	regk_iop_dmc_in_set_w_size1 = 0x00000190,
316	regk_iop_dmc_in_set_w_size2 = 0x000001a0,
317	regk_iop_dmc_in_set_w_size4 = 0x000001c0,
318	regk_iop_dmc_in_store_c = 0x00000002,
319	regk_iop_dmc_in_store_descr = 0x00000000,
320	regk_iop_dmc_in_store_g = 0x00000004,
321	regk_iop_dmc_in_store_md = 0x00000001,
322	regk_iop_dmc_in_update_down = 0x00000020,
323	regk_iop_dmc_in_yes = 0x00000001
324	};
325	#endif /* __iop_dmc_in_defs_h */