]> bbs.cooldavid.org Git - net-next-2.6.git/blame - arch/cris/include/arch-v32/arch/hwregs/iop/asm/iop_fifo_out_extra_defs_asm.h
[CRIS] Move header files from include to arch/cris/include.
[net-next-2.6.git] / arch / cris / include / arch-v32 / arch / hwregs / iop / asm / iop_fifo_out_extra_defs_asm.h
CommitLineData
51533b61
MS
1#ifndef __iop_fifo_out_extra_defs_asm_h
2#define __iop_fifo_out_extra_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/io_proc/rtl/iop_fifo_out_extra.r
7 * id: <not found>
8 * last modfied: Mon Apr 11 16:10:10 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_out_extra_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_out_extra.r
11 * id: $Id: iop_fifo_out_extra_defs_asm.h,v 1.1 2005/04/24 18:31:06 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16
17#ifndef REG_FIELD
18#define REG_FIELD( scope, reg, field, value ) \
19 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20#define REG_FIELD_X_( value, shift ) ((value) << shift)
21#endif
22
23#ifndef REG_STATE
24#define REG_STATE( scope, reg, field, symbolic_value ) \
25 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26#define REG_STATE_X_( k, shift ) (k << shift)
27#endif
28
29#ifndef REG_MASK
30#define REG_MASK( scope, reg, field ) \
31 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33#endif
34
35#ifndef REG_LSB
36#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37#endif
38
39#ifndef REG_BIT
40#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41#endif
42
43#ifndef REG_ADDR
44#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46#endif
47
48#ifndef REG_ADDR_VECT
49#define REG_ADDR_VECT( scope, inst, reg, index ) \
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51 STRIDE_##scope##_##reg )
52#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53 ((inst) + offs + (index) * stride)
54#endif
55
56/* Register rs_rd_data, scope iop_fifo_out_extra, type rs */
57#define reg_iop_fifo_out_extra_rs_rd_data_offset 0
58
59/* Register r_rd_data, scope iop_fifo_out_extra, type r */
60#define reg_iop_fifo_out_extra_r_rd_data_offset 4
61
62/* Register r_stat, scope iop_fifo_out_extra, type r */
63#define reg_iop_fifo_out_extra_r_stat___avail_bytes___lsb 0
64#define reg_iop_fifo_out_extra_r_stat___avail_bytes___width 4
65#define reg_iop_fifo_out_extra_r_stat___last___lsb 4
66#define reg_iop_fifo_out_extra_r_stat___last___width 8
67#define reg_iop_fifo_out_extra_r_stat___dif_in_en___lsb 12
68#define reg_iop_fifo_out_extra_r_stat___dif_in_en___width 1
69#define reg_iop_fifo_out_extra_r_stat___dif_in_en___bit 12
70#define reg_iop_fifo_out_extra_r_stat___dif_out_en___lsb 13
71#define reg_iop_fifo_out_extra_r_stat___dif_out_en___width 1
72#define reg_iop_fifo_out_extra_r_stat___dif_out_en___bit 13
73#define reg_iop_fifo_out_extra_r_stat___zero_data_last___lsb 14
74#define reg_iop_fifo_out_extra_r_stat___zero_data_last___width 1
75#define reg_iop_fifo_out_extra_r_stat___zero_data_last___bit 14
76#define reg_iop_fifo_out_extra_r_stat_offset 8
77
78/* Register rw_strb_dif_out, scope iop_fifo_out_extra, type rw */
79#define reg_iop_fifo_out_extra_rw_strb_dif_out_offset 12
80
81/* Register rw_intr_mask, scope iop_fifo_out_extra, type rw */
82#define reg_iop_fifo_out_extra_rw_intr_mask___urun___lsb 0
83#define reg_iop_fifo_out_extra_rw_intr_mask___urun___width 1
84#define reg_iop_fifo_out_extra_rw_intr_mask___urun___bit 0
85#define reg_iop_fifo_out_extra_rw_intr_mask___last_data___lsb 1
86#define reg_iop_fifo_out_extra_rw_intr_mask___last_data___width 1
87#define reg_iop_fifo_out_extra_rw_intr_mask___last_data___bit 1
88#define reg_iop_fifo_out_extra_rw_intr_mask___dav___lsb 2
89#define reg_iop_fifo_out_extra_rw_intr_mask___dav___width 1
90#define reg_iop_fifo_out_extra_rw_intr_mask___dav___bit 2
91#define reg_iop_fifo_out_extra_rw_intr_mask___free___lsb 3
92#define reg_iop_fifo_out_extra_rw_intr_mask___free___width 1
93#define reg_iop_fifo_out_extra_rw_intr_mask___free___bit 3
94#define reg_iop_fifo_out_extra_rw_intr_mask___orun___lsb 4
95#define reg_iop_fifo_out_extra_rw_intr_mask___orun___width 1
96#define reg_iop_fifo_out_extra_rw_intr_mask___orun___bit 4
97#define reg_iop_fifo_out_extra_rw_intr_mask_offset 16
98
99/* Register rw_ack_intr, scope iop_fifo_out_extra, type rw */
100#define reg_iop_fifo_out_extra_rw_ack_intr___urun___lsb 0
101#define reg_iop_fifo_out_extra_rw_ack_intr___urun___width 1
102#define reg_iop_fifo_out_extra_rw_ack_intr___urun___bit 0
103#define reg_iop_fifo_out_extra_rw_ack_intr___last_data___lsb 1
104#define reg_iop_fifo_out_extra_rw_ack_intr___last_data___width 1
105#define reg_iop_fifo_out_extra_rw_ack_intr___last_data___bit 1
106#define reg_iop_fifo_out_extra_rw_ack_intr___dav___lsb 2
107#define reg_iop_fifo_out_extra_rw_ack_intr___dav___width 1
108#define reg_iop_fifo_out_extra_rw_ack_intr___dav___bit 2
109#define reg_iop_fifo_out_extra_rw_ack_intr___free___lsb 3
110#define reg_iop_fifo_out_extra_rw_ack_intr___free___width 1
111#define reg_iop_fifo_out_extra_rw_ack_intr___free___bit 3
112#define reg_iop_fifo_out_extra_rw_ack_intr___orun___lsb 4
113#define reg_iop_fifo_out_extra_rw_ack_intr___orun___width 1
114#define reg_iop_fifo_out_extra_rw_ack_intr___orun___bit 4
115#define reg_iop_fifo_out_extra_rw_ack_intr_offset 20
116
117/* Register r_intr, scope iop_fifo_out_extra, type r */
118#define reg_iop_fifo_out_extra_r_intr___urun___lsb 0
119#define reg_iop_fifo_out_extra_r_intr___urun___width 1
120#define reg_iop_fifo_out_extra_r_intr___urun___bit 0
121#define reg_iop_fifo_out_extra_r_intr___last_data___lsb 1
122#define reg_iop_fifo_out_extra_r_intr___last_data___width 1
123#define reg_iop_fifo_out_extra_r_intr___last_data___bit 1
124#define reg_iop_fifo_out_extra_r_intr___dav___lsb 2
125#define reg_iop_fifo_out_extra_r_intr___dav___width 1
126#define reg_iop_fifo_out_extra_r_intr___dav___bit 2
127#define reg_iop_fifo_out_extra_r_intr___free___lsb 3
128#define reg_iop_fifo_out_extra_r_intr___free___width 1
129#define reg_iop_fifo_out_extra_r_intr___free___bit 3
130#define reg_iop_fifo_out_extra_r_intr___orun___lsb 4
131#define reg_iop_fifo_out_extra_r_intr___orun___width 1
132#define reg_iop_fifo_out_extra_r_intr___orun___bit 4
133#define reg_iop_fifo_out_extra_r_intr_offset 24
134
135/* Register r_masked_intr, scope iop_fifo_out_extra, type r */
136#define reg_iop_fifo_out_extra_r_masked_intr___urun___lsb 0
137#define reg_iop_fifo_out_extra_r_masked_intr___urun___width 1
138#define reg_iop_fifo_out_extra_r_masked_intr___urun___bit 0
139#define reg_iop_fifo_out_extra_r_masked_intr___last_data___lsb 1
140#define reg_iop_fifo_out_extra_r_masked_intr___last_data___width 1
141#define reg_iop_fifo_out_extra_r_masked_intr___last_data___bit 1
142#define reg_iop_fifo_out_extra_r_masked_intr___dav___lsb 2
143#define reg_iop_fifo_out_extra_r_masked_intr___dav___width 1
144#define reg_iop_fifo_out_extra_r_masked_intr___dav___bit 2
145#define reg_iop_fifo_out_extra_r_masked_intr___free___lsb 3
146#define reg_iop_fifo_out_extra_r_masked_intr___free___width 1
147#define reg_iop_fifo_out_extra_r_masked_intr___free___bit 3
148#define reg_iop_fifo_out_extra_r_masked_intr___orun___lsb 4
149#define reg_iop_fifo_out_extra_r_masked_intr___orun___width 1
150#define reg_iop_fifo_out_extra_r_masked_intr___orun___bit 4
151#define reg_iop_fifo_out_extra_r_masked_intr_offset 28
152
153
154/* Constants */
155#define regk_iop_fifo_out_extra_no 0x00000000
156#define regk_iop_fifo_out_extra_rw_intr_mask_default 0x00000000
157#define regk_iop_fifo_out_extra_yes 0x00000001
158#endif /* __iop_fifo_out_extra_defs_asm_h */