]>
Commit | Line | Data |
---|---|---|
51533b61 MS |
1 | #ifndef _ASM_CRIS_ARCH_CACHE_H |
2 | #define _ASM_CRIS_ARCH_CACHE_H | |
3 | ||
556dcee7 | 4 | #include <arch/hwregs/dma.h> |
738af38b | 5 | |
51533b61 MS |
6 | /* A cache-line is 32 bytes. */ |
7 | #define L1_CACHE_BYTES 32 | |
8 | #define L1_CACHE_SHIFT 5 | |
51533b61 | 9 | |
6fdf581e JN |
10 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) |
11 | ||
738af38b JN |
12 | void flush_dma_list(dma_descr_data *descr); |
13 | void flush_dma_descr(dma_descr_data *descr, int flush_buf); | |
14 | ||
15 | #define flush_dma_context(c) \ | |
16 | flush_dma_list(phys_to_virt((c)->saved_data)); | |
17 | ||
18 | void cris_flush_cache_range(void *buf, unsigned long len); | |
19 | void cris_flush_cache(void); | |
20 | ||
51533b61 | 21 | #endif /* _ASM_CRIS_ARCH_CACHE_H */ |