[net-next-2.6.git] / arch / cris / include / arch-v10 / arch / io.h

#ifndef _ASM_ARCH_CRIS_IO_H
#define _ASM_ARCH_CRIS_IO_H

#include <arch/svinto.h>

/* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */

extern unsigned long gen_config_ii_shadow;
extern unsigned long port_g_data_shadow;
extern unsigned char port_pa_dir_shadow;
extern unsigned char port_pa_data_shadow;
extern unsigned char port_pb_i2c_shadow;
extern unsigned char port_pb_config_shadow;
extern unsigned char port_pb_dir_shadow;
extern unsigned char port_pb_data_shadow;
extern unsigned long r_timer_ctrl_shadow;

extern unsigned long port_cse1_shadow;
extern unsigned long port_csp0_shadow;
extern unsigned long port_csp4_shadow;

extern volatile unsigned long *port_cse1_addr;
extern volatile unsigned long *port_csp0_addr;
extern volatile unsigned long *port_csp4_addr;

/* macro for setting regs through a shadow -
 * r = register name (like R_PORT_PA_DATA)
 * s = shadow name (like port_pa_data_shadow)
 * b = bit number
 * v = value (0 or 1)
 */

#define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << (b))) | ((v) << (b))

/* The LED's on various Etrax-based products are set differently. */

#if defined(CONFIG_ETRAX_NO_LEDS) || defined(CONFIG_SVINTO_SIM)
#undef CONFIG_ETRAX_PA_LEDS
#undef CONFIG_ETRAX_PB_LEDS
#undef CONFIG_ETRAX_CSP0_LEDS
#define CRIS_LED_NETWORK_SET_G(x)
#define CRIS_LED_NETWORK_SET_R(x)
#define CRIS_LED_ACTIVE_SET_G(x)
#define CRIS_LED_ACTIVE_SET_R(x)
#define CRIS_LED_DISK_WRITE(x)
#define CRIS_LED_DISK_READ(x)
#endif

#if !defined(CONFIG_ETRAX_CSP0_LEDS)
#define CRIS_LED_BIT_SET(x)
#define CRIS_LED_BIT_CLR(x)
#endif

#define CRIS_LED_OFF    0x00
#define CRIS_LED_GREEN  0x01
#define CRIS_LED_RED    0x02
#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)

#if defined(CONFIG_ETRAX_NO_LEDS)
#define CRIS_LED_NETWORK_SET(x)
#else
#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
#define CRIS_LED_NETWORK_SET(x)                          \
	do {                                        \
		CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
	} while (0)
#else
#define CRIS_LED_NETWORK_SET(x)                          \
	do {                                        \
		CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
		CRIS_LED_NETWORK_SET_R((x) & CRIS_LED_RED);   \
	} while (0)
#endif
#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
#define CRIS_LED_ACTIVE_SET(x)                           \
	do {                                        \
		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
	} while (0)
#else
#define CRIS_LED_ACTIVE_SET(x)                           \
	do {                                        \
		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
		CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED);    \
	} while (0)
#endif
#endif

#ifdef CONFIG_ETRAX_PA_LEDS
#define CRIS_LED_NETWORK_SET_G(x) \
         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
#define CRIS_LED_NETWORK_SET_R(x) \
         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
#define CRIS_LED_ACTIVE_SET_G(x) \
         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
#define CRIS_LED_ACTIVE_SET_R(x) \
         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
#define CRIS_LED_DISK_WRITE(x) \
         do{\
                REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
                REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
        }while(0)
#define CRIS_LED_DISK_READ(x) \
	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, \
		CONFIG_ETRAX_LED3G, !(x))
#endif

#ifdef CONFIG_ETRAX_PB_LEDS
#define CRIS_LED_NETWORK_SET_G(x) \
         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
#define CRIS_LED_NETWORK_SET_R(x) \
         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
#define CRIS_LED_ACTIVE_SET_G(x) \
         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
#define CRIS_LED_ACTIVE_SET_R(x) \
         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
#define CRIS_LED_DISK_WRITE(x) \
        do{\
                REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
                REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
        }while(0)
#define CRIS_LED_DISK_READ(x) \
	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, \
		CONFIG_ETRAX_LED3G, !(x))
#endif

#ifdef CONFIG_ETRAX_CSP0_LEDS
#define CONFIGURABLE_LEDS\
        ((1 << CONFIG_ETRAX_LED1G ) | (1 << CONFIG_ETRAX_LED1R ) |\
         (1 << CONFIG_ETRAX_LED2G ) | (1 << CONFIG_ETRAX_LED2R ) |\
         (1 << CONFIG_ETRAX_LED3G ) | (1 << CONFIG_ETRAX_LED3R ) |\
         (1 << CONFIG_ETRAX_LED4G ) | (1 << CONFIG_ETRAX_LED4R ) |\
         (1 << CONFIG_ETRAX_LED5G ) | (1 << CONFIG_ETRAX_LED5R ) |\
         (1 << CONFIG_ETRAX_LED6G ) | (1 << CONFIG_ETRAX_LED6R ) |\
         (1 << CONFIG_ETRAX_LED7G ) | (1 << CONFIG_ETRAX_LED7R ) |\
         (1 << CONFIG_ETRAX_LED8Y ) | (1 << CONFIG_ETRAX_LED9Y ) |\
         (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\
         (1 << CONFIG_ETRAX_LED12R ))

#define CRIS_LED_NETWORK_SET_G(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
#define CRIS_LED_NETWORK_SET_R(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
#define CRIS_LED_ACTIVE_SET_G(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
#define CRIS_LED_ACTIVE_SET_R(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
#define CRIS_LED_DISK_WRITE(x) \
        do{\
                REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
                REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
        }while(0)
#define CRIS_LED_DISK_READ(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
#define CRIS_LED_BIT_SET(x)\
        do{\
                if((( 1 << x) & CONFIGURABLE_LEDS)  != 0)\
                       REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
        }while(0)
#define CRIS_LED_BIT_CLR(x)\
        do{\
                if((( 1 << x) & CONFIGURABLE_LEDS)  != 0)\
                       REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\
        }while(0)
#endif

#
#ifdef CONFIG_ETRAX_SOFT_SHUTDOWN
#define SOFT_SHUTDOWN() \
          REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_SHUTDOWN_BIT, 1)
#else
#define SOFT_SHUTDOWN()
#endif

/* Console I/O for simulated etrax100.  Use #ifdef so erroneous
   use will be evident. */
#ifdef CONFIG_SVINTO_SIM
  /* Let's use the ucsim interface since it lets us do write(2, ...) */
#define SIMCOUT(s,len)							\
  asm ("moveq 4,$r9	\n\t"						\
       "moveq 2,$r10	\n\t"						\
       "move.d %0,$r11	\n\t"						\
       "move.d %1,$r12	\n\t"						\
       "push $irp	\n\t"						\
       "move 0f,$irp	\n\t"						\
       "jump -6809	\n"						\
       "0:		\n\t"						\
       "pop $irp"							\
       : : "rm" (s), "rm" (len) : "r9","r10","r11","r12","memory")
#define TRACE_ON() __extension__ \
 ({ int _Foofoo; __asm__ volatile ("bmod [%0],%0" : "=r" (_Foofoo) : "0" \
			       (255)); _Foofoo; })

#define TRACE_OFF() do { __asm__ volatile ("bmod [%0],%0" :: "r" (254)); } while (0)
#define SIM_END() do { __asm__ volatile ("bmod [%0],%0" :: "r" (28)); } while (0)
#define CRIS_CYCLES() __extension__ \
 ({ unsigned long c; asm ("bmod [%1],%0" : "=r" (c) : "r" (27)); c;})
#endif /* ! defined CONFIG_SVINTO_SIM */

#endif
Commit	Line	Data
1da177e4 LT	1	#ifndef _ASM_ARCH_CRIS_IO_H
	2	#define _ASM_ARCH_CRIS_IO_H
	3
556dcee7	4	#include <arch/svinto.h>
1da177e4 LT	5
	6	/* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */
	7
63245d2c	8	extern unsigned long gen_config_ii_shadow;
1da177e4 LT	9	extern unsigned long port_g_data_shadow;
	10	extern unsigned char port_pa_dir_shadow;
	11	extern unsigned char port_pa_data_shadow;
	12	extern unsigned char port_pb_i2c_shadow;
	13	extern unsigned char port_pb_config_shadow;
	14	extern unsigned char port_pb_dir_shadow;
	15	extern unsigned char port_pb_data_shadow;
	16	extern unsigned long r_timer_ctrl_shadow;
	17
	18	extern unsigned long port_cse1_shadow;
	19	extern unsigned long port_csp0_shadow;
	20	extern unsigned long port_csp4_shadow;
	21
	22	extern volatile unsigned long *port_cse1_addr;
	23	extern volatile unsigned long *port_csp0_addr;
	24	extern volatile unsigned long *port_csp4_addr;
	25
0d9f2e6f	26	/* macro for setting regs through a shadow -
1da177e4 LT	27	* r = register name (like R_PORT_PA_DATA)
	28	* s = shadow name (like port_pa_data_shadow)
	29	* b = bit number
	30	* v = value (0 or 1)
	31	*/
	32
	33	#define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << (b))) \| ((v) << (b))
	34
	35	/* The LED's on various Etrax-based products are set differently. */
	36
	37	#if defined(CONFIG_ETRAX_NO_LEDS) \|\| defined(CONFIG_SVINTO_SIM)
	38	#undef CONFIG_ETRAX_PA_LEDS
	39	#undef CONFIG_ETRAX_PB_LEDS
	40	#undef CONFIG_ETRAX_CSP0_LEDS
0d9f2e6f JN	41	#define CRIS_LED_NETWORK_SET_G(x)
	42	#define CRIS_LED_NETWORK_SET_R(x)
	43	#define CRIS_LED_ACTIVE_SET_G(x)
	44	#define CRIS_LED_ACTIVE_SET_R(x)
	45	#define CRIS_LED_DISK_WRITE(x)
	46	#define CRIS_LED_DISK_READ(x)
1da177e4 LT	47	#endif
	48
	49	#if !defined(CONFIG_ETRAX_CSP0_LEDS)
0d9f2e6f JN	50	#define CRIS_LED_BIT_SET(x)
0d9f2e6f JN	51	#define CRIS_LED_BIT_CLR(x)
1da177e4 LT	52	#endif
1da177e4 LT	53
0d9f2e6f JN	54	#define CRIS_LED_OFF 0x00
	55	#define CRIS_LED_GREEN 0x01
	56	#define CRIS_LED_RED 0x02
	57	#define CRIS_LED_ORANGE (CRIS_LED_GREEN \| CRIS_LED_RED)
1da177e4	58
0d9f2e6f JN	59	#if defined(CONFIG_ETRAX_NO_LEDS)
	60	#define CRIS_LED_NETWORK_SET(x)
	61	#else
	62	#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
	63	#define CRIS_LED_NETWORK_SET(x) \
1da177e4	64	do { \
0d9f2e6f	65	CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
1da177e4 LT	66	} while (0)
1da177e4 LT	67	#else
0d9f2e6f	68	#define CRIS_LED_NETWORK_SET(x) \
1da177e4	69	do { \
0d9f2e6f JN	70	CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
0d9f2e6f JN	71	CRIS_LED_NETWORK_SET_R((x) & CRIS_LED_RED); \
1da177e4 LT	72	} while (0)
1da177e4 LT	73	#endif
0d9f2e6f JN	74	#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
0d9f2e6f JN	75	#define CRIS_LED_ACTIVE_SET(x) \
1da177e4	76	do { \
0d9f2e6f	77	CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
1da177e4 LT	78	} while (0)
1da177e4 LT	79	#else
0d9f2e6f	80	#define CRIS_LED_ACTIVE_SET(x) \
1da177e4	81	do { \
0d9f2e6f JN	82	CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
0d9f2e6f JN	83	CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED); \
1da177e4 LT	84	} while (0)
1da177e4 LT	85	#endif
0d9f2e6f	86	#endif
1da177e4 LT	87
1da177e4 LT	88	#ifdef CONFIG_ETRAX_PA_LEDS
0d9f2e6f	89	#define CRIS_LED_NETWORK_SET_G(x) \
1da177e4	90	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
0d9f2e6f	91	#define CRIS_LED_NETWORK_SET_R(x) \
1da177e4	92	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
0d9f2e6f	93	#define CRIS_LED_ACTIVE_SET_G(x) \
1da177e4	94	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
0d9f2e6f	95	#define CRIS_LED_ACTIVE_SET_R(x) \
1da177e4	96	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
0d9f2e6f	97	#define CRIS_LED_DISK_WRITE(x) \
1da177e4 LT	98	do{\
	99	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
	100	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
	101	}while(0)
0d9f2e6f JN	102	#define CRIS_LED_DISK_READ(x) \
	103	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, \
	104	CONFIG_ETRAX_LED3G, !(x))
1da177e4 LT	105	#endif
	106
	107	#ifdef CONFIG_ETRAX_PB_LEDS
0d9f2e6f	108	#define CRIS_LED_NETWORK_SET_G(x) \
1da177e4	109	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
0d9f2e6f	110	#define CRIS_LED_NETWORK_SET_R(x) \
1da177e4	111	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
0d9f2e6f	112	#define CRIS_LED_ACTIVE_SET_G(x) \
1da177e4	113	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
0d9f2e6f	114	#define CRIS_LED_ACTIVE_SET_R(x) \
1da177e4	115	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
0d9f2e6f	116	#define CRIS_LED_DISK_WRITE(x) \
1da177e4 LT	117	do{\
	118	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
	119	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
	120	}while(0)
0d9f2e6f JN	121	#define CRIS_LED_DISK_READ(x) \
	122	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, \
	123	CONFIG_ETRAX_LED3G, !(x))
1da177e4 LT	124	#endif
	125
	126	#ifdef CONFIG_ETRAX_CSP0_LEDS
	127	#define CONFIGURABLE_LEDS\
	128	((1 << CONFIG_ETRAX_LED1G ) \| (1 << CONFIG_ETRAX_LED1R ) \|\
	129	(1 << CONFIG_ETRAX_LED2G ) \| (1 << CONFIG_ETRAX_LED2R ) \|\
	130	(1 << CONFIG_ETRAX_LED3G ) \| (1 << CONFIG_ETRAX_LED3R ) \|\
	131	(1 << CONFIG_ETRAX_LED4G ) \| (1 << CONFIG_ETRAX_LED4R ) \|\
	132	(1 << CONFIG_ETRAX_LED5G ) \| (1 << CONFIG_ETRAX_LED5R ) \|\
	133	(1 << CONFIG_ETRAX_LED6G ) \| (1 << CONFIG_ETRAX_LED6R ) \|\
	134	(1 << CONFIG_ETRAX_LED7G ) \| (1 << CONFIG_ETRAX_LED7R ) \|\
	135	(1 << CONFIG_ETRAX_LED8Y ) \| (1 << CONFIG_ETRAX_LED9Y ) \|\
	136	(1 << CONFIG_ETRAX_LED10Y ) \|(1 << CONFIG_ETRAX_LED11Y )\|\
	137	(1 << CONFIG_ETRAX_LED12R ))
	138
0d9f2e6f	139	#define CRIS_LED_NETWORK_SET_G(x) \
1da177e4	140	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
0d9f2e6f	141	#define CRIS_LED_NETWORK_SET_R(x) \
1da177e4	142	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
0d9f2e6f	143	#define CRIS_LED_ACTIVE_SET_G(x) \
1da177e4	144	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
0d9f2e6f	145	#define CRIS_LED_ACTIVE_SET_R(x) \
1da177e4	146	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
0d9f2e6f	147	#define CRIS_LED_DISK_WRITE(x) \
1da177e4 LT	148	do{\
	149	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
	150	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
	151	}while(0)
0d9f2e6f	152	#define CRIS_LED_DISK_READ(x) \
1da177e4	153	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
0d9f2e6f	154	#define CRIS_LED_BIT_SET(x)\
1da177e4 LT	155	do{\
	156	if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
	157	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
	158	}while(0)
0d9f2e6f	159	#define CRIS_LED_BIT_CLR(x)\
1da177e4 LT	160	do{\
	161	if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
	162	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\
	163	}while(0)
	164	#endif
	165
	166	#
	167	#ifdef CONFIG_ETRAX_SOFT_SHUTDOWN
	168	#define SOFT_SHUTDOWN() \
	169	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_SHUTDOWN_BIT, 1)
	170	#else
	171	#define SOFT_SHUTDOWN()
	172	#endif
	173
	174	/* Console I/O for simulated etrax100. Use #ifdef so erroneous
	175	use will be evident. */
	176	#ifdef CONFIG_SVINTO_SIM
	177	/* Let's use the ucsim interface since it lets us do write(2, ...) */
	178	#define SIMCOUT(s,len) \
	179	asm ("moveq 4,$r9 \n\t" \
	180	"moveq 2,$r10 \n\t" \
	181	"move.d %0,$r11 \n\t" \
	182	"move.d %1,$r12 \n\t" \
	183	"push $irp \n\t" \
	184	"move 0f,$irp \n\t" \
	185	"jump -6809 \n" \
	186	"0: \n\t" \
	187	"pop $irp" \
	188	: : "rm" (s), "rm" (len) : "r9","r10","r11","r12","memory")
	189	#define TRACE_ON() __extension__ \
	190	({ int _Foofoo; __asm__ volatile ("bmod [%0],%0" : "=r" (_Foofoo) : "0" \
	191	(255)); _Foofoo; })
	192
	193	#define TRACE_OFF() do { __asm__ volatile ("bmod [%0],%0" :: "r" (254)); } while (0)
	194	#define SIM_END() do { __asm__ volatile ("bmod [%0],%0" :: "r" (28)); } while (0)
	195	#define CRIS_CYCLES() __extension__ \
	196	({ unsigned long c; asm ("bmod [%1],%0" : "=r" (c) : "r" (27)); c;})
	197	#endif /* ! defined CONFIG_SVINTO_SIM */
	198
	199	#endif